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r20836 Friday 8th February, 2013 at 14:40:27 UTC by R. Belmont
(MESS) Apple II: Another pass on tagmaps, plus preliminary emulation of the standard and extended 80-column cards for the IIe [R. Belmont]

[src/mess]	mess.mak
[src/mess/drivers]	apple2.c
[src/mess/includes]	apple2.h
[src/mess/machine]	a2eauxslot.h a2eext80col.c* a2eext80col.h* a2estd80col.c* a2estd80col.h* apple2.c apple2gs.c
[src/mess/video]	apple2.c apple2gs.c

trunk/src/mess/drivers/apple2.c

r20835	r20836
212	212	#include "machine/a2echoii.h"
213	213	#include "machine/a2arcadebd.h"
214	214	#include "machine/a2midi.h"
	215	#include "machine/a2estd80col.h"
	216	#include "machine/a2eext80col.h"
215	217
216	218	/***************************************************************************
217	219	PARAMETERS
r20835	r20836
635	637	SLOT_INTERFACE_END
636	638
637	639	static SLOT_INTERFACE_START(apple2eaux_cards)
	640	SLOT_INTERFACE("std80", A2EAUX_STD80COL) /* Apple IIe Standard 80 Column Card */
	641	SLOT_INTERFACE("ext80", A2EAUX_EXT80COL) /* Apple IIe Extended 80 Column Card */
638	642	SLOT_INTERFACE_END
639	643
640	644	static MACHINE_CONFIG_START( apple2_common, apple2_state )
r20835	r20836
721	725	MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl0", A2BUS_LANG, NULL)
722	726
723	727	MCFG_A2EAUXSLOT_BUS_ADD(AUXSLOT_TAG, "maincpu", a2eauxbus_intf)
724		MCFG_A2EAUXSLOT_SLOT_ADD(AUXSLOT_TAG, "slaux", apple2eaux_cards, NULL, NULL)
	728	MCFG_A2EAUXSLOT_SLOT_ADD(AUXSLOT_TAG, "aux", apple2eaux_cards, "ext80", NULL)   // default to an extended 80-column card
725	729
726	730	MACHINE_CONFIG_END
727	731
r20835	r20836
750	754
751	755	static MACHINE_CONFIG_DERIVED( mprof3, apple2e )
752	756	MCFG_MACHINE_START_OVERRIDE(apple2_state,apple2)
	757	MCFG_VIDEO_START_OVERRIDE(apple2_state,apple2c)
753	758
754	759	/* internal ram */
755	760	MCFG_RAM_MODIFY(RAM_TAG)
r20835	r20836
766	771
767	772	static MACHINE_CONFIG_DERIVED( apple2c, apple2ee )
768	773	MCFG_MACHINE_START_OVERRIDE(apple2_state,apple2)
	774	MCFG_VIDEO_START_OVERRIDE(apple2_state,apple2c)
769	775
770	776	MCFG_A2BUS_SLOT_REMOVE("sl1")   // IIc has no slots, of course :)
771	777	MCFG_A2BUS_SLOT_REMOVE("sl2")
r20835	r20836
778	784	// TODO: populate the IIc's other virtual slots with ONBOARD_ADD
779	785	MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl6", A2BUS_DISKII, NULL)
780	786
781		MCFG_A2EAUXSLOT_SLOT_REMOVE("slaux")
	787	MCFG_A2EAUXSLOT_SLOT_REMOVE("aux")
782	788	MCFG_A2EAUXSLOT_BUS_REMOVE(AUXSLOT_TAG)
	789
	790	MCFG_RAM_MODIFY(RAM_TAG)
	791	MCFG_RAM_DEFAULT_SIZE("128K")
	792	MCFG_RAM_EXTRA_OPTIONS("128K")
783	793	MACHINE_CONFIG_END
784	794
785	795	static MACHINE_CONFIG_DERIVED( apple2c_iwm, apple2c )

trunk/src/mess/mess.mak

r20835	r20836
695	695	$(MESS_MACHINE)/a2echoii.o \
696	696	$(MESS_MACHINE)/a2arcadebd.o \
697	697	$(MESS_MACHINE)/a2midi.o \
	698	$(MESS_MACHINE)/a2estd80col.o \
	699	$(MESS_MACHINE)/a2eext80col.o \
698	700	$(MESS_MACHINE)/lisa.o      \
699	701	$(MESS_DRIVERS)/lisa.o      \
700	702	$(MESS_MACHINE)/nubus.o     \

trunk/src/mess/machine/a2eauxslot.h

r20835	r20836
119	119	device_a2eauxslot_card_interface(const machine_config &mconfig, device_t &device);
120	120	virtual ~device_a2eauxslot_card_interface();
121	121
122		virtual void write_c07x(address_space &space, UINT8 offset, UINT8 data) { printf("a2eauxslot: unhandled write %02x to C07%x\n", data, offset); }
	122	virtual UINT8 read_auxram(UINT16 offset) { printf("a2eauxslot: unhandled auxram read @ %04x\n", offset); return 0xff; }
	123	virtual void write_auxram(UINT16 offset, UINT8 data) { printf("a2eauxslot: unhandled auxram write %02x @ %04x\n", data, offset); }
	124	virtual void write_c07x(address_space &space, UINT8 offset, UINT8 data) {}
	125	virtual UINT8 *get_vram_ptr() = 0;
	126	virtual bool allow_dhr() { return true; }
123	127
124	128	device_a2eauxslot_card_interface *next() const { return m_next; }
125	129

trunk/src/mess/machine/a2eext80col.c

r0	r20836
	1	/*********************************************************************
	2
	3	a2eext80col.c
	4
	5	Apple IIe Extended 80 Column Card (64K of RAM, double-hi-res)
	6
	7	*********************************************************************/
	8
	9	#include "emu.h"
	10	#include "includes/apple2.h"
	11	#include "machine/a2eext80col.h"
	12
	13
	14	/***************************************************************************
	15	PARAMETERS
	16	***************************************************************************/
	17
	18	//**************************************************************************
	19	//  GLOBAL VARIABLES
	20	//**************************************************************************
	21
	22	const device_type A2EAUX_EXT80COL = &device_creator<a2eaux_ext80col_device>;
	23
	24	//**************************************************************************
	25	//  LIVE DEVICE
	26	//**************************************************************************
	27
	28	a2eaux_ext80col_device::a2eaux_ext80col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	29	device_t(mconfig, A2EAUX_EXT80COL, "Apple IIe Extended 80-Column Card", tag, owner, clock),
	30	device_a2eauxslot_card_interface(mconfig, *this)
	31	{
	32	m_shortname = "a2eext80";
	33	}
	34
	35	a2eaux_ext80col_device::a2eaux_ext80col_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
	36	device_t(mconfig, type, name, tag, owner, clock),
	37	device_a2eauxslot_card_interface(mconfig, *this)
	38	{
	39	m_shortname = "a2eext80";
	40	}
	41
	42	//-------------------------------------------------
	43	//  device_start - device-specific startup
	44	//-------------------------------------------------
	45
	46	void a2eaux_ext80col_device::device_start()
	47	{
	48	set_a2eauxslot_device();
	49	}
	50
	51	void a2eaux_ext80col_device::device_reset()
	52	{
	53	}
	54
	55	UINT8 a2eaux_ext80col_device::read_auxram(UINT16 offset)
	56	{
	57	return m_ram[offset];
	58	}
	59
	60	void a2eaux_ext80col_device::write_auxram(UINT16 offset, UINT8 data)
	61	{
	62	m_ram[offset] = data;
	63	}
	64
	65	UINT8 *a2eaux_ext80col_device::get_vram_ptr()
	66	{
	67	return &m_ram[0];
	68	}
	69

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trunk/src/mess/machine/a2eext80col.h

r0	r20836
	1	/*********************************************************************
	2
	3	a2eext80col.c
	4
	5	Apple IIe Extended 80 Column Card
	6
	7	*********************************************************************/
	8
	9	#ifndef __A2EAUX_EXT80COL__
	10	#define __A2EAUX_EXT80COL__
	11
	12	#include "emu.h"
	13	#include "machine/a2eauxslot.h"
	14
	15	//**************************************************************************
	16	//  TYPE DEFINITIONS
	17	//**************************************************************************
	18
	19	class a2eaux_ext80col_device:
	20	public device_t,
	21	public device_a2eauxslot_card_interface
	22	{
	23	public:
	24	// construction/destruction
	25	a2eaux_ext80col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	26	a2eaux_ext80col_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
	27
	28	protected:
	29	virtual void device_start();
	30	virtual void device_reset();
	31
	32	virtual UINT8 read_auxram(UINT16 offset);
	33	virtual void write_auxram(UINT16 offset, UINT8 data);
	34	virtual UINT8 *get_vram_ptr();
	35	virtual bool allow_dhr() { return true; }
	36
	37	private:
	38	UINT8 m_ram[64*1024];
	39	};
	40
	41	// device type definition
	42	extern const device_type A2EAUX_EXT80COL;
	43
	44	#endif  /* __A2EAUX_EXT80COL__ */
	45

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trunk/src/mess/machine/apple2gs.c

r20835	r20836
1060	1060	case 0x78: case 0x79: case 0x7a: case 0x7b:
1061	1061	case 0x7c: case 0x7d: case 0x7e: case 0x7f:
1062	1062	offset |= (memregion("maincpu")->bytes() - 1) & ~0x3FFF;
1063		result = memregion("maincpu")->base()[offset];
	1063	result = m_rom[offset];
1064	1064	break;
1065	1065
1066	1066	case 0x21:  /* C021 - MONOCOLOR */
r20835	r20836
1564	1564
1565	1565	static UINT8 *apple2gs_getslotmem(running_machine &machine, offs_t address)
1566	1566	{
	1567	apple2gs_state *state = machine.driver_data<apple2gs_state>();
1567	1568	UINT8 *rom;
1568	1569
1569	1570	address %= 0x00FFFF;
1570	1571	assert(address >= 0xC000);
1571	1572	assert(address <= 0xCFFF);
1572	1573
1573		rom = machine.root_device().memregion("maincpu")->base();
	1574	rom = state->m_rom;
1574	1575	rom += 0x030000 % machine.root_device().memregion("maincpu")->bytes();
1575	1576	return &rom[address];
1576	1577	}
r20835	r20836
1878	1879	begin = 0x1000000 - state->memregion("maincpu")->bytes();
1879	1880	end = 0xffffff;
1880	1881	space.install_read_bank(begin, end, "bank3");
1881		state->membank("bank3")->set_base(state->memregion("maincpu")->base());
	1882	state->membank("bank3")->set_base(state->m_rom);
1882	1883
1883	1884	/* install new xxC000-xxCFFF handlers */
1884	1885	space.install_legacy_read_handler(0x00c000, 0x00cfff, FUNC(apple2gs_00Cxxx_r));

trunk/src/mess/machine/a2estd80col.c

r0	r20836
	1	/*********************************************************************
	2
	3	a2estd80col.c
	4
	5	Apple IIe Standard 80 Column Card (2K of RAM, no double-hi-res)
	6
	7	*********************************************************************/
	8
	9	#include "emu.h"
	10	#include "includes/apple2.h"
	11	#include "machine/a2estd80col.h"
	12
	13
	14	/***************************************************************************
	15	PARAMETERS
	16	***************************************************************************/
	17
	18	//**************************************************************************
	19	//  GLOBAL VARIABLES
	20	//**************************************************************************
	21
	22	const device_type A2EAUX_STD80COL = &device_creator<a2eaux_std80col_device>;
	23
	24	//**************************************************************************
	25	//  LIVE DEVICE
	26	//**************************************************************************
	27
	28	a2eaux_std80col_device::a2eaux_std80col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	29	device_t(mconfig, A2EAUX_STD80COL, "Apple IIe Standard 80-Column Card", tag, owner, clock),
	30	device_a2eauxslot_card_interface(mconfig, *this)
	31	{
	32	m_shortname = "a2estd80";
	33	}
	34
	35	a2eaux_std80col_device::a2eaux_std80col_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
	36	device_t(mconfig, type, name, tag, owner, clock),
	37	device_a2eauxslot_card_interface(mconfig, *this)
	38	{
	39	m_shortname = "a2estd80";
	40	}
	41
	42	//-------------------------------------------------
	43	//  device_start - device-specific startup
	44	//-------------------------------------------------
	45
	46	void a2eaux_std80col_device::device_start()
	47	{
	48	set_a2eauxslot_device();
	49	}
	50
	51	void a2eaux_std80col_device::device_reset()
	52	{
	53	}
	54
	55	UINT8 a2eaux_std80col_device::read_auxram(UINT16 offset)
	56	{
	57	if (offset < 0x800)
	58	{
	59	return m_ram[offset];
	60	}
	61
	62	return 0xff;
	63	}
	64
	65	void a2eaux_std80col_device::write_auxram(UINT16 offset, UINT8 data)
	66	{
	67	if (offset < 0x800)
	68	{
	69	m_ram[offset] = data;
	70	}
	71	}
	72
	73	UINT8 *a2eaux_std80col_device::get_vram_ptr()
	74	{
	75	return &m_ram[0];
	76	}
	77

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trunk/src/mess/machine/a2estd80col.h

r0	r20836
	1	/*********************************************************************
	2
	3	a2estd80col.c
	4
	5	Apple IIe Standard 80 Column Card
	6
	7	*********************************************************************/
	8
	9	#ifndef __A2EAUX_STD80COL__
	10	#define __A2EAUX_STD80COL__
	11
	12	#include "emu.h"
	13	#include "machine/a2eauxslot.h"
	14
	15	//**************************************************************************
	16	//  TYPE DEFINITIONS
	17	//**************************************************************************
	18
	19	class a2eaux_std80col_device:
	20	public device_t,
	21	public device_a2eauxslot_card_interface
	22	{
	23	public:
	24	// construction/destruction
	25	a2eaux_std80col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	26	a2eaux_std80col_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
	27
	28	protected:
	29	virtual void device_start();
	30	virtual void device_reset();
	31
	32	virtual UINT8 read_auxram(UINT16 offset);
	33	virtual void write_auxram(UINT16 offset, UINT8 data);
	34	virtual UINT8 *get_vram_ptr();
	35	virtual bool allow_dhr() { return false; }   // we don't allow DHR
	36
	37	private:
	38	UINT8 m_ram[2*1024];
	39	};
	40
	41	// device type definition
	42	extern const device_type A2EAUX_STD80COL;
	43
	44	#endif  /* __A2EAUX_STD80COL__ */
	45

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trunk/src/mess/machine/apple2.c

r20835	r20836
65	65	read8_delegate *rh;
66	66	write8_delegate *wh;
67	67	offs_t begin, end_r, end_w;
68		UINT8 *rbase, *wbase, *rom;
69		UINT32 rom_length, offset;
	68	UINT8 *rbase, *wbase;
	69	UINT32 offset;
70	70	bank_disposition_t bank_disposition;
71	71	int wh_nop = 0;
72	72
r20835	r20836
79	79	full_update = 1;
80	80	}
81	81
82		/* get critical info */
83		rom = memregion("maincpu")->base();
84		rom_length = memregion("maincpu")->bytes() & ~0xFFF;
85
86	82	/* loop through the entire memory map */
87	83	bank = m_mem_config.first_bank;
88	84	for (i = 0; m_mem_config.memmap[i].get_meminfo; i++)
r20835	r20836
149	145	{
150	146	/* ROM */
151	147	offset = meminfo.read_mem & APPLE2_MEM_MASK;
152		rbase = &rom[offset % rom_length];
	148	rbase = &m_rom[offset % m_rom_length];
153	149	}
154	150	else
155	151	{
r20835	r20836
388	384	INT8 apple2_slotram_r(address_space &space, int slotnum, int offset)
389	385	{
390	386	apple2_state *state = space.machine().driver_data<apple2_state>();
391		UINT8 *rom, *slot_ram;
392		UINT32 rom_length, slot_length;
393	387
394		// find slot_ram if any
395		rom = state->memregion("maincpu")->base();
396		rom_length = state->memregion("maincpu")->bytes() & ~0xFFF;
397		slot_length = state->memregion("maincpu")->bytes() - rom_length;
398		slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
399
400		if (slot_ram)
	388	if (state->m_slot_ram)
401	389	{
402	390	if (!space.debugger_access())
403	391	{
r20835	r20836
406	394	state->apple2_update_memory();
407	395	}
408	396
409		return slot_ram[offset];
	397	return state->m_slot_ram[offset];
410	398	}
411	399
412	400	// else fall through to floating bus
r20835	r20836
445	433	{
446	434	int slotnum;
447	435	device_a2bus_card_interface *slotdevice;
448		UINT8 *rom, *slot_ram;
449		UINT32 rom_length, slot_length;
450	436
451		// find slot_ram if any
452		rom = memregion("maincpu")->base();
453		rom_length = memregion("maincpu")->bytes() & ~0xFFF;
454		slot_length = memregion("maincpu")->bytes() - rom_length;
455		slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
456
457	437	slotnum = ((offset>>8) & 0xf) + 1;
458	438
459	439	slotdevice = m_a2bus->get_a2bus_card(slotnum);
r20835	r20836
464	444	}
465	445	else
466	446	{
467		if (slot_ram)
468		slot_ram[offset] = data;
	447	if (m_slot_ram)
	448	m_slot_ram[offset] = data;
469	449	}
470	450	}
471	451
r20835	r20836
501	481	{
502	482	int slotnum;
503	483	device_a2bus_card_interface *slotdevice;
504		UINT8 *rom, *slot_ram;
505		UINT32 rom_length, slot_length;
506	484
507		// find slot_ram if any
508		rom = memregion("maincpu")->base();
509		rom_length = memregion("maincpu")->bytes() & ~0xFFF;
510		slot_length = memregion("maincpu")->bytes() - rom_length;
511		slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
512
513	485	slotnum = 3;
514	486	slotdevice = m_a2bus->get_a2bus_card(slotnum);
515	487
r20835	r20836
525	497	}
526	498	else
527	499	{
528		if (slot_ram)
529		slot_ram[offset] = data;
	500	if (m_slot_ram)
	501	m_slot_ram[offset] = data;
530	502	}
531	503	}
532	504
r20835	r20836
561	533	{
562	534	int slotnum;
563	535	device_a2bus_card_interface *slotdevice;
564		UINT8 *rom, *slot_ram;
565		UINT32 rom_length, slot_length;
566	536
567		// find slot_ram if any
568		rom = memregion("maincpu")->base();
569		rom_length = memregion("maincpu")->bytes() & ~0xFFF;
570		slot_length = memregion("maincpu")->bytes() - rom_length;
571		slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
572
573	537	slotnum = ((offset>>8) & 0xf) + 4;
574	538	slotdevice = m_a2bus->get_a2bus_card(slotnum);
575	539
r20835	r20836
585	549	}
586	550	else
587	551	{
588		if (slot_ram)
589		slot_ram[offset] = data;
	552	if (m_slot_ram)
	553	m_slot_ram[offset] = data;
590	554	}
591	555	}
592	556
r20835	r20836
720	684	static void apple2_mem_0000(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
721	685	{
722	686	apple2_state *state = machine.driver_data<apple2_state>();
723		meminfo->read_mem           = (state->m_flags & VAR_ALTZP)  ? 0x010000 : 0x000000;
724		meminfo->write_mem          = (state->m_flags & VAR_ALTZP)  ? 0x010000 : 0x000000;
	687	meminfo->read_handler       = (state->m_flags & VAR_ALTZP)  ? &state->read_delegates_0000[0] : &state->read_delegates_0000[1];
	688	meminfo->write_handler      = (state->m_flags & VAR_ALTZP)  ? &state->write_delegates_0000[0] : &state->write_delegates_0000[1];
725	689	}
726	690
727	691	static void apple2_mem_0200(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
728	692	{
729	693	apple2_state *state = machine.driver_data<apple2_state>();
730		meminfo->read_mem           = (state->m_flags & VAR_RAMRD)  ? 0x010200 : 0x000200;
731		meminfo->write_mem          = (state->m_flags & VAR_RAMWRT) ? 0x010200 : 0x000200;
	694	meminfo->read_handler       = (state->m_flags & VAR_RAMRD)  ? &state->read_delegates_0200[0] : &state->read_delegates_0200[1];
	695	meminfo->write_handler      = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_0200[0] : &state->write_delegates_0200[1];
732	696	}
733	697
734	698	static void apple2_mem_0400(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
r20835	r20836
737	701
738	702	if (state->m_flags & VAR_80STORE)
739	703	{
740		meminfo->read_mem       = (state->m_flags & VAR_PAGE2)  ? 0x010400 : 0x000400;
741		meminfo->write_mem      = (state->m_flags & VAR_PAGE2)  ? 0x010400 : 0x000400;
	704	meminfo->read_handler   = (state->m_flags & VAR_PAGE2)  ? &state->read_delegates_0400[0] : &state->read_delegates_0400[1];
742	705	meminfo->write_handler  = (state->m_flags & VAR_PAGE2)  ? &state->write_delegates_0400[0] : &state->write_delegates_0400[1];
743	706	}
744	707	else
745	708	{
746		meminfo->read_mem       = (state->m_flags & VAR_RAMRD)  ? 0x010400 : 0x000400;
747		meminfo->write_mem      = (state->m_flags & VAR_RAMWRT) ? 0x010400 : 0x000400;
	709	meminfo->read_handler   = (state->m_flags & VAR_RAMRD)  ? &state->read_delegates_0400[0] : &state->read_delegates_0400[1];
748	710	meminfo->write_handler  = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_0400[0] : &state->write_delegates_0400[1];
749	711	}
750	712	}
r20835	r20836
752	714	static void apple2_mem_0800(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
753	715	{
754	716	apple2_state *state = machine.driver_data<apple2_state>();
755		meminfo->read_mem           = (state->m_flags & VAR_RAMRD)  ? 0x010800 : 0x000800;
756		meminfo->write_mem          = (state->m_flags & VAR_RAMWRT) ? 0x010800 : 0x000800;
	717	meminfo->read_handler       = (state->m_flags & VAR_RAMRD)  ? &state->read_delegates_0800[0] : &state->read_delegates_0800[1];
	718	meminfo->write_handler      = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_0800[0] : &state->write_delegates_0800[1];
757	719	}
758	720
759	721	static void apple2_mem_2000(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
r20835	r20836
761	723	apple2_state *state = machine.driver_data<apple2_state>();
762	724	if ((state->m_flags & (VAR_80STORE|VAR_HIRES)) == (VAR_80STORE|VAR_HIRES))
763	725	{
764		meminfo->read_mem       = (state->m_flags & VAR_PAGE2)  ? 0x012000 : 0x002000;
765		meminfo->write_mem      = (state->m_flags & VAR_PAGE2)  ? 0x012000 : 0x002000;
	726	meminfo->read_handler   = (state->m_flags & VAR_PAGE2)  ? &state->read_delegates_2000[0] : &state->read_delegates_2000[1];
766	727	meminfo->write_handler  = (state->m_flags & VAR_PAGE2)  ? &state->write_delegates_2000[0] : &state->write_delegates_2000[1];
767	728	}
768	729	else
769	730	{
770		meminfo->read_mem       = (state->m_flags & VAR_RAMRD)  ? 0x012000 : 0x002000;
771		meminfo->write_mem      = (state->m_flags & VAR_RAMWRT) ? 0x012000 : 0x002000;
	731	meminfo->read_handler   = (state->m_flags & VAR_RAMRD)  ? &state->read_delegates_2000[0] : &state->read_delegates_2000[1];
772	732	meminfo->write_handler  = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_2000[0] : &state->write_delegates_2000[1];
773	733	}
774	734	}
r20835	r20836
776	736	static void apple2_mem_4000(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
777	737	{
778	738	apple2_state *state = machine.driver_data<apple2_state>();
779		meminfo->read_mem           = (state->m_flags & VAR_RAMRD)  ? 0x014000 : 0x004000;
780		meminfo->write_mem          = (state->m_flags & VAR_RAMWRT) ? 0x014000 : 0x004000;
	739	meminfo->read_handler      = (state->m_flags & VAR_RAMRD)  ? &state->read_delegates_4000[0] : &state->read_delegates_4000[1];
	740	meminfo->write_handler      = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_4000[0] : &state->write_delegates_4000[1];
781	741	}
782	742
783	743	static void apple2_mem_C000(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
r20835	r20836
896	856	if (state->m_flags & VAR_LCRAM)
897	857	{
898	858	if (state->m_flags & VAR_LCRAM2)
899		meminfo->read_mem   = (state->m_flags & VAR_ALTZP)  ? 0x01C000 : 0x00C000;
	859	{
	860	meminfo->read_handler = (state->m_flags & VAR_ALTZP)  ? &state->read_delegates_c000[0] : &state->read_delegates_c000[1];
	861	}
900	862	else
901		meminfo->read_mem   = (state->m_flags & VAR_ALTZP)  ? 0x01D000 : 0x00D000;
	863	{
	864	meminfo->read_handler = (state->m_flags & VAR_ALTZP)  ? &state->read_delegates_d000[0] : &state->read_delegates_d000[1];
	865	}
902	866	}
903	867	else
904	868	{
r20835	r20836
909	873	if (state->m_flags & VAR_LCWRITE)
910	874	{
911	875	if (state->m_flags & VAR_LCRAM2)
912		meminfo->write_mem  = (state->m_flags & VAR_ALTZP)  ? 0x01C000 : 0x00C000;
	876	{
	877	meminfo->write_handler  = (state->m_flags & VAR_ALTZP) ? &state->write_delegates_c000[0] : &state->write_delegates_c000[1];
	878	}
913	879	else
914		meminfo->write_mem  = (state->m_flags & VAR_ALTZP)  ? 0x01D000 : 0x00D000;
	880	{
	881	meminfo->write_handler  = (state->m_flags & VAR_ALTZP) ? &state->write_delegates_d000[0] : &state->write_delegates_d000[1];
	882	}
915	883	}
916	884	else
917	885	{
r20835	r20836
933	901	{
934	902	if (state->m_flags & VAR_LCRAM)
935	903	{
936		meminfo->read_mem       = (state->m_flags & VAR_ALTZP)  ? 0x01E000 : 0x00E000;
	904	meminfo->read_handler = (state->m_flags & VAR_ALTZP)  ? &state->read_delegates_e000[0] : &state->read_delegates_e000[1];
937	905	}
938	906	else
939	907	{
r20835	r20836
943	911
944	912	if (state->m_flags & VAR_LCWRITE)
945	913	{
946		meminfo->write_mem      = (state->m_flags & VAR_ALTZP) ? 0x01E000 : 0x00E000;
	914	meminfo->write_handler  = (state->m_flags & VAR_ALTZP) ? &state->write_delegates_e000[0] : &state->write_delegates_e000[1];
947	915	}
948	916	else
949	917	{
r20835	r20836
1220	1188
1221	1189
1222	1190	/***************************************************************************
1223		apple2_mainram0400_w
1224		apple2_mainram2000_w
1225		apple2_auxram0400_w
1226		apple2_auxram2000_w
	1191	apple2_mainramxx00_r
	1192	apple2_mainramxx00_w
	1193	apple2_auxramxx00_r
	1194	apple2_auxramxx00_w
1227	1195	***************************************************************************/
1228	1196
	1197	READ8_MEMBER ( apple2_state::apple2_mainram0000_r )
	1198	{
	1199	return m_rambase[offset];
	1200	}
	1201
	1202	READ8_MEMBER ( apple2_state::apple2_mainram0200_r )
	1203	{
	1204	offset += 0x200;
	1205	return m_rambase[offset];
	1206	}
	1207
	1208	READ8_MEMBER ( apple2_state::apple2_mainram0400_r )
	1209	{
	1210	offset += 0x400;
	1211	return m_rambase[offset];
	1212	}
	1213
	1214	READ8_MEMBER ( apple2_state::apple2_mainram0800_r )
	1215	{
	1216	offset += 0x800;
	1217	return m_rambase[offset];
	1218	}
	1219
	1220	READ8_MEMBER ( apple2_state::apple2_mainram2000_r )
	1221	{
	1222	offset += 0x2000;
	1223	return m_rambase[offset];
	1224	}
	1225
	1226	READ8_MEMBER ( apple2_state::apple2_mainram4000_r )
	1227	{
	1228	offset += 0x4000;
	1229	return m_rambase[offset];
	1230	}
	1231
	1232	READ8_MEMBER ( apple2_state::apple2_mainramc000_r )
	1233	{
	1234	offset += 0xc000;
	1235	return m_rambase[offset];
	1236	}
	1237
	1238	READ8_MEMBER ( apple2_state::apple2_mainramd000_r )
	1239	{
	1240	offset += 0xd000;
	1241	return m_rambase[offset];
	1242	}
	1243
	1244	READ8_MEMBER ( apple2_state::apple2_mainrame000_r )
	1245	{
	1246	offset += 0xe000;
	1247	return m_rambase[offset];
	1248	}
	1249
	1250	READ8_MEMBER ( apple2_state::apple2_auxram0000_r )
	1251	{
	1252	if (m_auxslotdevice)
	1253	{
	1254	return m_auxslotdevice->read_auxram(offset);
	1255	}
	1256	else if (m_machinetype == APPLE_IIE)
	1257	{
	1258	return 0xff;
	1259	}
	1260
	1261	offset += 0x10000;
	1262	return m_rambase[offset];
	1263	}
	1264
	1265	READ8_MEMBER ( apple2_state::apple2_auxram0200_r )
	1266	{
	1267	if (m_auxslotdevice)
	1268	{
	1269	return m_auxslotdevice->read_auxram(offset+0x200);
	1270	}
	1271	else if (m_machinetype == APPLE_IIE)
	1272	{
	1273	return 0xff;
	1274	}
	1275
	1276	offset += 0x10200;
	1277	return m_rambase[offset];
	1278	}
	1279
	1280	READ8_MEMBER ( apple2_state::apple2_auxram0400_r )
	1281	{
	1282	if (m_auxslotdevice)
	1283	{
	1284	return m_auxslotdevice->read_auxram(offset+0x400);
	1285	}
	1286	else if (m_machinetype == APPLE_IIE)
	1287	{
	1288	return 0xff;
	1289	}
	1290
	1291	offset += 0x10400;
	1292	return m_rambase[offset];
	1293	}
	1294
	1295	READ8_MEMBER ( apple2_state::apple2_auxram0800_r )
	1296	{
	1297	if (m_auxslotdevice)
	1298	{
	1299	return m_auxslotdevice->read_auxram(offset+0x800);
	1300	}
	1301	else if (m_machinetype == APPLE_IIE)
	1302	{
	1303	return 0xff;
	1304	}
	1305
	1306	offset += 0x10800;
	1307	return m_rambase[offset];
	1308	}
	1309
	1310	READ8_MEMBER ( apple2_state::apple2_auxram2000_r )
	1311	{
	1312	if (m_auxslotdevice)
	1313	{
	1314	return m_auxslotdevice->read_auxram(offset+0x2000);
	1315	}
	1316	else if (m_machinetype == APPLE_IIE)
	1317	{
	1318	return 0xff;
	1319	}
	1320
	1321	offset += 0x12000;
	1322	return m_rambase[offset];
	1323	}
	1324
	1325	READ8_MEMBER ( apple2_state::apple2_auxram4000_r )
	1326	{
	1327	if (m_auxslotdevice)
	1328	{
	1329	return m_auxslotdevice->read_auxram(offset+0x4000);
	1330	}
	1331	else if (m_machinetype == APPLE_IIE)
	1332	{
	1333	return 0xff;
	1334	}
	1335
	1336	offset += 0x14000;
	1337	return m_rambase[offset];
	1338	}
	1339
	1340	READ8_MEMBER ( apple2_state::apple2_auxramc000_r )
	1341	{
	1342	if (m_auxslotdevice)
	1343	{
	1344	return m_auxslotdevice->read_auxram(offset+0xc000);
	1345	}
	1346	else if (m_machinetype == APPLE_IIE)
	1347	{
	1348	return 0xff;
	1349	}
	1350
	1351	offset += 0x1c000;
	1352	return m_rambase[offset];
	1353	}
	1354
	1355	READ8_MEMBER ( apple2_state::apple2_auxramd000_r )
	1356	{
	1357	if (m_auxslotdevice)
	1358	{
	1359	return m_auxslotdevice->read_auxram(offset+0xd000);
	1360	}
	1361	else if (m_machinetype == APPLE_IIE)
	1362	{
	1363	return 0xff;
	1364	}
	1365
	1366	offset += 0x1d000;
	1367	return m_rambase[offset];
	1368	}
	1369
	1370	READ8_MEMBER ( apple2_state::apple2_auxrame000_r )
	1371	{
	1372	if (m_auxslotdevice)
	1373	{
	1374	return m_auxslotdevice->read_auxram(offset+0xe000);
	1375	}
	1376	else if (m_machinetype == APPLE_IIE)
	1377	{
	1378	return 0xff;
	1379	}
	1380
	1381	offset += 0x1e000;
	1382	return m_rambase[offset];
	1383	}
	1384
	1385
	1386	WRITE8_MEMBER ( apple2_state::apple2_mainram0000_w )
	1387	{
	1388	m_rambase[offset] = data;
	1389	}
	1390
	1391	WRITE8_MEMBER ( apple2_state::apple2_mainram0200_w )
	1392	{
	1393	offset += 0x200;
	1394	m_rambase[offset] = data;
	1395	}
	1396
1229	1397	WRITE8_MEMBER ( apple2_state::apple2_mainram0400_w )
1230	1398	{
1231	1399	offset += 0x400;
1232	1400	m_rambase[offset] = data;
1233	1401	}
1234	1402
	1403	WRITE8_MEMBER ( apple2_state::apple2_mainram0800_w )
	1404	{
	1405	offset += 0x800;
	1406	m_rambase[offset] = data;
	1407	}
	1408
1235	1409	WRITE8_MEMBER ( apple2_state::apple2_mainram2000_w )
1236	1410	{
1237	1411	offset += 0x2000;
1238	1412	m_rambase[offset] = data;
1239	1413	}
1240	1414
	1415	WRITE8_MEMBER ( apple2_state::apple2_mainram4000_w )
	1416	{
	1417	offset += 0x4000;
	1418	m_rambase[offset] = data;
	1419	}
	1420
	1421	WRITE8_MEMBER ( apple2_state::apple2_mainramc000_w )
	1422	{
	1423	offset += 0xc000;
	1424	m_rambase[offset] = data;
	1425	}
	1426
	1427	WRITE8_MEMBER ( apple2_state::apple2_mainramd000_w )
	1428	{
	1429	offset += 0xd000;
	1430	m_rambase[offset] = data;
	1431	}
	1432
	1433	WRITE8_MEMBER ( apple2_state::apple2_mainrame000_w )
	1434	{
	1435	offset += 0xe000;
	1436	m_rambase[offset] = data;
	1437	}
	1438
	1439	WRITE8_MEMBER ( apple2_state::apple2_auxram0000_w )
	1440	{
	1441	if (m_auxslotdevice)
	1442	{
	1443	m_auxslotdevice->write_auxram(offset, data);
	1444	return;
	1445	}
	1446	else if (m_machinetype == APPLE_IIE)
	1447	{
	1448	return;
	1449	}
	1450
	1451	offset += 0x10000;
	1452	m_rambase[offset] = data;
	1453	}
	1454
	1455	WRITE8_MEMBER ( apple2_state::apple2_auxram0200_w )
	1456	{
	1457	if (m_auxslotdevice)
	1458	{
	1459	m_auxslotdevice->write_auxram(offset+0x200, data);
	1460	return;
	1461	}
	1462	else if (m_machinetype == APPLE_IIE)
	1463	{
	1464	return;
	1465	}
	1466
	1467	offset += 0x10200;
	1468	m_rambase[offset] = data;
	1469	}
	1470
1241	1471	WRITE8_MEMBER ( apple2_state::apple2_auxram0400_w )
1242	1472	{
	1473	if (m_auxslotdevice)
	1474	{
	1475	m_auxslotdevice->write_auxram(offset+0x400, data);
	1476	return;
	1477	}
	1478	else if (m_machinetype == APPLE_IIE)
	1479	{
	1480	return;
	1481	}
	1482
1243	1483	offset += 0x10400;
1244	1484	m_rambase[offset] = data;
1245	1485	}
1246	1486
	1487	WRITE8_MEMBER ( apple2_state::apple2_auxram0800_w )
	1488	{
	1489	if (m_auxslotdevice)
	1490	{
	1491	m_auxslotdevice->write_auxram(offset+0x800, data);
	1492	return;
	1493	}
	1494	else if (m_machinetype == APPLE_IIE)
	1495	{
	1496	return;
	1497	}
	1498
	1499	offset += 0x10800;
	1500	m_rambase[offset] = data;
	1501	}
	1502
1247	1503	WRITE8_MEMBER ( apple2_state::apple2_auxram2000_w )
1248	1504	{
	1505	if (m_auxslotdevice)
	1506	{
	1507	m_auxslotdevice->write_auxram(offset+0x2000, data);
	1508	return;
	1509	}
	1510	else if (m_machinetype == APPLE_IIE)
	1511	{
	1512	return;
	1513	}
	1514
1249	1515	offset += 0x12000;
1250	1516	m_rambase[offset] = data;
1251	1517	}
1252	1518
	1519	WRITE8_MEMBER ( apple2_state::apple2_auxram4000_w )
	1520	{
	1521	if (m_auxslotdevice)
	1522	{
	1523	m_auxslotdevice->write_auxram(offset+0x4000, data);
	1524	return;
	1525	}
	1526	else if (m_machinetype == APPLE_IIE)
	1527	{
	1528	return;
	1529	}
1253	1530
	1531	offset += 0x14000;
	1532	m_rambase[offset] = data;
	1533	}
1254	1534
	1535	WRITE8_MEMBER ( apple2_state::apple2_auxramc000_w )
	1536	{
	1537	if (m_auxslotdevice)
	1538	{
	1539	m_auxslotdevice->write_auxram(offset+0xc000, data);
	1540	return;
	1541	}
	1542	else if (m_machinetype == APPLE_IIE)
	1543	{
	1544	return;
	1545	}
	1546
	1547	offset += 0x1c000;
	1548	m_rambase[offset] = data;
	1549	}
	1550
	1551	WRITE8_MEMBER ( apple2_state::apple2_auxramd000_w )
	1552	{
	1553	if (m_auxslotdevice)
	1554	{
	1555	m_auxslotdevice->write_auxram(offset+0xd000, data);
	1556	return;
	1557	}
	1558	else if (m_machinetype == APPLE_IIE)
	1559	{
	1560	return;
	1561	}
	1562
	1563	offset += 0x1d000;
	1564	m_rambase[offset] = data;
	1565	}
	1566
	1567	WRITE8_MEMBER ( apple2_state::apple2_auxrame000_w )
	1568	{
	1569	if (m_auxslotdevice)
	1570	{
	1571	m_auxslotdevice->write_auxram(offset+0xe000, data);
	1572	return;
	1573	}
	1574	else if (m_machinetype == APPLE_IIE)
	1575	{
	1576	return;
	1577	}
	1578
	1579	offset += 0x1e000;
	1580	m_rambase[offset] = data;
	1581	}
	1582
1255	1583	/***************************************************************************
1256	1584	apple2_c00x_r
1257	1585	***************************************************************************/
r20835	r20836
1582	1910	WRITE8_MEMBER ( apple2_state::apple2_c07x_w )
1583	1911	{
1584	1912	// this a machine with an aux slot?
1585		if (m_machinetype == APPLE_IIE)
	1913	if (m_auxslotdevice)
1586	1914	{
1587		device_a2eauxslot_card_interface *auxslotdevice = NULL;
1588
1589		auxslotdevice = m_a2eauxslot->get_a2eauxslot_card();
1590
1591		if (auxslotdevice)
1592		{
1593		auxslotdevice->write_c07x(space, offset&0xf, data);
1594		}
	1915	m_auxslotdevice->write_c07x(space, offset&0xf, data);
1595	1916	}
1596	1917
1597	1918	// AE RamWorks manual indicates that even if the auxslot card sees the c07x write,
r20835	r20836
1771	2092	state->m_flags = 0;
1772	2093	state->m_fdc_diskreg = 0;
1773	2094
	2095	// do these lookups once at startup
	2096	state->m_rom = state->memregion("maincpu")->base();
	2097	state->m_rom_length = state->memregion("maincpu")->bytes() & ~0xFFF;
	2098	state->m_slot_length = state->memregion("maincpu")->bytes() - state->m_rom_length;
	2099	state->m_slot_ram = (state->m_slot_length > 0) ? &state->m_rom[state->m_rom_length] : NULL;
	2100
	2101	state->m_auxslotdevice = NULL;
	2102	if (state->m_machinetype == APPLE_IIE)
	2103	{
	2104	state->m_auxslotdevice = state->m_a2eauxslot->get_a2eauxslot_card();
	2105	}
	2106
1774	2107	AY3600_init(machine);
1775	2108
1776	2109	/* state save registers */
r20835	r20836
1937	2270	write_delegates_master[1] = write8_delegate(FUNC(apple2_state::apple2_c3xx_w), this);
1938	2271	write_delegates_master[2] = write8_delegate(FUNC(apple2_state::apple2_c4xx_w), this);
1939	2272
1940		write_delegates_2000[0] = write8_delegate(FUNC(apple2_state::apple2_auxram2000_w), this);
1941		write_delegates_2000[1] = write8_delegate(FUNC(apple2_state::apple2_mainram2000_w), this);
1942
1943	2273	rd_c000 = read8_delegate(FUNC(apple2_state::apple2_c0xx_r), this);
1944	2274	wd_c000 = write8_delegate(FUNC(apple2_state::apple2_c0xx_w), this);
1945	2275
r20835	r20836
1961	2291	rd_inh_e000 = read8_delegate(FUNC(apple2_state::apple2_inh_e000_r), this);
1962	2292	wd_inh_e000 = write8_delegate(FUNC(apple2_state::apple2_inh_e000_w), this);
1963	2293
	2294	read_delegates_0000[0] = read8_delegate(FUNC(apple2_state::apple2_auxram0000_r), this);
	2295	read_delegates_0000[1] = read8_delegate(FUNC(apple2_state::apple2_mainram0000_r), this);
	2296	read_delegates_0200[0] = read8_delegate(FUNC(apple2_state::apple2_auxram0200_r), this);
	2297	read_delegates_0200[1] = read8_delegate(FUNC(apple2_state::apple2_mainram0200_r), this);
	2298	read_delegates_0400[0] = read8_delegate(FUNC(apple2_state::apple2_auxram0400_r), this);
	2299	read_delegates_0400[1] = read8_delegate(FUNC(apple2_state::apple2_mainram0400_r), this);
	2300	read_delegates_0800[0] = read8_delegate(FUNC(apple2_state::apple2_auxram0800_r), this);
	2301	read_delegates_0800[1] = read8_delegate(FUNC(apple2_state::apple2_mainram0800_r), this);
	2302	read_delegates_2000[0] = read8_delegate(FUNC(apple2_state::apple2_auxram2000_r), this);
	2303	read_delegates_2000[1] = read8_delegate(FUNC(apple2_state::apple2_mainram2000_r), this);
	2304	read_delegates_4000[0] = read8_delegate(FUNC(apple2_state::apple2_auxram4000_r), this);
	2305	read_delegates_4000[1] = read8_delegate(FUNC(apple2_state::apple2_mainram4000_r), this);
	2306	read_delegates_c000[0] = read8_delegate(FUNC(apple2_state::apple2_auxramc000_r), this);
	2307	read_delegates_c000[1] = read8_delegate(FUNC(apple2_state::apple2_mainramc000_r), this);
	2308	read_delegates_d000[0] = read8_delegate(FUNC(apple2_state::apple2_auxramd000_r), this);
	2309	read_delegates_d000[1] = read8_delegate(FUNC(apple2_state::apple2_mainramd000_r), this);
	2310	read_delegates_e000[0] = read8_delegate(FUNC(apple2_state::apple2_auxrame000_r), this);
	2311	read_delegates_e000[1] = read8_delegate(FUNC(apple2_state::apple2_mainrame000_r), this);
	2312
	2313	write_delegates_0000[0] = write8_delegate(FUNC(apple2_state::apple2_auxram0000_w), this);
	2314	write_delegates_0000[1] = write8_delegate(FUNC(apple2_state::apple2_mainram0000_w), this);
	2315	write_delegates_0200[0] = write8_delegate(FUNC(apple2_state::apple2_auxram0200_w), this);
	2316	write_delegates_0200[1] = write8_delegate(FUNC(apple2_state::apple2_mainram0200_w), this);
1964	2317	write_delegates_0400[0] = write8_delegate(FUNC(apple2_state::apple2_auxram0400_w), this);
1965	2318	write_delegates_0400[1] = write8_delegate(FUNC(apple2_state::apple2_mainram0400_w), this);
1966
	2319	write_delegates_0800[0] = write8_delegate(FUNC(apple2_state::apple2_auxram0800_w), this);
	2320	write_delegates_0800[1] = write8_delegate(FUNC(apple2_state::apple2_mainram0800_w), this);
	2321	write_delegates_2000[0] = write8_delegate(FUNC(apple2_state::apple2_auxram2000_w), this);
	2322	write_delegates_2000[1] = write8_delegate(FUNC(apple2_state::apple2_mainram2000_w), this);
	2323	write_delegates_4000[0] = write8_delegate(FUNC(apple2_state::apple2_auxram4000_w), this);
	2324	write_delegates_4000[1] = write8_delegate(FUNC(apple2_state::apple2_mainram4000_w), this);
	2325	write_delegates_c000[0] = write8_delegate(FUNC(apple2_state::apple2_auxramc000_w), this);
	2326	write_delegates_c000[1] = write8_delegate(FUNC(apple2_state::apple2_mainramc000_w), this);
	2327	write_delegates_d000[0] = write8_delegate(FUNC(apple2_state::apple2_auxramd000_w), this);
	2328	write_delegates_d000[1] = write8_delegate(FUNC(apple2_state::apple2_mainramd000_w), this);
	2329	write_delegates_e000[0] = write8_delegate(FUNC(apple2_state::apple2_auxrame000_w), this);
	2330	write_delegates_e000[1] = write8_delegate(FUNC(apple2_state::apple2_mainrame000_w), this);
1967	2331	}

trunk/src/mess/includes/apple2.h

r20835	r20836
174	174	int m_last_key;
175	175	int m_last_key_unmodified;
176	176	unsigned int m_time_until_repeat;
177		const UINT8 *m_a2_videoram;
178		UINT32 m_a2_videomask;
	177	const UINT8 *m_a2_videoram, *m_a2_videoaux, *m_textgfx_data;
	178	UINT32 m_a2_videomask, m_textgfx_datalen;
179	179	UINT32 m_old_a2;
180	180	int m_fgcolor;
181	181	int m_bgcolor;
r20835	r20836
188	188
189	189	UINT8 *m_rambase;
190	190
	191	UINT8 *m_rom, *m_slot_ram;
	192	UINT32 m_rom_length, m_slot_length;
	193
191	194	machine_type_t m_machinetype;
192	195
	196	device_a2eauxslot_card_interface *m_auxslotdevice;
	197
193	198	READ8_MEMBER(apple2_c0xx_r);
194	199	WRITE8_MEMBER(apple2_c0xx_w);
195	200	READ8_MEMBER(apple2_c080_r);
r20835	r20836
209	214	WRITE8_MEMBER ( apple2_c05x_w );
210	215	WRITE8_MEMBER ( apple2_c07x_w );
211	216
	217	READ8_MEMBER ( apple2_mainram0000_r );
	218	READ8_MEMBER ( apple2_mainram0200_r );
	219	READ8_MEMBER ( apple2_mainram0400_r );
	220	READ8_MEMBER ( apple2_mainram0800_r );
	221	READ8_MEMBER ( apple2_mainram2000_r );
	222	READ8_MEMBER ( apple2_mainram4000_r );
	223	READ8_MEMBER ( apple2_mainramc000_r );
	224	READ8_MEMBER ( apple2_mainramd000_r );
	225	READ8_MEMBER ( apple2_mainrame000_r );
	226	READ8_MEMBER ( apple2_auxram0000_r );
	227	READ8_MEMBER ( apple2_auxram0200_r );
	228	READ8_MEMBER ( apple2_auxram0400_r );
	229	READ8_MEMBER ( apple2_auxram0800_r );
	230	READ8_MEMBER ( apple2_auxram2000_r );
	231	READ8_MEMBER ( apple2_auxram4000_r );
	232	READ8_MEMBER ( apple2_auxramc000_r );
	233	READ8_MEMBER ( apple2_auxramd000_r );
	234	READ8_MEMBER ( apple2_auxrame000_r );
	235
	236	WRITE8_MEMBER ( apple2_mainram0000_w );
	237	WRITE8_MEMBER ( apple2_mainram0200_w );
212	238	WRITE8_MEMBER ( apple2_mainram0400_w );
	239	WRITE8_MEMBER ( apple2_mainram0800_w );
213	240	WRITE8_MEMBER ( apple2_mainram2000_w );
	241	WRITE8_MEMBER ( apple2_mainram4000_w );
	242	WRITE8_MEMBER ( apple2_mainramc000_w );
	243	WRITE8_MEMBER ( apple2_mainramd000_w );
	244	WRITE8_MEMBER ( apple2_mainrame000_w );
	245	WRITE8_MEMBER ( apple2_auxram0000_w );
	246	WRITE8_MEMBER ( apple2_auxram0200_w );
214	247	WRITE8_MEMBER ( apple2_auxram0400_w );
	248	WRITE8_MEMBER ( apple2_auxram0800_w );
215	249	WRITE8_MEMBER ( apple2_auxram2000_w );
	250	WRITE8_MEMBER ( apple2_auxram4000_w );
	251	WRITE8_MEMBER ( apple2_auxramc000_w );
	252	WRITE8_MEMBER ( apple2_auxramd000_w );
	253	WRITE8_MEMBER ( apple2_auxrame000_w );
216	254
217	255	READ8_MEMBER ( apple2_c1xx_r );
218	256	WRITE8_MEMBER ( apple2_c1xx_w );
r20835	r20836
241	279
242	280	read8_delegate read_delegates_master[4];
243	281	write8_delegate write_delegates_master[3];
	282	write8_delegate write_delegates_0000[2];
	283	write8_delegate write_delegates_0200[2];
244	284	write8_delegate write_delegates_0400[2];
	285	write8_delegate write_delegates_0800[2];
245	286	write8_delegate write_delegates_2000[2];
	287	write8_delegate write_delegates_4000[2];
	288	write8_delegate write_delegates_c000[2];
	289	write8_delegate write_delegates_d000[2];
	290	write8_delegate write_delegates_e000[2];
	291	read8_delegate read_delegates_0000[2];
	292	read8_delegate read_delegates_0200[2];
	293	read8_delegate read_delegates_0400[2];
	294	read8_delegate read_delegates_0800[2];
	295	read8_delegate read_delegates_2000[2];
	296	read8_delegate read_delegates_4000[2];
	297	read8_delegate read_delegates_c000[2];
	298	read8_delegate read_delegates_d000[2];
	299	read8_delegate read_delegates_e000[2];
246	300	read8_delegate rd_c000;
247	301	write8_delegate wd_c000;
248	302	read8_delegate rd_c080;
r20835	r20836
264	318	DECLARE_MACHINE_START(apple2orig);
265	319	DECLARE_VIDEO_START(apple2p);
266	320	DECLARE_VIDEO_START(apple2e);
	321	DECLARE_VIDEO_START(apple2c);
267	322	DECLARE_MACHINE_START(tk2000);
268	323	DECLARE_MACHINE_START(laser128);
269	324	DECLARE_MACHINE_START(space84);
r20835	r20836
312	367
313	368	/*----------- defined in video/apple2.c -----------*/
314	369
315		void apple2_video_start(running_machine &machine, const UINT8 *vram, size_t vram_size, UINT32 ignored_softswitches, int hires_modulo);
	370	void apple2_video_start(running_machine &machine, const UINT8 *vram, const UINT8 *aux_vram, UINT32 ignored_softswitches, int hires_modulo);
316	371
317	372
318	373	#endif /* APPLE2_H_ */

trunk/src/mess/video/apple2gs.c

r20835	r20836
16	16	VIDEO_START_MEMBER(apple2gs_state,apple2gs)
17	17	{
18	18	m_bordercolor = 0;
19		apple2_video_start(machine(), m_slowmem, 0x20000, 0, 8);
	19	apple2_video_start(machine(), m_slowmem, m_slowmem+0x10000, 0, 8);
20	20	m_legacy_gfx = auto_bitmap_ind16_alloc(machine(), 560, 192);
21	21
22	22	state_save_register_item(machine(), "BORDERCLR", NULL, 0, m_bordercolor);

trunk/src/mess/video/apple2.c

r20835	r20836
160	160	int row, col;
161	161	UINT32 start_address = (page ? 0x0800 : 0x0400);
162	162	UINT32 address;
163		const UINT8 *textgfx_data = machine.root_device().memregion("gfx1")->base();
164		UINT32 textgfx_datalen = state->memregion("gfx1")->bytes();
165	163	UINT32 my_a2 = effective_a2(state);
166	164
167	165	/* perform adjustments */
r20835	r20836
176	174
177	175	if (my_a2 & VAR_80COL)
178	176	{
179		apple2_plot_text_character(machine, bitmap, col * 14 + 0, row, 1, state->m_a2_videoram[address + 0x10000],
180		textgfx_data, textgfx_datalen, my_a2);
181		apple2_plot_text_character(machine, bitmap, col * 14 + 7, row, 1, state->m_a2_videoram[address + 0x00000],
182		textgfx_data, textgfx_datalen, my_a2);
	177	apple2_plot_text_character(machine, bitmap, col * 14 + 0, row, 1, state->m_a2_videoaux[address],
	178	state->m_textgfx_data, state->m_textgfx_datalen, my_a2);
	179	apple2_plot_text_character(machine, bitmap, col * 14 + 7, row, 1, state->m_a2_videoram[address],
	180	state->m_textgfx_data, state->m_textgfx_datalen, my_a2);
183	181	}
184	182	else
185	183	{
186	184	apple2_plot_text_character(machine, bitmap, col * 14, row, 2, state->m_a2_videoram[address],
187		textgfx_data, textgfx_datalen, my_a2);
	185	state->m_textgfx_data, state->m_textgfx_datalen, my_a2);
188	186	}
189	187	}
190	188	}
r20835	r20836
239	237	static void apple2_hires_draw(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int page, int beginrow, int endrow)
240	238	{
241	239	apple2_state *state = machine.driver_data<apple2_state>();
242		const UINT8 *vram;
	240	const UINT8 *vram, *vaux;
243	241	int row, col, b;
244	242	int offset;
245	243	int columns;
r20835	r20836
259	257
260	258	if (state->m_machinetype == TK2000)
261	259	{
262		vram        = state->m_a2_videoram + (page ? 0xa000 : 0x2000);
	260	vram = state->m_a2_videoram + (page ? 0xa000 : 0x2000);
	261	vaux = state->m_a2_videoaux + (page ? 0xa000 : 0x2000);
263	262	}
264	263	else
265	264	{
266		vram        = state->m_a2_videoram + (page ? 0x4000 : 0x2000);
	265	vram = state->m_a2_videoram + (page ? 0x4000 : 0x2000);
	266	vaux = state->m_a2_videoaux + (page ? 0x4000 : 0x2000);
267	267	}
268	268	columns     = ((effective_a2(state) & (VAR_DHIRES|VAR_80COL)) == (VAR_DHIRES|VAR_80COL)) ? 80 : 40;
269	269
r20835	r20836
283	283	break;
284	284
285	285	case 80:
286		vram_row[1+(col*2)+0] = vram[offset + 0x10000];
287		vram_row[1+(col*2)+1] = vram[offset + 0x00000];
	286	vram_row[1+(col*2)+0] = vaux[offset];
	287	vram_row[1+(col*2)+1] = vram[offset];
288	288	break;
289	289
290	290	default:
r20835	r20836
347	347	VIDEO CORE
348	348	***************************************************************************/
349	349
350		void apple2_video_start(running_machine &machine, const UINT8 *vram, size_t vram_size, UINT32 ignored_softswitches, int hires_modulo)
	350	void apple2_video_start(running_machine &machine, const UINT8 *vram, const UINT8 *aux_vram, UINT32 ignored_softswitches, int hires_modulo)
351	351	{
352	352	apple2_state *state = machine.driver_data<apple2_state>();
353	353	int i, j;
r20835	r20836
374	374	apple2_font = machine.root_device().memregion("gfx1")->base();
375	375	state->m_alt_charset_value = machine.root_device().memregion("gfx1")->bytes() / 16;
376	376	state->m_a2_videoram = vram;
	377	state->m_a2_videoaux = aux_vram;
377	378
	379	state->m_textgfx_data = machine.root_device().memregion("gfx1")->base();
	380	state->m_textgfx_datalen = state->memregion("gfx1")->bytes();
	381
378	382	/* 2^3 dependent pixels * 2 color sets * 2 offsets */
379	383	state->m_hires_artifact_map = auto_alloc_array(machine, UINT16, 8 * 2 * 2);
380	384
r20835	r20836
444	448
445	449	VIDEO_START_MEMBER(apple2_state,apple2)
446	450	{
447		apple2_video_start(machine(), machine().device<ram_device>(RAM_TAG)->pointer(), machine().device<ram_device>(RAM_TAG)->size(), VAR_80COL | VAR_ALTCHARSET | VAR_DHIRES, 4);
	451	apple2_video_start(machine(), m_ram->pointer(), m_ram->pointer()+0x10000, VAR_80COL | VAR_ALTCHARSET | VAR_DHIRES, 4);
448	452
449	453	/* hack to fix the colors on apple2/apple2p */
450	454	m_fgcolor = 0;
r20835	r20836
456	460
457	461	VIDEO_START_MEMBER(apple2_state,apple2p)
458	462	{
459		apple2_video_start(machine(), machine().device<ram_device>(RAM_TAG)->pointer(), machine().device<ram_device>(RAM_TAG)->size(), VAR_80COL | VAR_ALTCHARSET | VAR_DHIRES, 8);
	463	apple2_video_start(machine(), m_ram->pointer(), m_ram->pointer(), VAR_80COL | VAR_ALTCHARSET | VAR_DHIRES, 8);
460	464
461	465	/* hack to fix the colors on apple2/apple2p */
462	466	m_fgcolor = 0;
r20835	r20836
468	472
469	473	VIDEO_START_MEMBER(apple2_state,apple2e)
470	474	{
471		apple2_video_start(machine(), machine().device<ram_device>(RAM_TAG)->pointer(), machine().device<ram_device>(RAM_TAG)->size(), 0, 8);
	475	device_a2eauxslot_card_interface *auxslotdevice = m_a2eauxslot->get_a2eauxslot_card();
	476	if (auxslotdevice)
	477	{
	478	apple2_video_start(machine(), m_ram->pointer(), auxslotdevice->get_vram_ptr(), auxslotdevice->allow_dhr() ? 0 : VAR_DHIRES, 8);
	479	}
	480	else
	481	{
	482	apple2_video_start(machine(), m_ram->pointer(), m_ram->pointer(), VAR_80COL | VAR_DHIRES, 8);
	483	}
472	484	}
473	485
474	486
	487	VIDEO_START_MEMBER(apple2_state,apple2c)
	488	{
	489	apple2_video_start(machine(), m_ram->pointer(), m_ram->pointer()+0x10000, 0, 8);
	490	}
	491
475	492	UINT32 apple2_state::screen_update_apple2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
476	493	{
477	494	int page;

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