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r20814 Thursday 7th February, 2013 at 20:55:30 UTC by Wilbert Pol
(MESS) Cleaned up tagmap usage in the spectrum drivers a bit. (nw)

[src/mess/drivers]	atm.c elwro800.c pentagon.c scorpion.c spec128.c specpls3.c spectrum.c timex.c
[src/mess/formats]	spec_snqk.c
[src/mess/includes]	spectrum.h
[src/mess/video]	spectrum.c

trunk/src/mess/formats/spec_snqk.c

r20813	r20814
86	86	if (state->m_port_7ffd_data == -1)
87	87	return;
88	88	if (state->m_port_1ffd_data == -1)
89		spectrum_128_update_memory(machine);
	89	state->spectrum_128_update_memory();
90	90
91	91	else
92	92	{
r20813	r20814
95	95	state->m_port_1ffd_data = 0x04;
96	96	else
97	97	state->m_port_1ffd_data = 0x00;
98		spectrum_plus3_update_memory(machine);
	98	state->spectrum_plus3_update_memory();
99	99	}
100	100	}
101	101
r20813	r20814
2440	2440	{
2441	2441	state->m_port_f4_data = 0x03;
2442	2442	state->m_port_ff_data = 0x00;
2443		ts2068_update_memory(machine);
	2443	state->ts2068_update_memory();
2444	2444	}
2445	2445	if (z80_type == SPECTRUM_Z80_SNAPSHOT_TS2068 && !strcmp(machine.system().name,"ts2068"))
2446	2446	{
2447	2447	state->m_port_f4_data = snapdata[35];
2448	2448	state->m_port_ff_data = snapdata[36];
2449		ts2068_update_memory(machine);
	2449	state->ts2068_update_memory();
2450	2450	}
2451	2451	}
2452	2452	}

trunk/src/mess/drivers/pentagon.c

r20813	r20814
14	14	public:
15	15	pentagon_state(const machine_config &mconfig, device_type type, const char *tag)
16	16	: spectrum_state(mconfig, type, tag)
17		, m_maincpu(*this, "maincpu")
18	17	, m_bank1(*this, "bank1")
19	18	, m_bank2(*this, "bank2")
20	19	, m_bank3(*this, "bank3")
21	20	, m_bank4(*this, "bank4")
22	21	, m_beta(*this, BETA_DISK_TAG)
23		, m_ram(*this, RAM_TAG)
24	22	{ }
25	23
26	24	DECLARE_DIRECT_UPDATE_MEMBER(pentagon_direct);
r20813	r20814
28	26	DECLARE_MACHINE_RESET(pentagon);
29	27
30	28	protected:
31		required_device<cpu_device> m_maincpu;
32	29	required_memory_bank m_bank1;
33	30	required_memory_bank m_bank2;
34	31	required_memory_bank m_bank3;
35	32	required_memory_bank m_bank4;
36	33	required_device<device_t> m_beta;
37		required_device<ram_device> m_ram;
38	34	private:
39	35	UINT8 *m_p_ram;
40	36	void pentagon_update_memory();

trunk/src/mess/drivers/specpls3.c

r20813	r20814
172	172	4,7,6,3
173	173	};
174	174
175		static WRITE8_HANDLER(spectrum_plus3_port_3ffd_w)
	175	WRITE8_MEMBER( spectrum_state::spectrum_plus3_port_3ffd_w )
176	176	{
177		spectrum_state *state = space.machine().driver_data<spectrum_state>();
178		if (state->m_floppy==1)
179		space.machine().device<upd765a_device>("upd765")->fifo_w(space, 0, data, 0xff);
	177	if (m_floppy==1)
	178	m_upd765->fifo_w(space, 0, data, 0xff);
180	179	}
181	180
182		static  READ8_HANDLER(spectrum_plus3_port_3ffd_r)
	181	READ8_MEMBER( spectrum_state::spectrum_plus3_port_3ffd_r )
183	182	{
184		spectrum_state *state = space.machine().driver_data<spectrum_state>();
185		if (state->m_floppy==0)
	183	if (m_floppy==0)
186	184	return 0xff;
187	185	else
188		return space.machine().device<upd765a_device>("upd765")->fifo_r(space, 0, 0xff);
	186	return m_upd765->fifo_r(space, 0, 0xff);
189	187	}
190	188
191	189
192		static  READ8_HANDLER(spectrum_plus3_port_2ffd_r)
	190	READ8_MEMBER( spectrum_state::spectrum_plus3_port_2ffd_r )
193	191	{
194		spectrum_state *state = space.machine().driver_data<spectrum_state>();
195		if (state->m_floppy==0)
	192	if (m_floppy==0)
196	193	return 0xff;
197	194	else
198		return space.machine().device<upd765a_device>("upd765")->msr_r(space, 0, 0xff);
	195	return m_upd765->msr_r(space, 0, 0xff);
199	196	}
200	197
201	198
202		void spectrum_plus3_update_memory(running_machine &machine)
	199	void spectrum_state::spectrum_plus3_update_memory()
203	200	{
204		spectrum_state *state = machine.driver_data<spectrum_state>();
205		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
206		UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
	201	address_space &space = m_maincpu->space(AS_PROGRAM);
	202	UINT8 *messram = m_ram->pointer();
207	203
208		if (state->m_port_7ffd_data & 8)
	204	if (m_port_7ffd_data & 8)
209	205	{
210	206	logerror("+3 SCREEN 1: BLOCK 7\n");
211		state->m_screen_location = messram + (7 << 14);
	207	m_screen_location = messram + (7 << 14);
212	208	}
213	209	else
214	210	{
215	211	logerror("+3 SCREEN 0: BLOCK 5\n");
216		state->m_screen_location = messram + (5 << 14);
	212	m_screen_location = messram + (5 << 14);
217	213	}
218	214
219		if ((state->m_port_1ffd_data & 0x01) == 0)
	215	if ((m_port_1ffd_data & 0x01) == 0)
220	216	{
221	217	int ram_page;
222	218	unsigned char *ram_data;
r20813	r20814
226	222	int ROMSelection;
227	223
228	224	/* select ram at 0x0c000-0x0ffff */
229		ram_page = state->m_port_7ffd_data & 0x07;
	225	ram_page = m_port_7ffd_data & 0x07;
230	226	ram_data = messram + (ram_page<<14);
231	227
232		state->membank("bank4")->set_base(ram_data);
	228	membank("bank4")->set_base(ram_data);
233	229
234	230	logerror("RAM at 0xc000: %02x\n", ram_page);
235	231
236	232	/* Reset memory between 0x4000 - 0xbfff in case extended paging was being used */
237	233	/* Bank 5 in 0x4000 - 0x7fff */
238		state->membank("bank2")->set_base(messram + (5 << 14));
	234	membank("bank2")->set_base(messram + (5 << 14));
239	235
240	236	/* Bank 2 in 0x8000 - 0xbfff */
241		state->membank("bank3")->set_base(messram + (2 << 14));
	237	membank("bank3")->set_base(messram + (2 << 14));
242	238
243	239
244		ROMSelection = ((state->m_port_7ffd_data >> 4) & 0x01) |
245		((state->m_port_1ffd_data >> 1) & 0x02);
	240	ROMSelection = ((m_port_7ffd_data >> 4) & 0x01) |
	241	((m_port_1ffd_data >> 1) & 0x02);
246	242
247	243	/* rom 0 is editor, rom 1 is syntax, rom 2 is DOS, rom 3 is 48 BASIC */
248	244
249		ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x010000 + (ROMSelection << 14);
	245	ChosenROM = memregion("maincpu")->base() + 0x010000 + (ROMSelection << 14);
250	246
251		state->membank("bank1")->set_base(ChosenROM);
	247	membank("bank1")->set_base(ChosenROM);
252	248	space.unmap_write(0x0000, 0x3fff);
253	249
254	250	logerror("rom switch: %02x\n", ROMSelection);
r20813	r20814
261	257	int MemorySelection;
262	258	unsigned char *ram_data;
263	259
264		MemorySelection = (state->m_port_1ffd_data >> 1) & 0x03;
	260	MemorySelection = (m_port_1ffd_data >> 1) & 0x03;
265	261
266	262	memory_selection = &spectrum_plus3_memory_selections[(MemorySelection << 2)];
267	263
268	264	ram_data = messram + (memory_selection[0] << 14);
269		state->membank("bank1")->set_base(ram_data);
	265	membank("bank1")->set_base(ram_data);
270	266	/* allow writes to 0x0000-0x03fff */
271	267	space.install_write_bank(0x0000, 0x3fff, "bank1");
272	268
273	269	ram_data = messram + (memory_selection[1] << 14);
274		state->membank("bank2")->set_base(ram_data);
	270	membank("bank2")->set_base(ram_data);
275	271
276	272	ram_data = messram + (memory_selection[2] << 14);
277		state->membank("bank3")->set_base(ram_data);
	273	membank("bank3")->set_base(ram_data);
278	274
279	275	ram_data = messram + (memory_selection[3] << 14);
280		state->membank("bank4")->set_base(ram_data);
	276	membank("bank4")->set_base(ram_data);
281	277
282	278	logerror("extended memory paging: %02x\n", MemorySelection);
283	279	}
r20813	r20814
285	281
286	282
287	283
288		static WRITE8_HANDLER(spectrum_plus3_port_7ffd_w)
	284	WRITE8_MEMBER( spectrum_state::spectrum_plus3_port_7ffd_w )
289	285	{
290	286	/* D0-D2: RAM page located at 0x0c000-0x0ffff */
291	287	/* D3 - Screen select (screen 0 in ram page 5, screen 1 in ram page 7 */
292	288	/* D4 - ROM select - which rom paged into 0x0000-0x03fff */
293	289	/* D5 - Disable paging */
294	290
295		spectrum_state *state = space.machine().driver_data<spectrum_state>();
296
297	291	/* disable paging? */
298		if (state->m_port_7ffd_data & 0x20)
	292	if (m_port_7ffd_data & 0x20)
299	293	return;
300	294
301	295	/* store new state */
302		state->m_port_7ffd_data = data;
	296	m_port_7ffd_data = data;
303	297
304	298	/* update memory */
305		spectrum_plus3_update_memory(space.machine());
	299	spectrum_plus3_update_memory();
306	300	}
307	301
308		static WRITE8_HANDLER(spectrum_plus3_port_1ffd_w)
	302	WRITE8_HANDLER( spectrum_state::spectrum_plus3_port_1ffd_w )
309	303	{
310	304	/* D0-D1: ROM/RAM paging */
311	305	/* D2: Affects if d0-d1 work on ram/rom */
312	306	/* D3 - Disk motor on/off */
313	307	/* D4 - parallel port strobe */
314	308
315		spectrum_state *state = space.machine().driver_data<spectrum_state>();
	309	m_upd765_0->get_device()->mon_w(!BIT(data, 3));
	310	m_upd765_1->get_device()->mon_w(!BIT(data, 3));
316	311
317		space.machine().device<floppy_connector>("upd765:0")->get_device()->mon_w(!BIT(data, 3));
318		space.machine().device<floppy_connector>("upd765:1")->get_device()->mon_w(!BIT(data, 3));
	312	m_port_1ffd_data = data;
319	313
320		state->m_port_1ffd_data = data;
321
322	314	/* disable paging? */
323		if ((state->m_port_7ffd_data & 0x20)==0)
	315	if ((m_port_7ffd_data & 0x20)==0)
324	316	{
325	317	/* no */
326		spectrum_plus3_update_memory(space.machine());
	318	spectrum_plus3_update_memory();
327	319	}
328	320	}
329	321
r20813	r20814
333	325	ADDRESS_MAP_UNMAP_HIGH
334	326	AM_RANGE(0x0000, 0x0000) AM_READWRITE(spectrum_port_fe_r,spectrum_port_fe_w) AM_MIRROR(0xfffe) AM_MASK(0xffff)
335	327	AM_RANGE(0x001f, 0x001f) AM_READ(spectrum_port_1f_r) AM_MIRROR(0xff00)
336		AM_RANGE(0x4000, 0x4000) AM_WRITE_LEGACY(spectrum_plus3_port_7ffd_w) AM_MIRROR(0x3ffd)
	328	AM_RANGE(0x4000, 0x4000) AM_WRITE(spectrum_plus3_port_7ffd_w) AM_MIRROR(0x3ffd)
337	329	AM_RANGE(0x8000, 0x8000) AM_DEVWRITE_LEGACY("ay8912", ay8910_data_w) AM_MIRROR(0x3ffd)
338	330	AM_RANGE(0xc000, 0xc000) AM_DEVREADWRITE_LEGACY("ay8912", ay8910_r, ay8910_address_w) AM_MIRROR(0x3ffd)
339		AM_RANGE(0x1000, 0x1000) AM_WRITE_LEGACY(spectrum_plus3_port_1ffd_w) AM_MIRROR(0x0ffd)
340		AM_RANGE(0x2000, 0x2000) AM_READ_LEGACY(spectrum_plus3_port_2ffd_r) AM_MIRROR(0x0ffd)
341		AM_RANGE(0x3000, 0x3000) AM_READWRITE_LEGACY(spectrum_plus3_port_3ffd_r,spectrum_plus3_port_3ffd_w) AM_MIRROR(0x0ffd)
	331	AM_RANGE(0x1000, 0x1000) AM_WRITE(spectrum_plus3_port_1ffd_w) AM_MIRROR(0x0ffd)
	332	AM_RANGE(0x2000, 0x2000) AM_READ(spectrum_plus3_port_2ffd_r) AM_MIRROR(0x0ffd)
	333	AM_RANGE(0x3000, 0x3000) AM_READWRITE(spectrum_plus3_port_3ffd_r,spectrum_plus3_port_3ffd_w) AM_MIRROR(0x0ffd)
342	334	ADDRESS_MAP_END
343	335
344	336	MACHINE_RESET_MEMBER(spectrum_state,spectrum_plus3)
345	337	{
346		UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
	338	UINT8 *messram = m_ram->pointer();
347	339	memset(messram,0,128*1024);
348	340
349	341	MACHINE_RESET_CALL_MEMBER(spectrum);
r20813	r20814
351	343	/* Initial configuration */
352	344	m_port_7ffd_data = 0;
353	345	m_port_1ffd_data = 0;
354		spectrum_plus3_update_memory(machine());
	346	spectrum_plus3_update_memory();
355	347	}
356	348
357	349	DRIVER_INIT_MEMBER(spectrum_state,plus3)

trunk/src/mess/drivers/spectrum.c

r20813	r20814
275	275
276	276	#include "emu.h"
277	277	#include "cpu/z80/z80.h"
278		#include "sound/speaker.h"
279	278	#include "sound/wave.h"
280	279	#include "includes/spectrum.h"
281		#include "imagedev/snapquik.h"
282		#include "imagedev/cartslot.h"
283		#include "imagedev/cassette.h"
284		#include "machine/ram.h"
285	280	#include "formats/tzx_cas.h"
286	281	#include "formats/spec_snqk.h"
287	282
r20813	r20814
298	293
299	294	WRITE8_MEMBER(spectrum_state::spectrum_port_fe_w)
300	295	{
301		device_t *speaker = machine().device(SPEAKER_TAG);
302	296	unsigned char Changed;
303	297
304	298	Changed = m_port_fe_data^data;
r20813	r20814
306	300	/* border colour changed? */
307	301	if ((Changed & 0x07)!=0)
308	302	{
309		spectrum_UpdateBorderBitmap(machine());
	303	spectrum_UpdateBorderBitmap();
310	304	}
311	305
312	306	if ((Changed & (1<<4))!=0)
313	307	{
314	308	/* DAC output state */
315		speaker_level_w(speaker,(data>>4) & 0x01);
	309	speaker_level_w(m_speaker,(data>>4) & 0x01);
316	310	}
317	311
318	312	if ((Changed & (1<<3))!=0)
319	313	{
320	314	/* write cassette data */
321		machine().device<cassette_image_device>(CASSETTE_TAG)->output((data & (1<<3)) ? -1.0 : +1.0);
	315	m_cassette->output((data & (1<<3)) ? -1.0 : +1.0);
322	316	}
323	317
324	318	m_port_fe_data = data;
r20813	r20814
333	327	int lines = offset >> 8;
334	328	int data = 0xff;
335	329
336		int cs_extra1 = ioport("PLUS0")->read_safe(0xff) & 0x1f;
337		int cs_extra2 = ioport("PLUS1")->read_safe(0xff) & 0x1f;
338		int cs_extra3 = ioport("PLUS2")->read_safe(0xff) & 0x1f;
339		int ss_extra1 = ioport("PLUS3")->read_safe(0xff) & 0x1f;
340		int ss_extra2 = ioport("PLUS4")->read_safe(0xff) & 0x1f;
	330	int cs_extra1 = m_io_plus0 ? m_io_plus0->read() & 0x1f : 0x1f;
	331	int cs_extra2 = m_io_plus1 ? m_io_plus1->read() & 0x1f : 0x1f;
	332	int cs_extra3 = m_io_plus2 ? m_io_plus2->read() & 0x1f : 0x1f;
	333	int ss_extra1 = m_io_plus3 ? m_io_plus3->read() & 0x1f : 0x1f;
	334	int ss_extra2 = m_io_plus4 ? m_io_plus4->read() & 0x1f : 0x1f;
341	335
342	336	/* Caps - V */
343	337	if ((lines & 1) == 0)
344	338	{
345		data &= ioport("LINE0")->read();
	339	data &= m_io_line0->read();
346	340	/* CAPS for extra keys */
347	341	if (cs_extra1 != 0x1f || cs_extra2 != 0x1f || cs_extra3 != 0x1f)
348	342	data &= ~0x01;
r20813	r20814
350	344
351	345	/* A - G */
352	346	if ((lines & 2) == 0)
353		data &= ioport("LINE1")->read();
	347	data &= m_io_line1->read();
354	348
355	349	/* Q - T */
356	350	if ((lines & 4) == 0)
357		data &= ioport("LINE2")->read();
	351	data &= m_io_line2->read();
358	352
359	353	/* 1 - 5 */
360	354	if ((lines & 8) == 0)
361		data &= ioport("LINE3")->read() & cs_extra1;
	355	data &= m_io_line3->read() & cs_extra1;
362	356
363	357	/* 6 - 0 */
364	358	if ((lines & 16) == 0)
365		data &= ioport("LINE4")->read() & cs_extra2;
	359	data &= m_io_line4->read() & cs_extra2;
366	360
367	361	/* Y - P */
368	362	if ((lines & 32) == 0)
369		data &= ioport("LINE5")->read() & ss_extra1;
	363	data &= m_io_line5->read() & ss_extra1;
370	364
371	365	/* H - Enter */
372	366	if ((lines & 64) == 0)
373		data &= ioport("LINE6")->read();
	367	data &= m_io_line6->read();
374	368
375	369	/* B - Space */
376	370	if ((lines & 128) == 0)
377	371	{
378		data &= ioport("LINE7")->read() & cs_extra3 & ss_extra2;
	372	data &= m_io_line7->read() & cs_extra3 & ss_extra2;
379	373	/* SYMBOL SHIFT for extra keys */
380	374	if (ss_extra1 != 0x1f || ss_extra2 != 0x1f)
381	375	data &= ~0x02;
r20813	r20814
384	378	data |= (0xe0); /* Set bits 5-7 - as reset above */
385	379
386	380	/* cassette input from wav */
387		if ((machine().device<cassette_image_device>(CASSETTE_TAG))->input() > 0.0038 )
	381	if (m_cassette->input() > 0.0038 )
388	382	{
389	383	data &= ~0x40;
390	384	}
391	385
392	386	/* Issue 2 Spectrums default to having bits 5, 6 & 7 set.
393	387	Issue 3 Spectrums default to having bits 5 & 7 set and bit 6 reset. */
394		if (ioport("CONFIG")->read() & 0x80)
	388	if (m_io_config->read() & 0x80)
395	389	data ^= (0x40);
396	390
397	391	return data;
r20813	r20814
400	394	/* kempston joystick interface */
401	395	READ8_MEMBER(spectrum_state::spectrum_port_1f_r)
402	396	{
403		return ioport("KEMPSTON")->read() & 0x1f;
	397	return m_io_kempston->read() & 0x1f;
404	398	}
405	399
406	400	/* fuller joystick interface */
407	401	READ8_MEMBER(spectrum_state::spectrum_port_7f_r)
408	402	{
409		return ioport("FULLER")->read() | (0xff^0x8f);
	403	return m_io_fuller->read() | (0xff^0x8f);
410	404	}
411	405
412	406	/* mikrogen joystick interface */
413	407	READ8_MEMBER(spectrum_state::spectrum_port_df_r)
414	408	{
415		return ioport("MIKROGEN")->read() | (0xff^0x1f);
	409	return m_io_mikrogen->read() | (0xff^0x1f);
416	410	}
417	411
418	412	READ8_MEMBER(spectrum_state::spectrum_port_ula_r)
r20813	r20814
613	607
614	608	DRIVER_INIT_MEMBER(spectrum_state,spectrum)
615	609	{
616		address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM);
	610	address_space &space = m_maincpu->space(AS_PROGRAM);
617	611
618		switch (machine().device<ram_device>(RAM_TAG)->size())
	612	switch (m_ram->size())
619	613	{
620	614	case 48*1024:
621	615	space.install_ram(0x8000, 0xffff, NULL); // Fall through
r20813	r20814
677	671	return IMAGE_INIT_FAIL;
678	672	}
679	673
680		if (image.fread(image.device().machine().root_device().memregion("maincpu")->base(), filesize) != filesize)
	674	if (image.fread(memregion("maincpu")->base(), filesize) != filesize)
681	675	{
682	676	image.seterror(IMAGE_ERROR_UNSPECIFIED, "Error loading file");
683	677	return IMAGE_INIT_FAIL;
r20813	r20814
686	680	else
687	681	{
688	682	filesize = image.get_software_region_length("rom");
689		memcpy(image.device().machine().root_device().memregion("maincpu")->base(), image.get_software_region("rom"), filesize);
	683	memcpy(memregion("maincpu")->base(), image.get_software_region("rom"), filesize);
690	684	}
691	685	return IMAGE_INIT_PASS;
692	686	}

trunk/src/mess/drivers/atm.c

r20813	r20814
26	26	public:
27	27	atm_state(const machine_config &mconfig, device_type type, const char *tag)
28	28	: spectrum_state(mconfig, type, tag)
29		, m_maincpu(*this, "maincpu")
30	29	, m_bank1(*this, "bank1")
31	30	, m_bank2(*this, "bank2")
32	31	, m_bank3(*this, "bank3")
33	32	, m_bank4(*this, "bank4")
34	33	, m_beta(*this, BETA_DISK_TAG)
35		, m_ram(*this, RAM_TAG)
36	34	{ }
37	35
38	36	DECLARE_WRITE8_MEMBER(atm_port_7ffd_w);
39	37	DIRECT_UPDATE_MEMBER(atm_direct);
40	38	DECLARE_MACHINE_RESET(atm);
	39
41	40	protected:
42		required_device<cpu_device> m_maincpu;
43	41	required_memory_bank m_bank1;
44	42	required_memory_bank m_bank2;
45	43	required_memory_bank m_bank3;
46	44	required_memory_bank m_bank4;
47	45	required_device<device_t> m_beta;
48		required_device<ram_device> m_ram;
	46
49	47	private:
50	48	UINT8 *m_p_ram;
51	49	void atm_update_memory();

trunk/src/mess/drivers/spec128.c

r20813	r20814
169	169	/****************************************************************************************************/
170	170	/* Spectrum 128 specific functions */
171	171
172		static WRITE8_HANDLER(spectrum_128_port_7ffd_w)
	172	WRITE8_MEMBER(spectrum_state::spectrum_128_port_7ffd_w)
173	173	{
174		spectrum_state *state = space.machine().driver_data<spectrum_state>();
175
176	174	/* D0-D2: RAM page located at 0x0c000-0x0ffff */
177	175	/* D3 - Screen select (screen 0 in ram page 5, screen 1 in ram page 7 */
178	176	/* D4 - ROM select - which rom paged into 0x0000-0x03fff */
179	177	/* D5 - Disable paging */
180	178
181	179	/* disable paging? */
182		if (state->m_port_7ffd_data & 0x20)
	180	if (m_port_7ffd_data & 0x20)
183	181	return;
184	182
185	183	/* store new state */
186		state->m_port_7ffd_data = data;
	184	m_port_7ffd_data = data;
187	185
188	186	/* update memory */
189		spectrum_128_update_memory(space.machine());
	187	spectrum_128_update_memory();
190	188	}
191	189
192		void spectrum_128_update_memory(running_machine &machine)
	190	void spectrum_state::spectrum_128_update_memory()
193	191	{
194		spectrum_state *state = machine.driver_data<spectrum_state>();
195		UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
	192	UINT8 *messram = m_ram->pointer();
196	193	unsigned char *ChosenROM;
197	194	int ROMSelection;
198	195
199		if (state->m_port_7ffd_data & 8)
	196	if (m_port_7ffd_data & 8)
200	197	{
201		state->m_screen_location = messram + (7<<14);
	198	m_screen_location = messram + (7<<14);
202	199	}
203	200	else
204	201	{
205		state->m_screen_location = messram + (5<<14);
	202	m_screen_location = messram + (5<<14);
206	203	}
207	204
208	205	/* select ram at 0x0c000-0x0ffff */
r20813	r20814
210	207	int ram_page;
211	208	unsigned char *ram_data;
212	209
213		ram_page = state->m_port_7ffd_data & 0x07;
	210	ram_page = m_port_7ffd_data & 0x07;
214	211	ram_data = messram + (ram_page<<14);
215	212
216		state->membank("bank4")->set_base(ram_data);
	213	membank("bank4")->set_base(ram_data);
217	214	}
218	215
219	216	/* ROM switching */
220		ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01);
	217	ROMSelection = ((m_port_7ffd_data>>4) & 0x01);
221	218
222	219	/* rom 0 is 128K rom, rom 1 is 48 BASIC */
223	220
224		ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x010000 + (ROMSelection<<14);
	221	ChosenROM = memregion("maincpu")->base() + 0x010000 + (ROMSelection<<14);
225	222
226		state->membank("bank1")->set_base(ChosenROM);
	223	membank("bank1")->set_base(ChosenROM);
227	224	}
228	225
229		static  READ8_HANDLER ( spectrum_128_ula_r )
	226	READ8_MEMBER( spectrum_state::spectrum_128_ula_r )
230	227	{
231		spectrum_state *state = space.machine().driver_data<spectrum_state>();
232		int vpos = space.machine().primary_screen->vpos();
	228	int vpos = machine().primary_screen->vpos();
233	229
234		return vpos<193 ? state->m_screen_location[0x1800|(vpos&0xf8)<<2]:0xff;
	230	return vpos<193 ? m_screen_location[0x1800|(vpos&0xf8)<<2]:0xff;
235	231	}
236	232
237	233	static ADDRESS_MAP_START (spectrum_128_io, AS_IO, 8, spectrum_state )
r20813	r20814
239	235	AM_RANGE(0x001f, 0x001f) AM_READ(spectrum_port_1f_r) AM_MIRROR(0xff00)
240	236	AM_RANGE(0x007f, 0x007f) AM_READ(spectrum_port_7f_r) AM_MIRROR(0xff00)
241	237	AM_RANGE(0x00df, 0x00df) AM_READ(spectrum_port_df_r) AM_MIRROR(0xff00)
242		AM_RANGE(0x4000, 0x4000) AM_WRITE_LEGACY(spectrum_128_port_7ffd_w) AM_MIRROR(0x3ffd)
	238	AM_RANGE(0x4000, 0x4000) AM_WRITE(spectrum_128_port_7ffd_w) AM_MIRROR(0x3ffd)
243	239	AM_RANGE(0x8000, 0x8000) AM_DEVWRITE_LEGACY("ay8912", ay8910_data_w) AM_MIRROR(0x3ffd)
244	240	AM_RANGE(0xc000, 0xc000) AM_DEVREADWRITE_LEGACY("ay8912", ay8910_r, ay8910_address_w) AM_MIRROR(0x3ffd)
245		AM_RANGE(0x0001, 0x0001) AM_READ_LEGACY(spectrum_128_ula_r) AM_MIRROR(0xfffe)
	241	AM_RANGE(0x0001, 0x0001) AM_READ(spectrum_128_ula_r) AM_MIRROR(0xfffe)
246	242	ADDRESS_MAP_END
247	243
248	244	static ADDRESS_MAP_START (spectrum_128_mem, AS_PROGRAM, 8, spectrum_state )
r20813	r20814
254	250
255	251	MACHINE_RESET_MEMBER(spectrum_state,spectrum_128)
256	252	{
257		UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
	253	UINT8 *messram = m_ram->pointer();
258	254
259	255	memset(messram,0,128*1024);
260	256	/* 0x0000-0x3fff always holds ROM */
r20813	r20814
270	266	/* set initial ram config */
271	267	m_port_7ffd_data = 0;
272	268	m_port_1ffd_data = -1;
273		spectrum_128_update_memory(machine());
	269	spectrum_128_update_memory();
274	270	}
275	271
276	272	/* F4 Character Displayer */

trunk/src/mess/drivers/elwro800.c

r20813	r20814
34	34	{
35	35	public:
36	36	elwro800_state(const machine_config &mconfig, device_type type, const char *tag)
37		: spectrum_state(mconfig, type, tag) { }
	37	: spectrum_state(mconfig, type, tag)
	38	, m_i8251(*this, "i8251")
	39	, m_i8255(*this, "ppi8255")
	40	, m_centronics(*this, "centronics")
	41	, m_io_line8(*this, "LINE8")
	42	, m_io_line9(*this, "LINE9")
	43	, m_io_network_id(*this, "NETWORK ID")
	44	{ }
38	45
39	46	/* for elwro800 */
40	47	/* RAM mapped at 0 */
r20813	r20814
52	59	INTERRUPT_GEN_MEMBER(elwro800jr_interrupt);
53	60	DECLARE_READ8_MEMBER(i8255_port_c_r);
54	61	DECLARE_WRITE8_MEMBER(i8255_port_c_w);
	62
	63	protected:
	64	required_device<i8251_device> m_i8251;
	65	required_device<i8255_device> m_i8255;
	66	required_device<centronics_device> m_centronics;
	67	required_ioport m_io_line8;
	68	required_ioport m_io_line9;
	69	required_ioport m_io_network_id;
	70
	71	void elwro800jr_mmu_w(UINT8 data);
55	72	};
56	73
57	74
r20813	r20814
80	97
81	98	WRITE8_MEMBER(elwro800_state::elwro800jr_fdc_control_w)
82	99	{
83		upd765a_device *fdc = machine().device<upd765a_device>("upd765");
	100	m_upd765_0->get_device()->mon_w(!BIT(data, 0));
	101	m_upd765_1->get_device()->mon_w(!BIT(data, 1));
84	102
85		machine().device<floppy_connector>("upd765:0")->get_device()->mon_w(!BIT(data, 0));
86		machine().device<floppy_connector>("upd765:1")->get_device()->mon_w(!BIT(data, 1));
	103	m_upd765->tc_w(data & 0x04);
87	104
88		fdc->tc_w(data & 0x04);
89
90	105	if(!(data & 8))
91		fdc->reset();
	106	m_upd765->reset();
92	107	}
93	108
94	109	/*************************************
r20813	r20814
97	112	*
98	113	*************************************/
99	114
100		static void elwro800jr_mmu_w(running_machine &machine, UINT8 data)
	115	void elwro800_state::elwro800jr_mmu_w(UINT8 data)
101	116	{
102		UINT8 *prom = machine.root_device().memregion("proms")->base() + 0x200;
103		UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
	117	UINT8 *prom = memregion("proms")->base() + 0x200;
	118	UINT8 *messram = m_ram->pointer();
104	119	UINT8 cs;
105	120	UINT8 ls175;
106		elwro800_state *state = machine.driver_data<elwro800_state>();
107	121
108	122	ls175 = BITSWAP8(data, 7, 6, 5, 4, 4, 5, 7, 6) & 0x0f;
109	123
r20813	r20814
111	125	if (!BIT(cs,0))
112	126	{
113	127	// rom BAS0
114		state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x0000); /* BAS0 ROM */
115		machine.device("maincpu")->memory().space(AS_PROGRAM).nop_write(0x0000, 0x1fff);
116		state->m_ram_at_0000 = 0;
	128	membank("bank1")->set_base(memregion("maincpu")->base() + 0x0000); /* BAS0 ROM */
	129	m_maincpu->space(AS_PROGRAM).nop_write(0x0000, 0x1fff);
	130	m_ram_at_0000 = 0;
117	131	}
118	132	else if (!BIT(cs,4))
119	133	{
120	134	// rom BOOT
121		state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x4000); /* BOOT ROM */
122		machine.device("maincpu")->memory().space(AS_PROGRAM).nop_write(0x0000, 0x1fff);
123		state->m_ram_at_0000 = 0;
	135	membank("bank1")->set_base(memregion("maincpu")->base() + 0x4000); /* BOOT ROM */
	136	m_maincpu->space(AS_PROGRAM).nop_write(0x0000, 0x1fff);
	137	m_ram_at_0000 = 0;
124	138	}
125	139	else
126	140	{
127	141	// RAM
128		state->membank("bank1")->set_base(messram);
129		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_bank(0x0000, 0x1fff, "bank1");
130		state->m_ram_at_0000 = 1;
	142	membank("bank1")->set_base(messram);
	143	m_maincpu->space(AS_PROGRAM).install_write_bank(0x0000, 0x1fff, "bank1");
	144	m_ram_at_0000 = 1;
131	145	}
132	146
133	147	cs = prom[((0x2000 >> 10) | (ls175 << 6)) & 0x1ff];
134	148	if (!BIT(cs,1))
135	149	{
136		state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x2000); /* BAS1 ROM */
137		machine.device("maincpu")->memory().space(AS_PROGRAM).nop_write(0x2000, 0x3fff);
	150	membank("bank2")->set_base(memregion("maincpu")->base() + 0x2000); /* BAS1 ROM */
	151	m_maincpu->space(AS_PROGRAM).nop_write(0x2000, 0x3fff);
138	152	}
139	153	else
140	154	{
141		state->membank("bank2")->set_base(messram + 0x2000); /* RAM */
142		machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_bank(0x2000, 0x3fff, "bank2");
	155	membank("bank2")->set_base(messram + 0x2000); /* RAM */
	156	m_maincpu->space(AS_PROGRAM).install_write_bank(0x2000, 0x3fff, "bank2");
143	157	}
144	158
145	159	if (BIT(ls175,2))
146	160	{
147	161	// relok
148		state->m_screen_location = messram + 0xe000;
	162	m_screen_location = messram + 0xe000;
149	163	}
150	164	else
151	165	{
152		state->m_screen_location = messram + 0x4000;
	166	m_screen_location = messram + 0x4000;
153	167	}
154	168
155		state->m_NR = BIT(ls175,3);
	169	m_NR = BIT(ls175,3);
156	170	if (BIT(ls175,3))
157	171	{
158	172	logerror("Reading network number\n");
r20813	r20814
167	181
168	182	READ8_MEMBER(elwro800_state::i8255_port_c_r)
169	183	{
170		centronics_device *centronics = machine().device<centronics_device>("centronics");
171		return (centronics->ack_r() << 2);
	184	return (m_centronics->ack_r() << 2);
172	185	}
173	186
174	187	WRITE8_MEMBER(elwro800_state::i8255_port_c_w)
175	188	{
176		centronics_device *centronics = machine().device<centronics_device>("centronics");
177		centronics->strobe_w((data >> 7) & 0x01);
	189	m_centronics->strobe_w((data >> 7) & 0x01);
178	190	}
179	191
180	192	static I8255_INTERFACE(elwro800jr_ppi8255_interface)
r20813	r20814
227	239	int mask = 0x8000;
228	240	int data = 0xff;
229	241	int i;
230		char port_name[6] = "LINE0";
	242	ioport_port *io_ports[9] = { m_io_line7, m_io_line6, m_io_line5, m_io_line4, m_io_line3, m_io_line2, m_io_line1, m_io_line0, m_io_line8 };
231	243
232	244	if ( !m_NR )
233	245	{
r20813	r20814
235	247	{
236	248	if (!(offset & mask))
237	249	{
238		if (i == 8)
239		{
240		port_name[4] = '8';
241		}
242		else
243		{
244		port_name[4] = '0' + (7 - i);
245		}
246		data &= (ioport(port_name)->read());
	250	data &= io_ports[i]->read();
247	251	}
248	252	}
249	253
250	254	if ((offset & 0xff) == 0xfb)
251	255	{
252		data &= ioport("LINE9")->read();
	256	data &= m_io_line9->read();
253	257	}
254	258
255	259	/* cassette input from wav */
256		if ((machine().device<cassette_image_device>(CASSETTE_TAG))->input() > 0.0038 )
	260	if (m_cassette->input() > 0.0038 )
257	261	{
258	262	data &= ~0x40;
259	263	}
260	264	}
261	265	else
262	266	{
263		data = ioport("NETWORK ID")->read();
	267	data = m_io_network_id->read();
264	268	}
265	269
266	270	return data;
r20813	r20814
272	276	else if (!BIT(cs,2))
273	277	{
274	278	// CS55
275		i8255_device *ppi = machine().device<i8255_device>("ppi8255");
276		return ppi->read(space, (offset & 0x03) ^ 0x03);
	279	return m_i8255->read(space, (offset & 0x03) ^ 0x03);
277	280	}
278	281	else if (!BIT(cs,3))
279	282	{
280	283	// CSFDC
281		upd765a_device *fdc = machine().device<upd765a_device>("upd765");
282	284	if (offset & 1)
283	285	{
284		return fdc->fifo_r(space, 0, 0xff);
	286	return m_upd765->fifo_r(space, 0, 0xff);
285	287	}
286	288	else
287	289	{
288		return fdc->msr_r(space, 0, 0xff);
	290	return m_upd765->msr_r(space, 0, 0xff);
289	291	}
290	292	}
291	293	else if (!BIT(cs,4))
292	294	{
293	295	// CS51
294		i8251_device *usart = machine().device<i8251_device>("i8251");
295	296	if (offset & 1)
296	297	{
297		return usart->status_r(space, 0);
	298	return m_i8251->status_r(space, 0);
298	299	}
299	300	else
300	301	{
301		return usart->data_r(space, 0);
	302	return m_i8251->data_r(space, 0);
302	303	}
303	304	}
304	305	else if (!BIT(cs,5))
r20813	r20814
325	326	else if (!BIT(cs,1))
326	327	{
327	328	// CF7
328		elwro800jr_mmu_w(machine(), data);
	329	elwro800jr_mmu_w(data);
329	330	}
330	331	else if (!BIT(cs,2))
331	332	{
332	333	// CS55
333		i8255_device *ppi = machine().device<i8255_device>("ppi8255");
334		ppi->write(space, (offset & 0x03) ^ 0x03, data);
	334	m_i8255->write(space, (offset & 0x03) ^ 0x03, data);
335	335	}
336	336	else if (!BIT(cs,3))
337	337	{
338	338	// CSFDC
339		upd765a_device *fdc = machine().device<upd765a_device>("upd765");
340	339	if (offset & 1)
341	340	{
342		fdc->fifo_w(space, 0, data, 0xff);
	341	m_upd765->fifo_w(space, 0, data, 0xff);
343	342	}
344	343	}
345	344	else if (!BIT(cs,4))
346	345	{
347	346	// CS51
348		i8251_device *usart = machine().device<i8251_device>("i8251");
349	347	if (offset & 1)
350	348	{
351		usart->control_w(space, 0, data);
	349	m_i8251->control_w(space, 0, data);
352	350	}
353	351	else
354	352	{
355		usart->data_w(space, 0, data);
	353	m_i8251->data_w(space, 0, data);
356	354	}
357	355	}
358	356	else if (!BIT(cs,5))
r20813	r20814
502	500
503	501	MACHINE_RESET_MEMBER(elwro800_state,elwro800)
504	502	{
505		UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
	503	UINT8 *messram = m_ram->pointer();
506	504
507	505	m_df_on_databus = 0xdf;
508	506	memset(messram, 0, 64*1024);
r20813	r20814
513	511	m_port_1ffd_data = -1;
514	512
515	513	// this is a reset of ls175 in mmu
516		elwro800jr_mmu_w(machine(), 0);
	514	elwro800jr_mmu_w(0);
517	515
518		machine().device("maincpu")->memory().space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(elwro800_state::elwro800_direct_handler), this));
	516	m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(elwro800_state::elwro800_direct_handler), this));
519	517	}
520	518
521	519	static const cassette_interface elwro800jr_cassette_interface =

trunk/src/mess/drivers/scorpion.c

r20813	r20814
160	160	public:
161	161	scorpion_state(const machine_config &mconfig, device_type type, const char *tag)
162	162	: spectrum_state(mconfig, type, tag)
163		, m_maincpu(*this, "maincpu")
164	163	, m_bank1(*this, "bank1")
165	164	, m_bank2(*this, "bank2")
166	165	, m_bank3(*this, "bank3")
167	166	, m_bank4(*this, "bank4")
168	167	, m_beta(*this, BETA_DISK_TAG)
169		, m_ram(*this, RAM_TAG)
170	168	{ }
171	169
172	170	DECLARE_DIRECT_UPDATE_MEMBER(scorpion_direct);
r20813	r20814
177	175	DECLARE_MACHINE_RESET(scorpion);
178	176	TIMER_DEVICE_CALLBACK_MEMBER(nmi_check_callback);
179	177	protected:
180		required_device<cpu_device> m_maincpu;
181	178	required_memory_bank m_bank1;
182	179	required_memory_bank m_bank2;
183	180	required_memory_bank m_bank3;
184	181	required_memory_bank m_bank4;
185	182	required_device<device_t> m_beta;
186		required_device<ram_device> m_ram;
187	183	private:
188	184	UINT8 *m_p_ram;
189	185	void scorpion_update_memory();
r20813	r20814
288	284
289	285	TIMER_DEVICE_CALLBACK_MEMBER(scorpion_state::nmi_check_callback)
290	286	{
291		if ((machine().root_device().ioport("NMI")->read() & 1)==1)
	287	if ((m_io_nmi->read() & 1)==1)
292	288	{
293	289	m_port_1ffd_data |= 0x02;
294	290	scorpion_update_memory();

trunk/src/mess/drivers/timex.c

r20813	r20814
169	169	/* TS2048 specific functions */
170	170
171	171
172		static  READ8_HANDLER(ts2068_port_f4_r)
	172	READ8_MEMBER( spectrum_state::ts2068_port_f4_r )
173	173	{
174		spectrum_state *state = space.machine().driver_data<spectrum_state>();
175
176		return state->m_port_f4_data;
	174	return m_port_f4_data;
177	175	}
178	176
179		static WRITE8_HANDLER(ts2068_port_f4_w)
	177	WRITE8_MEMBER( spectrum_state::ts2068_port_f4_w )
180	178	{
181		spectrum_state *state = space.machine().driver_data<spectrum_state>();
182
183		state->m_port_f4_data = data;
184		ts2068_update_memory(space.machine());
	179	m_port_f4_data = data;
	180	ts2068_update_memory();
185	181	}
186	182
187		static  READ8_HANDLER(ts2068_port_ff_r)
	183	READ8_MEMBER( spectrum_state::ts2068_port_ff_r )
188	184	{
189		spectrum_state *state = space.machine().driver_data<spectrum_state>();
190
191		return state->m_port_ff_data;
	185	return m_port_ff_data;
192	186	}
193	187
194		static WRITE8_HANDLER(ts2068_port_ff_w)
	188	WRITE8_MEMBER( spectrum_state::ts2068_port_ff_w )
195	189	{
196	190	/* Bits 0-2 Video Mode Select
197	191	Bits 3-5 64 column mode ink/paper selection
r20813	r20814
199	193	Bit  6   17ms Interrupt Inhibit
200	194	Bit  7   Cartridge (0) / EXROM (1) select
201	195	*/
202		spectrum_state *state = space.machine().driver_data<spectrum_state>();
203
204		state->m_port_ff_data = data;
205		ts2068_update_memory(space.machine());
	196	m_port_ff_data = data;
	197	ts2068_update_memory();
206	198	logerror("Port %04x write %02x\n", offset, data);
207	199	}
208	200
r20813	r20814
224	216	*      at the same time.
225	217	*
226	218	*******************************************************************/
227		void ts2068_update_memory(running_machine &machine)
	219	void spectrum_state::ts2068_update_memory()
228	220	{
229		spectrum_state *state = machine.driver_data<spectrum_state>();
230		UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
231		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	221	UINT8 *messram = m_ram->pointer();
	222	address_space &space = m_maincpu->space(AS_PROGRAM);
232	223	unsigned char *ChosenROM, *ExROM;
233	224	const timex_cart_t *timex_cart = timex_cart_data();
234	225	int timex_cart_type = timex_cart->type;
235	226	UINT8 timex_cart_chunks = timex_cart->chunks;
236	227	UINT8 *DOCK = timex_cart->data;
237	228
238		ExROM = state->memregion("maincpu")->base() + 0x014000;
	229	ExROM = memregion("maincpu")->base() + 0x014000;
239	230
240		if (state->m_port_f4_data & 0x01)
	231	if (m_port_f4_data & 0x01)
241	232	{
242		if (state->m_port_ff_data & 0x80)
	233	if (m_port_ff_data & 0x80)
243	234	{
244	235	space.install_read_bank(0x0000, 0x1fff, "bank1");
245	236	space.unmap_write(0x0000, 0x1fff);
246		state->membank("bank1")->set_base(ExROM);
	237	membank("bank1")->set_base(ExROM);
247	238	logerror("0000-1fff EXROM\n");
248	239	}
249	240	else
250	241	{
251	242	if (timex_cart_type == TIMEX_CART_DOCK)
252	243	{
253		state->membank("bank1")->set_base(DOCK);
	244	membank("bank1")->set_base(DOCK);
254	245	space.install_read_bank(0x0000, 0x1fff, "bank1");
255	246	if (timex_cart_chunks&0x01)
256	247	space.install_write_bank(0x0000, 0x1fff, "bank9");
r20813	r20814
269	260	}
270	261	else
271	262	{
272		ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x010000;
273		state->membank("bank1")->set_base(ChosenROM);
	263	ChosenROM = memregion("maincpu")->base() + 0x010000;
	264	membank("bank1")->set_base(ChosenROM);
274	265	space.install_read_bank(0x0000, 0x1fff, "bank1");
275	266	space.unmap_write(0x0000, 0x1fff);
276	267	logerror("0000-1fff HOME\n");
277	268	}
278	269
279		if (state->m_port_f4_data & 0x02)
	270	if (m_port_f4_data & 0x02)
280	271	{
281		if (state->m_port_ff_data & 0x80)
	272	if (m_port_ff_data & 0x80)
282	273	{
283		state->membank("bank2")->set_base(ExROM);
	274	membank("bank2")->set_base(ExROM);
284	275	space.install_read_bank(0x2000, 0x3fff, "bank2");
285	276	space.unmap_write(0x2000, 0x3fff);
286	277	logerror("2000-3fff EXROM\n");
r20813	r20814
289	280	{
290	281	if (timex_cart_type == TIMEX_CART_DOCK)
291	282	{
292		state->membank("bank2")->set_base(DOCK+0x2000);
	283	membank("bank2")->set_base(DOCK+0x2000);
293	284	space.install_read_bank(0x2000, 0x3fff, "bank2");
294	285	if (timex_cart_chunks&0x02)
295	286	space.install_write_bank(0x2000, 0x3fff, "bank10");
r20813	r20814
307	298	}
308	299	else
309	300	{
310		ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x012000;
311		state->membank("bank2")->set_base(ChosenROM);
	301	ChosenROM = memregion("maincpu")->base() + 0x012000;
	302	membank("bank2")->set_base(ChosenROM);
312	303	space.install_read_bank(0x2000, 0x3fff, "bank2");
313	304	space.unmap_write(0x2000, 0x3fff);
314	305	logerror("2000-3fff HOME\n");
315	306	}
316	307
317		if (state->m_port_f4_data & 0x04)
	308	if (m_port_f4_data & 0x04)
318	309	{
319		if (state->m_port_ff_data & 0x80)
	310	if (m_port_ff_data & 0x80)
320	311	{
321		state->membank("bank3")->set_base(ExROM);
	312	membank("bank3")->set_base(ExROM);
322	313	space.install_read_bank(0x4000, 0x5fff, "bank3");
323	314	space.unmap_write(0x4000, 0x5fff);
324	315	logerror("4000-5fff EXROM\n");
r20813	r20814
327	318	{
328	319	if (timex_cart_type == TIMEX_CART_DOCK)
329	320	{
330		state->membank("bank3")->set_base(DOCK+0x4000);
	321	membank("bank3")->set_base(DOCK+0x4000);
331	322	space.install_read_bank(0x4000, 0x5fff, "bank3");
332	323	if (timex_cart_chunks&0x04)
333	324	space.install_write_bank(0x4000, 0x5fff, "bank11");
r20813	r20814
344	335	}
345	336	else
346	337	{
347		state->membank("bank3")->set_base(messram);
348		state->membank("bank11")->set_base(messram);
	338	membank("bank3")->set_base(messram);
	339	membank("bank11")->set_base(messram);
349	340	space.install_read_bank(0x4000, 0x5fff, "bank3");
350	341	space.install_write_bank(0x4000, 0x5fff, "bank11");
351	342	logerror("4000-5fff RAM\n");
352	343	}
353	344
354		if (state->m_port_f4_data & 0x08)
	345	if (m_port_f4_data & 0x08)
355	346	{
356		if (state->m_port_ff_data & 0x80)
	347	if (m_port_ff_data & 0x80)
357	348	{
358		state->membank("bank4")->set_base(ExROM);
	349	membank("bank4")->set_base(ExROM);
359	350	space.install_read_bank(0x6000, 0x7fff, "bank4");
360	351	space.unmap_write(0x6000, 0x7fff);
361	352	logerror("6000-7fff EXROM\n");
r20813	r20814
364	355	{
365	356	if (timex_cart_type == TIMEX_CART_DOCK)
366	357	{
367		state->membank("bank4")->set_base(DOCK+0x6000);
	358	membank("bank4")->set_base(DOCK+0x6000);
368	359	space.install_read_bank(0x6000, 0x7fff, "bank4");
369	360	if (timex_cart_chunks&0x08)
370	361	space.install_write_bank(0x6000, 0x7fff, "bank12");
r20813	r20814
381	372	}
382	373	else
383	374	{
384		state->membank("bank4")->set_base(messram + 0x2000);
385		state->membank("bank12")->set_base(messram + 0x2000);
	375	membank("bank4")->set_base(messram + 0x2000);
	376	membank("bank12")->set_base(messram + 0x2000);
386	377	space.install_read_bank(0x6000, 0x7fff, "bank4");
387	378	space.install_write_bank(0x6000, 0x7fff, "bank12");
388	379	logerror("6000-7fff RAM\n");
389	380	}
390	381
391		if (state->m_port_f4_data & 0x10)
	382	if (m_port_f4_data & 0x10)
392	383	{
393		if (state->m_port_ff_data & 0x80)
	384	if (m_port_ff_data & 0x80)
394	385	{
395		state->membank("bank5")->set_base(ExROM);
	386	membank("bank5")->set_base(ExROM);
396	387	space.install_read_bank(0x8000, 0x9fff, "bank5");
397	388	space.unmap_write(0x8000, 0x9fff);
398	389	logerror("8000-9fff EXROM\n");
r20813	r20814
401	392	{
402	393	if (timex_cart_type == TIMEX_CART_DOCK)
403	394	{
404		state->membank("bank5")->set_base(DOCK+0x8000);
	395	membank("bank5")->set_base(DOCK+0x8000);
405	396	space.install_read_bank(0x8000, 0x9fff,"bank5");
406	397	if (timex_cart_chunks&0x10)
407	398	space.install_write_bank(0x8000, 0x9fff,"bank13");
r20813	r20814
418	409	}
419	410	else
420	411	{
421		state->membank("bank5")->set_base(messram + 0x4000);
422		state->membank("bank13")->set_base(messram + 0x4000);
	412	membank("bank5")->set_base(messram + 0x4000);
	413	membank("bank13")->set_base(messram + 0x4000);
423	414	space.install_read_bank(0x8000, 0x9fff,"bank5");
424	415	space.install_write_bank(0x8000, 0x9fff,"bank13");
425	416	logerror("8000-9fff RAM\n");
426	417	}
427	418
428		if (state->m_port_f4_data & 0x20)
	419	if (m_port_f4_data & 0x20)
429	420	{
430		if (state->m_port_ff_data & 0x80)
	421	if (m_port_ff_data & 0x80)
431	422	{
432		state->membank("bank6")->set_base(ExROM);
	423	membank("bank6")->set_base(ExROM);
433	424	space.install_read_bank(0xa000, 0xbfff, "bank6");
434	425	space.unmap_write(0xa000, 0xbfff);
435	426	logerror("a000-bfff EXROM\n");
r20813	r20814
438	429	{
439	430	if (timex_cart_type == TIMEX_CART_DOCK)
440	431	{
441		state->membank("bank6")->set_base(DOCK+0xa000);
	432	membank("bank6")->set_base(DOCK+0xa000);
442	433	space.install_read_bank(0xa000, 0xbfff, "bank6");
443	434	if (timex_cart_chunks&0x20)
444	435	space.install_write_bank(0xa000, 0xbfff, "bank14");
r20813	r20814
456	447	}
457	448	else
458	449	{
459		state->membank("bank6")->set_base(messram + 0x6000);
460		state->membank("bank14")->set_base(messram + 0x6000);
	450	membank("bank6")->set_base(messram + 0x6000);
	451	membank("bank14")->set_base(messram + 0x6000);
461	452	space.install_read_bank(0xa000, 0xbfff, "bank6");
462	453	space.install_write_bank(0xa000, 0xbfff, "bank14");
463	454	logerror("a000-bfff RAM\n");
464	455	}
465	456
466		if (state->m_port_f4_data & 0x40)
	457	if (m_port_f4_data & 0x40)
467	458	{
468		if (state->m_port_ff_data & 0x80)
	459	if (m_port_ff_data & 0x80)
469	460	{
470		state->membank("bank7")->set_base(ExROM);
	461	membank("bank7")->set_base(ExROM);
471	462	space.install_read_bank(0xc000, 0xdfff, "bank7");
472	463	space.unmap_write(0xc000, 0xdfff);
473	464	logerror("c000-dfff EXROM\n");
r20813	r20814
476	467	{
477	468	if (timex_cart_type == TIMEX_CART_DOCK)
478	469	{
479		state->membank("bank7")->set_base(DOCK+0xc000);
	470	membank("bank7")->set_base(DOCK+0xc000);
480	471	space.install_read_bank(0xc000, 0xdfff, "bank7");
481	472	if (timex_cart_chunks&0x40)
482	473	space.install_write_bank(0xc000, 0xdfff, "bank15");
r20813	r20814
493	484	}
494	485	else
495	486	{
496		state->membank("bank7")->set_base(messram + 0x8000);
497		state->membank("bank15")->set_base(messram + 0x8000);
	487	membank("bank7")->set_base(messram + 0x8000);
	488	membank("bank15")->set_base(messram + 0x8000);
498	489	space.install_read_bank(0xc000, 0xdfff, "bank7");
499	490	space.install_write_bank(0xc000, 0xdfff, "bank15");
500	491	logerror("c000-dfff RAM\n");
501	492	}
502	493
503		if (state->m_port_f4_data & 0x80)
	494	if (m_port_f4_data & 0x80)
504	495	{
505		if (state->m_port_ff_data & 0x80)
	496	if (m_port_ff_data & 0x80)
506	497	{
507		state->membank("bank8")->set_base(ExROM);
	498	membank("bank8")->set_base(ExROM);
508	499	space.install_read_bank(0xe000, 0xffff, "bank8");
509	500	space.unmap_write(0xe000, 0xffff);
510	501	logerror("e000-ffff EXROM\n");
r20813	r20814
513	504	{
514	505	if (timex_cart_type == TIMEX_CART_DOCK)
515	506	{
516		state->membank("bank8")->set_base(DOCK+0xe000);
	507	membank("bank8")->set_base(DOCK+0xe000);
517	508	space.install_read_bank(0xe000, 0xffff, "bank8");
518	509	if (timex_cart_chunks&0x80)
519	510	space.install_write_bank(0xe000, 0xffff, "bank16");
r20813	r20814
530	521	}
531	522	else
532	523	{
533		state->membank("bank8")->set_base(messram + 0xa000);
534		state->membank("bank16")->set_base(messram + 0xa000);
	524	membank("bank8")->set_base(messram + 0xa000);
	525	membank("bank16")->set_base(messram + 0xa000);
535	526	space.install_read_bank(0xe000, 0xffff, "bank8");
536	527	space.install_write_bank(0xe000, 0xffff, "bank16");
537	528	logerror("e000-ffff RAM\n");
r20813	r20814
542	533	AM_RANGE(0x1f, 0x1f) AM_READ(spectrum_port_1f_r ) AM_MIRROR(0xff00)
543	534	AM_RANGE(0x7f, 0x7f) AM_READ(spectrum_port_7f_r ) AM_MIRROR(0xff00)
544	535	AM_RANGE(0xdf, 0xdf) AM_READ(spectrum_port_df_r ) AM_MIRROR(0xff00)
545		AM_RANGE(0xf4, 0xf4) AM_READWRITE_LEGACY(ts2068_port_f4_r,ts2068_port_f4_w ) AM_MIRROR(0xff00)
	536	AM_RANGE(0xf4, 0xf4) AM_READWRITE(ts2068_port_f4_r,ts2068_port_f4_w ) AM_MIRROR(0xff00)
546	537	AM_RANGE(0xf5, 0xf5) AM_DEVWRITE_LEGACY("ay8912", ay8910_address_w ) AM_MIRROR(0xff00)
547	538	AM_RANGE(0xf6, 0xf6) AM_DEVREADWRITE_LEGACY("ay8912", ay8910_r, ay8910_data_w ) AM_MIRROR(0xff00)
548	539	AM_RANGE(0xfe, 0xfe) AM_READWRITE(spectrum_port_fe_r,spectrum_port_fe_w )  AM_MIRROR(0xff00)  AM_MASK(0xffff)
549		AM_RANGE(0xff, 0xff) AM_READWRITE_LEGACY(ts2068_port_ff_r,ts2068_port_ff_w ) AM_MIRROR(0xff00)
	540	AM_RANGE(0xff, 0xff) AM_READWRITE(ts2068_port_ff_r,ts2068_port_ff_w ) AM_MIRROR(0xff00)
550	541	ADDRESS_MAP_END
551	542
552	543	static ADDRESS_MAP_START(ts2068_mem, AS_PROGRAM, 8, spectrum_state )
r20813	r20814
565	556	{
566	557	m_port_ff_data = 0;
567	558	m_port_f4_data = 0;
568		ts2068_update_memory(machine());
	559	ts2068_update_memory();
569	560	MACHINE_RESET_CALL_MEMBER(spectrum);
570	561
571	562	}
r20813	r20814
575	566	/* TC2048 specific functions */
576	567
577	568
578		static WRITE8_HANDLER( tc2048_port_ff_w )
	569	WRITE8_MEMBER( spectrum_state::tc2048_port_ff_w )
579	570	{
580		spectrum_state *state = space.machine().driver_data<spectrum_state>();
581
582		state->m_port_ff_data = data;
	571	m_port_ff_data = data;
583	572	logerror("Port %04x write %02x\n", offset, data);
584	573	}
585	574
r20813	r20814
588	577	AM_RANGE(0x1f, 0x1f) AM_READ(spectrum_port_1f_r) AM_MIRROR(0xff00)
589	578	AM_RANGE(0x7f, 0x7f) AM_READ(spectrum_port_7f_r) AM_MIRROR(0xff00)
590	579	AM_RANGE(0xdf, 0xdf) AM_READ(spectrum_port_df_r) AM_MIRROR(0xff00)
591		AM_RANGE(0xff, 0xff) AM_READWRITE_LEGACY(ts2068_port_ff_r,tc2048_port_ff_w)  AM_MIRROR(0xff00)
	580	AM_RANGE(0xff, 0xff) AM_READWRITE(ts2068_port_ff_r,tc2048_port_ff_w)  AM_MIRROR(0xff00)
592	581	ADDRESS_MAP_END
593	582
594	583	static ADDRESS_MAP_START(tc2048_mem, AS_PROGRAM, 8, spectrum_state )
r20813	r20814
598	587
599	588	MACHINE_RESET_MEMBER(spectrum_state,tc2048)
600	589	{
601		UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
	590	UINT8 *messram = m_ram->pointer();
602	591
603	592	membank("bank1")->set_base(messram);
604	593	membank("bank2")->set_base(messram);

trunk/src/mess/includes/spectrum.h

r20813	r20814
10	10	#include "imagedev/snapquik.h"
11	11	#include "imagedev/cartslot.h"
12	12	#include "machine/upd765.h"
	13	#include "imagedev/cassette.h"
	14	#include "sound/speaker.h"
	15	#include "machine/ram.h"
13	16
14	17	/* Spectrum crystals */
15	18
r20813	r20814
70	73	{
71	74	public:
72	75	spectrum_state(const machine_config &mconfig, device_type type, const char *tag)
73		: driver_device(mconfig, type, tag) ,
74		m_video_ram(*this, "video_ram"){ }
	76	: driver_device(mconfig, type, tag)
	77	, m_video_ram(*this, "video_ram")
	78	, m_maincpu(*this, "maincpu")
	79	, m_cassette(*this, CASSETTE_TAG)
	80	, m_ram(*this, RAM_TAG)
	81	, m_speaker(*this, SPEAKER_TAG)
	82	, m_upd765(*this, "upd765")
	83	, m_upd765_0(*this, "upd765:0")
	84	, m_upd765_1(*this, "upd765:1")
	85	, m_io_line0(*this, "LINE0")
	86	, m_io_line1(*this, "LINE1")
	87	, m_io_line2(*this, "LINE2")
	88	, m_io_line3(*this, "LINE3")
	89	, m_io_line4(*this, "LINE4")
	90	, m_io_line5(*this, "LINE5")
	91	, m_io_line6(*this, "LINE6")
	92	, m_io_line7(*this, "LINE7")
	93	, m_io_nmi(*this, "NMI")
	94	, m_io_config(*this, "CONFIG")
	95	, m_io_joy_intf(*this, "JOY_INTF")
	96	, m_io_kempston(*this, "KEMPSTON")
	97	, m_io_fuller(*this, "FULLER")
	98	, m_io_mikrogen(*this, "MIKROGEN")
	99	, m_io_plus0(*this, "PLUS0")
	100	, m_io_plus1(*this, "PLUS1")
	101	, m_io_plus2(*this, "PLUS2")
	102	, m_io_plus3(*this, "PLUS3")
	103	, m_io_plus4(*this, "PLUS4")
75	104
	105	{ }
	106
76	107	int m_port_fe_data;
77	108	int m_port_7ffd_data;
78	109	int m_port_1ffd_data;   /* scorpion and plus3 */
r20813	r20814
106	137	DECLARE_READ8_MEMBER(spectrum_port_7f_r);
107	138	DECLARE_READ8_MEMBER(spectrum_port_df_r);
108	139	DECLARE_READ8_MEMBER(spectrum_port_ula_r);
	140
	141	DECLARE_WRITE8_MEMBER(spectrum_128_port_7ffd_w);
	142	DECLARE_READ8_MEMBER(spectrum_128_ula_r);
	143
	144	DECLARE_WRITE8_MEMBER(spectrum_plus3_port_3ffd_w);
	145	DECLARE_READ8_MEMBER(spectrum_plus3_port_3ffd_r);
	146	DECLARE_READ8_MEMBER(spectrum_plus3_port_2ffd_r);
	147	DECLARE_WRITE8_MEMBER(spectrum_plus3_port_7ffd_w);
	148	DECLARE_WRITE8_MEMBER(spectrum_plus3_port_1ffd_w);
	149
	150	DECLARE_READ8_MEMBER(ts2068_port_f4_r);
	151	DECLARE_WRITE8_MEMBER(ts2068_port_f4_w);
	152	DECLARE_READ8_MEMBER(ts2068_port_ff_r);
	153	DECLARE_WRITE8_MEMBER(ts2068_port_ff_w);
	154	DECLARE_WRITE8_MEMBER(tc2048_port_ff_w);
	155
109	156	DECLARE_DRIVER_INIT(spectrum);
110	157	DECLARE_DRIVER_INIT(plus2);
111	158	DECLARE_DRIVER_INIT(plus3);
r20813	r20814
131	178	bitmap_ind16 m_border_bitmap;
132	179
133	180	DECLARE_FLOPPY_FORMATS( floppy_formats );
	181	void spectrum_128_update_memory();
	182	void spectrum_plus3_update_memory();
	183	void ts2068_update_memory();
	184
	185	protected:
	186	required_device<cpu_device> m_maincpu;
	187	required_device<cassette_image_device> m_cassette;
	188	required_device<ram_device> m_ram;
	189	required_device<device_t> m_speaker;
	190	optional_device<upd765a_device> m_upd765;
	191	optional_device<floppy_connector> m_upd765_0;
	192	optional_device<floppy_connector> m_upd765_1;
	193
	194	// Regular spectrum ports; marked as optional because of other subclasses
	195	optional_ioport m_io_line0;
	196	optional_ioport m_io_line1;
	197	optional_ioport m_io_line2;
	198	optional_ioport m_io_line3;
	199	optional_ioport m_io_line4;
	200	optional_ioport m_io_line5;
	201	optional_ioport m_io_line6;
	202	optional_ioport m_io_line7;
	203	optional_ioport m_io_nmi;
	204	optional_ioport m_io_config;
	205	optional_ioport m_io_joy_intf;
	206	optional_ioport m_io_kempston;
	207	optional_ioport m_io_fuller;
	208	optional_ioport m_io_mikrogen;
	209	// Plus ports
	210	optional_ioport m_io_plus0;
	211	optional_ioport m_io_plus1;
	212	optional_ioport m_io_plus2;
	213	optional_ioport m_io_plus3;
	214	optional_ioport m_io_plus4;
	215
	216	void spectrum_UpdateBorderBitmap();
134	217	};
135	218
136	219
r20813	r20814
141	224
142	225	MACHINE_CONFIG_EXTERN( spectrum );
143	226
144
145
146	227	/*----------- defined in drivers/spec128.c -----------*/
147	228
148	229	MACHINE_CONFIG_EXTERN( spectrum_128 );
149	230
150		void spectrum_128_update_memory(running_machine &machine);
151
152		/*----------- defined in drivers/specpls3.c -----------*/
153
154		void spectrum_plus3_update_memory(running_machine &machine);
155
156		/*----------- defined in drivers/timex.c -----------*/
157
158		void ts2068_update_memory(running_machine &machine);
159
160		/*----------- defined in video/spectrum.c -----------*/
161
162		void spectrum_UpdateBorderBitmap(running_machine &machine);
163
164
165
166	231	#endif /* __SPECTRUM_H__ */

trunk/src/mess/video/spectrum.c

r20813	r20814
67	67	}
68	68
69	69
70		spectrum_UpdateBorderBitmap(machine());
	70	spectrum_UpdateBorderBitmap();
71	71	}
72	72	}
73	73
r20813	r20814
181	181
182	182	/* The code below is just a per-pixel 'partial update' for the border */
183	183
184		INLINE void spectrum_GetNextPos(running_machine &machine, unsigned int &x, unsigned int &y)
	184	void spectrum_state::spectrum_UpdateBorderBitmap()
185	185	{
186		spectrum_state *state = machine.driver_data<spectrum_state>();
187		int width = state->m_border_bitmap.width();
188		int height = state->m_border_bitmap.height();
	186	unsigned int x = machine().primary_screen->hpos();
	187	unsigned int y = machine().primary_screen->vpos();
	188	int width = m_border_bitmap.width();
	189	int height = m_border_bitmap.height();
189	190
190		x += 1;
191	191
192		if (x>width)
	192	if (m_border_bitmap.valid())
193	193	{
194		x = 0;
195		y += 1;
	194	int colour = m_port_fe_data & 0x07;
196	195
197		if (y>height)
198		{
199		y = 0;
200		}
201		}
202		}
	196	//printf("update border from %d,%d to %d,%d\n", m_previous_border_x, m_previous_border_y, x, y);
203	197
204
205		void spectrum_UpdateBorderBitmap(running_machine &machine)
206		{
207		spectrum_state *state = machine.driver_data<spectrum_state>();
208		unsigned int x = machine.primary_screen->hpos();
209		unsigned int y = machine.primary_screen->vpos();
210		int width = state->m_border_bitmap.width();
211		int height = state->m_border_bitmap.height();
212
213
214		if (state->m_border_bitmap.valid())
215		{
216		int colour = state->m_port_fe_data & 0x07;
217
218		//printf("update border from %d,%d to %d,%d\n", state->m_previous_border_x, state->m_previous_border_y, x, y);
219
220	198	do
221	199	{
222		if (state->m_previous_border_y < height)
	200	if (m_previous_border_y < height)
223	201	{
224		UINT16* bm = &state->m_border_bitmap.pix16(state->m_previous_border_y);
	202	UINT16* bm = &m_border_bitmap.pix16(m_previous_border_y);
225	203
226		if (state->m_previous_border_x < width)
227		bm[state->m_previous_border_x] = colour;
	204	if (m_previous_border_x < width)
	205	bm[m_previous_border_x] = colour;
228	206	}
229	207
230		spectrum_GetNextPos(machine, state->m_previous_border_x, state->m_previous_border_y);
	208	m_previous_border_x += 1;
	209
	210	if (m_previous_border_x > width)
	211	{
	212	m_previous_border_x = 0;
	213	m_previous_border_y += 1;
	214
	215	if (m_previous_border_y > height)
	216	{
	217	m_previous_border_y = 0;
	218	}
	219	}
231	220	}
232		while (!((state->m_previous_border_x == x) && (state->m_previous_border_y == y)));
	221	while (!((m_previous_border_x == x) && (m_previous_border_y == y)));
233	222
234	223	}
235	224	else

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