Previous

199869 Revisions

Next

r20791 Thursday 7th February, 2013 at 04:55:02 UTC by Angelo Salese
State-ized Sega Saturn VDP1 & 2 [Angelo Salese]

[src/mame/drivers]	saturn.c
[src/mame/includes]	stv.h
[src/mame/machine]	smpc.c
[src/mame/video]	stvvdp1.c stvvdp2.c

trunk/src/mame/drivers/saturn.c

r20790	r20791
786	786	AM_RANGE(0x05a00000, 0x05a7ffff) AM_READWRITE16(saturn_soundram_r, saturn_soundram_w,0xffffffff)
787	787	AM_RANGE(0x05b00000, 0x05b00fff) AM_DEVREADWRITE16_LEGACY("scsp", scsp_r, scsp_w, 0xffffffff)
788	788	/* VDP1 */
789		AM_RANGE(0x05c00000, 0x05c7ffff) AM_READWRITE_LEGACY(saturn_vdp1_vram_r, saturn_vdp1_vram_w)
790		AM_RANGE(0x05c80000, 0x05cbffff) AM_READWRITE_LEGACY(saturn_vdp1_framebuffer0_r, saturn_vdp1_framebuffer0_w)
791		AM_RANGE(0x05d00000, 0x05d0001f) AM_READWRITE16_LEGACY(saturn_vdp1_regs_r, saturn_vdp1_regs_w,0xffffffff)
792		AM_RANGE(0x05e00000, 0x05e7ffff) AM_MIRROR(0x80000) AM_READWRITE_LEGACY(saturn_vdp2_vram_r, saturn_vdp2_vram_w)
793		AM_RANGE(0x05f00000, 0x05f7ffff) AM_READWRITE_LEGACY(saturn_vdp2_cram_r, saturn_vdp2_cram_w)
794		AM_RANGE(0x05f80000, 0x05fbffff) AM_READWRITE16_LEGACY(saturn_vdp2_regs_r, saturn_vdp2_regs_w,0xffffffff)
	789	AM_RANGE(0x05c00000, 0x05c7ffff) AM_READWRITE(saturn_vdp1_vram_r, saturn_vdp1_vram_w)
	790	AM_RANGE(0x05c80000, 0x05cbffff) AM_READWRITE(saturn_vdp1_framebuffer0_r, saturn_vdp1_framebuffer0_w)
	791	AM_RANGE(0x05d00000, 0x05d0001f) AM_READWRITE16(saturn_vdp1_regs_r, saturn_vdp1_regs_w,0xffffffff)
	792	AM_RANGE(0x05e00000, 0x05e7ffff) AM_MIRROR(0x80000) AM_READWRITE(saturn_vdp2_vram_r, saturn_vdp2_vram_w)
	793	AM_RANGE(0x05f00000, 0x05f7ffff) AM_READWRITE(saturn_vdp2_cram_r, saturn_vdp2_cram_w)
	794	AM_RANGE(0x05f80000, 0x05fbffff) AM_READWRITE16(saturn_vdp2_regs_r, saturn_vdp2_regs_w,0xffffffff)
795	795	AM_RANGE(0x05fe0000, 0x05fe00cf) AM_READWRITE(saturn_scu_r, saturn_scu_w)
796	796	AM_RANGE(0x06000000, 0x060fffff) AM_RAM AM_MIRROR(0x21f00000) AM_SHARE("workram_h")
797	797	AM_RANGE(0x20000000, 0x2007ffff) AM_ROM AM_SHARE("share6")  // bios mirror
r20790	r20791
815	815	AM_RANGE(0x05a00000, 0x05afffff) AM_READWRITE16(saturn_soundram_r, saturn_soundram_w,0xffffffff)
816	816	AM_RANGE(0x05b00000, 0x05b00fff) AM_DEVREADWRITE16_LEGACY("scsp", scsp_r, scsp_w, 0xffffffff)
817	817	/* VDP1 */
818		AM_RANGE(0x05c00000, 0x05c7ffff) AM_READWRITE_LEGACY(saturn_vdp1_vram_r, saturn_vdp1_vram_w)
819		AM_RANGE(0x05c80000, 0x05cbffff) AM_READWRITE_LEGACY(saturn_vdp1_framebuffer0_r, saturn_vdp1_framebuffer0_w)
820		AM_RANGE(0x05d00000, 0x05d0001f) AM_READWRITE16_LEGACY(saturn_vdp1_regs_r, saturn_vdp1_regs_w,0xffffffff)
821		AM_RANGE(0x05e00000, 0x05e7ffff) AM_MIRROR(0x80000) AM_READWRITE_LEGACY(saturn_vdp2_vram_r, saturn_vdp2_vram_w)
822		AM_RANGE(0x05f00000, 0x05f7ffff) AM_READWRITE_LEGACY(saturn_vdp2_cram_r, saturn_vdp2_cram_w)
823		AM_RANGE(0x05f80000, 0x05fbffff) AM_READWRITE16_LEGACY(saturn_vdp2_regs_r, saturn_vdp2_regs_w,0xffffffff)
	818	AM_RANGE(0x05c00000, 0x05c7ffff) AM_READWRITE(saturn_vdp1_vram_r, saturn_vdp1_vram_w)
	819	AM_RANGE(0x05c80000, 0x05cbffff) AM_READWRITE(saturn_vdp1_framebuffer0_r, saturn_vdp1_framebuffer0_w)
	820	AM_RANGE(0x05d00000, 0x05d0001f) AM_READWRITE16(saturn_vdp1_regs_r, saturn_vdp1_regs_w,0xffffffff)
	821	AM_RANGE(0x05e00000, 0x05e7ffff) AM_MIRROR(0x80000) AM_READWRITE(saturn_vdp2_vram_r, saturn_vdp2_vram_w)
	822	AM_RANGE(0x05f00000, 0x05f7ffff) AM_READWRITE(saturn_vdp2_cram_r, saturn_vdp2_cram_w)
	823	AM_RANGE(0x05f80000, 0x05fbffff) AM_READWRITE16(saturn_vdp2_regs_r, saturn_vdp2_regs_w,0xffffffff)
824	824	AM_RANGE(0x05fe0000, 0x05fe00cf) AM_READWRITE(saturn_scu_r, saturn_scu_w)
825	825	AM_RANGE(0x06000000, 0x060fffff) AM_RAM AM_MIRROR(0x21f00000) AM_SHARE("workram_h")
826	826	AM_RANGE(0x20000000, 0x2007ffff) AM_ROM AM_SHARE("share6")  // bios mirror
r20790	r20791
1881	1881
1882	1882	TIMER_DEVICE_CALLBACK_MEMBER(saturn_state::saturn_scanline)
1883	1883	{
1884		saturn_state *state = machine().driver_data<saturn_state>();
1885	1884	int scanline = param;
1886	1885	int max_y = machine().primary_screen->height();
1887	1886	int y_step,vblank_line;
r20790	r20791
1897	1896
1898	1897	if(scanline == (0)*y_step)
1899	1898	{
1900		video_update_vdp1(machine());
	1899	video_update_vdp1();
1901	1900
1902	1901	if(STV_VDP1_VBE)
1903	1902	m_vdp1.framebuffer_clear_on_next_frame = 1;

trunk/src/mame/machine/smpc.c

r20790	r20791
271	271	machine.device("slave")->set_unscaled_clock(xtal/2);
272	272
273	273	state->m_vdp2.dotsel = param ^ 1;
274		stv_vdp2_dynamic_res_change(machine);
	274	state->stv_vdp2_dynamic_res_change();
275	275
276	276	if(!state->m_NMI_reset)
277	277	state->m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);

trunk/src/mame/includes/stv.h

r20790	r20791
249	249
250	250	DECLARE_DEVICE_IMAGE_LOAD_MEMBER( sat_cart );
251	251	DECLARE_DEVICE_IMAGE_LOAD_MEMBER( stv_cart );
	252
	253	DECLARE_READ16_MEMBER ( saturn_vdp1_regs_r );
	254	DECLARE_READ32_MEMBER ( saturn_vdp1_vram_r );
	255	DECLARE_READ32_MEMBER ( saturn_vdp1_framebuffer0_r );
	256
	257	DECLARE_WRITE16_MEMBER ( saturn_vdp1_regs_w );
	258	DECLARE_WRITE32_MEMBER ( saturn_vdp1_vram_w );
	259	DECLARE_WRITE32_MEMBER ( saturn_vdp1_framebuffer0_w );
	260
	261	DECLARE_READ32_MEMBER ( saturn_vdp2_vram_r );
	262	DECLARE_READ32_MEMBER ( saturn_vdp2_cram_r );
	263	DECLARE_READ16_MEMBER ( saturn_vdp2_regs_r );
	264
	265	DECLARE_WRITE32_MEMBER ( saturn_vdp2_vram_w );
	266	DECLARE_WRITE32_MEMBER ( saturn_vdp2_cram_w );
	267	DECLARE_WRITE16_MEMBER ( saturn_vdp2_regs_w );
	268
	269
	270	/* VDP1 */
	271	void stv_set_framebuffer_config( void );
	272	void stv_prepare_framebuffers( void );
	273	void stv_vdp1_change_framebuffers( void );
	274	void video_update_vdp1( void );
	275	void stv_vdp1_process_list( void );
	276	void stv_vdp1_set_drawpixel( void );
	277
	278	void stv_vdp1_draw_normal_sprite(const rectangle &cliprect, int sprite_type);
	279	void stv_vdp1_draw_scaled_sprite(const rectangle &cliprect);
	280	void stv_vdp1_draw_distorted_sprite(const rectangle &cliprect);
	281	void stv_vdp1_draw_poly_line(const rectangle &cliprect);
	282	void stv_vdp1_draw_line(const rectangle &cliprect);
	283	int x2s(int v);
	284	int y2s(int v);
	285	void vdp1_fill_quad(const rectangle &cliprect, int patterndata, int xsize, const struct spoint *q);
	286	void vdp1_fill_line(const rectangle &cliprect, int patterndata, int xsize, INT32 y, INT32 x1, INT32 x2, INT32 u1, INT32 u2, INT32 v1, INT32 v2);
	287	//   void (*drawpixel)(int x, int y, int patterndata, int offsetcnt);
	288	//   void drawpixel_poly(int x, int y, int patterndata, int offsetcnt);
	289	//   void drawpixel_8bpp_trans(int x, int y, int patterndata, int offsetcnt);
	290	//   void drawpixel_4bpp_notrans(int x, int y, int patterndata, int offsetcnt);
	291	//   void drawpixel_4bpp_trans(int x, int y, int patterndata, int offsetcnt);
	292	//   void drawpixel_generic(int x, int y, int patterndata, int offsetcnt);
	293	void vdp1_fill_slope(const rectangle &cliprect, int patterndata, int xsize,
	294	INT32 x1, INT32 x2, INT32 sl1, INT32 sl2, INT32 *nx1, INT32 *nx2,
	295	INT32 u1, INT32 u2, INT32 slu1, INT32 slu2, INT32 *nu1, INT32 *nu2,
	296	INT32 v1, INT32 v2, INT32 slv1, INT32 slv2, INT32 *nv1, INT32 *nv2,
	297	INT32 _y1, INT32 y2);
	298	void stv_vdp1_setup_shading(const struct spoint* q, const rectangle &cliprect);
	299	UINT8 stv_read_gouraud_table( void );
	300	void stv_clear_framebuffer( int which_framebuffer );
	301	void stv_vdp1_state_save_postload( void );
	302	int stv_vdp1_start ( void );
	303
	304
	305	/* VDP2 */
	306
	307	UINT8 get_vblank( void );
	308	UINT8 get_hblank( void );
	309	int get_vblank_duration( void );
	310	int get_hblank_duration( void );
	311	int get_pixel_clock( void );
	312	UINT8 get_odd_bit( void );
	313	void stv_vdp2_dynamic_res_change( void );
	314
	315	void refresh_palette_data( void );
	316	int stv_vdp2_window_process(int x,int y);
	317	void stv_vdp2_get_window0_coordinates(UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y);
	318	void stv_vdp2_get_window1_coordinates(UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y);
	319	int get_window_pixel(UINT16 s_x,UINT16 e_x,UINT16 s_y,UINT16 e_y,int x, int y,UINT8 win_num);
	320	int stv_vdp2_apply_window_on_layer(rectangle &cliprect);
	321
	322	void stv_vdp2_draw_basic_tilemap(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	323	void stv_vdp2_draw_basic_bitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	324
	325	void stv_vdp2_drawgfxzoom(bitmap_rgb32 &dest_bmp,const rectangle &clip,gfx_element *gfx, UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,int transparency,int transparent_color,int scalex, int scaley,int sprite_screen_width, int sprite_screen_height, int alpha);
	326	void stv_vdp2_drawgfxzoom_rgb555(bitmap_rgb32 &dest_bmp,const rectangle &clip,UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,int transparency,int transparent_color,int scalex, int scaley,int sprite_screen_width, int sprite_screen_height, int alpha);
	327	void stv_vdp2_drawgfx_rgb555( bitmap_rgb32 &dest_bmp, const rectangle &clip, UINT32 code, int flipx, int flipy, int sx, int sy, int transparency, int alpha);
	328	void stv_vdp2_drawgfx_rgb888( bitmap_rgb32 &dest_bmp, const rectangle &clip, UINT32 code, int flipx, int flipy, int sx, int sy, int transparency, int alpha);
	329
	330	void stv_vdp2_draw_rotation_screen(bitmap_rgb32 &bitmap, const rectangle &cliprect, int iRP);
	331	void stv_vdp2_check_tilemap_with_linescroll(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	332	void stv_vdp2_check_tilemap(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	333	void stv_vdp2_copy_roz_bitmap(bitmap_rgb32 &bitmap, bitmap_rgb32 &roz_bitmap, const rectangle &cliprect, int iRP, int planesizex, int planesizey, int planerenderedsizex, int planerenderedsizey);
	334	void stv_vdp2_fill_rotation_parameter_table( UINT8 rot_parameter );
	335	UINT8 stv_vdp2_check_vram_cycle_pattern_registers( UINT8 access_command_pnmdr, UINT8 access_command_cpdr, UINT8 bitmap_enable );
	336	void stv_vdp2_draw_mosaic(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 is_roz);
	337
	338	void stv_vdp2_fade_effects( void );
	339	void stv_vdp2_compute_color_offset( int *r, int *g, int *b, int cor );
	340	void stv_vdp2_compute_color_offset_UINT32(UINT32 *rgb, int cor);
	341	void stv_vdp2_check_fade_control_for_layer( void );
	342
	343	void stv_vdp2_draw_line(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	344	void stv_vdp2_draw_back(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	345	void stv_vdp2_draw_NBG0(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	346	void stv_vdp2_draw_NBG1(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	347	void stv_vdp2_draw_NBG2(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	348	void stv_vdp2_draw_NBG3(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	349	void stv_vdp2_draw_RBG0(bitmap_rgb32 &bitmap, const rectangle &cliprect);
	350	void draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 pri);
	351
	352	void stv_vdp2_state_save_postload( void );
	353	void stv_vdp2_exit ( void );
	354	int stv_vdp2_start ( void );
252	355	};
253	356
254	357	#define MASTER_CLOCK_352 57272720
255	358	#define MASTER_CLOCK_320 53693174
256		#define CEF_1   state->m_vdp1_regs[0x010/2]|=0x0002
257		#define CEF_0   state->m_vdp1_regs[0x010/2]&=~0x0002
258		#define BEF_1   state->m_vdp1_regs[0x010/2]|=0x0001
259		#define BEF_0   state->m_vdp1_regs[0x010/2]&=~0x0001
260		#define STV_VDP1_TVMR ((state->m_vdp1_regs[0x000/2])&0xffff)
	359	#define CEF_1   m_vdp1_regs[0x010/2]|=0x0002
	360	#define CEF_0   m_vdp1_regs[0x010/2]&=~0x0002
	361	#define BEF_1   m_vdp1_regs[0x010/2]|=0x0001
	362	#define BEF_0   m_vdp1_regs[0x010/2]&=~0x0001
	363	#define STV_VDP1_TVMR ((m_vdp1_regs[0x000/2])&0xffff)
261	364	#define STV_VDP1_VBE  ((STV_VDP1_TVMR & 0x0008) >> 3)
262	365	#define STV_VDP1_TVM  ((STV_VDP1_TVMR & 0x0007) >> 0)
263	366
r20790	r20791
294	397	void video_update_vdp1(running_machine &machine);
295	398	void stv_vdp2_dynamic_res_change(running_machine &machine);
296	399
297		DECLARE_READ16_HANDLER ( saturn_vdp1_regs_r );
298		DECLARE_READ32_HANDLER ( saturn_vdp1_vram_r );
299		DECLARE_READ32_HANDLER ( saturn_vdp1_framebuffer0_r );
300
301		DECLARE_WRITE16_HANDLER ( saturn_vdp1_regs_w );
302		DECLARE_WRITE32_HANDLER ( saturn_vdp1_vram_w );
303		DECLARE_WRITE32_HANDLER ( saturn_vdp1_framebuffer0_w );
304
305		/*----------- defined in video/stvvdp2.c -----------*/
306
307		DECLARE_READ32_HANDLER ( saturn_vdp2_vram_r );
308		DECLARE_READ32_HANDLER ( saturn_vdp2_cram_r );
309		DECLARE_READ16_HANDLER ( saturn_vdp2_regs_r );
310
311		DECLARE_WRITE32_HANDLER ( saturn_vdp2_vram_w );
312		DECLARE_WRITE32_HANDLER ( saturn_vdp2_cram_w );
313		DECLARE_WRITE16_HANDLER ( saturn_vdp2_regs_w );
314

trunk/src/mame/video/stvvdp1.c

r20790	r20791
100	100	---- ---- ---- --x- | Frame Buffer Change Trigger (FCM)
101	101	---- ---- ---- ---x | Frame Buffer Change Mode (FCT)
102	102	*/
103		#define STV_VDP1_FBCR ((state->m_vdp1_regs[0x002/2] >> 0)&0xffff)
	103	#define STV_VDP1_FBCR ((m_vdp1_regs[0x002/2] >> 0)&0xffff)
104	104	#define STV_VDP1_EOS ((STV_VDP1_FBCR & 0x0010) >> 4)
105	105	#define STV_VDP1_DIE ((STV_VDP1_FBCR & 0x0008) >> 3)
106	106	#define STV_VDP1_DIL ((STV_VDP1_FBCR & 0x0004) >> 2)
r20790	r20791
118	118	1 VDP1 draw by request
119	119	0 VDP1 Idle (no access)
120	120	*/
121		#define STV_VDP1_PTMR ((state->m_vdp1_regs[0x004/2])&0xffff)
	121	#define STV_VDP1_PTMR ((m_vdp1_regs[0x004/2])&0xffff)
122	122	#define STV_VDP1_PTM  ((STV_VDP1_PTMR & 0x0003) >> 0)
123		#define PTM_0         state->m_vdp1_regs[0x004/2]&=~0x0001
	123	#define PTM_0         m_vdp1_regs[0x004/2]&=~0x0001
124	124
125	125	/*
126	126	Erase/Write Data Register
127	127	16 bpp = data
128	128	8 bpp = erase/write data for even/odd X coordinates
129	129	*/
130		#define STV_VDP1_EWDR ((state->m_vdp1_regs[0x006/2])&0xffff)
	130	#define STV_VDP1_EWDR ((m_vdp1_regs[0x006/2])&0xffff)
131	131
132	132	/*Erase/Write Upper-Left register*/
133	133	/*
r20790	r20791
136	136	---- ---x xxxx xxxx | Y1 register
137	137
138	138	*/
139		#define STV_VDP1_EWLR ((state->m_vdp1_regs[0x008/2])&0xffff)
	139	#define STV_VDP1_EWLR ((m_vdp1_regs[0x008/2])&0xffff)
140	140	#define STV_VDP1_EWLR_X1 ((STV_VDP1_EWLR & 0x7e00) >> 9)
141	141	#define STV_VDP1_EWLR_Y1 ((STV_VDP1_EWLR & 0x01ff) >> 0)
142	142	/*Erase/Write Lower-Right register*/
r20790	r20791
145	145	---- ---x xxxx xxxx | Y3 register
146	146
147	147	*/
148		#define STV_VDP1_EWRR ((state->m_vdp1_regs[0x00a/2])&0xffff)
	148	#define STV_VDP1_EWRR ((m_vdp1_regs[0x00a/2])&0xffff)
149	149	#define STV_VDP1_EWRR_X3 ((STV_VDP1_EWRR & 0xfe00) >> 9)
150	150	#define STV_VDP1_EWRR_Y3 ((STV_VDP1_EWRR & 0x01ff) >> 0)
151	151	/*Transfer End Status Register*/
r20790	r20791
155	155	---- ---- ---- ---x | BEF
156	156
157	157	*/
158		#define STV_VDP1_EDSR ((state->m_vdp1_regs[0x010/2])&0xffff)
	158	#define STV_VDP1_EDSR ((m_vdp1_regs[0x010/2])&0xffff)
159	159	#define STV_VDP1_CEF  (STV_VDP1_EDSR & 2)
160	160	#define STV_VDP1_BEF  (STV_VDP1_EDSR & 1)
161	161	/**/
162	162
163	163
164	164
165		static void stv_vdp1_process_list(running_machine &machine);
166
167		READ16_HANDLER( saturn_vdp1_regs_r )
	165	READ16_MEMBER( saturn_state::saturn_vdp1_regs_r )
168	166	{
169		saturn_state *state = space.machine().driver_data<saturn_state>();
170
171	167	//logerror ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space.device().tag(), space.device().safe_pc(), offset);
172	168
173	169	switch(offset)
r20790	r20791
176	172	return 0;
177	173	case 0x10/2:
178	174	break;
179		case 0x12/2: return state->m_vdp1.lopr;
180		case 0x14/2: return state->m_vdp1.copr;
	175	case 0x12/2: return m_vdp1.lopr;
	176	case 0x14/2: return m_vdp1.copr;
181	177	/* MODR register, read register for the other VDP1 regs
182	178	(Shienryu SS version abuses of this during intro) */
183	179	case 0x16/2:
r20790	r20791
195	191	return modr;
196	192	default:
197	193	if(!space.debugger_access())
198		printf ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space.device().tag(), space.device().safe_pc(), offset*2);
	194	printf ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space.device().tag(), space.device().safe_pc(), offset*2);
199	195	break;
200	196	}
201	197
202		return state->m_vdp1_regs[offset]; //TODO: write-only regs should return open bus or zero
	198	return m_vdp1_regs[offset]; //TODO: write-only regs should return open bus or zero
203	199	}
204	200
205		static void stv_clear_framebuffer( running_machine &machine, int which_framebuffer )
	201	void saturn_state::stv_clear_framebuffer( int which_framebuffer )
206	202	{
207		saturn_state *state = machine.driver_data<saturn_state>();
208
209		if ( VDP1_LOG ) logerror( "Clearing %d framebuffer\n", state->m_vdp1.framebuffer_current_draw );
210		memset( state->m_vdp1.framebuffer[ which_framebuffer ], state->m_vdp1.ewdr, 1024 * 256 * sizeof(UINT16) * 2 );
	203	if ( VDP1_LOG ) logerror( "Clearing %d framebuffer\n", m_vdp1.framebuffer_current_draw );
	204	memset( m_vdp1.framebuffer[ which_framebuffer ], m_vdp1.ewdr, 1024 * 256 * sizeof(UINT16) * 2 );
211	205	}
212	206
213	207
214		static void stv_prepare_framebuffers( running_machine &machine )
	208	void saturn_state::stv_prepare_framebuffers( void )
215	209	{
216		saturn_state *state = machine.driver_data<saturn_state>();
217	210	int i,rowsize;
218	211
219		rowsize = state->m_vdp1.framebuffer_width;
220		if ( state->m_vdp1.framebuffer_current_draw == 0 )
	212	rowsize = m_vdp1.framebuffer_width;
	213	if ( m_vdp1.framebuffer_current_draw == 0 )
221	214	{
222		for ( i = 0; i < state->m_vdp1.framebuffer_height; i++ )
	215	for ( i = 0; i < m_vdp1.framebuffer_height; i++ )
223	216	{
224		state->m_vdp1.framebuffer_draw_lines[i] = &state->m_vdp1.framebuffer[0][ i * rowsize ];
225		state->m_vdp1.framebuffer_display_lines[i] = &state->m_vdp1.framebuffer[1][ i * rowsize ];
	217	m_vdp1.framebuffer_draw_lines[i] = &m_vdp1.framebuffer[0][ i * rowsize ];
	218	m_vdp1.framebuffer_display_lines[i] = &m_vdp1.framebuffer[1][ i * rowsize ];
226	219	}
227	220	for ( ; i < 512; i++ )
228	221	{
229		state->m_vdp1.framebuffer_draw_lines[i] = &state->m_vdp1.framebuffer[0][0];
230		state->m_vdp1.framebuffer_display_lines[i] = &state->m_vdp1.framebuffer[1][0];
	222	m_vdp1.framebuffer_draw_lines[i] = &m_vdp1.framebuffer[0][0];
	223	m_vdp1.framebuffer_display_lines[i] = &m_vdp1.framebuffer[1][0];
231	224	}
232	225	}
233	226	else
234	227	{
235		for ( i = 0; i < state->m_vdp1.framebuffer_height; i++ )
	228	for ( i = 0; i < m_vdp1.framebuffer_height; i++ )
236	229	{
237		state->m_vdp1.framebuffer_draw_lines[i] = &state->m_vdp1.framebuffer[1][ i * rowsize ];
238		state->m_vdp1.framebuffer_display_lines[i] = &state->m_vdp1.framebuffer[0][ i * rowsize ];
	230	m_vdp1.framebuffer_draw_lines[i] = &m_vdp1.framebuffer[1][ i * rowsize ];
	231	m_vdp1.framebuffer_display_lines[i] = &m_vdp1.framebuffer[0][ i * rowsize ];
239	232	}
240	233	for ( ; i < 512; i++ )
241	234	{
242		state->m_vdp1.framebuffer_draw_lines[i] = &state->m_vdp1.framebuffer[1][0];
243		state->m_vdp1.framebuffer_display_lines[i] = &state->m_vdp1.framebuffer[0][0];
	235	m_vdp1.framebuffer_draw_lines[i] = &m_vdp1.framebuffer[1][0];
	236	m_vdp1.framebuffer_display_lines[i] = &m_vdp1.framebuffer[0][0];
244	237	}
245	238
246	239	}
247	240
248	241	for ( ; i < 512; i++ )
249	242	{
250		state->m_vdp1.framebuffer_draw_lines[i] = &state->m_vdp1.framebuffer[0][0];
251		state->m_vdp1.framebuffer_display_lines[i] = &state->m_vdp1.framebuffer[1][0];
	243	m_vdp1.framebuffer_draw_lines[i] = &m_vdp1.framebuffer[0][0];
	244	m_vdp1.framebuffer_display_lines[i] = &m_vdp1.framebuffer[1][0];
252	245	}
253	246
254	247	}
255	248
256		static void stv_vdp1_change_framebuffers( running_machine &machine )
	249	void saturn_state::stv_vdp1_change_framebuffers( void )
257	250	{
258		saturn_state *state = machine.driver_data<saturn_state>();
259		state->m_vdp1.framebuffer_current_display ^= 1;
260		state->m_vdp1.framebuffer_current_draw ^= 1;
261		if ( VDP1_LOG ) logerror( "Changing framebuffers: %d - draw, %d - display\n", state->m_vdp1.framebuffer_current_draw, state->m_vdp1.framebuffer_current_display );
262		stv_prepare_framebuffers(machine);
	251	m_vdp1.framebuffer_current_display ^= 1;
	252	m_vdp1.framebuffer_current_draw ^= 1;
	253	if ( VDP1_LOG ) logerror( "Changing framebuffers: %d - draw, %d - display\n", m_vdp1.framebuffer_current_draw, m_vdp1.framebuffer_current_display );
	254	stv_prepare_framebuffers();
263	255	}
264	256
265		static void stv_set_framebuffer_config( running_machine &machine )
	257	void saturn_state::stv_set_framebuffer_config( void )
266	258	{
267		saturn_state *state = machine.driver_data<saturn_state>();
268		if ( state->m_vdp1.framebuffer_mode == STV_VDP1_TVM &&
269		state->m_vdp1.framebuffer_double_interlace == STV_VDP1_DIE ) return;
	259	if ( m_vdp1.framebuffer_mode == STV_VDP1_TVM &&
	260	m_vdp1.framebuffer_double_interlace == STV_VDP1_DIE ) return;
270	261
271	262	if ( VDP1_LOG ) logerror( "Setting framebuffer config\n" );
272		state->m_vdp1.framebuffer_mode = STV_VDP1_TVM;
273		state->m_vdp1.framebuffer_double_interlace = STV_VDP1_DIE;
274		switch( state->m_vdp1.framebuffer_mode )
	263	m_vdp1.framebuffer_mode = STV_VDP1_TVM;
	264	m_vdp1.framebuffer_double_interlace = STV_VDP1_DIE;
	265	switch( m_vdp1.framebuffer_mode )
275	266	{
276		case 0: state->m_vdp1.framebuffer_width = 512; state->m_vdp1.framebuffer_height = 256; break;
277		case 1: state->m_vdp1.framebuffer_width = 1024; state->m_vdp1.framebuffer_height = 256; break;
278		case 2: state->m_vdp1.framebuffer_width = 512; state->m_vdp1.framebuffer_height = 256; break;
279		case 3: state->m_vdp1.framebuffer_width = 512; state->m_vdp1.framebuffer_height = 512; break;
280		case 4: state->m_vdp1.framebuffer_width = 512; state->m_vdp1.framebuffer_height = 256; break;
281		default: logerror( "Invalid framebuffer config %x\n", STV_VDP1_TVM ); state->m_vdp1.framebuffer_width = 512; state->m_vdp1.framebuffer_height = 256; break;
	267	case 0: m_vdp1.framebuffer_width = 512; m_vdp1.framebuffer_height = 256; break;
	268	case 1: m_vdp1.framebuffer_width = 1024; m_vdp1.framebuffer_height = 256; break;
	269	case 2: m_vdp1.framebuffer_width = 512; m_vdp1.framebuffer_height = 256; break;
	270	case 3: m_vdp1.framebuffer_width = 512; m_vdp1.framebuffer_height = 512; break;
	271	case 4: m_vdp1.framebuffer_width = 512; m_vdp1.framebuffer_height = 256; break;
	272	default: logerror( "Invalid framebuffer config %x\n", STV_VDP1_TVM ); m_vdp1.framebuffer_width = 512; m_vdp1.framebuffer_height = 256; break;
282	273	}
283		if ( STV_VDP1_DIE ) state->m_vdp1.framebuffer_height *= 2; /* double interlace */
	274	if ( STV_VDP1_DIE ) m_vdp1.framebuffer_height *= 2; /* double interlace */
284	275
285		state->m_vdp1.framebuffer_current_draw = 0;
286		state->m_vdp1.framebuffer_current_display = 1;
287		stv_prepare_framebuffers(machine);
	276	m_vdp1.framebuffer_current_draw = 0;
	277	m_vdp1.framebuffer_current_display = 1;
	278	stv_prepare_framebuffers();
288	279	}
289	280
290		WRITE16_HANDLER( saturn_vdp1_regs_w )
	281	WRITE16_MEMBER( saturn_state::saturn_vdp1_regs_w )
291	282	{
292		saturn_state *state = space.machine().driver_data<saturn_state>();
293		COMBINE_DATA(&state->m_vdp1_regs[offset]);
	283	COMBINE_DATA(&m_vdp1_regs[offset]);
294	284
295	285	switch(offset)
296	286	{
297	287	case 0x00/2:
298		stv_set_framebuffer_config(space.machine());
	288	stv_set_framebuffer_config();
299	289	if ( VDP1_LOG ) logerror( "VDP1: Access to register TVMR = %1X\n", STV_VDP1_TVMR );
300	290
301	291	break;
302	292	case 0x02/2:
303		stv_set_framebuffer_config(space.machine());
	293	stv_set_framebuffer_config();
304	294	if ( VDP1_LOG ) logerror( "VDP1: Access to register FBCR = %1X\n", STV_VDP1_FBCR );
305		state->m_vdp1.fbcr_accessed = 1;
	295	m_vdp1.fbcr_accessed = 1;
306	296	break;
307	297	case 0x04/2:
308	298	if ( VDP1_LOG ) logerror( "VDP1: Access to register PTMR = %1X\n", STV_VDP1_PTM );
309	299	if ( STV_VDP1_PTMR == 1 )
310		stv_vdp1_process_list( space.machine() );
	300	stv_vdp1_process_list();
311	301
312	302	break;
313	303	case 0x06/2:
314	304	if ( VDP1_LOG ) logerror( "VDP1: Erase data set %08X\n", data );
315	305
316		state->m_vdp1.ewdr = STV_VDP1_EWDR;
	306	m_vdp1.ewdr = STV_VDP1_EWDR;
317	307	break;
318	308	case 0x08/2:
319	309	if ( VDP1_LOG ) logerror( "VDP1: Erase upper-left coord set: %08X\n", data );
r20790	r20791
331	321
332	322	}
333	323
334		READ32_HANDLER ( saturn_vdp1_vram_r )
	324	READ32_MEMBER ( saturn_state::saturn_vdp1_vram_r )
335	325	{
336		saturn_state *state = space.machine().driver_data<saturn_state>();
337		return state->m_vdp1_vram[offset];
	326	return m_vdp1_vram[offset];
338	327	}
339	328
340	329
341		WRITE32_HANDLER ( saturn_vdp1_vram_w )
	330	WRITE32_MEMBER ( saturn_state::saturn_vdp1_vram_w )
342	331	{
343		saturn_state *state = space.machine().driver_data<saturn_state>();
344		UINT8 *vdp1 = state->m_vdp1.gfx_decode;
	332	UINT8 *vdp1 = m_vdp1.gfx_decode;
345	333
346		COMBINE_DATA (&state->m_vdp1_vram[offset]);
	334	COMBINE_DATA (&m_vdp1_vram[offset]);
347	335
348	336	//  if (((offset * 4) > 0xdf) && ((offset * 4) < 0x140))
349	337	//  {
350	338	//      logerror("cpu %s (PC=%08X): VRAM dword write to %08X = %08X & %08X\n", space.device().tag(), space.device().safe_pc(), offset*4, data, mem_mask);
351	339	//  }
352	340
353		data = state->m_vdp1_vram[offset];
	341	data = m_vdp1_vram[offset];
354	342	/* put in gfx region for easy decoding */
355	343	vdp1[offset*4+0] = (data & 0xff000000) >> 24;
356	344	vdp1[offset*4+1] = (data & 0x00ff0000) >> 16;
r20790	r20791
358	346	vdp1[offset*4+3] = (data & 0x000000ff) >> 0;
359	347	}
360	348
361		WRITE32_HANDLER ( saturn_vdp1_framebuffer0_w )
	349	WRITE32_MEMBER ( saturn_state::saturn_vdp1_framebuffer0_w )
362	350	{
363		saturn_state *state = space.machine().driver_data<saturn_state>();
364	351	//popmessage ("STV VDP1 Framebuffer 0 WRITE offset %08x data %08x",offset, data);
365	352	if ( STV_VDP1_TVM & 1 )
366	353	{
r20790	r20791
368	355	//printf("VDP1 8-bit mode %08x %02x\n",offset,data);
369	356	if ( ACCESSING_BITS_24_31 )
370	357	{
371		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2] &= 0x00ff;
372		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2] |= data & 0xff00;
	358	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2] &= 0x00ff;
	359	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2] |= data & 0xff00;
373	360	}
374	361	if ( ACCESSING_BITS_16_23 )
375	362	{
376		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2] &= 0xff00;
377		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2] |= data & 0x00ff;
	363	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2] &= 0xff00;
	364	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2] |= data & 0x00ff;
378	365	}
379	366	if ( ACCESSING_BITS_8_15 )
380	367	{
381		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2+1] &= 0x00ff;
382		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2+1] |= data & 0xff00;
	368	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2+1] &= 0x00ff;
	369	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2+1] |= data & 0xff00;
383	370	}
384	371	if ( ACCESSING_BITS_0_7 )
385	372	{
386		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2+1] &= 0xff00;
387		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2+1] |= data & 0x00ff;
	373	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2+1] &= 0xff00;
	374	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2+1] |= data & 0x00ff;
388	375	}
389	376	}
390	377	else
r20790	r20791
392	379	/* 16-bit mode */
393	380	if ( ACCESSING_BITS_16_31 )
394	381	{
395		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2] = (data >> 16) & 0xffff;
	382	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2] = (data >> 16) & 0xffff;
396	383	}
397	384	if ( ACCESSING_BITS_0_15 )
398	385	{
399		state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2+1] = data & 0xffff;
	386	m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2+1] = data & 0xffff;
400	387	}
401	388	}
402	389	}
403	390
404		READ32_HANDLER ( saturn_vdp1_framebuffer0_r )
	391	READ32_MEMBER ( saturn_state::saturn_vdp1_framebuffer0_r )
405	392	{
406		saturn_state *state = space.machine().driver_data<saturn_state>();
407	393	UINT32 result = 0;
408	394	//popmessage ("STV VDP1 Framebuffer 0 READ offset %08x",offset);
409	395	if ( STV_VDP1_TVM & 1 )
r20790	r20791
411	397	/* 8-bit mode */
412	398	//printf("VDP1 8-bit mode %08x\n",offset);
413	399	if ( ACCESSING_BITS_24_31 )
414		result |= ((state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2] & 0xff00) << 16);
	400	result |= ((m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2] & 0xff00) << 16);
415	401	if ( ACCESSING_BITS_16_23 )
416		result |= ((state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2] & 0x00ff) << 16);
	402	result |= ((m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2] & 0x00ff) << 16);
417	403	if ( ACCESSING_BITS_8_15 )
418		result |= ((state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2+1] & 0xff00));
	404	result |= ((m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2+1] & 0xff00));
419	405	if ( ACCESSING_BITS_0_7 )
420		result |= ((state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2+1] & 0x00ff));
	406	result |= ((m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2+1] & 0x00ff));
421	407	}
422	408	else
423	409	{
424	410	/* 16-bit mode */
425	411	if ( ACCESSING_BITS_16_31 )
426	412	{
427		result |= (state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2] << 16);
	413	result |= (m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2] << 16);
428	414	}
429	415	if ( ACCESSING_BITS_0_15 )
430	416	{
431		result |= (state->m_vdp1.framebuffer[state->m_vdp1.framebuffer_current_draw][offset*2+1]);
	417	result |= (m_vdp1.framebuffer[m_vdp1.framebuffer_current_draw][offset*2+1]);
432	418	}
433	419
434	420	}
r20790	r20791
543	529	memset( &stv_gouraud_shading, 0, sizeof( stv_gouraud_shading ) );
544	530	}
545	531
546		static UINT8 stv_read_gouraud_table(running_machine &machine)
	532	UINT8 saturn_state::stv_read_gouraud_table( void )
547	533	{
548		saturn_state *state = machine.driver_data<saturn_state>();
549	534	int gaddr;
550	535
551	536	if ( (stv2_current_sprite.CMDPMOD & 0x7) == 4 )
552	537	{
553	538	gaddr = stv2_current_sprite.CMDGRDA * 8;
554		stv_gouraud_shading.GA = (state->m_vdp1_vram[gaddr/4] >> 16) & 0xffff;
555		stv_gouraud_shading.GB = (state->m_vdp1_vram[gaddr/4] >> 0) & 0xffff;
556		stv_gouraud_shading.GC = (state->m_vdp1_vram[gaddr/4 + 1] >> 16) & 0xffff;
557		stv_gouraud_shading.GD = (state->m_vdp1_vram[gaddr/4 + 1] >> 0) & 0xffff;
	539	stv_gouraud_shading.GA = (m_vdp1_vram[gaddr/4] >> 16) & 0xffff;
	540	stv_gouraud_shading.GB = (m_vdp1_vram[gaddr/4] >> 0) & 0xffff;
	541	stv_gouraud_shading.GC = (m_vdp1_vram[gaddr/4 + 1] >> 16) & 0xffff;
	542	stv_gouraud_shading.GD = (m_vdp1_vram[gaddr/4 + 1] >> 0) & 0xffff;
558	543	return 1;
559	544	}
560	545	else
r20790	r20791
705	690	*ng2 = g2;
706	691	}
707	692
708		static void stv_vdp1_setup_shading(running_machine &machine,const struct spoint* q, const rectangle &cliprect)
	693	void saturn_state::stv_vdp1_setup_shading(const struct spoint* q, const rectangle &cliprect)
709	694	{
710	695	INT32 x1, x2, delta, cury, limy;
711	696	INT32 r1, g1, b1, r2, g2, b2;
r20790	r20791
715	700	struct shaded_point p[8];
716	701	UINT16 gd[4];
717	702
718		if ( stv_read_gouraud_table(machine) == 0 ) return;
	703	if ( stv_read_gouraud_table() == 0 ) return;
719	704
720	705	gd[0] = stv_gouraud_shading.GA;
721	706	gd[1] = stv_gouraud_shading.GB;
r20790	r20791
1080	1065	}
1081	1066
1082	1067
1083		static void stv_vdp1_set_drawpixel(running_machine &machine)
	1068	void saturn_state::stv_vdp1_set_drawpixel( void )
1084	1069	{
1085		saturn_state *state = machine.driver_data<saturn_state>();
1086	1070	int sprite_type = stv2_current_sprite.CMDCTRL & 0x000f;
1087	1071	int sprite_mode = stv2_current_sprite.CMDPMOD&0x0038;
1088	1072	int spd = stv2_current_sprite.CMDPMOD & 0x40;
1089	1073	int mesh = stv2_current_sprite.CMDPMOD & 0x100;
1090	1074	int ecd = stv2_current_sprite.CMDPMOD & 0x80;
1091	1075
1092		gfxdata = state->m_vdp1.gfx_decode;
	1076	gfxdata = m_vdp1.gfx_decode;
1093	1077
1094	1078	if ( mesh || !ecd || ((stv2_current_sprite.CMDPMOD & 0x7) != 0) )
1095	1079	{
r20790	r20791
1123	1107	}
1124	1108
1125	1109
1126		static void vdp1_fill_slope(running_machine &machine, const rectangle &cliprect, int patterndata, int xsize,
	1110	void saturn_state::vdp1_fill_slope(const rectangle &cliprect, int patterndata, int xsize,
1127	1111	INT32 x1, INT32 x2, INT32 sl1, INT32 sl2, INT32 *nx1, INT32 *nx2,
1128	1112	INT32 u1, INT32 u2, INT32 slu1, INT32 slu2, INT32 *nu1, INT32 *nu2,
1129	1113	INT32 v1, INT32 v2, INT32 slv1, INT32 slv2, INT32 *nv1, INT32 *nv2,
r20790	r20791
1213	1197	xx2 = cliprect.max_x;
1214	1198
1215	1199	while(xx1 <= xx2) {
1216		drawpixel(machine,xx1,_y1,
	1200	drawpixel(machine(),xx1,_y1,
1217	1201	patterndata,
1218	1202	(v>>FRAC_SHIFT)*xsize+(u>>FRAC_SHIFT));
1219	1203	xx1++;
r20790	r20791
1239	1223	*nv2 = v2;
1240	1224	}
1241	1225
1242		static void vdp1_fill_line(running_machine &machine, const rectangle &cliprect, int patterndata, int xsize, INT32 y,
	1226	void saturn_state::vdp1_fill_line(const rectangle &cliprect, int patterndata, int xsize, INT32 y,
1243	1227	INT32 x1, INT32 x2, INT32 u1, INT32 u2, INT32 v1, INT32 v2)
1244	1228	{
1245	1229	int xx1 = x1>>FRAC_SHIFT;
r20790	r20791
1267	1251	xx2 = cliprect.max_x;
1268	1252
1269	1253	while(xx1 <= xx2) {
1270		drawpixel(machine,xx1,y,
	1254	drawpixel(machine(), xx1,y,
1271	1255	patterndata,
1272	1256	(v>>FRAC_SHIFT)*xsize+(u>>FRAC_SHIFT));
1273	1257	xx1++;
r20790	r20791
1277	1261	}
1278	1262	}
1279	1263
1280		static void vdp1_fill_quad(running_machine &machine, const rectangle &cliprect, int patterndata, int xsize, const struct spoint *q)
	1264	void saturn_state::vdp1_fill_quad(const rectangle &cliprect, int patterndata, int xsize, const struct spoint *q)
1281	1265	{
1282	1266	INT32 sl1, sl2, slu1, slu2, slv1, slv2, cury, limy, x1, x2, u1, u2, v1, v2, delta;
1283	1267	int pmin, pmax, i, ps1, ps2;
r20790	r20791
1317	1301	v2 = p[i].v;
1318	1302	}
1319	1303	}
1320		vdp1_fill_line(machine, cliprect, patterndata, xsize, cury, x1, x2, u1, u2, v1, v2);
	1304	vdp1_fill_line(cliprect, patterndata, xsize, cury, x1, x2, u1, u2, v1, v2);
1321	1305	return;
1322	1306	}
1323	1307
r20790	r20791
1336	1320
1337	1321	for(;;) {
1338	1322	if(p[ps1-1].y == p[ps2+1].y) {
1339		vdp1_fill_slope(machine, cliprect, patterndata, xsize,
	1323	vdp1_fill_slope(cliprect, patterndata, xsize,
1340	1324	x1, x2, sl1, sl2, &x1, &x2,
1341	1325	u1, u2, slu1, slu2, &u1, &u2,
1342	1326	v1, v2, slv1, slv2, &v1, &v2,
r20790	r20791
1369	1353	slu2 = (u2-p[ps2+1].u)/delta;
1370	1354	slv2 = (v2-p[ps2+1].v)/delta;
1371	1355	} else if(p[ps1-1].y < p[ps2+1].y) {
1372		vdp1_fill_slope(machine, cliprect, patterndata, xsize,
	1356	vdp1_fill_slope(cliprect, patterndata, xsize,
1373	1357	x1, x2, sl1, sl2, &x1, &x2,
1374	1358	u1, u2, slu1, slu2, &u1, &u2,
1375	1359	v1, v2, slv1, slv2, &v1, &v2,
r20790	r20791
1389	1373	slu1 = (u1-p[ps1-1].u)/delta;
1390	1374	slv1 = (v1-p[ps1-1].v)/delta;
1391	1375	} else {
1392		vdp1_fill_slope(machine, cliprect, patterndata, xsize,
	1376	vdp1_fill_slope(cliprect, patterndata, xsize,
1393	1377	x1, x2, sl1, sl2, &x1, &x2,
1394	1378	u1, u2, slu1, slu2, &u1, &u2,
1395	1379	v1, v2, slv1, slv2, &v1, &v2,
r20790	r20791
1411	1395	}
1412	1396	}
1413	1397	if(cury == limy)
1414		vdp1_fill_line(machine, cliprect, patterndata, xsize, cury, x1, x2, u1, u2, v1, v2);
	1398	vdp1_fill_line(cliprect, patterndata, xsize, cury, x1, x2, u1, u2, v1, v2);
1415	1399	}
1416	1400
1417		static int x2s(running_machine &machine,int v)
	1401	int saturn_state::x2s(int v)
1418	1402	{
1419		saturn_state *state = machine.driver_data<saturn_state>();
1420
1421		return (INT32)(INT16)v + state->m_vdp1.local_x;
	1403	return (INT32)(INT16)v + m_vdp1.local_x;
1422	1404	}
1423	1405
1424		static int y2s(running_machine &machine, int v)
	1406	int saturn_state::y2s(int v)
1425	1407	{
1426		saturn_state *state = machine.driver_data<saturn_state>();
1427
1428		return (INT32)(INT16)v + state->m_vdp1.local_y;
	1408	return (INT32)(INT16)v + m_vdp1.local_y;
1429	1409	}
1430	1410
1431		static void stv_vdp1_draw_line(running_machine &machine, const rectangle &cliprect)
	1411	void saturn_state::stv_vdp1_draw_line(const rectangle &cliprect)
1432	1412	{
1433	1413	struct spoint q[4];
1434	1414
1435		q[0].x = x2s(machine, stv2_current_sprite.CMDXA);
1436		q[0].y = y2s(machine, stv2_current_sprite.CMDYA);
1437		q[1].x = x2s(machine, stv2_current_sprite.CMDXB);
1438		q[1].y = y2s(machine, stv2_current_sprite.CMDYB);
1439		q[2].x = x2s(machine, stv2_current_sprite.CMDXA);
1440		q[2].y = y2s(machine, stv2_current_sprite.CMDYA);
1441		q[3].x = x2s(machine, stv2_current_sprite.CMDXB);
1442		q[3].y = y2s(machine, stv2_current_sprite.CMDYB);
	1415	q[0].x = x2s(stv2_current_sprite.CMDXA);
	1416	q[0].y = y2s(stv2_current_sprite.CMDYA);
	1417	q[1].x = x2s(stv2_current_sprite.CMDXB);
	1418	q[1].y = y2s(stv2_current_sprite.CMDYB);
	1419	q[2].x = x2s(stv2_current_sprite.CMDXA);
	1420	q[2].y = y2s(stv2_current_sprite.CMDYA);
	1421	q[3].x = x2s(stv2_current_sprite.CMDXB);
	1422	q[3].y = y2s(stv2_current_sprite.CMDYB);
1443	1423
1444	1424	q[0].u = q[3].u = q[1].u = q[2].u = 0;
1445	1425	q[0].v = q[1].v = q[2].v = q[3].v = 0;
1446	1426
1447		vdp1_fill_quad(machine, cliprect, 0, 1, q);
	1427	vdp1_fill_quad(cliprect, 0, 1, q);
1448	1428	}
1449	1429
1450		static void stv_vdp1_draw_poly_line(running_machine &machine, const rectangle &cliprect)
	1430	void saturn_state::stv_vdp1_draw_poly_line(const rectangle &cliprect)
1451	1431	{
1452	1432	struct spoint q[4];
1453	1433
1454		q[0].x = x2s(machine, stv2_current_sprite.CMDXA);
1455		q[0].y = y2s(machine, stv2_current_sprite.CMDYA);
1456		q[1].x = x2s(machine, stv2_current_sprite.CMDXB);
1457		q[1].y = y2s(machine, stv2_current_sprite.CMDYB);
1458		q[2].x = x2s(machine, stv2_current_sprite.CMDXA);
1459		q[2].y = y2s(machine, stv2_current_sprite.CMDYA);
1460		q[3].x = x2s(machine, stv2_current_sprite.CMDXB);
1461		q[3].y = y2s(machine, stv2_current_sprite.CMDYB);
	1434	q[0].x = x2s(stv2_current_sprite.CMDXA);
	1435	q[0].y = y2s(stv2_current_sprite.CMDYA);
	1436	q[1].x = x2s(stv2_current_sprite.CMDXB);
	1437	q[1].y = y2s(stv2_current_sprite.CMDYB);
	1438	q[2].x = x2s(stv2_current_sprite.CMDXA);
	1439	q[2].y = y2s(stv2_current_sprite.CMDYA);
	1440	q[3].x = x2s(stv2_current_sprite.CMDXB);
	1441	q[3].y = y2s(stv2_current_sprite.CMDYB);
1462	1442
1463	1443	q[0].u = q[3].u = q[1].u = q[2].u = 0;
1464	1444	q[0].v = q[1].v = q[2].v = q[3].v = 0;
1465	1445
1466		vdp1_fill_quad(machine, cliprect, 0, 1, q);
	1446	vdp1_fill_quad(cliprect, 0, 1, q);
1467	1447
1468		q[0].x = x2s(machine, stv2_current_sprite.CMDXB);
1469		q[0].y = y2s(machine, stv2_current_sprite.CMDYB);
1470		q[1].x = x2s(machine, stv2_current_sprite.CMDXC);
1471		q[1].y = y2s(machine, stv2_current_sprite.CMDYC);
1472		q[2].x = x2s(machine, stv2_current_sprite.CMDXB);
1473		q[2].y = y2s(machine, stv2_current_sprite.CMDYB);
1474		q[3].x = x2s(machine, stv2_current_sprite.CMDXC);
1475		q[3].y = y2s(machine, stv2_current_sprite.CMDYC);
	1448	q[0].x = x2s(stv2_current_sprite.CMDXB);
	1449	q[0].y = y2s(stv2_current_sprite.CMDYB);
	1450	q[1].x = x2s(stv2_current_sprite.CMDXC);
	1451	q[1].y = y2s(stv2_current_sprite.CMDYC);
	1452	q[2].x = x2s(stv2_current_sprite.CMDXB);
	1453	q[2].y = y2s(stv2_current_sprite.CMDYB);
	1454	q[3].x = x2s(stv2_current_sprite.CMDXC);
	1455	q[3].y = y2s(stv2_current_sprite.CMDYC);
1476	1456
1477	1457	q[0].u = q[3].u = q[1].u = q[2].u = 0;
1478	1458	q[0].v = q[1].v = q[2].v = q[3].v = 0;
1479	1459
1480		vdp1_fill_quad(machine, cliprect, 0, 1, q);
	1460	vdp1_fill_quad(cliprect, 0, 1, q);
1481	1461
1482		q[0].x = x2s(machine, stv2_current_sprite.CMDXC);
1483		q[0].y = y2s(machine, stv2_current_sprite.CMDYC);
1484		q[1].x = x2s(machine, stv2_current_sprite.CMDXD);
1485		q[1].y = y2s(machine, stv2_current_sprite.CMDYD);
1486		q[2].x = x2s(machine, stv2_current_sprite.CMDXC);
1487		q[2].y = y2s(machine, stv2_current_sprite.CMDYC);
1488		q[3].x = x2s(machine, stv2_current_sprite.CMDXD);
1489		q[3].y = y2s(machine, stv2_current_sprite.CMDYD);
	1462	q[0].x = x2s(stv2_current_sprite.CMDXC);
	1463	q[0].y = y2s(stv2_current_sprite.CMDYC);
	1464	q[1].x = x2s(stv2_current_sprite.CMDXD);
	1465	q[1].y = y2s(stv2_current_sprite.CMDYD);
	1466	q[2].x = x2s(stv2_current_sprite.CMDXC);
	1467	q[2].y = y2s(stv2_current_sprite.CMDYC);
	1468	q[3].x = x2s(stv2_current_sprite.CMDXD);
	1469	q[3].y = y2s(stv2_current_sprite.CMDYD);
1490	1470
1491	1471	q[0].u = q[3].u = q[1].u = q[2].u = 0;
1492	1472	q[0].v = q[1].v = q[2].v = q[3].v = 0;
1493	1473
1494		vdp1_fill_quad(machine, cliprect, 0, 1, q);
	1474	vdp1_fill_quad(cliprect, 0, 1, q);
1495	1475
1496		q[0].x = x2s(machine, stv2_current_sprite.CMDXD);
1497		q[0].y = y2s(machine, stv2_current_sprite.CMDYD);
1498		q[1].x = x2s(machine, stv2_current_sprite.CMDXA);
1499		q[1].y = y2s(machine, stv2_current_sprite.CMDYA);
1500		q[2].x = x2s(machine, stv2_current_sprite.CMDXD);
1501		q[2].y = y2s(machine, stv2_current_sprite.CMDYD);
1502		q[3].x = x2s(machine, stv2_current_sprite.CMDXA);
1503		q[3].y = y2s(machine, stv2_current_sprite.CMDYA);
	1476	q[0].x = x2s(stv2_current_sprite.CMDXD);
	1477	q[0].y = y2s(stv2_current_sprite.CMDYD);
	1478	q[1].x = x2s(stv2_current_sprite.CMDXA);
	1479	q[1].y = y2s(stv2_current_sprite.CMDYA);
	1480	q[2].x = x2s(stv2_current_sprite.CMDXD);
	1481	q[2].y = y2s(stv2_current_sprite.CMDYD);
	1482	q[3].x = x2s(stv2_current_sprite.CMDXA);
	1483	q[3].y = y2s(stv2_current_sprite.CMDYA);
1504	1484
1505	1485	q[0].u = q[3].u = q[1].u = q[2].u = 0;
1506	1486	q[0].v = q[1].v = q[2].v = q[3].v = 0;
1507	1487
1508		stv_vdp1_setup_shading(machine, q, cliprect);
1509		vdp1_fill_quad(machine, cliprect, 0, 1, q);
	1488	stv_vdp1_setup_shading(q, cliprect);
	1489	vdp1_fill_quad(cliprect, 0, 1, q);
1510	1490
1511	1491	}
1512	1492
1513		static void stv_vpd1_draw_distorted_sprite(running_machine &machine, const rectangle &cliprect)
	1493	void saturn_state::stv_vdp1_draw_distorted_sprite(const rectangle &cliprect)
1514	1494	{
1515	1495	struct spoint q[4];
1516	1496
r20790	r20791
1540	1520	}
1541	1521
1542	1522
1543		q[0].x = x2s(machine, stv2_current_sprite.CMDXA);
1544		q[0].y = y2s(machine, stv2_current_sprite.CMDYA);
1545		q[1].x = x2s(machine, stv2_current_sprite.CMDXB);
1546		q[1].y = y2s(machine, stv2_current_sprite.CMDYB);
1547		q[2].x = x2s(machine, stv2_current_sprite.CMDXC);
1548		q[2].y = y2s(machine, stv2_current_sprite.CMDYC);
1549		q[3].x = x2s(machine, stv2_current_sprite.CMDXD);
1550		q[3].y = y2s(machine, stv2_current_sprite.CMDYD);
	1523	q[0].x = x2s(stv2_current_sprite.CMDXA);
	1524	q[0].y = y2s(stv2_current_sprite.CMDYA);
	1525	q[1].x = x2s(stv2_current_sprite.CMDXB);
	1526	q[1].y = y2s(stv2_current_sprite.CMDYB);
	1527	q[2].x = x2s(stv2_current_sprite.CMDXC);
	1528	q[2].y = y2s(stv2_current_sprite.CMDYC);
	1529	q[3].x = x2s(stv2_current_sprite.CMDXD);
	1530	q[3].y = y2s(stv2_current_sprite.CMDYD);
1551	1531
1552	1532	if(direction & 1) { // xflip
1553	1533	q[0].u = q[3].u = xsize-1;
r20790	r20791
1564	1544	q[2].v = q[3].v = ysize-1;
1565	1545	}
1566	1546
1567		stv_vdp1_setup_shading(machine, q, cliprect);
1568		vdp1_fill_quad(machine, cliprect, patterndata, xsize, q);
	1547	stv_vdp1_setup_shading(q, cliprect);
	1548	vdp1_fill_quad(cliprect, patterndata, xsize, q);
1569	1549	}
1570	1550
1571		static void stv_vpd1_draw_scaled_sprite(running_machine &machine, const rectangle &cliprect)
	1551	void saturn_state::stv_vdp1_draw_scaled_sprite(const rectangle &cliprect)
1572	1552	{
1573	1553	struct spoint q[4];
1574	1554
r20790	r20791
1666	1646
1667	1647	if (zoompoint)
1668	1648	{
1669		q[0].x = x2s(machine, x);
1670		q[0].y = y2s(machine, y);
1671		q[1].x = x2s(machine, x)+screen_width;
1672		q[1].y = y2s(machine, y);
1673		q[2].x = x2s(machine, x)+screen_width;
1674		q[2].y = y2s(machine, y)+screen_height;
1675		q[3].x = x2s(machine, x);
1676		q[3].y = y2s(machine, y)+screen_height;
	1649	q[0].x = x2s(x);
	1650	q[0].y = y2s(y);
	1651	q[1].x = x2s(x)+screen_width;
	1652	q[1].y = y2s(y);
	1653	q[2].x = x2s(x)+screen_width;
	1654	q[2].y = y2s(y)+screen_height;
	1655	q[3].x = x2s(x);
	1656	q[3].y = y2s(y)+screen_height;
1677	1657
1678	1658	if ( screen_height_negative )
1679	1659	{
r20790	r20791
1685	1665	}
1686	1666	else
1687	1667	{
1688		q[0].x = x2s(machine, x);
1689		q[0].y = y2s(machine, y);
1690		q[1].x = x2s(machine, x2);
1691		q[1].y = y2s(machine, y);
1692		q[2].x = x2s(machine, x2);
1693		q[2].y = y2s(machine, y2);
1694		q[3].x = x2s(machine, x);
1695		q[3].y = y2s(machine, y2);
	1668	q[0].x = x2s(x);
	1669	q[0].y = y2s(y);
	1670	q[1].x = x2s(x2);
	1671	q[1].y = y2s(y);
	1672	q[2].x = x2s(x2);
	1673	q[2].y = y2s(y2);
	1674	q[3].x = x2s(x);
	1675	q[3].y = y2s(y2);
1696	1676	}
1697	1677
1698	1678
r20790	r20791
1711	1691	q[2].v = q[3].v = ysize-1;
1712	1692	}
1713	1693
1714		stv_vdp1_setup_shading(machine, q, cliprect);
1715		vdp1_fill_quad(machine, cliprect, patterndata, xsize, q);
	1694	stv_vdp1_setup_shading(q, cliprect);
	1695	vdp1_fill_quad(cliprect, patterndata, xsize, q);
1716	1696	}
1717	1697
1718	1698
1719		static void stv_vpd1_draw_normal_sprite(running_machine &machine, const rectangle &cliprect, int sprite_type)
	1699	void saturn_state::stv_vdp1_draw_normal_sprite(const rectangle &cliprect, int sprite_type)
1720	1700	{
1721	1701	//UINT16 *destline;
1722	1702	//saturn_state *state = machine.driver_data<saturn_state>();
r20790	r20791
1728	1708	int su, u, dux, duy;
1729	1709	int maxdrawypos, maxdrawxpos;
1730	1710
1731		x = x2s(machine, stv2_current_sprite.CMDXA);
1732		y = y2s(machine, stv2_current_sprite.CMDYA);
	1711	x = x2s(stv2_current_sprite.CMDXA);
	1712	y = y2s(stv2_current_sprite.CMDYA);
1733	1713
1734	1714	direction = (stv2_current_sprite.CMDCTRL & 0x0030)>>4;
1735	1715
r20790	r20791
1746	1726	if ( x > cliprect.max_x ) return;
1747	1727	if ( y > cliprect.max_y ) return;
1748	1728
1749		shading = stv_read_gouraud_table(machine);
	1729	shading = stv_read_gouraud_table();
1750	1730	if ( shading )
1751	1731	{
1752	1732	struct spoint q[4];
r20790	r20791
1755	1735	q[2].x = x + xsize; q[2].y = y + ysize;
1756	1736	q[3].x = x; q[3].y = y + ysize;
1757	1737
1758		stv_vdp1_setup_shading( machine, q, cliprect );
	1738	stv_vdp1_setup_shading( q, cliprect );
1759	1739	}
1760	1740
1761	1741	u = 0;
r20790	r20791
1787	1767	maxdrawxpos = MIN(x+xsize-1,cliprect.max_x);
1788	1768	for (drawypos = y; drawypos <= maxdrawypos; drawypos++ )
1789	1769	{
1790		//destline = state->m_vdp1.framebuffer_draw_lines[drawypos];
	1770	//destline = m_vdp1.framebuffer_draw_lines[drawypos];
1791	1771	su = u;
1792	1772	for (drawxpos = x; drawxpos <= maxdrawxpos; drawxpos++ )
1793	1773	{
1794		drawpixel( machine, drawxpos, drawypos, patterndata, u );
	1774	drawpixel( machine(), drawxpos, drawypos, patterndata, u );
1795	1775	u += dux;
1796	1776	}
1797	1777	u = su + duy;
1798	1778	}
1799	1779	}
1800	1780
1801		static void stv_vdp1_process_list(running_machine &machine)
	1781	void saturn_state::stv_vdp1_process_list( void )
1802	1782	{
1803		saturn_state *state = machine.driver_data<saturn_state>();
1804	1783	int position;
1805	1784	int spritecount;
1806	1785	int vdp1_nest;
r20790	r20791
1830	1809	//      position = 0;
1831	1810	//  }
1832	1811
1833		stv2_current_sprite.CMDCTRL = (state->m_vdp1_vram[position * (0x20/4)+0] & 0xffff0000) >> 16;
	1812	stv2_current_sprite.CMDCTRL = (m_vdp1_vram[position * (0x20/4)+0] & 0xffff0000) >> 16;
1834	1813
1835	1814	if (stv2_current_sprite.CMDCTRL == 0x8000)
1836	1815	{
r20790	r20791
1838	1817	goto end; // end of list
1839	1818	}
1840	1819
1841		stv2_current_sprite.CMDLINK = (state->m_vdp1_vram[position * (0x20/4)+0] & 0x0000ffff) >> 0;
1842		stv2_current_sprite.CMDPMOD = (state->m_vdp1_vram[position * (0x20/4)+1] & 0xffff0000) >> 16;
1843		stv2_current_sprite.CMDCOLR = (state->m_vdp1_vram[position * (0x20/4)+1] & 0x0000ffff) >> 0;
1844		stv2_current_sprite.CMDSRCA = (state->m_vdp1_vram[position * (0x20/4)+2] & 0xffff0000) >> 16;
1845		stv2_current_sprite.CMDSIZE = (state->m_vdp1_vram[position * (0x20/4)+2] & 0x0000ffff) >> 0;
1846		stv2_current_sprite.CMDXA   = (state->m_vdp1_vram[position * (0x20/4)+3] & 0xffff0000) >> 16;
1847		stv2_current_sprite.CMDYA   = (state->m_vdp1_vram[position * (0x20/4)+3] & 0x0000ffff) >> 0;
1848		stv2_current_sprite.CMDXB   = (state->m_vdp1_vram[position * (0x20/4)+4] & 0xffff0000) >> 16;
1849		stv2_current_sprite.CMDYB   = (state->m_vdp1_vram[position * (0x20/4)+4] & 0x0000ffff) >> 0;
1850		stv2_current_sprite.CMDXC   = (state->m_vdp1_vram[position * (0x20/4)+5] & 0xffff0000) >> 16;
1851		stv2_current_sprite.CMDYC   = (state->m_vdp1_vram[position * (0x20/4)+5] & 0x0000ffff) >> 0;
1852		stv2_current_sprite.CMDXD   = (state->m_vdp1_vram[position * (0x20/4)+6] & 0xffff0000) >> 16;
1853		stv2_current_sprite.CMDYD   = (state->m_vdp1_vram[position * (0x20/4)+6] & 0x0000ffff) >> 0;
1854		stv2_current_sprite.CMDGRDA = (state->m_vdp1_vram[position * (0x20/4)+7] & 0xffff0000) >> 16;
1855		//      stv2_current_sprite.UNUSED  = (state->m_vdp1_vram[position * (0x20/4)+7] & 0x0000ffff) >> 0;
	1820	stv2_current_sprite.CMDLINK = (m_vdp1_vram[position * (0x20/4)+0] & 0x0000ffff) >> 0;
	1821	stv2_current_sprite.CMDPMOD = (m_vdp1_vram[position * (0x20/4)+1] & 0xffff0000) >> 16;
	1822	stv2_current_sprite.CMDCOLR = (m_vdp1_vram[position * (0x20/4)+1] & 0x0000ffff) >> 0;
	1823	stv2_current_sprite.CMDSRCA = (m_vdp1_vram[position * (0x20/4)+2] & 0xffff0000) >> 16;
	1824	stv2_current_sprite.CMDSIZE = (m_vdp1_vram[position * (0x20/4)+2] & 0x0000ffff) >> 0;
	1825	stv2_current_sprite.CMDXA   = (m_vdp1_vram[position * (0x20/4)+3] & 0xffff0000) >> 16;
	1826	stv2_current_sprite.CMDYA   = (m_vdp1_vram[position * (0x20/4)+3] & 0x0000ffff) >> 0;
	1827	stv2_current_sprite.CMDXB   = (m_vdp1_vram[position * (0x20/4)+4] & 0xffff0000) >> 16;
	1828	stv2_current_sprite.CMDYB   = (m_vdp1_vram[position * (0x20/4)+4] & 0x0000ffff) >> 0;
	1829	stv2_current_sprite.CMDXC   = (m_vdp1_vram[position * (0x20/4)+5] & 0xffff0000) >> 16;
	1830	stv2_current_sprite.CMDYC   = (m_vdp1_vram[position * (0x20/4)+5] & 0x0000ffff) >> 0;
	1831	stv2_current_sprite.CMDXD   = (m_vdp1_vram[position * (0x20/4)+6] & 0xffff0000) >> 16;
	1832	stv2_current_sprite.CMDYD   = (m_vdp1_vram[position * (0x20/4)+6] & 0x0000ffff) >> 0;
	1833	stv2_current_sprite.CMDGRDA = (m_vdp1_vram[position * (0x20/4)+7] & 0xffff0000) >> 16;
	1834	//      stv2_current_sprite.UNUSED  = (m_vdp1_vram[position * (0x20/4)+7] & 0x0000ffff) >> 0;
1856	1835
1857	1836	/* proecess jump / skip commands, set position for next sprite */
1858	1837	switch (stv2_current_sprite.CMDCTRL & 0x7000)
r20790	r20791
1941	1920	if ( stv2_current_sprite.CMDPMOD & 0x0400 )
1942	1921	{
1943	1922	//if(stv2_current_sprite.CMDPMOD & 0x0200) /* TODO: Bio Hazard inventory screen uses outside cliprect */
1944		//  cliprect = &state->m_vdp1.system_cliprect;
	1923	//  cliprect = &m_vdp1.system_cliprect;
1945	1924	//else
1946		cliprect = &state->m_vdp1.user_cliprect;
	1925	cliprect = &m_vdp1.user_cliprect;
1947	1926	}
1948	1927	else
1949	1928	{
1950		cliprect = &state->m_vdp1.system_cliprect;
	1929	cliprect = &m_vdp1.system_cliprect;
1951	1930	}
1952	1931
1953		stv_vdp1_set_drawpixel(machine);
	1932	stv_vdp1_set_drawpixel();
1954	1933
1955	1934	switch (stv2_current_sprite.CMDCTRL & 0x000f)
1956	1935	{
1957	1936	case 0x0000:
1958	1937	if (VDP1_LOG) logerror ("Sprite List Normal Sprite (%d %d)\n",stv2_current_sprite.CMDXA,stv2_current_sprite.CMDYA);
1959	1938	stv2_current_sprite.ispoly = 0;
1960		stv_vpd1_draw_normal_sprite(machine, *cliprect, 0);
	1939	stv_vdp1_draw_normal_sprite(*cliprect, 0);
1961	1940	break;
1962	1941
1963	1942	case 0x0001:
1964	1943	if (VDP1_LOG) logerror ("Sprite List Scaled Sprite (%d %d)\n",stv2_current_sprite.CMDXA,stv2_current_sprite.CMDYA);
1965	1944	stv2_current_sprite.ispoly = 0;
1966		stv_vpd1_draw_scaled_sprite(machine, *cliprect);
	1945	stv_vdp1_draw_scaled_sprite(*cliprect);
1967	1946	break;
1968	1947
1969	1948	case 0x0002:
r20790	r20791
1976	1955	if (VDP1_LOG) logerror ("CMDPMOD = %04x\n",stv2_current_sprite.CMDPMOD);
1977	1956
1978	1957	stv2_current_sprite.ispoly = 0;
1979		stv_vpd1_draw_distorted_sprite(machine, *cliprect);
	1958	stv_vdp1_draw_distorted_sprite(*cliprect);
1980	1959	break;
1981	1960
1982	1961	case 0x0004:
1983	1962	if (VDP1_LOG) logerror ("Sprite List Polygon\n");
1984	1963	stv2_current_sprite.ispoly = 1;
1985		stv_vpd1_draw_distorted_sprite(machine, *cliprect);
	1964	stv_vdp1_draw_distorted_sprite(*cliprect);
1986	1965	break;
1987	1966
1988	1967	case 0x0005:
1989	1968	//            case 0x0007: // mirror? Baroque uses it, crashes for whatever reason
1990	1969	if (VDP1_LOG) logerror ("Sprite List Polyline\n");
1991	1970	stv2_current_sprite.ispoly = 1;
1992		stv_vdp1_draw_poly_line(machine, *cliprect);
	1971	stv_vdp1_draw_poly_line(*cliprect);
1993	1972	break;
1994	1973
1995	1974	case 0x0006:
1996	1975	if (VDP1_LOG) logerror ("Sprite List Line\n");
1997	1976	stv2_current_sprite.ispoly = 1;
1998		stv_vdp1_draw_line(machine, *cliprect);
	1977	stv_vdp1_draw_line(*cliprect);
1999	1978	break;
2000	1979
2001	1980	case 0x0008:
2002	1981	//            case 0x000b: // mirror? Bug 2
2003	1982	if (VDP1_LOG) logerror ("Sprite List Set Command for User Clipping (%d,%d),(%d,%d)\n", stv2_current_sprite.CMDXA, stv2_current_sprite.CMDYA, stv2_current_sprite.CMDXC, stv2_current_sprite.CMDYC);
2004		state->m_vdp1.user_cliprect.set(stv2_current_sprite.CMDXA, stv2_current_sprite.CMDXC, stv2_current_sprite.CMDYA, stv2_current_sprite.CMDYC);
	1983	m_vdp1.user_cliprect.set(stv2_current_sprite.CMDXA, stv2_current_sprite.CMDXC, stv2_current_sprite.CMDYA, stv2_current_sprite.CMDYC);
2005	1984	break;
2006	1985
2007	1986	case 0x0009:
2008	1987	if (VDP1_LOG) logerror ("Sprite List Set Command for System Clipping (0,0),(%d,%d)\n", stv2_current_sprite.CMDXC, stv2_current_sprite.CMDYC);
2009		state->m_vdp1.system_cliprect.set(0, stv2_current_sprite.CMDXC, 0, stv2_current_sprite.CMDYC);
	1988	m_vdp1.system_cliprect.set(0, stv2_current_sprite.CMDXC, 0, stv2_current_sprite.CMDYC);
2010	1989	break;
2011	1990
2012	1991	case 0x000a:
2013	1992	if (VDP1_LOG) logerror ("Sprite List Local Co-Ordinate Set (%d %d)\n",(INT16)stv2_current_sprite.CMDXA,(INT16)stv2_current_sprite.CMDYA);
2014		state->m_vdp1.local_x = (INT16)stv2_current_sprite.CMDXA;
2015		state->m_vdp1.local_y = (INT16)stv2_current_sprite.CMDYA;
	1993	m_vdp1.local_x = (INT16)stv2_current_sprite.CMDXA;
	1994	m_vdp1.local_y = (INT16)stv2_current_sprite.CMDYA;
2016	1995	break;
2017	1996
2018	1997	default:
2019	1998	popmessage ("VDP1: Sprite List Illegal %02x, contact MAMEdev",stv2_current_sprite.CMDCTRL & 0xf);
2020		state->m_vdp1.lopr = (position * 0x20) >> 3;
2021		state->m_vdp1.copr = (position * 0x20) >> 3;
	1999	m_vdp1.lopr = (position * 0x20) >> 3;
	2000	m_vdp1.copr = (position * 0x20) >> 3;
2022	2001	return;
2023	2002	}
2024	2003	}
r20790	r20791
2031	2010	end:
2032	2011	/* set CEF to 1*/
2033	2012	CEF_1;
2034		state->m_vdp1.copr = (position * 0x20) >> 3;
	2013	m_vdp1.copr = (position * 0x20) >> 3;
2035	2014
2036	2015	if (VDP1_LOG) logerror ("End of list processing!\n");
2037	2016	}
2038	2017
2039		void video_update_vdp1(running_machine &machine)
	2018	void saturn_state::video_update_vdp1( void )
2040	2019	{
2041		saturn_state *state = machine.driver_data<saturn_state>();
2042	2020	int framebuffer_changed = 0;
2043	2021
2044	2022	//  int enable;
r20790	r20791
2057	2035	//      }
2058	2036	//  }
2059	2037	if (VDP1_LOG) logerror("video_update_vdp1 called\n");
2060		if (VDP1_LOG) logerror( "FBCR = %0x, accessed = %d\n", STV_VDP1_FBCR, state->m_vdp1.fbcr_accessed );
	2038	if (VDP1_LOG) logerror( "FBCR = %0x, accessed = %d\n", STV_VDP1_FBCR, m_vdp1.fbcr_accessed );
2061	2039
2062	2040	if(STV_VDP1_CEF)
2063	2041	BEF_1;
2064	2042	else
2065	2043	BEF_0;
2066	2044
2067		if ( state->m_vdp1.framebuffer_clear_on_next_frame )
	2045	if ( m_vdp1.framebuffer_clear_on_next_frame )
2068	2046	{
2069	2047	if ( ((STV_VDP1_FBCR & 0x3) == 3) &&
2070		state->m_vdp1.fbcr_accessed )
	2048	m_vdp1.fbcr_accessed )
2071	2049	{
2072		stv_clear_framebuffer(machine, state->m_vdp1.framebuffer_current_display);
2073		state->m_vdp1.framebuffer_clear_on_next_frame = 0;
	2050	stv_clear_framebuffer(m_vdp1.framebuffer_current_display);
	2051	m_vdp1.framebuffer_clear_on_next_frame = 0;
2074	2052	}
2075	2053	}
2076	2054
2077	2055	switch( STV_VDP1_FBCR & 0x3 )
2078	2056	{
2079	2057	case 0: /* Automatic mode */
2080		stv_vdp1_change_framebuffers(machine);
2081		stv_clear_framebuffer(machine, state->m_vdp1.framebuffer_current_draw);
	2058	stv_vdp1_change_framebuffers();
	2059	stv_clear_framebuffer(m_vdp1.framebuffer_current_draw);
2082	2060	framebuffer_changed = 1;
2083	2061	break;
2084	2062	case 1: /* Setting prohibited */
2085	2063	break;
2086	2064	case 2: /* Manual mode - erase */
2087		if ( state->m_vdp1.fbcr_accessed )
	2065	if ( m_vdp1.fbcr_accessed )
2088	2066	{
2089		state->m_vdp1.framebuffer_clear_on_next_frame = 1;
	2067	m_vdp1.framebuffer_clear_on_next_frame = 1;
2090	2068	}
2091	2069	break;
2092	2070	case 3: /* Manual mode - change */
2093		if ( state->m_vdp1.fbcr_accessed )
	2071	if ( m_vdp1.fbcr_accessed )
2094	2072	{
2095		stv_vdp1_change_framebuffers(machine);
	2073	stv_vdp1_change_framebuffers();
2096	2074	if ( STV_VDP1_VBE )
2097	2075	{
2098		stv_clear_framebuffer(machine, state->m_vdp1.framebuffer_current_draw);
	2076	stv_clear_framebuffer(m_vdp1.framebuffer_current_draw);
2099	2077	}
2100	2078	/* TODO: Slam n Jam 96 & Cross Romance doesn't like this, investigate. */
2101	2079	//            framebuffer_changed = 1;
r20790	r20791
2103	2081	framebuffer_changed = 1;
2104	2082	break;
2105	2083	}
2106		state->m_vdp1.fbcr_accessed = 0;
	2084	m_vdp1.fbcr_accessed = 0;
2107	2085
2108	2086	if (VDP1_LOG) logerror( "PTM = %0x, TVM = %x\n", STV_VDP1_PTM, STV_VDP1_TVM );
2109	2087	switch(STV_VDP1_PTM & 3)
r20790	r20791
2116	2094	if ( framebuffer_changed || VDP1_LOG )
2117	2095	{
2118	2096	/*set CEF to 1*/
2119		stv_vdp1_process_list(machine);
	2097	stv_vdp1_process_list();
2120	2098	}
2121	2099	break;
2122	2100	case 3: /*<invalid>*/
r20790	r20791
2126	2104	//popmessage("%04x %04x",STV_VDP1_EWRR_X3,STV_VDP1_EWRR_Y3);
2127	2105	}
2128	2106
2129		static void stv_vdp1_state_save_postload(running_machine &machine)
	2107	void saturn_state::stv_vdp1_state_save_postload( void )
2130	2108	{
2131		saturn_state *state = machine.driver_data<saturn_state>();
2132		UINT8 *vdp1 = state->m_vdp1.gfx_decode;
	2109	UINT8 *vdp1 = m_vdp1.gfx_decode;
2133	2110	int offset;
2134	2111	UINT32 data;
2135	2112
2136		state->m_vdp1.framebuffer_mode = -1;
2137		state->m_vdp1.framebuffer_double_interlace = -1;
	2113	m_vdp1.framebuffer_mode = -1;
	2114	m_vdp1.framebuffer_double_interlace = -1;
2138	2115
2139		stv_set_framebuffer_config(machine);
	2116	stv_set_framebuffer_config();
2140	2117
2141	2118	for (offset = 0; offset < 0x80000/4; offset++ )
2142	2119	{
2143		data = state->m_vdp1_vram[offset];
	2120	data = m_vdp1_vram[offset];
2144	2121	/* put in gfx region for easy decoding */
2145	2122	vdp1[offset*4+0] = (data & 0xff000000) >> 24;
2146	2123	vdp1[offset*4+1] = (data & 0x00ff0000) >> 16;
r20790	r20791
2149	2126	}
2150	2127	}
2151	2128
2152		int stv_vdp1_start ( running_machine &machine )
	2129	int saturn_state::stv_vdp1_start ( void )
2153	2130	{
2154		saturn_state *state = machine.driver_data<saturn_state>();
2155		state->m_vdp1_regs = auto_alloc_array_clear(machine, UINT16, 0x020/2 );
2156		state->m_vdp1_vram = auto_alloc_array_clear(machine, UINT32, 0x100000/4 );
2157		state->m_vdp1.gfx_decode = auto_alloc_array(machine, UINT8, 0x100000 );
	2131	m_vdp1_regs = auto_alloc_array_clear(machine(), UINT16, 0x020/2 );
	2132	m_vdp1_vram = auto_alloc_array_clear(machine(), UINT32, 0x100000/4 );
	2133	m_vdp1.gfx_decode = auto_alloc_array(machine(), UINT8, 0x100000 );
2158	2134
2159		stv_vdp1_shading_data = auto_alloc(machine, struct stv_vdp1_poly_scanline_data);
	2135	stv_vdp1_shading_data = auto_alloc(machine(), struct stv_vdp1_poly_scanline_data);
2160	2136
2161		state->m_vdp1.framebuffer[0] = auto_alloc_array(machine, UINT16, 1024 * 256 * 2 ); /* *2 is for double interlace */
2162		state->m_vdp1.framebuffer[1] = auto_alloc_array(machine, UINT16, 1024 * 256 * 2 );
	2137	m_vdp1.framebuffer[0] = auto_alloc_array(machine(), UINT16, 1024 * 256 * 2 ); /* *2 is for double interlace */
	2138	m_vdp1.framebuffer[1] = auto_alloc_array(machine(), UINT16, 1024 * 256 * 2 );
2163	2139
2164		state->m_vdp1.framebuffer_display_lines = auto_alloc_array(machine, UINT16 *, 512);
2165		state->m_vdp1.framebuffer_draw_lines = auto_alloc_array(machine, UINT16 *, 512);
	2140	m_vdp1.framebuffer_display_lines = auto_alloc_array(machine(), UINT16 *, 512);
	2141	m_vdp1.framebuffer_draw_lines = auto_alloc_array(machine(), UINT16 *, 512);
2166	2142
2167		state->m_vdp1.framebuffer_width = state->m_vdp1.framebuffer_height = 0;
2168		state->m_vdp1.framebuffer_mode = -1;
2169		state->m_vdp1.framebuffer_double_interlace = -1;
2170		state->m_vdp1.fbcr_accessed = 0;
2171		state->m_vdp1.framebuffer_current_display = 0;
2172		state->m_vdp1.framebuffer_current_draw = 1;
2173		stv_clear_framebuffer(machine, state->m_vdp1.framebuffer_current_draw);
2174		state->m_vdp1.framebuffer_clear_on_next_frame = 0;
	2143	m_vdp1.framebuffer_width = m_vdp1.framebuffer_height = 0;
	2144	m_vdp1.framebuffer_mode = -1;
	2145	m_vdp1.framebuffer_double_interlace = -1;
	2146	m_vdp1.fbcr_accessed = 0;
	2147	m_vdp1.framebuffer_current_display = 0;
	2148	m_vdp1.framebuffer_current_draw = 1;
	2149	stv_clear_framebuffer(m_vdp1.framebuffer_current_draw);
	2150	m_vdp1.framebuffer_clear_on_next_frame = 0;
2175	2151
2176		state->m_vdp1.system_cliprect.set(0, 0, 0, 0);
	2152	m_vdp1.system_cliprect.set(0, 0, 0, 0);
2177	2153	/* Kidou Senshi Z Gundam - Zenpen Zeta no Kodou loves to use the user cliprect vars in an undefined state ... */
2178		state->m_vdp1.user_cliprect.set(0, 512, 0, 256);
	2154	m_vdp1.user_cliprect.set(0, 512, 0, 256);
2179	2155
2180	2156	// save state
2181		state_save_register_global_pointer(machine, state->m_vdp1_regs, 0x020/2);
2182		state_save_register_global_pointer(machine, state->m_vdp1_vram, 0x100000/4);
2183		state_save_register_global(machine, state->m_vdp1.fbcr_accessed);
2184		state_save_register_global(machine, state->m_vdp1.framebuffer_current_display);
2185		state_save_register_global(machine, state->m_vdp1.framebuffer_current_draw);
2186		state_save_register_global(machine, state->m_vdp1.framebuffer_clear_on_next_frame);
2187		state_save_register_global(machine, state->m_vdp1.local_x);
2188		state_save_register_global(machine, state->m_vdp1.local_y);
2189		machine.save().register_postload(save_prepost_delegate(FUNC(stv_vdp1_state_save_postload), &machine));
	2157	state_save_register_global_pointer(machine(), m_vdp1_regs, 0x020/2);
	2158	state_save_register_global_pointer(machine(), m_vdp1_vram, 0x100000/4);
	2159	state_save_register_global(machine(), m_vdp1.fbcr_accessed);
	2160	state_save_register_global(machine(), m_vdp1.framebuffer_current_display);
	2161	state_save_register_global(machine(), m_vdp1.framebuffer_current_draw);
	2162	state_save_register_global(machine(), m_vdp1.framebuffer_clear_on_next_frame);
	2163	state_save_register_global(machine(), m_vdp1.local_x);
	2164	state_save_register_global(machine(), m_vdp1.local_y);
	2165	machine().save().register_postload(save_prepost_delegate(FUNC(saturn_state::stv_vdp1_state_save_postload), this));
2190	2166	return 0;
2191	2167	}

trunk/src/mame/video/stvvdp2.c

r20790	r20791
104	104	#include "emu.h"
105	105	#include "includes/stv.h"
106	106
107		static UINT8 get_vblank(running_machine &machine);
108		static UINT8 get_hblank(running_machine &machine);
109		static int get_vblank_duration(running_machine &machine);
110		static int get_hblank_duration(running_machine &machine);
111		static int get_pixel_clock(running_machine &machine);
112		static UINT8 get_odd_bit(running_machine &machine);
113
114		static void refresh_palette_data(running_machine &machine);
115		static int stv_vdp2_window_process(running_machine &machine,int x,int y);
116		static int stv_vdp2_apply_window_on_layer(running_machine &machine,rectangle &cliprect);
117		static void stv_vdp2_get_window0_coordinates(running_machine &machine,UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y);
118		static void stv_vdp2_check_tilemap(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect);
119
120	107	enum
121	108	{
122	109	STV_TRANSPARENCY_NONE,
r20790	r20791
182	169	| LSMD1    | LSMD0    | VRESO1   | VRESO0   |    --    | HRESO2   | HRESO1   | HRESO0   |
183	170	\----------|----------|----------|----------|----------|----------|----------|---------*/
184	171
185		#define STV_VDP2_TVMD   (state->m_vdp2_regs[0x000/2])
	172	#define STV_VDP2_TVMD   (m_vdp2_regs[0x000/2])
186	173
187	174	#define STV_VDP2_DISP   ((STV_VDP2_TVMD & 0x8000) >> 15)
188	175	#define STV_VDP2_BDCLMD ((STV_VDP2_TVMD & 0x0100) >> 8)
r20790	r20791
197	184	|    --    |    --    |    --    |    --    |    --    |    --    | DASEL    | EXBGEN   |
198	185	\----------|----------|----------|----------|----------|----------|----------|---------*/
199	186
200		#define STV_VDP2_EXTEN  (state->m_vdp2_regs[0x002/2])
	187	#define STV_VDP2_EXTEN  (m_vdp2_regs[0x002/2])
201	188
202	189	#define STV_VDP2_EXLTEN ((STV_VDP2_EXTEN & 0x0200) >> 9)
203	190
r20790	r20791
215	202	|    --    |    --    |    --    |    --    | VER3     | VER2     | VER1     | VER0     |
216	203	\----------|----------|----------|----------|----------|----------|----------|---------*/
217	204
218		#define STV_VDP2_VRSIZE (state->m_vdp2_regs[0x006/2])
	205	#define STV_VDP2_VRSIZE (m_vdp2_regs[0x006/2])
219	206
220	207	#define STV_VDP2_VRAMSZ ((STV_VDP2_VRSIZE & 0x8000) >> 15)
221	208
r20790	r20791
226	213	| HCT7     | HCT6     | HCT5     | HCT4     | HCT3     | HCT2     | HCT1     | HCT0     |
227	214	\----------|----------|----------|----------|----------|----------|----------|---------*/
228	215
229		#define STV_VDP2_HCNT (state->m_vdp2_regs[0x008/2])
	216	#define STV_VDP2_HCNT (m_vdp2_regs[0x008/2])
230	217
231	218	/* 18000A - r/o - VCNT - V-Counter
232	219	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
235	222	| VCT7     | VCT6     | VCT5     | VCT4     | VCT3     | VCT2     | VCT1     | VCT0     |
236	223	\----------|----------|----------|----------|----------|----------|----------|---------*/
237	224
238		#define STV_VDP2_VCNT (state->m_vdp2_regs[0x00a/2])
	225	#define STV_VDP2_VCNT (m_vdp2_regs[0x00a/2])
239	226
240	227	/* 18000C - RESERVED
241	228	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
251	238	| RDBSB11  | RDBSB10  | RDBSB01  | RDBSB00  | RDBSA11  | RDBSA10  | RDBSA01  | RDBSA00  |
252	239	\----------|----------|----------|----------|----------|----------|----------|---------*/
253	240
254		#define STV_VDP2_RAMCTL (state->m_vdp2_regs[0x00e/2])
	241	#define STV_VDP2_RAMCTL (m_vdp2_regs[0x00e/2])
255	242
256	243	#define STV_VDP2_CRKTE ((STV_VDP2_RAMCTL & 0x8000) >> 15)
257	244	#define STV_VDP2_CRMD  ((STV_VDP2_RAMCTL & 0x3000) >> 12)
r20790	r20791
268	255	| VCP2A03  | VCP2A02  | VCP2A01  | VCP2A00  | VCP3A03  | VCP3A02  | VCP3A01  | VCP3A00  |
269	256	\----------|----------|----------|----------|----------|----------|----------|---------*/
270	257
271		#define STV_VDP2_CYCA0L (state->m_vdp2_regs[0x010/2])
	258	#define STV_VDP2_CYCA0L (m_vdp2_regs[0x010/2])
272	259
273	260	/* 180012 - r/w - -CYCA0U - VRAM CYCLE PATTERN (BANK A0)
274	261	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
277	264	| VCP6A03  | VCP6A02  | VCP6A01  | VCP6A00  | VCP7A03  | VCP7A02  | VCP7A01  | VCP7A00  |
278	265	\----------|----------|----------|----------|----------|----------|----------|---------*/
279	266
280		#define STV_VDP2_CYCA0U (state->m_vdp2_regs[0x012/2])
	267	#define STV_VDP2_CYCA0U (m_vdp2_regs[0x012/2])
281	268
282	269	/* 180014 - r/w - -CYCA1L - VRAM CYCLE PATTERN (BANK A1)
283	270	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
286	273	| VCP2A13  | VCP2A12  | VCP2A11  | VCP2A10  | VCP3A13  | VCP3A12  | VCP3A11  | VCP3A10  |
287	274	\----------|----------|----------|----------|----------|----------|----------|---------*/
288	275
289		#define STV_VDP2_CYCA1L (state->m_vdp2_regs[0x014/2])
	276	#define STV_VDP2_CYCA1L (m_vdp2_regs[0x014/2])
290	277
291	278	/* 180016 - r/w - -CYCA1U - VRAM CYCLE PATTERN (BANK A1)
292	279	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
295	282	| VCP6A13  | VCP6A12  | VCP6A11  | VCP6A10  | VCP7A13  | VCP7A12  | VCP7A11  | VCP7A10  |
296	283	\----------|----------|----------|----------|----------|----------|----------|---------*/
297	284
298		#define STV_VDP2_CYCA1U (state->m_vdp2_regs[0x016/2])
	285	#define STV_VDP2_CYCA1U (m_vdp2_regs[0x016/2])
299	286
300	287	/* 180018 - r/w - -CYCB0L - VRAM CYCLE PATTERN (BANK B0)
301	288	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
304	291	| VCP2B03  | VCP2B02  | VCP2B01  | VCP2B00  | VCP3B03  | VCP3B02  | VCP3B01  | VCP3B00  |
305	292	\----------|----------|----------|----------|----------|----------|----------|---------*/
306	293
307		#define STV_VDP2_CYCA2L (state->m_vdp2_regs[0x018/2])
	294	#define STV_VDP2_CYCA2L (m_vdp2_regs[0x018/2])
308	295
309	296	/* 18001A - r/w - -CYCB0U - VRAM CYCLE PATTERN (BANK B0)
310	297	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
313	300	| VCP6B03  | VCP6B02  | VCP6B01  | VCP6B00  | VCP7B03  | VCP7B02  | VCP7B01  | VCP7B00  |
314	301	\----------|----------|----------|----------|----------|----------|----------|---------*/
315	302
316		#define STV_VDP2_CYCA2U (state->m_vdp2_regs[0x01a/2])
	303	#define STV_VDP2_CYCA2U (m_vdp2_regs[0x01a/2])
317	304
318	305	/* 18001C - r/w - -CYCB1L - VRAM CYCLE PATTERN (BANK B1)
319	306	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
322	309	| VCP2B13  | VCP2B12  | VCP2B11  | VCP2B10  | VCP3B13  | VCP3B12  | VCP3B11  | VCP3B10  |
323	310	\----------|----------|----------|----------|----------|----------|----------|---------*/
324	311
325		#define STV_VDP2_CYCA3L (state->m_vdp2_regs[0x01c/2])
	312	#define STV_VDP2_CYCA3L (m_vdp2_regs[0x01c/2])
326	313
327	314	/* 18001E - r/w - -CYCB1U - VRAM CYCLE PATTERN (BANK B1)
328	315	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
331	318	| VCP6B13  | VCP6B12  | VCP6B11  | VCP6B10  | VCP7B13  | VCP7B12  | VCP7B11  | VCP7B10  |
332	319	\----------|----------|----------|----------|----------|----------|----------|---------*/
333	320
334		#define STV_VDP2_CYCA3U (state->m_vdp2_regs[0x01e/2])
	321	#define STV_VDP2_CYCA3U (m_vdp2_regs[0x01e/2])
335	322
336	323	/* 180020 - r/w - BGON - SCREEN DISPLAY ENABLE
337	324
r20790	r20791
343	330	|    --    |    --    | R1ON     | R0ON     | N3ON     | N2ON     | N1ON     | N0ON     |
344	331	\----------|----------|----------|----------|----------|----------|----------|---------*/
345	332
346		#define STV_VDP2_BGON (state->m_vdp2_regs[0x020/2])
	333	#define STV_VDP2_BGON (m_vdp2_regs[0x020/2])
347	334
348	335	// NxOn - Layer Enable Register
349	336	#define STV_VDP2_xxON ((STV_VDP2_BGON & 0x001f) >> 0) /* to see if anything is enabled */
r20790	r20791
370	357	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
371	358	\----------|----------|----------|----------|----------|----------|----------|---------*/
372	359
373		#define STV_VDP2_MZCTL (state->m_vdp2_regs[0x022/2])
	360	#define STV_VDP2_MZCTL (m_vdp2_regs[0x022/2])
374	361
375	362	#define STV_VDP2_MZSZV ((STV_VDP2_MZCTL & 0xf000) >> 12)
376	363	#define STV_VDP2_MZSZH ((STV_VDP2_MZCTL & 0x0f00) >> 8)
r20790	r20791
384	371
385	372	*/
386	373
387		#define STV_VDP2_SFSEL (state->m_vdp2_regs[0x024/2])
	374	#define STV_VDP2_SFSEL (m_vdp2_regs[0x024/2])
388	375
389	376	/*180026 - Special Function Code
390	377
391	378	*/
392	379
393		#define STV_VDP2_SFCODE (state->m_vdp2_regs[0x026/2])
	380	#define STV_VDP2_SFCODE (m_vdp2_regs[0x026/2])
394	381
395	382
396	383	/*
r20790	r20791
401	388	|    --    | N0CHCN2  | N0CHCN1  | N0CHCN0  | N0BMSZ1  | N0BMSZ0  | N0BMEN   | N0CHSZ   |
402	389	\----------|----------|----------|----------|----------|----------|----------|---------*/
403	390
404		#define STV_VDP2_CHCTLA (state->m_vdp2_regs[0x028/2])
	391	#define STV_VDP2_CHCTLA (m_vdp2_regs[0x028/2])
405	392
406	393	/* -------------------------- NBG0 Character Control Registers -------------------------- */
407	394
r20790	r20791
467	454	|    --    |    --    | N3CHCN   | N3CHSZ   |    --    |    --    | N2CHCN   | N2CHSZ   |
468	455	\----------|----------|----------|----------|----------|----------|----------|---------*/
469	456
470		#define STV_VDP2_CHCTLB (state->m_vdp2_regs[0x02a/2])
	457	#define STV_VDP2_CHCTLB (m_vdp2_regs[0x02a/2])
471	458
472	459	/* -------------------------- RBG0 Character Control Registers -------------------------- */
473	460
r20790	r20791
512	499	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
513	500	\----------|----------|----------|----------|----------|----------|----------|---------*/
514	501
515		#define STV_VDP2_BMPNA (state->m_vdp2_regs[0x02c/2])
	502	#define STV_VDP2_BMPNA (m_vdp2_regs[0x02c/2])
516	503
517	504	#define STV_VDP2_N1BMP ((STV_VDP2_BMPNA & 0x0700) >> 8)
518	505	#define STV_VDP2_N0BMP ((STV_VDP2_BMPNA & 0x0007) >> 0)
r20790	r20791
524	511	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
525	512	\----------|----------|----------|----------|----------|----------|----------|---------*/
526	513
527		#define STV_VDP2_BMPNB (state->m_vdp2_regs[0x02e/2])
	514	#define STV_VDP2_BMPNB (m_vdp2_regs[0x02e/2])
528	515
529	516	#define STV_VDP2_R0BMP ((STV_VDP2_BMPNB & 0x0007) >> 0)
530	517
r20790	r20791
535	522	| N0SPLT6  | N0SPLT5  | N0SPLT4  | N0SPCN4  | N0SPCN3  | N0SPCN2  | N0SPCN1  | N0SPCN0  |
536	523	\----------|----------|----------|----------|----------|----------|----------|---------*/
537	524
538		#define STV_VDP2_PNCN0 (state->m_vdp2_regs[0x030/2])
	525	#define STV_VDP2_PNCN0 (m_vdp2_regs[0x030/2])
539	526
540	527	/*  Pattern Data Size
541	528	0 = 2 bytes
r20790	r20791
566	553	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
567	554	\----------|----------|----------|----------|----------|----------|----------|---------*/
568	555
569		#define STV_VDP2_PNCN1 (state->m_vdp2_regs[0x032/2])
	556	#define STV_VDP2_PNCN1 (m_vdp2_regs[0x032/2])
570	557
571	558	/*  Pattern Data Size
572	559	0 = 2 bytes
r20790	r20791
598	585	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
599	586	\----------|----------|----------|----------|----------|----------|----------|---------*/
600	587
601		#define STV_VDP2_PNCN2 (state->m_vdp2_regs[0x034/2])
	588	#define STV_VDP2_PNCN2 (m_vdp2_regs[0x034/2])
602	589
603	590	/*  Pattern Data Size
604	591	0 = 2 bytes
r20790	r20791
630	617	| N3SPLT6  | N3SPLT5  | N3SPLT4  | N3SPCN4  | N3SPCN3  | N3SPCN2  | N3SPCN1  | N3SPCN0  |
631	618	\----------|----------|----------|----------|----------|----------|----------|---------*/
632	619
633		#define STV_VDP2_PNCN3 (state->m_vdp2_regs[0x036/2])
	620	#define STV_VDP2_PNCN3 (m_vdp2_regs[0x036/2])
634	621
635	622	/*  Pattern Data Size
636	623	0 = 2 bytes
r20790	r20791
662	649	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
663	650	\----------|----------|----------|----------|----------|----------|----------|---------*/
664	651
665		#define STV_VDP2_PNCR (state->m_vdp2_regs[0x038/2])
	652	#define STV_VDP2_PNCR (m_vdp2_regs[0x038/2])
666	653
667	654	/*  Pattern Data Size
668	655	0 = 2 bytes
r20790	r20791
693	680	| N3PLSZ1  | N3PLSZ0  |    --    |    --    | N1PLSZ1  | N1PLSZ0  | N0PLSZ1  | N0PLSZ0  |
694	681	\----------|----------|----------|----------|----------|----------|----------|---------*/
695	682
696		#define STV_VDP2_PLSZ (state->m_vdp2_regs[0x03a/2])
	683	#define STV_VDP2_PLSZ (m_vdp2_regs[0x03a/2])
697	684
698	685	/* NBG0 Plane Size
699	686	00 1H Page x 1V Page
r20790	r20791
716	703	|    --    | N1MP8    | N1MP7    | N1MP6    |    --    | N0MP8    | N0MP7    | N0MP6    |
717	704	\----------|----------|----------|----------|----------|----------|----------|---------*/
718	705
719		#define STV_VDP2_MPOFN_ (state->m_vdp2_regs[0x03c/2])
	706	#define STV_VDP2_MPOFN_ (m_vdp2_regs[0x03c/2])
720	707
721	708	/* Higher 3 bits of the map offset for each layer */
722	709	#define STV_VDP2_N3MP_ ((STV_VDP2_MPOFN_ & 0x3000) >> 12)
r20790	r20791
734	721	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
735	722	\----------|----------|----------|----------|----------|----------|----------|---------*/
736	723
737		#define STV_VDP2_MPOFR_ (state->m_vdp2_regs[0x03e/2])
	724	#define STV_VDP2_MPOFR_ (m_vdp2_regs[0x03e/2])
738	725
739	726	#define STV_VDP2_RBMP_ ((STV_VDP2_MPOFR_ & 0x0030) >> 4)
740	727	#define STV_VDP2_RAMP_ ((STV_VDP2_MPOFR_ & 0x0003) >> 0)
r20790	r20791
746	733	|    --    |    --    | N0MPA5   | N0MPA4   | N0MPA3   | N0MPA2   | N0MPA1   | N0MPA0   |
747	734	\----------|----------|----------|----------|----------|----------|----------|---------*/
748	735
749		#define STV_VDP2_MPABN0 (state->m_vdp2_regs[0x040/2])
	736	#define STV_VDP2_MPABN0 (m_vdp2_regs[0x040/2])
750	737
751	738	/* N0MPB5 = lower 6 bits of Map Address of Plane B of Tilemap NBG0 */
752	739	#define STV_VDP2_N0MPB ((STV_VDP2_MPABN0 & 0x3f00) >> 8)
r20790	r20791
762	749	|    --    |    --    | N0MPC5   | N0MPC4   | N0MPC3   | N0MPC2   | N0MPC1   | N0MPC0   |
763	750	\----------|----------|----------|----------|----------|----------|----------|---------*/
764	751
765		#define STV_VDP2_MPCDN0 (state->m_vdp2_regs[0x042/2])
	752	#define STV_VDP2_MPCDN0 (m_vdp2_regs[0x042/2])
766	753
767	754	/* N0MPB5 = lower 6 bits of Map Address of Plane D of Tilemap NBG0 */
768	755	#define STV_VDP2_N0MPD ((STV_VDP2_MPCDN0 & 0x3f00) >> 8)
r20790	r20791
778	765	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
779	766	\----------|----------|----------|----------|----------|----------|----------|---------*/
780	767
781		#define STV_VDP2_MPABN1 (state->m_vdp2_regs[0x044/2])
	768	#define STV_VDP2_MPABN1 (m_vdp2_regs[0x044/2])
782	769
783	770	/* N0MPB5 = lower 6 bits of Map Address of Plane B of Tilemap NBG1 */
784	771	#define STV_VDP2_N1MPB ((STV_VDP2_MPABN1 & 0x3f00) >> 8)
r20790	r20791
793	780	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
794	781	\----------|----------|----------|----------|----------|----------|----------|---------*/
795	782
796		#define STV_VDP2_MPCDN1 (state->m_vdp2_regs[0x046/2])
	783	#define STV_VDP2_MPCDN1 (m_vdp2_regs[0x046/2])
797	784
798	785	/* N0MPB5 = lower 6 bits of Map Address of Plane D of Tilemap NBG0 */
799	786	#define STV_VDP2_N1MPD ((STV_VDP2_MPCDN1 & 0x3f00) >> 8)
r20790	r20791
809	796	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
810	797	\----------|----------|----------|----------|----------|----------|----------|---------*/
811	798
812		#define STV_VDP2_MPABN2 (state->m_vdp2_regs[0x048/2])
	799	#define STV_VDP2_MPABN2 (m_vdp2_regs[0x048/2])
813	800
814	801	/* N0MPB5 = lower 6 bits of Map Address of Plane B of Tilemap NBG2 */
815	802	#define STV_VDP2_N2MPB ((STV_VDP2_MPABN2 & 0x3f00) >> 8)
r20790	r20791
824	811	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
825	812	\----------|----------|----------|----------|----------|----------|----------|---------*/
826	813
827		#define STV_VDP2_MPCDN2 (state->m_vdp2_regs[0x04a/2])
	814	#define STV_VDP2_MPCDN2 (m_vdp2_regs[0x04a/2])
828	815
829	816	/* N0MPB5 = lower 6 bits of Map Address of Plane D of Tilemap NBG2 */
830	817	#define STV_VDP2_N2MPD ((STV_VDP2_MPCDN2 & 0x3f00) >> 8)
r20790	r20791
839	826	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
840	827	\----------|----------|----------|----------|----------|----------|----------|---------*/
841	828
842		#define STV_VDP2_MPABN3 (state->m_vdp2_regs[0x04c/2])
	829	#define STV_VDP2_MPABN3 (m_vdp2_regs[0x04c/2])
843	830
844	831	/* N0MPB5 = lower 6 bits of Map Address of Plane B of Tilemap NBG1 */
845	832	#define STV_VDP2_N3MPB ((STV_VDP2_MPABN3 & 0x3f00) >> 8)
r20790	r20791
855	842	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
856	843	\----------|----------|----------|----------|----------|----------|----------|---------*/
857	844
858		#define STV_VDP2_MPCDN3 (state->m_vdp2_regs[0x04e/2])
	845	#define STV_VDP2_MPCDN3 (m_vdp2_regs[0x04e/2])
859	846
860	847	/* N0MPB5 = lower 6 bits of Map Address of Plane B of Tilemap NBG0 */
861	848	#define STV_VDP2_N3MPD ((STV_VDP2_MPCDN3 & 0x3f00) >> 8)
r20790	r20791
870	857	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
871	858	\----------|----------|----------|----------|----------|----------|----------|---------*/
872	859
873		#define STV_VDP2_MPABRA (state->m_vdp2_regs[0x050/2])
	860	#define STV_VDP2_MPABRA (m_vdp2_regs[0x050/2])
874	861
875	862	/* R0MPB5 = lower 6 bits of Map Address of Plane B of Tilemap RBG0 */
876	863	#define STV_VDP2_RAMPB ((STV_VDP2_MPABRA & 0x3f00) >> 8)
r20790	r20791
886	873	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
887	874	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
888	875	\----------|----------|----------|----------|----------|----------|----------|---------*/
889		#define STV_VDP2_MPCDRA (state->m_vdp2_regs[0x052/2])
	876	#define STV_VDP2_MPCDRA (m_vdp2_regs[0x052/2])
890	877
891	878	/* R0MPB5 = lower 6 bits of Map Address of Plane D of Tilemap RBG0 */
892	879	#define STV_VDP2_RAMPD ((STV_VDP2_MPCDRA & 0x3f00) >> 8)
r20790	r20791
900	887	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
901	888	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
902	889	\----------|----------|----------|----------|----------|----------|----------|---------*/
903		#define STV_VDP2_MPEFRA (state->m_vdp2_regs[0x054/2])
	890	#define STV_VDP2_MPEFRA (m_vdp2_regs[0x054/2])
904	891
905	892	/* R0MPB5 = lower 6 bits of Map Address of Plane F of Tilemap RBG0 */
906	893	#define STV_VDP2_RAMPF ((STV_VDP2_MPEFRA & 0x3f00) >> 8)
r20790	r20791
914	901	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
915	902	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
916	903	\----------|----------|----------|----------|----------|----------|----------|---------*/
917		#define STV_VDP2_MPGHRA (state->m_vdp2_regs[0x056/2])
	904	#define STV_VDP2_MPGHRA (m_vdp2_regs[0x056/2])
918	905
919	906	/* R0MPB5 = lower 6 bits of Map Address of Plane H of Tilemap RBG0 */
920	907	#define STV_VDP2_RAMPH ((STV_VDP2_MPGHRA & 0x3f00) >> 8)
r20790	r20791
928	915	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
929	916	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
930	917	\----------|----------|----------|----------|----------|----------|----------|---------*/
931		#define STV_VDP2_MPIJRA (state->m_vdp2_regs[0x058/2])
	918	#define STV_VDP2_MPIJRA (m_vdp2_regs[0x058/2])
932	919
933	920	/* R0MPB5 = lower 6 bits of Map Address of Plane J of Tilemap RBG0 */
934	921	#define STV_VDP2_RAMPJ ((STV_VDP2_MPIJRA & 0x3f00) >> 8)
r20790	r20791
942	929	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
943	930	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
944	931	\----------|----------|----------|----------|----------|----------|----------|---------*/
945		#define STV_VDP2_MPKLRA (state->m_vdp2_regs[0x05a/2])
	932	#define STV_VDP2_MPKLRA (m_vdp2_regs[0x05a/2])
946	933
947	934	/* R0MPB5 = lower 6 bits of Map Address of Plane L of Tilemap RBG0 */
948	935	#define STV_VDP2_RAMPL ((STV_VDP2_MPKLRA & 0x3f00) >> 8)
r20790	r20791
956	943	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
957	944	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
958	945	\----------|----------|----------|----------|----------|----------|----------|---------*/
959		#define STV_VDP2_MPMNRA (state->m_vdp2_regs[0x05c/2])
	946	#define STV_VDP2_MPMNRA (m_vdp2_regs[0x05c/2])
960	947
961	948	/* R0MPB5 = lower 6 bits of Map Address of Plane N of Tilemap RBG0 */
962	949	#define STV_VDP2_RAMPN ((STV_VDP2_MPMNRA & 0x3f00) >> 8)
r20790	r20791
970	957	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
971	958	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
972	959	\----------|----------|----------|----------|----------|----------|----------|---------*/
973		#define STV_VDP2_MPOPRA (state->m_vdp2_regs[0x05e/2])
	960	#define STV_VDP2_MPOPRA (m_vdp2_regs[0x05e/2])
974	961
975	962	/* R0MPB5 = lower 6 bits of Map Address of Plane P of Tilemap RBG0 */
976	963	#define STV_VDP2_RAMPP ((STV_VDP2_MPOPRA & 0x3f00) >> 8)
r20790	r20791
985	972	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
986	973	\----------|----------|----------|----------|----------|----------|----------|---------*/
987	974
988		#define STV_VDP2_MPABRB (state->m_vdp2_regs[0x060/2])
	975	#define STV_VDP2_MPABRB (m_vdp2_regs[0x060/2])
989	976
990	977	/* R0MPB5 = lower 6 bits of Map Address of Plane B of Tilemap RBG0 */
991	978	#define STV_VDP2_RBMPB ((STV_VDP2_MPABRB & 0x3f00) >> 8)
r20790	r20791
1001	988	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1002	989	\----------|----------|----------|----------|----------|----------|----------|---------*/
1003	990
1004		#define STV_VDP2_MPCDRB (state->m_vdp2_regs[0x062/2])
	991	#define STV_VDP2_MPCDRB (m_vdp2_regs[0x062/2])
1005	992
1006	993	/* R0MPD5 = lower 6 bits of Map Address of Plane D of Tilemap RBG0 */
1007	994	#define STV_VDP2_RBMPD ((STV_VDP2_MPCDRB & 0x3f00) >> 8)
r20790	r20791
1016	1003	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1017	1004	\----------|----------|----------|----------|----------|----------|----------|---------*/
1018	1005
1019		#define STV_VDP2_MPEFRB (state->m_vdp2_regs[0x064/2])
	1006	#define STV_VDP2_MPEFRB (m_vdp2_regs[0x064/2])
1020	1007
1021	1008	/* R0MPF5 = lower 6 bits of Map Address of Plane F of Tilemap RBG0 */
1022	1009	#define STV_VDP2_RBMPF ((STV_VDP2_MPEFRB & 0x3f00) >> 8)
r20790	r20791
1031	1018	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1032	1019	\----------|----------|----------|----------|----------|----------|----------|---------*/
1033	1020
1034		#define STV_VDP2_MPGHRB (state->m_vdp2_regs[0x066/2])
	1021	#define STV_VDP2_MPGHRB (m_vdp2_regs[0x066/2])
1035	1022
1036	1023	/* R0MPH5 = lower 6 bits of Map Address of Plane H of Tilemap RBG0 */
1037	1024	#define STV_VDP2_RBMPH ((STV_VDP2_MPGHRB & 0x3f00) >> 8)
r20790	r20791
1046	1033	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1047	1034	\----------|----------|----------|----------|----------|----------|----------|---------*/
1048	1035
1049		#define STV_VDP2_MPIJRB (state->m_vdp2_regs[0x068/2])
	1036	#define STV_VDP2_MPIJRB (m_vdp2_regs[0x068/2])
1050	1037
1051	1038	/* R0MPJ5 = lower 6 bits of Map Address of Plane J of Tilemap RBG0 */
1052	1039	#define STV_VDP2_RBMPJ ((STV_VDP2_MPIJRB & 0x3f00) >> 8)
r20790	r20791
1061	1048	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1062	1049	\----------|----------|----------|----------|----------|----------|----------|---------*/
1063	1050
1064		#define STV_VDP2_MPKLRB (state->m_vdp2_regs[0x06a/2])
	1051	#define STV_VDP2_MPKLRB (m_vdp2_regs[0x06a/2])
1065	1052
1066	1053	/* R0MPL5 = lower 6 bits of Map Address of Plane L of Tilemap RBG0 */
1067	1054	#define STV_VDP2_RBMPL ((STV_VDP2_MPKLRB & 0x3f00) >> 8)
r20790	r20791
1076	1063	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1077	1064	\----------|----------|----------|----------|----------|----------|----------|---------*/
1078	1065
1079		#define STV_VDP2_MPMNRB (state->m_vdp2_regs[0x06c/2])
	1066	#define STV_VDP2_MPMNRB (m_vdp2_regs[0x06c/2])
1080	1067
1081	1068	/* R0MPN5 = lower 6 bits of Map Address of Plane N of Tilemap RBG0 */
1082	1069	#define STV_VDP2_RBMPN ((STV_VDP2_MPMNRB & 0x3f00) >> 8)
r20790	r20791
1091	1078	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1092	1079	\----------|----------|----------|----------|----------|----------|----------|---------*/
1093	1080
1094		#define STV_VDP2_MPOPRB (state->m_vdp2_regs[0x06e/2])
	1081	#define STV_VDP2_MPOPRB (m_vdp2_regs[0x06e/2])
1095	1082
1096	1083	/* R0MPP5 = lower 6 bits of Map Address of Plane P of Tilemap RBG0 */
1097	1084	#define STV_VDP2_RBMPP ((STV_VDP2_MPOPRB & 0x3f00) >> 8)
r20790	r20791
1106	1093	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1107	1094	\----------|----------|----------|----------|----------|----------|----------|---------*/
1108	1095
1109		#define STV_VDP2_SCXIN0 (state->m_vdp2_regs[0x070/2])
	1096	#define STV_VDP2_SCXIN0 (m_vdp2_regs[0x070/2])
1110	1097
1111	1098
1112	1099	/* 180072 - Screen Scroll (NBG0, Horizontal Fractional Part)
r20790	r20791
1122	1109	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
1123	1110	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1124	1111	\----------|----------|----------|----------|----------|----------|----------|---------*/
1125		#define STV_VDP2_SCYIN0 (state->m_vdp2_regs[0x074/2])
	1112	#define STV_VDP2_SCYIN0 (m_vdp2_regs[0x074/2])
1126	1113
1127	1114
1128	1115	/* 180076 - Screen Scroll (NBG0, Vertical Fractional Part)
r20790	r20791
1139	1126	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1140	1127	\----------|----------|----------|----------|----------|----------|----------|---------*/
1141	1128
1142		#define STV_VDP2_ZMXIN0 (state->m_vdp2_regs[0x078/2])
	1129	#define STV_VDP2_ZMXIN0 (m_vdp2_regs[0x078/2])
1143	1130
1144	1131	#define STV_VDP2_N0ZMXI ((STV_VDP2_ZMXIN0 & 0x0007) >> 0)
1145	1132
r20790	r20791
1150	1137	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1151	1138	\----------|----------|----------|----------|----------|----------|----------|---------*/
1152	1139
1153		#define STV_VDP2_ZMXDN0 (state->m_vdp2_regs[0x07a/2])
	1140	#define STV_VDP2_ZMXDN0 (m_vdp2_regs[0x07a/2])
1154	1141
1155	1142	#define STV_VDP2_N0ZMXD ((STV_VDP2_ZMXDN0 >> 8)& 0xff)
1156	1143	#define STV_VDP2_ZMXN0  (((STV_VDP2_N0ZMXI<<16) | (STV_VDP2_N0ZMXD<<8))  & 0x0007ff00)
r20790	r20791
1163	1150	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1164	1151	\----------|----------|----------|----------|----------|----------|----------|---------*/
1165	1152
1166		#define STV_VDP2_ZMYIN0 (state->m_vdp2_regs[0x07c/2])
	1153	#define STV_VDP2_ZMYIN0 (m_vdp2_regs[0x07c/2])
1167	1154
1168	1155	#define STV_VDP2_N0ZMYI ((STV_VDP2_ZMYIN0 & 0x0007) >> 0)
1169	1156
r20790	r20791
1174	1161	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1175	1162	\----------|----------|----------|----------|----------|----------|----------|---------*/
1176	1163
1177		#define STV_VDP2_ZMYDN0 (state->m_vdp2_regs[0x07e/2])
	1164	#define STV_VDP2_ZMYDN0 (m_vdp2_regs[0x07e/2])
1178	1165
1179	1166	#define STV_VDP2_N0ZMYD ((STV_VDP2_ZMYDN0 >> 8)& 0xff)
1180	1167	#define STV_VDP2_ZMYN0  (((STV_VDP2_N0ZMYI<<16) | (STV_VDP2_N0ZMYD<<8))  & 0x0007ff00)
r20790	r20791
1186	1173	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1187	1174	\----------|----------|----------|----------|----------|----------|----------|---------*/
1188	1175
1189		#define STV_VDP2_SCXIN1 (state->m_vdp2_regs[0x080/2])
	1176	#define STV_VDP2_SCXIN1 (m_vdp2_regs[0x080/2])
1190	1177
1191	1178	/* 180082 - Screen Scroll (NBG1, Horizontal Fractional Part)
1192	1179	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1202	1189	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1203	1190	\----------|----------|----------|----------|----------|----------|----------|---------*/
1204	1191
1205		#define STV_VDP2_SCYIN1 (state->m_vdp2_regs[0x084/2])
	1192	#define STV_VDP2_SCYIN1 (m_vdp2_regs[0x084/2])
1206	1193
1207	1194	/* 180086 - Screen Scroll (NBG1, Vertical Fractional Part)
1208	1195	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1218	1205	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1219	1206	\----------|----------|----------|----------|----------|----------|----------|---------*/
1220	1207
1221		#define STV_VDP2_ZMXIN1 (state->m_vdp2_regs[0x088/2])
	1208	#define STV_VDP2_ZMXIN1 (m_vdp2_regs[0x088/2])
1222	1209
1223	1210	#define STV_VDP2_N1ZMXI ((STV_VDP2_ZMXIN1 & 0x0007) >> 0)
1224	1211
r20790	r20791
1229	1216	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1230	1217	\----------|----------|----------|----------|----------|----------|----------|---------*/
1231	1218
1232		#define STV_VDP2_ZMXDN1 (state->m_vdp2_regs[0x08a/2])
	1219	#define STV_VDP2_ZMXDN1 (m_vdp2_regs[0x08a/2])
1233	1220
1234	1221	#define STV_VDP2_N1ZMXD ((STV_VDP2_ZMXDN1 >> 8)& 0xff)
1235	1222	#define STV_VDP2_ZMXN1  (((STV_VDP2_N1ZMXI<<16) | (STV_VDP2_N1ZMXD<<8)) & 0x0007ff00)
r20790	r20791
1241	1228	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1242	1229	\----------|----------|----------|----------|----------|----------|----------|---------*/
1243	1230
1244		#define STV_VDP2_ZMYIN1 (state->m_vdp2_regs[0x08c/2])
	1231	#define STV_VDP2_ZMYIN1 (m_vdp2_regs[0x08c/2])
1245	1232
1246	1233	#define STV_VDP2_N1ZMYI ((STV_VDP2_ZMYIN1 & 0x0007) >> 0)
1247	1234
r20790	r20791
1252	1239	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1253	1240	\----------|----------|----------|----------|----------|----------|----------|---------*/
1254	1241
1255		#define STV_VDP2_ZMYDN1 (state->m_vdp2_regs[0x08e/2])
	1242	#define STV_VDP2_ZMYDN1 (m_vdp2_regs[0x08e/2])
1256	1243
1257	1244	#define STV_VDP2_N1ZMYD ((STV_VDP2_ZMYDN1 >> 8)& 0xff)
1258	1245	#define STV_VDP2_ZMYN1  (((STV_VDP2_N1ZMYI<<16) | (STV_VDP2_N1ZMYD<<8)) & 0x007ff00)
r20790	r20791
1264	1251	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1265	1252	\----------|----------|----------|----------|----------|----------|----------|---------*/
1266	1253
1267		#define STV_VDP2_SCXN2 (state->m_vdp2_regs[0x090/2])
	1254	#define STV_VDP2_SCXN2 (m_vdp2_regs[0x090/2])
1268	1255
1269	1256	/* 180092 - SCYN2 - Screen Scroll (NBG2, Vertical)
1270	1257	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1273	1260	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1274	1261	\----------|----------|----------|----------|----------|----------|----------|---------*/
1275	1262
1276		#define STV_VDP2_SCYN2 (state->m_vdp2_regs[0x092/2])
	1263	#define STV_VDP2_SCYN2 (m_vdp2_regs[0x092/2])
1277	1264
1278	1265	/* 180094 - SCXN3 - Screen Scroll (NBG3, Horizontal)
1279	1266	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1282	1269	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1283	1270	\----------|----------|----------|----------|----------|----------|----------|---------*/
1284	1271
1285		#define STV_VDP2_SCXN3 (state->m_vdp2_regs[0x094/2])
	1272	#define STV_VDP2_SCXN3 (m_vdp2_regs[0x094/2])
1286	1273
1287	1274	/* 180096 - SCYN3 - Screen Scroll (NBG3, Vertical)
1288	1275	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1291	1278	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1292	1279	\----------|----------|----------|----------|----------|----------|----------|---------*/
1293	1280
1294		#define STV_VDP2_SCYN3 (state->m_vdp2_regs[0x096/2])
	1281	#define STV_VDP2_SCYN3 (m_vdp2_regs[0x096/2])
1295	1282
1296	1283	/* 180098 - Reduction Enable
1297	1284	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1300	1287	|    --    |    --    |    --    |    --    |    --    |    --    | N0ZMQT   | N0ZMHF   |
1301	1288	\----------|----------|----------|----------|----------|----------|----------|---------*/
1302	1289
1303		#define STV_VDP2_ZMCTL (state->m_vdp2_regs[0x098/2])
	1290	#define STV_VDP2_ZMCTL (m_vdp2_regs[0x098/2])
1304	1291
1305	1292	#define STV_VDP2_N1ZMQT  ((STV_VDP2_ZMCTL & 0x0200) >> 9)
1306	1293	#define STV_VDP2_N1ZMHF  ((STV_VDP2_ZMCTL & 0x0100) >> 8)
r20790	r20791
1314	1301	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1315	1302	\----------|----------|----------|----------|----------|----------|----------|---------*/
1316	1303
1317		#define STV_VDP2_SCRCTL (state->m_vdp2_regs[0x09a/2])
	1304	#define STV_VDP2_SCRCTL (m_vdp2_regs[0x09a/2])
1318	1305
1319	1306	#define STV_VDP2_N1LSS  ((STV_VDP2_SCRCTL & 0x3000) >> 12)
1320	1307	#define STV_VDP2_N1LZMX ((STV_VDP2_SCRCTL & 0x0800) >> 11)
r20790	r20791
1334	1321	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1335	1322	\----------|----------|----------|----------|----------|----------|----------|---------*/
1336	1323
1337		#define STV_VDP2_VCSTAU (state->m_vdp2_regs[0x09c/2] & 7)
	1324	#define STV_VDP2_VCSTAU (m_vdp2_regs[0x09c/2] & 7)
1338	1325
1339	1326
1340	1327	/* 18009e - Vertical Cell Table Address (NBG0, NBG1)
r20790	r20791
1344	1331	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1345	1332	\----------|----------|----------|----------|----------|----------|----------|---------*/
1346	1333
1347		#define STV_VDP2_VCSTAL (state->m_vdp2_regs[0x09e/2])
	1334	#define STV_VDP2_VCSTAL (m_vdp2_regs[0x09e/2])
1348	1335
1349	1336
1350	1337	/* 1800a0 - LSTA0U - Line Scroll Table Address (NBG0)
r20790	r20791
1355	1342	\----------|----------|----------|----------|----------|----------|----------|---------*/
1356	1343
1357	1344	/*bit 2 unused when VRAM = 4 Mbits*/
1358		#define STV_VDP2_LSTA0U (state->m_vdp2_regs[0x0a0/2] & 7)
	1345	#define STV_VDP2_LSTA0U (m_vdp2_regs[0x0a0/2] & 7)
1359	1346
1360	1347	/* 1800a2 - LSTA0L - Line Scroll Table Address (NBG0)
1361	1348	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1364	1351	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1365	1352	\----------|----------|----------|----------|----------|----------|----------|---------*/
1366	1353
1367		#define STV_VDP2_LSTA0L (state->m_vdp2_regs[0x0a2/2])
	1354	#define STV_VDP2_LSTA0L (m_vdp2_regs[0x0a2/2])
1368	1355
1369	1356	/* 1800a4 - LSTA1U - Line Scroll Table Address (NBG1)
1370	1357	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1374	1361	\----------|----------|----------|----------|----------|----------|----------|---------*/
1375	1362
1376	1363	/*bit 2 unused when VRAM = 4 Mbits*/
1377		#define STV_VDP2_LSTA1U (state->m_vdp2_regs[0x0a4/2] & 7)
	1364	#define STV_VDP2_LSTA1U (m_vdp2_regs[0x0a4/2] & 7)
1378	1365
1379	1366	/* 1800a6 - LSTA1L - Line Scroll Table Address (NBG1)
1380	1367	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1383	1370	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1384	1371	\----------|----------|----------|----------|----------|----------|----------|---------*/
1385	1372
1386		#define STV_VDP2_LSTA1L (state->m_vdp2_regs[0x0a6/2])
	1373	#define STV_VDP2_LSTA1L (m_vdp2_regs[0x0a6/2])
1387	1374
1388	1375	/* 1800a8 - LCTAU - Line Colour Screen Table Address
1389	1376	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1392	1379	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1393	1380	\----------|----------|----------|----------|----------|----------|----------|---------*/
1394	1381
1395		#define STV_VDP2_LCTAU  (state->m_vdp2_regs[0x0a8/2])
	1382	#define STV_VDP2_LCTAU  (m_vdp2_regs[0x0a8/2])
1396	1383	#define STV_VDP2_LCCLMD ((STV_VDP2_LCTAU & 0x8000) >> 15)
1397	1384
1398	1385	/* 1800aa - LCTAL - Line Colour Screen Table Address
r20790	r20791
1401	1388	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
1402	1389	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1403	1390	\----------|----------|----------|----------|----------|----------|----------|---------*/
1404		#define STV_VDP2_LCTAL  (state->m_vdp2_regs[0x0aa/2])
	1391	#define STV_VDP2_LCTAL  (m_vdp2_regs[0x0aa/2])
1405	1392
1406	1393	#define STV_VDP2_LCTA   (((STV_VDP2_LCTAU & 0x0007) << 16) | (STV_VDP2_LCTAL & 0xffff))
1407	1394
r20790	r20791
1412	1399	|    --    |    --    |    --    |    --    |    --    |  BKTA18  |  BKTA17  |  BKTA16  |
1413	1400	\----------|----------|----------|----------|----------|----------|----------|---------*/
1414	1401
1415		#define STV_VDP2_BKTAU  (state->m_vdp2_regs[0x0ac/2])
	1402	#define STV_VDP2_BKTAU  (m_vdp2_regs[0x0ac/2])
1416	1403
1417	1404	#define STV_VDP2_BKCLMD ((STV_VDP2_BKTAU & 0x8000) >> 15)
1418	1405
r20790	r20791
1424	1411	|  BKTA7   |  BKTA7   |  BKTA6   |  BKTA5   |  BKTA4   |  BKTA3   |  BKTA2   |  BKTA0   |
1425	1412	\----------|----------|----------|----------|----------|----------|----------|---------*/
1426	1413
1427		#define STV_VDP2_BKTAL  (state->m_vdp2_regs[0x0ae/2])
	1414	#define STV_VDP2_BKTAL  (m_vdp2_regs[0x0ae/2])
1428	1415
1429	1416	#define STV_VDP2_BKTA   (((STV_VDP2_BKTAU & 0x0007) << 16) | (STV_VDP2_BKTAL & 0xffff))
1430	1417
r20790	r20791
1435	1422	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1436	1423	\----------|----------|----------|----------|----------|----------|----------|---------*/
1437	1424
1438		#define STV_VDP2_RPMD   ((state->m_vdp2_regs[0x0b0/2]) & 0x0003)
	1425	#define STV_VDP2_RPMD   ((m_vdp2_regs[0x0b0/2]) & 0x0003)
1439	1426
1440	1427	/* 1800b2 - RPRCTL - Rotation Parameter Read Control
1441	1428	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1444	1431	|    --    |    --    |    --    |    --    |    --    | RAKASTRE | RAYSTRE  | RBXSTRE  |
1445	1432	\----------|----------|----------|----------|----------|----------|----------|---------*/
1446	1433
1447		#define STV_VDP2_RPRCTL     (state->m_vdp2_regs[0x0b2/2])
	1434	#define STV_VDP2_RPRCTL     (m_vdp2_regs[0x0b2/2])
1448	1435	#define STV_VDP2_RBKASTRE   ((STV_VDP2_RPRCTL & 0x0400) >> 10)
1449	1436	#define STV_VDP2_RBYSTRE    ((STV_VDP2_RPRCTL & 0x0200) >> 9)
1450	1437	#define STV_VDP2_RBXSTRE    ((STV_VDP2_RPRCTL & 0x0100) >> 8)
r20790	r20791
1459	1446	|    --    |    --    |    --    |  RAKLCE  |  RAKMD1  |  RAKMD0  |  RAKDBS  |   RAKTE  |
1460	1447	\----------|----------|----------|----------|----------|----------|----------|---------*/
1461	1448
1462		#define STV_VDP2_KTCTL  (state->m_vdp2_regs[0x0b4/2])
	1449	#define STV_VDP2_KTCTL  (m_vdp2_regs[0x0b4/2])
1463	1450	#define STV_VDP2_RBKLCE ((STV_VDP2_KTCTL & 0x1000) >> 12)
1464	1451	#define STV_VDP2_RBKMD  ((STV_VDP2_KTCTL & 0x0c00) >> 10)
1465	1452	#define STV_VDP2_RBKDBS ((STV_VDP2_KTCTL & 0x0200) >> 9)
r20790	r20791
1476	1463	|    --    |    --    |    --    |    --    |    --    | RAKTAOS2 | RAKTAOS1 | RAKTAOS0 |
1477	1464	\----------|----------|----------|----------|----------|----------|----------|---------*/
1478	1465
1479		#define STV_VDP2_KTAOF  (state->m_vdp2_regs[0x0b6/2])
	1466	#define STV_VDP2_KTAOF  (m_vdp2_regs[0x0b6/2])
1480	1467	#define STV_VDP2_RBKTAOS ((STV_VDP2_KTAOF & 0x0700) >> 8)
1481	1468	#define STV_VDP2_RAKTAOS ((STV_VDP2_KTAOF & 0x0007) >> 0)
1482	1469
r20790	r20791
1487	1474	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1488	1475	\----------|----------|----------|----------|----------|----------|----------|---------*/
1489	1476
1490		#define STV_VDP2_OVPNRA (state->m_vdp2_regs[0x0b8/2])
	1477	#define STV_VDP2_OVPNRA (m_vdp2_regs[0x0b8/2])
1491	1478
1492	1479	/* 1800ba - Screen Over Pattern Name (Rotation Parameter B)
1493	1480	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1496	1483	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1497	1484	\----------|----------|----------|----------|----------|----------|----------|---------*/
1498	1485
1499		#define STV_VDP2_OVPNRB (state->m_vdp2_regs[0x0ba/2])
	1486	#define STV_VDP2_OVPNRB (m_vdp2_regs[0x0ba/2])
1500	1487
1501	1488	/* 1800bc - RPTAU - Rotation Parameter Table Address (Rotation Parameter A,B)
1502	1489	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1504	1491	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
1505	1492	|    --    |    --    |    --    |    --    |    --    |  RPTA18  |  RPTA17  |  RPTA16  |
1506	1493	\----------|----------|----------|----------|----------|----------|----------|---------*/
1507		#define STV_VDP2_RPTAU  (state->m_vdp2_regs[0x0bc/2] & 7)
	1494	#define STV_VDP2_RPTAU  (m_vdp2_regs[0x0bc/2] & 7)
1508	1495
1509	1496	/* 1800be - RPTAL - Rotation Parameter Table Address (Rotation Parameter A,B)
1510	1497	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1513	1500	|   RPTA7  |   RPTA6  |   RPTA5  |   RPTA4  |   RPTA3  |   RPTA2  |   RPTA1  |    --    |
1514	1501	\----------|----------|----------|----------|----------|----------|----------|---------*/
1515	1502
1516		#define STV_VDP2_RPTAL  (state->m_vdp2_regs[0x0be/2] & 0x0000ffff)
	1503	#define STV_VDP2_RPTAL  (m_vdp2_regs[0x0be/2] & 0x0000ffff)
1517	1504
1518	1505	/* 1800c0 - Window Position (W0, Horizontal Start Point)
1519	1506	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1522	1509	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1523	1510	\----------|----------|----------|----------|----------|----------|----------|---------*/
1524	1511
1525		#define STV_VDP2_WPSX0 (state->m_vdp2_regs[0x0c0/2])
	1512	#define STV_VDP2_WPSX0 (m_vdp2_regs[0x0c0/2])
1526	1513
1527	1514	#define STV_VDP2_W0SX ((STV_VDP2_WPSX0 & 0x03ff) >> 0)
1528	1515
r20790	r20791
1533	1520	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1534	1521	\----------|----------|----------|----------|----------|----------|----------|---------*/
1535	1522
1536		#define STV_VDP2_WPSY0 (state->m_vdp2_regs[0x0c2/2])
	1523	#define STV_VDP2_WPSY0 (m_vdp2_regs[0x0c2/2])
1537	1524
1538	1525	#define STV_VDP2_W0SY ((STV_VDP2_WPSY0 & 0x03ff) >> 0)
1539	1526
r20790	r20791
1544	1531	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1545	1532	\----------|----------|----------|----------|----------|----------|----------|---------*/
1546	1533
1547		#define STV_VDP2_WPEX0 (state->m_vdp2_regs[0x0c4/2])
	1534	#define STV_VDP2_WPEX0 (m_vdp2_regs[0x0c4/2])
1548	1535
1549	1536	#define STV_VDP2_W0EX ((STV_VDP2_WPEX0 & 0x03ff) >> 0)
1550	1537
r20790	r20791
1555	1542	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1556	1543	\----------|----------|----------|----------|----------|----------|----------|---------*/
1557	1544
1558		#define STV_VDP2_WPEY0 (state->m_vdp2_regs[0x0c6/2])
	1545	#define STV_VDP2_WPEY0 (m_vdp2_regs[0x0c6/2])
1559	1546
1560	1547	#define STV_VDP2_W0EY ((STV_VDP2_WPEY0 & 0x03ff) >> 0)
1561	1548
r20790	r20791
1566	1553	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1567	1554	\----------|----------|----------|----------|----------|----------|----------|---------*/
1568	1555
1569		#define STV_VDP2_WPSX1 (state->m_vdp2_regs[0x0c8/2])
	1556	#define STV_VDP2_WPSX1 (m_vdp2_regs[0x0c8/2])
1570	1557
1571	1558	#define STV_VDP2_W1SX ((STV_VDP2_WPSX1 & 0x03ff) >> 0)
1572	1559
r20790	r20791
1577	1564	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1578	1565	\----------|----------|----------|----------|----------|----------|----------|---------*/
1579	1566
1580		#define STV_VDP2_WPSY1 (state->m_vdp2_regs[0x0ca/2])
	1567	#define STV_VDP2_WPSY1 (m_vdp2_regs[0x0ca/2])
1581	1568
1582	1569	#define STV_VDP2_W1SY ((STV_VDP2_WPSY1 & 0x03ff) >> 0)
1583	1570
r20790	r20791
1588	1575	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1589	1576	\----------|----------|----------|----------|----------|----------|----------|---------*/
1590	1577
1591		#define STV_VDP2_WPEX1 (state->m_vdp2_regs[0x0cc/2])
	1578	#define STV_VDP2_WPEX1 (m_vdp2_regs[0x0cc/2])
1592	1579
1593	1580	#define STV_VDP2_W1EX ((STV_VDP2_WPEX1 & 0x03ff) >> 0)
1594	1581
r20790	r20791
1599	1586	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1600	1587	\----------|----------|----------|----------|----------|----------|----------|---------*/
1601	1588
1602		#define STV_VDP2_WPEY1 (state->m_vdp2_regs[0x0ce/2])
	1589	#define STV_VDP2_WPEY1 (m_vdp2_regs[0x0ce/2])
1603	1590
1604	1591	#define STV_VDP2_W1EY ((STV_VDP2_WPEY1 & 0x03ff) >> 0)
1605	1592
r20790	r20791
1610	1597	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1611	1598	\----------|----------|----------|----------|----------|----------|----------|---------*/
1612	1599
1613		#define STV_VDP2_WCTLA (state->m_vdp2_regs[0x0d0/2])
	1600	#define STV_VDP2_WCTLA (m_vdp2_regs[0x0d0/2])
1614	1601	#define STV_VDP2_N1LOG ((STV_VDP2_WCTLA & 0x8000) >> 15)
1615	1602	#define STV_VDP2_N1SWE ((STV_VDP2_WCTLA & 0x2000) >> 13)
1616	1603	#define STV_VDP2_N1SWA ((STV_VDP2_WCTLA & 0x1000) >> 12)
r20790	r20791
1633	1620	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1634	1621	\----------|----------|----------|----------|----------|----------|----------|---------*/
1635	1622
1636		#define STV_VDP2_WCTLB (state->m_vdp2_regs[0x0d2/2])
	1623	#define STV_VDP2_WCTLB (m_vdp2_regs[0x0d2/2])
1637	1624	#define STV_VDP2_N3LOG ((STV_VDP2_WCTLB & 0x8000) >> 15)
1638	1625	#define STV_VDP2_N3SWE ((STV_VDP2_WCTLB & 0x2000) >> 13)
1639	1626	#define STV_VDP2_N3SWA ((STV_VDP2_WCTLB & 0x1000) >> 12)
r20790	r20791
1656	1643	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1657	1644	\----------|----------|----------|----------|----------|----------|----------|---------*/
1658	1645
1659		#define STV_VDP2_WCTLC (state->m_vdp2_regs[0x0d4/2])
	1646	#define STV_VDP2_WCTLC (m_vdp2_regs[0x0d4/2])
1660	1647	#define STV_VDP2_SPLOG ((STV_VDP2_WCTLC & 0x8000) >> 15)
1661	1648	#define STV_VDP2_SPSWE ((STV_VDP2_WCTLC & 0x2000) >> 13)
1662	1649	#define STV_VDP2_SPSWA ((STV_VDP2_WCTLC & 0x1000) >> 12)
r20790	r20791
1679	1666	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1680	1667	\----------|----------|----------|----------|----------|----------|----------|---------*/
1681	1668
1682		#define STV_VDP2_WCTLD (state->m_vdp2_regs[0x0d6/2])
	1669	#define STV_VDP2_WCTLD (m_vdp2_regs[0x0d6/2])
1683	1670	#define STV_VDP2_CCLOG ((STV_VDP2_WCTLD & 0x8000) >> 15)
1684	1671	#define STV_VDP2_CCSWE ((STV_VDP2_WCTLD & 0x2000) >> 13)
1685	1672	#define STV_VDP2_CCSWA ((STV_VDP2_WCTLD & 0x1000) >> 12)
r20790	r20791
1700	1687	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1701	1688	\----------|----------|----------|----------|----------|----------|----------|---------*/
1702	1689
1703		#define STV_VDP2_LWTA0U (state->m_vdp2_regs[0x0d8/2])
	1690	#define STV_VDP2_LWTA0U (m_vdp2_regs[0x0d8/2])
1704	1691
1705	1692	#define STV_VDP2_W0LWE  ((STV_VDP2_LWTA0U & 0x8000) >> 15)
1706	1693
r20790	r20791
1711	1698	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1712	1699	\----------|----------|----------|----------|----------|----------|----------|---------*/
1713	1700
1714		#define STV_VDP2_LWTA0L (state->m_vdp2_regs[0x0da/2])
	1701	#define STV_VDP2_LWTA0L (m_vdp2_regs[0x0da/2])
1715	1702
1716	1703	/* bit 19 isn't used when VRAM = 4 Mbit */
1717	1704	#define STV_VDP2_W0LWTA (((STV_VDP2_LWTA0U & 0x0007) << 16) | (STV_VDP2_LWTA0L & 0xfffe))
r20790	r20791
1724	1711	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1725	1712	\----------|----------|----------|----------|----------|----------|----------|---------*/
1726	1713
1727		#define STV_VDP2_LWTA1U (state->m_vdp2_regs[0x0dc/2])
	1714	#define STV_VDP2_LWTA1U (m_vdp2_regs[0x0dc/2])
1728	1715
1729	1716	#define STV_VDP2_W1LWE  ((STV_VDP2_LWTA0U & 0x8000) >> 15)
1730	1717
r20790	r20791
1736	1723	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1737	1724	\----------|----------|----------|----------|----------|----------|----------|---------*/
1738	1725
1739		#define STV_VDP2_LWTA1L (state->m_vdp2_regs[0x0de/2])
	1726	#define STV_VDP2_LWTA1L (m_vdp2_regs[0x0de/2])
1740	1727
1741	1728	/* bit 19 isn't used when VRAM = 4 Mbit */
1742	1729	#define STV_VDP2_W1LWTA (((STV_VDP2_LWTA1U & 0x0007) << 16) | (STV_VDP2_LWTA1L & 0xfffe))
r20790	r20791
1749	1736	|    --    |    --    |  SPCLMD  | SPWINEN  |  SPTYPE3 |  SPTYPE2 |  SPTYPE1 |  SPTYPE0 |
1750	1737	\----------|----------|----------|----------|----------|----------|----------|---------*/
1751	1738
1752		#define STV_VDP2_SPCTL  (state->m_vdp2_regs[0xe0/2])
	1739	#define STV_VDP2_SPCTL  (m_vdp2_regs[0xe0/2])
1753	1740	#define STV_VDP2_SPCCCS     ((STV_VDP2_SPCTL & 0x3000) >> 12)
1754	1741	#define STV_VDP2_SPCCN      ((STV_VDP2_SPCTL & 0x700) >> 8)
1755	1742	#define STV_VDP2_SPCLMD     ((STV_VDP2_SPCTL & 0x20) >> 5)
r20790	r20791
1763	1750	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1764	1751	\----------|----------|----------|----------|----------|----------|----------|---------*/
1765	1752
1766		#define STV_VDP2_SDCTL  (state->m_vdp2_regs[0x0e2/2])
	1753	#define STV_VDP2_SDCTL  (m_vdp2_regs[0x0e2/2])
1767	1754
1768	1755	/* 1800e4 - CRAOFA - Colour Ram Address Offset (NBG0 - NBG3)
1769	1756	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1772	1759	|    --    | N1CAOS2  | N1CAOS1  | N1CAOS0  |    --    | N0CAOS2  | N0CAOS1  | N0CAOS0  |
1773	1760	\----------|----------|----------|----------|----------|----------|----------|---------*/
1774	1761
1775		#define STV_VDP2_CRAOFA (state->m_vdp2_regs[0x0e4/2])
	1762	#define STV_VDP2_CRAOFA (m_vdp2_regs[0x0e4/2])
1776	1763
1777	1764	/* NxCAOS =  */
1778	1765	#define STV_VDP2_N0CAOS ((STV_VDP2_CRAOFA & 0x0007) >> 0)
r20790	r20791
1787	1774	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
1788	1775	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1789	1776	\----------|----------|----------|----------|----------|----------|----------|---------*/
1790		#define STV_VDP2_CRAOFB (state->m_vdp2_regs[0x0e6/2])
	1777	#define STV_VDP2_CRAOFB (m_vdp2_regs[0x0e6/2])
1791	1778	#define STV_VDP2_R0CAOS ((STV_VDP2_CRAOFB & 0x0007) >> 0)
1792	1779	#define STV_VDP2_SPCAOS ((STV_VDP2_CRAOFB & 0x0070) >> 4)
1793	1780
r20790	r20791
1798	1785	|    --    |    --    |  SPLCEN  |  R0LCEN  |  N3LCEN  |  N2LCEN  |  N1LCEN  | N0LCEN   |
1799	1786	\----------|----------|----------|----------|----------|----------|----------|---------*/
1800	1787
1801		#define STV_VDP2_LNCLEN (state->m_vdp2_regs[0x0e8/2])
	1788	#define STV_VDP2_LNCLEN (m_vdp2_regs[0x0e8/2])
1802	1789	#define STV_VDP2_SPLCEN ((STV_VDP2_LNCLEN & 0x0020) >> 5)
1803	1790	#define STV_VDP2_R0LCEN ((STV_VDP2_LNCLEN & 0x0010) >> 4)
1804	1791	#define STV_VDP2_N3LCEN ((STV_VDP2_LNCLEN & 0x0008) >> 3)
r20790	r20791
1813	1800	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1814	1801	\----------|----------|----------|----------|----------|----------|----------|---------*/
1815	1802
1816		#define STV_VDP2_SFPRMD (state->m_vdp2_regs[0x0ea/2])
	1803	#define STV_VDP2_SFPRMD (m_vdp2_regs[0x0ea/2])
1817	1804
1818	1805
1819	1806	/* 1800ec - Colour Calculation Control
r20790	r20791
1823	1810	|    --    |  SPCCEN  |  LCCCEN  |  R0CCEN  |  N3CCEN  |  N2CCEN  |  N1CCEN  |  N0CCEN  |
1824	1811	\----------|----------|----------|----------|----------|----------|----------|---------*/
1825	1812
1826		#define STV_VDP2_CCCR       (state->m_vdp2_regs[0x0ec/2])
	1813	#define STV_VDP2_CCCR       (m_vdp2_regs[0x0ec/2])
1827	1814	#define STV_VDP2_CCMD       ((STV_VDP2_CCCR & 0x100) >> 8)
1828	1815	#define STV_VDP2_SPCCEN     ((STV_VDP2_CCCR & 0x40) >> 6)
1829	1816	#define STV_VDP2_LCCCEN     ((STV_VDP2_CCCR & 0x20) >> 5)
r20790	r20791
1841	1828	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1842	1829	\----------|----------|----------|----------|----------|----------|----------|---------*/
1843	1830
1844		#define STV_VDP2_SFCCMD     (state->m_vdp2_regs[0x0ee/2])
	1831	#define STV_VDP2_SFCCMD     (m_vdp2_regs[0x0ee/2])
1845	1832
1846	1833	/* 1800f0 - Priority Number (Sprite 0,1)
1847	1834	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
1850	1837	|    --    |    --    |    --    |    --    |    --    |  S0PRIN2 |  S0PRIN1 |  S0PRIN0 |
1851	1838	\----------|----------|----------|----------|----------|----------|----------|---------*/
1852	1839
1853		#define STV_VDP2_PRISA      (state->m_vdp2_regs[0x0f0/2])
	1840	#define STV_VDP2_PRISA      (m_vdp2_regs[0x0f0/2])
1854	1841	#define STV_VDP2_S1PRIN     ((STV_VDP2_PRISA & 0x0700) >> 8)
1855	1842	#define STV_VDP2_S0PRIN     ((STV_VDP2_PRISA & 0x0007) >> 0)
1856	1843
r20790	r20791
1861	1848	|    --    |    --    |    --    |    --    |    --    |  S2PRIN2 |  S2PRIN1 |  S2PRIN0 |
1862	1849	\----------|----------|----------|----------|----------|----------|----------|---------*/
1863	1850
1864		#define STV_VDP2_PRISB      (state->m_vdp2_regs[0x0f2/2])
	1851	#define STV_VDP2_PRISB      (m_vdp2_regs[0x0f2/2])
1865	1852	#define STV_VDP2_S3PRIN     ((STV_VDP2_PRISB & 0x0700) >> 8)
1866	1853	#define STV_VDP2_S2PRIN     ((STV_VDP2_PRISB & 0x0007) >> 0)
1867	1854
r20790	r20791
1872	1859	|    --    |    --    |    --    |    --    |    --    |  S4PRIN2 |  S4PRIN1 |  S4PRIN0 |
1873	1860	\----------|----------|----------|----------|----------|----------|----------|---------*/
1874	1861
1875		#define STV_VDP2_PRISC      (state->m_vdp2_regs[0x0f4/2])
	1862	#define STV_VDP2_PRISC      (m_vdp2_regs[0x0f4/2])
1876	1863	#define STV_VDP2_S5PRIN     ((STV_VDP2_PRISC & 0x0700) >> 8)
1877	1864	#define STV_VDP2_S4PRIN     ((STV_VDP2_PRISC & 0x0007) >> 0)
1878	1865
r20790	r20791
1883	1870	|    --    |    --    |    --    |    --    |    --    |  S6PRIN2 |  S6PRIN1 |  S6PRIN0 |
1884	1871	\----------|----------|----------|----------|----------|----------|----------|---------*/
1885	1872
1886		#define STV_VDP2_PRISD      (state->m_vdp2_regs[0x0f6/2])
	1873	#define STV_VDP2_PRISD      (m_vdp2_regs[0x0f6/2])
1887	1874	#define STV_VDP2_S7PRIN     ((STV_VDP2_PRISD & 0x0700) >> 8)
1888	1875	#define STV_VDP2_S6PRIN     ((STV_VDP2_PRISD & 0x0007) >> 0)
1889	1876
r20790	r20791
1895	1882	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1896	1883	\----------|----------|----------|----------|----------|----------|----------|---------*/
1897	1884
1898		#define STV_VDP2_PRINA (state->m_vdp2_regs[0x0f8/2])
	1885	#define STV_VDP2_PRINA (m_vdp2_regs[0x0f8/2])
1899	1886
1900	1887	#define STV_VDP2_N1PRIN ((STV_VDP2_PRINA & 0x0700) >> 8)
1901	1888	#define STV_VDP2_N0PRIN ((STV_VDP2_PRINA & 0x0007) >> 0)
r20790	r20791
1907	1894	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1908	1895	\----------|----------|----------|----------|----------|----------|----------|---------*/
1909	1896
1910		#define STV_VDP2_PRINB (state->m_vdp2_regs[0x0fa/2])
	1897	#define STV_VDP2_PRINB (m_vdp2_regs[0x0fa/2])
1911	1898
1912	1899	#define STV_VDP2_N3PRIN ((STV_VDP2_PRINB & 0x0700) >> 8)
1913	1900	#define STV_VDP2_N2PRIN ((STV_VDP2_PRINB & 0x0007) >> 0)
r20790	r20791
1918	1905	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
1919	1906	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
1920	1907	\----------|----------|----------|----------|----------|----------|----------|---------*/
1921		#define STV_VDP2_PRIR (state->m_vdp2_regs[0x0fc/2])
	1908	#define STV_VDP2_PRIR (m_vdp2_regs[0x0fc/2])
1922	1909
1923	1910	#define STV_VDP2_R0PRIN ((STV_VDP2_PRIR & 0x0007) >> 0)
1924	1911
r20790	r20791
1936	1923	|    --    |    --    |    --    |  S0CCRT4 |  S0CCRT3 |  S0CCRT2 |  S0CCRT1 |  S0CCRT0 |
1937	1924	\----------|----------|----------|----------|----------|----------|----------|---------*/
1938	1925
1939		#define STV_VDP2_CCRSA      (state->m_vdp2_regs[0x100/2])
	1926	#define STV_VDP2_CCRSA      (m_vdp2_regs[0x100/2])
1940	1927	#define STV_VDP2_S1CCRT     ((STV_VDP2_CCRSA & 0x1f00) >> 8)
1941	1928	#define STV_VDP2_S0CCRT     ((STV_VDP2_CCRSA & 0x001f) >> 0)
1942	1929
r20790	r20791
1947	1934	|    --    |    --    |    --    |  S2CCRT4 |  S2CCRT3 |  S2CCRT2 |  S2CCRT1 |  S2CCRT0 |
1948	1935	\----------|----------|----------|----------|----------|----------|----------|---------*/
1949	1936
1950		#define STV_VDP2_CCRSB      (state->m_vdp2_regs[0x102/2])
	1937	#define STV_VDP2_CCRSB      (m_vdp2_regs[0x102/2])
1951	1938	#define STV_VDP2_S3CCRT     ((STV_VDP2_CCRSB & 0x1f00) >> 8)
1952	1939	#define STV_VDP2_S2CCRT     ((STV_VDP2_CCRSB & 0x001f) >> 0)
1953	1940
r20790	r20791
1958	1945	|    --    |    --    |    --    |  S4CCRT4 |  S4CCRT3 |  S4CCRT2 |  S4CCRT1 |  S4CCRT0 |
1959	1946	\----------|----------|----------|----------|----------|----------|----------|---------*/
1960	1947
1961		#define STV_VDP2_CCRSC      (state->m_vdp2_regs[0x104/2])
	1948	#define STV_VDP2_CCRSC      (m_vdp2_regs[0x104/2])
1962	1949	#define STV_VDP2_S5CCRT     ((STV_VDP2_CCRSC & 0x1f00) >> 8)
1963	1950	#define STV_VDP2_S4CCRT     ((STV_VDP2_CCRSC & 0x001f) >> 0)
1964	1951
r20790	r20791
1969	1956	|    --    |    --    |    --    |  S6CCRT4 |  S6CCRT3 |  S6CCRT2 |  S6CCRT1 |  S6CCRT0 |
1970	1957	\----------|----------|----------|----------|----------|----------|----------|---------*/
1971	1958
1972		#define STV_VDP2_CCRSD      (state->m_vdp2_regs[0x106/2])
	1959	#define STV_VDP2_CCRSD      (m_vdp2_regs[0x106/2])
1973	1960	#define STV_VDP2_S7CCRT     ((STV_VDP2_CCRSD & 0x1f00) >> 8)
1974	1961	#define STV_VDP2_S6CCRT     ((STV_VDP2_CCRSD & 0x001f) >> 0)
1975	1962
r20790	r20791
1980	1967	|    --    |    --    |    --    | N0CCRT4  | N0CCRT3  | N0CCRT2  | N0CCRT1  | N0CCRT0  |
1981	1968	\----------|----------|----------|----------|----------|----------|----------|---------*/
1982	1969
1983		#define STV_VDP2_CCRNA  (state->m_vdp2_regs[0x108/2])
	1970	#define STV_VDP2_CCRNA  (m_vdp2_regs[0x108/2])
1984	1971	#define STV_VDP2_N1CCRT ((STV_VDP2_CCRNA & 0x1f00) >> 8)
1985	1972	#define STV_VDP2_N0CCRT (STV_VDP2_CCRNA & 0x1f)
1986	1973
r20790	r20791
1991	1978	|    --    |    --    |    --    | N2CCRT4  | N2CCRT3  | N2CCRT2  | N2CCRT1  | N2CCRT0  |
1992	1979	\----------|----------|----------|----------|----------|----------|----------|---------*/
1993	1980
1994		#define STV_VDP2_CCRNB  (state->m_vdp2_regs[0x10a/2])
	1981	#define STV_VDP2_CCRNB  (m_vdp2_regs[0x10a/2])
1995	1982	#define STV_VDP2_N3CCRT ((STV_VDP2_CCRNB & 0x1f00) >> 8)
1996	1983	#define STV_VDP2_N2CCRT (STV_VDP2_CCRNB & 0x1f)
1997	1984
r20790	r20791
2002	1989	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2003	1990	\----------|----------|----------|----------|----------|----------|----------|---------*/
2004	1991
2005		#define STV_VDP2_CCRR   (state->m_vdp2_regs[0x10c/2])
	1992	#define STV_VDP2_CCRR   (m_vdp2_regs[0x10c/2])
2006	1993	#define STV_VDP2_R0CCRT (STV_VDP2_CCRR & 0x1f)
2007	1994
2008	1995	/* 18010e - Colour Calculation Ratio (Line Colour Screen, Back Colour Screen)
r20790	r20791
2019	2006	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2020	2007	\----------|----------|----------|----------|----------|----------|----------|---------*/
2021	2008
2022		#define STV_VDP2_CLOFEN (state->m_vdp2_regs[0x110/2])
	2009	#define STV_VDP2_CLOFEN (m_vdp2_regs[0x110/2])
2023	2010	#define STV_VDP2_N0COEN ((STV_VDP2_CLOFEN & 0x01) >> 0)
2024	2011	#define STV_VDP2_N1COEN ((STV_VDP2_CLOFEN & 0x02) >> 1)
2025	2012	#define STV_VDP2_N2COEN ((STV_VDP2_CLOFEN & 0x04) >> 2)
r20790	r20791
2035	2022	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2036	2023	\----------|----------|----------|----------|----------|----------|----------|---------*/
2037	2024
2038		#define STV_VDP2_CLOFSL (state->m_vdp2_regs[0x112/2])
	2025	#define STV_VDP2_CLOFSL (m_vdp2_regs[0x112/2])
2039	2026	#define STV_VDP2_N0COSL ((STV_VDP2_CLOFSL & 0x01) >> 0)
2040	2027	#define STV_VDP2_N1COSL ((STV_VDP2_CLOFSL & 0x02) >> 1)
2041	2028	#define STV_VDP2_N2COSL ((STV_VDP2_CLOFSL & 0x04) >> 2)
r20790	r20791
2051	2038	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2052	2039	\----------|----------|----------|----------|----------|----------|----------|---------*/
2053	2040
2054		#define STV_VDP2_COAR (state->m_vdp2_regs[0x114/2])
	2041	#define STV_VDP2_COAR (m_vdp2_regs[0x114/2])
2055	2042
2056	2043	/* 180116 - Colour Offset A (Green)
2057	2044	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
2059	2046	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
2060	2047	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2061	2048	\----------|----------|----------|----------|----------|----------|----------|---------*/
2062		#define STV_VDP2_COAG (state->m_vdp2_regs[0x116/2])
	2049	#define STV_VDP2_COAG (m_vdp2_regs[0x116/2])
2063	2050
2064	2051	/* 180118 - Colour Offset A (Blue)
2065	2052	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
2068	2055	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2069	2056	\----------|----------|----------|----------|----------|----------|----------|---------*/
2070	2057
2071		#define STV_VDP2_COAB (state->m_vdp2_regs[0x118/2])
	2058	#define STV_VDP2_COAB (m_vdp2_regs[0x118/2])
2072	2059
2073	2060	/* 18011a - Colour Offset B (Red)
2074	2061	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
2076	2063	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
2077	2064	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2078	2065	\----------|----------|----------|----------|----------|----------|----------|---------*/
2079		#define STV_VDP2_COBR (state->m_vdp2_regs[0x11a/2])
	2066	#define STV_VDP2_COBR (m_vdp2_regs[0x11a/2])
2080	2067
2081	2068	/* 18011c - Colour Offset B (Green)
2082	2069	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
2084	2071	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
2085	2072	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2086	2073	\----------|----------|----------|----------|----------|----------|----------|---------*/
2087		#define STV_VDP2_COBG (state->m_vdp2_regs[0x11c/2])
	2074	#define STV_VDP2_COBG (m_vdp2_regs[0x11c/2])
2088	2075
2089	2076	/* 18011e - Colour Offset B (Blue)
2090	2077	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
r20790	r20791
2092	2079	|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
2093	2080	|    --    |    --    |    --    |    --    |    --    |    --    |    --    |    --    |
2094	2081	\----------|----------|----------|----------|----------|----------|----------|---------*/
2095		#define STV_VDP2_COBB (state->m_vdp2_regs[0x11e/2])
	2082	#define STV_VDP2_COBB (m_vdp2_regs[0x11e/2])
2096	2083
2097	2084	/*For Debug purposes only*/
2098	2085	static struct stv_vdp2_debugging
r20790	r20791
2207	2194
2208	2195	#define mul_fixed32( a, b ) mul_32x32_shift( a, b, 16 )
2209	2196
2210		static void stv_vdp2_fill_rotation_parameter_table( running_machine &machine, UINT8 rot_parameter )
	2197	void saturn_state::stv_vdp2_fill_rotation_parameter_table( UINT8 rot_parameter )
2211	2198	{
2212		saturn_state *state = machine.driver_data<saturn_state>();
2213	2199	UINT32 address = 0;
2214	2200
2215	2201	address = (((STV_VDP2_RPTAU << 16) | STV_VDP2_RPTAL) << 1);
r20790	r20791
2222	2208	address |= 0x00000080;
2223	2209	}
2224	2210
2225		stv_current_rotation_parameter_table.xst  = (state->m_vdp2_vram[address/4] & 0x1fffffc0) | ((state->m_vdp2_vram[address/4] & 0x10000000) ? 0xe0000000 : 0x00000000 );
2226		stv_current_rotation_parameter_table.yst  = (state->m_vdp2_vram[address/4 + 1] & 0x1fffffc0) | ((state->m_vdp2_vram[address/4 + 1] & 0x10000000) ? 0xe0000000 : 0x00000000 );
2227		stv_current_rotation_parameter_table.zst  = (state->m_vdp2_vram[address/4 + 2] & 0x1fffffc0) | ((state->m_vdp2_vram[address/4 + 2] & 0x10000000) ? 0xe0000000 : 0x00000000 );
2228		stv_current_rotation_parameter_table.dxst = (state->m_vdp2_vram[address/4 + 3] & 0x0007ffc0) | ((state->m_vdp2_vram[address/4 + 3] & 0x00040000) ? 0xfff80000 : 0x00000000 );
2229		stv_current_rotation_parameter_table.dyst = (state->m_vdp2_vram[address/4 + 4] & 0x0007ffc0) | ((state->m_vdp2_vram[address/4 + 4] & 0x00040000) ? 0xfff80000 : 0x00000000 );
2230		stv_current_rotation_parameter_table.dx   = (state->m_vdp2_vram[address/4 + 5] & 0x0007ffc0) | ((state->m_vdp2_vram[address/4 + 5] & 0x00040000) ? 0xfff80000 : 0x00000000 );
2231		stv_current_rotation_parameter_table.dy   = (state->m_vdp2_vram[address/4 + 6] & 0x0007ffc0) | ((state->m_vdp2_vram[address/4 + 6] & 0x00040000) ? 0xfff80000 : 0x00000000 );
2232		stv_current_rotation_parameter_table.A    = (state->m_vdp2_vram[address/4 + 7] & 0x000fffc0) | ((state->m_vdp2_vram[address/4 + 7] & 0x00080000) ? 0xfff00000 : 0x00000000 );
2233		stv_current_rotation_parameter_table.B    = (state->m_vdp2_vram[address/4 + 8] & 0x000fffc0) | ((state->m_vdp2_vram[address/4 + 8] & 0x00080000) ? 0xfff00000 : 0x00000000 );
2234		stv_current_rotation_parameter_table.C    = (state->m_vdp2_vram[address/4 + 9] & 0x000fffc0) | ((state->m_vdp2_vram[address/4 + 9] & 0x00080000) ? 0xfff00000 : 0x00000000 );
2235		stv_current_rotation_parameter_table.D    = (state->m_vdp2_vram[address/4 + 10] & 0x000fffc0) | ((state->m_vdp2_vram[address/4 + 10] & 0x00080000) ? 0xfff00000 : 0x00000000 );
2236		stv_current_rotation_parameter_table.E    = (state->m_vdp2_vram[address/4 + 11] & 0x000fffc0) | ((state->m_vdp2_vram[address/4 + 11] & 0x00080000) ? 0xfff00000 : 0x00000000 );
2237		stv_current_rotation_parameter_table.F    = (state->m_vdp2_vram[address/4 + 12] & 0x000fffc0) | ((state->m_vdp2_vram[address/4 + 12] & 0x00080000) ? 0xfff00000 : 0x00000000 );
2238		stv_current_rotation_parameter_table.px   = (state->m_vdp2_vram[address/4 + 13] & 0x3fff0000) | ((state->m_vdp2_vram[address/4 + 13] & 0x30000000) ? 0xc0000000 : 0x00000000 );
2239		stv_current_rotation_parameter_table.py   = (state->m_vdp2_vram[address/4 + 13] & 0x00003fff) << 16;
	2211	stv_current_rotation_parameter_table.xst  = (m_vdp2_vram[address/4] & 0x1fffffc0) | ((m_vdp2_vram[address/4] & 0x10000000) ? 0xe0000000 : 0x00000000 );
	2212	stv_current_rotation_parameter_table.yst  = (m_vdp2_vram[address/4 + 1] & 0x1fffffc0) | ((m_vdp2_vram[address/4 + 1] & 0x10000000) ? 0xe0000000 : 0x00000000 );
	2213	stv_current_rotation_parameter_table.zst  = (m_vdp2_vram[address/4 + 2] & 0x1fffffc0) | ((m_vdp2_vram[address/4 + 2] & 0x10000000) ? 0xe0000000 : 0x00000000 );
	2214	stv_current_rotation_parameter_table.dxst = (m_vdp2_vram[address/4 + 3] & 0x0007ffc0) | ((m_vdp2_vram[address/4 + 3] & 0x00040000) ? 0xfff80000 : 0x00000000 );
	2215	stv_current_rotation_parameter_table.dyst = (m_vdp2_vram[address/4 + 4] & 0x0007ffc0) | ((m_vdp2_vram[address/4 + 4] & 0x00040000) ? 0xfff80000 : 0x00000000 );
	2216	stv_current_rotation_parameter_table.dx   = (m_vdp2_vram[address/4 + 5] & 0x0007ffc0) | ((m_vdp2_vram[address/4 + 5] & 0x00040000) ? 0xfff80000 : 0x00000000 );
	2217	stv_current_rotation_parameter_table.dy   = (m_vdp2_vram[address/4 + 6] & 0x0007ffc0) | ((m_vdp2_vram[address/4 + 6] & 0x00040000) ? 0xfff80000 : 0x00000000 );
	2218	stv_current_rotation_parameter_table.A    = (m_vdp2_vram[address/4 + 7] & 0x000fffc0) | ((m_vdp2_vram[address/4 + 7] & 0x00080000) ? 0xfff00000 : 0x00000000 );
	2219	stv_current_rotation_parameter_table.B    = (m_vdp2_vram[address/4 + 8] & 0x000fffc0) | ((m_vdp2_vram[address/4 + 8] & 0x00080000) ? 0xfff00000 : 0x00000000 );
	2220	stv_current_rotation_parameter_table.C    = (m_vdp2_vram[address/4 + 9] & 0x000fffc0) | ((m_vdp2_vram[address/4 + 9] & 0x00080000) ? 0xfff00000 : 0x00000000 );
	2221	stv_current_rotation_parameter_table.D    = (m_vdp2_vram[address/4 + 10] & 0x000fffc0) | ((m_vdp2_vram[address/4 + 10] & 0x00080000) ? 0xfff00000 : 0x00000000 );
	2222	stv_current_rotation_parameter_table.E    = (m_vdp2_vram[address/4 + 11] & 0x000fffc0) | ((m_vdp2_vram[address/4 + 11] & 0x00080000) ? 0xfff00000 : 0x00000000 );
	2223	stv_current_rotation_parameter_table.F    = (m_vdp2_vram[address/4 + 12] & 0x000fffc0) | ((m_vdp2_vram[address/4 + 12] & 0x00080000) ? 0xfff00000 : 0x00000000 );
	2224	stv_current_rotation_parameter_table.px   = (m_vdp2_vram[address/4 + 13] & 0x3fff0000) | ((m_vdp2_vram[address/4 + 13] & 0x30000000) ? 0xc0000000 : 0x00000000 );
	2225	stv_current_rotation_parameter_table.py   = (m_vdp2_vram[address/4 + 13] & 0x00003fff) << 16;
2240	2226	if ( stv_current_rotation_parameter_table.py & 0x20000000 ) stv_current_rotation_parameter_table.py |= 0xc0000000;
2241		stv_current_rotation_parameter_table.pz   = (state->m_vdp2_vram[address/4 + 14] & 0x3fff0000) | ((state->m_vdp2_vram[address/4 + 14] & 0x20000000) ? 0xc0000000 : 0x00000000 );
2242		stv_current_rotation_parameter_table.cx   = (state->m_vdp2_vram[address/4 + 15] & 0x3fff0000) | ((state->m_vdp2_vram[address/4 + 15] & 0x20000000) ? 0xc0000000 : 0x00000000 );
2243		stv_current_rotation_parameter_table.cy   = (state->m_vdp2_vram[address/4 + 15] & 0x00003fff) << 16;
	2227	stv_current_rotation_parameter_table.pz   = (m_vdp2_vram[address/4 + 14] & 0x3fff0000) | ((m_vdp2_vram[address/4 + 14] & 0x20000000) ? 0xc0000000 : 0x00000000 );
	2228	stv_current_rotation_parameter_table.cx   = (m_vdp2_vram[address/4 + 15] & 0x3fff0000) | ((m_vdp2_vram[address/4 + 15] & 0x20000000) ? 0xc0000000 : 0x00000000 );
	2229	stv_current_rotation_parameter_table.cy   = (m_vdp2_vram[address/4 + 15] & 0x00003fff) << 16;
2244	2230	if ( stv_current_rotation_parameter_table.cy & 0x20000000 ) stv_current_rotation_parameter_table.cy |= 0xc0000000;
2245		stv_current_rotation_parameter_table.cz   = (state->m_vdp2_vram[address/4 + 16] & 0x3fff0000) | ((state->m_vdp2_vram[address/4 + 16] & 0x20000000) ? 0xc0000000 : 0x00000000 );
2246		stv_current_rotation_parameter_table.mx   = (state->m_vdp2_vram[address/4 + 17] & 0x3fffffc0) | ((state->m_vdp2_vram[address/4 + 17] & 0x20000000) ? 0xc0000000 : 0x00000000 );
2247		stv_current_rotation_parameter_table.my   = (state->m_vdp2_vram[address/4 + 18] & 0x3fffffc0) | ((state->m_vdp2_vram[address/4 + 18] & 0x20000000) ? 0xc0000000 : 0x00000000 );
2248		stv_current_rotation_parameter_table.kx   = (state->m_vdp2_vram[address/4 + 19] & 0x00ffffff) | ((state->m_vdp2_vram[address/4 + 19] & 0x00800000) ? 0xff000000 : 0x00000000 );
2249		stv_current_rotation_parameter_table.ky   = (state->m_vdp2_vram[address/4 + 20] & 0x00ffffff) | ((state->m_vdp2_vram[address/4 + 20] & 0x00800000) ? 0xff000000 : 0x00000000 );
2250		stv_current_rotation_parameter_table.kast = (state->m_vdp2_vram[address/4 + 21] & 0xffffffc0);
2251		stv_current_rotation_parameter_table.dkast= (state->m_vdp2_vram[address/4 + 22] & 0x03ffffc0) | ((state->m_vdp2_vram[address/4 + 22] & 0x02000000) ? 0xfc000000 : 0x00000000 );
2252		stv_current_rotation_parameter_table.dkax = (state->m_vdp2_vram[address/4 + 23] & 0x03ffffc0) | ((state->m_vdp2_vram[address/4 + 23] & 0x02000000) ? 0xfc000000 : 0x00000000 );
	2231	stv_current_rotation_parameter_table.cz   = (m_vdp2_vram[address/4 + 16] & 0x3fff0000) | ((m_vdp2_vram[address/4 + 16] & 0x20000000) ? 0xc0000000 : 0x00000000 );
	2232	stv_current_rotation_parameter_table.mx   = (m_vdp2_vram[address/4 + 17] & 0x3fffffc0) | ((m_vdp2_vram[address/4 + 17] & 0x20000000) ? 0xc0000000 : 0x00000000 );
	2233	stv_current_rotation_parameter_table.my   = (m_vdp2_vram[address/4 + 18] & 0x3fffffc0) | ((m_vdp2_vram[address/4 + 18] & 0x20000000) ? 0xc0000000 : 0x00000000 );
	2234	stv_current_rotation_parameter_table.kx   = (m_vdp2_vram[address/4 + 19] & 0x00ffffff) | ((m_vdp2_vram[address/4 + 19] & 0x00800000) ? 0xff000000 : 0x00000000 );
	2235	stv_current_rotation_parameter_table.ky   = (m_vdp2_vram[address/4 + 20] & 0x00ffffff) | ((m_vdp2_vram[address/4 + 20] & 0x00800000) ? 0xff000000 : 0x00000000 );
	2236	stv_current_rotation_parameter_table.kast = (m_vdp2_vram[address/4 + 21] & 0xffffffc0);
	2237	stv_current_rotation_parameter_table.dkast= (m_vdp2_vram[address/4 + 22] & 0x03ffffc0) | ((m_vdp2_vram[address/4 + 22] & 0x02000000) ? 0xfc000000 : 0x00000000 );
	2238	stv_current_rotation_parameter_table.dkax = (m_vdp2_vram[address/4 + 23] & 0x03ffffc0) | ((m_vdp2_vram[address/4 + 23] & 0x02000000) ? 0xfc000000 : 0x00000000 );
2253	2239
2254	2240	#define RP  stv_current_rotation_parameter_table
2255	2241
r20790	r20791
2267	2253	/*Attempt to show on screen the rotation table*/
2268	2254	if(LOG_ROZ == 2)
2269	2255	{
2270		if(machine.input().code_pressed_once(JOYCODE_Y_UP_SWITCH))
	2256	if(machine().input().code_pressed_once(JOYCODE_Y_UP_SWITCH))
2271	2257	vdpdebug.roz++;
2272	2258
2273		if(machine.input().code_pressed_once(JOYCODE_Y_DOWN_SWITCH))
	2259	if(machine().input().code_pressed_once(JOYCODE_Y_DOWN_SWITCH))
2274	2260	vdpdebug.roz--;
2275	2261
2276	2262	if(vdpdebug.roz > 10)
r20790	r20791
2334	2320	return 1;
2335	2321	}
2336	2322
2337		static void stv_vdp2_check_fade_control_for_layer(running_machine &machine)
	2323	void saturn_state::stv_vdp2_check_fade_control_for_layer( void )
2338	2324	{
2339		saturn_state *state = machine.driver_data<saturn_state>();
2340	2325	if ( stv2_current_tilemap.fade_control & 1 )
2341	2326	{
2342	2327	if ( stv2_current_tilemap.fade_control & 2 )
r20790	r20791
2369	2354	#define STV_VDP2_CP_NBG2_CPDR       0x6
2370	2355	#define STV_VDP2_CP_NBG3_CPDR       0x7
2371	2356
2372		static UINT8 stv_vdp2_check_vram_cycle_pattern_registers(
2373		running_machine &machine,
2374		UINT8 access_command_pnmdr,
2375		UINT8 access_command_cpdr,
2376		UINT8 bitmap_enable )
	2357	UINT8 saturn_state::stv_vdp2_check_vram_cycle_pattern_registers( UINT8 access_command_pnmdr, UINT8 access_command_cpdr, UINT8 bitmap_enable )
2377	2358	{
2378		saturn_state *state = machine.driver_data<saturn_state>();
2379	2359	int i;
2380	2360	UINT8  access_command_ok = 0;
2381	2361	UINT16 cp_regs[8];
r20790	r20791
2439	2419	}
2440	2420
2441	2421
2442		static void stv_vdp2_compute_color_offset( running_machine &machine,int *r, int *g, int *b, int cor )
	2422	void saturn_state::stv_vdp2_compute_color_offset( int *r, int *g, int *b, int cor )
2443	2423	{
2444		saturn_state *state = machine.driver_data<saturn_state>();
2445	2424	if ( cor == 0 )
2446	2425	{
2447	2426	*r = (STV_VDP2_COAR & 0x100) ? (*r - (0x100 - (STV_VDP2_COAR & 0xff))) : ((STV_VDP2_COAR & 0xff) + *r);
r20790	r20791
2462	2441	if(*b > 0xff)   { *b = 0xff; }
2463	2442	}
2464	2443
2465		static void stv_vdp2_compute_color_offset_UINT32(running_machine &machine,UINT32 *rgb, int cor)
	2444	void saturn_state::stv_vdp2_compute_color_offset_UINT32(UINT32 *rgb, int cor)
2466	2445	{
2467		saturn_state *state = machine.driver_data<saturn_state>();
2468	2446	int _r = RGB_RED(*rgb);
2469	2447	int _g = RGB_GREEN(*rgb);
2470	2448	int _b = RGB_BLUE(*rgb);
r20790	r20791
2490	2468	*rgb = MAKE_RGB(_r, _g, _b);
2491	2469	}
2492	2470
2493		static void stv_vdp2_drawgfxzoom(
	2471	void saturn_state::stv_vdp2_drawgfxzoom(
2494	2472	bitmap_rgb32 &dest_bmp,const rectangle &clip,gfx_element *gfx,
2495	2473	UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,
2496	2474	int transparency,int transparent_color,int scalex, int scaley,
r20790	r20791
2681	2659
2682	2660	}
2683	2661
2684		static void stv_vdp2_drawgfxzoom_rgb555(
2685		bitmap_rgb32 &dest_bmp,const rectangle &clip,running_machine &machine,
	2662	void saturn_state::stv_vdp2_drawgfxzoom_rgb555(
	2663	bitmap_rgb32 &dest_bmp,const rectangle &clip,
2686	2664	UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,
2687	2665	int transparency,int transparent_color,int scalex, int scaley,
2688	2666	int sprite_screen_width, int sprite_screen_height, int alpha)
2689	2667	{
2690		saturn_state *state = machine.driver_data<saturn_state>();
2691	2668	rectangle myclip;
2692	2669	UINT8* gfxdata;
2693	2670
2694		gfxdata = state->m_vdp2.gfx_decode + code * 0x20;
	2671	gfxdata = m_vdp2.gfx_decode + code * 0x20;
2695	2672
2696	2673	if (!scalex || !scaley) return;
2697	2674
r20790	r20791
2809	2786	g = pal5bit((data & 0x03e0) >> 5);
2810	2787	r = pal5bit( data & 0x001f);
2811	2788	if(stv2_current_tilemap.fade_control & 1)
2812		stv_vdp2_compute_color_offset(machine,&r,&g,&b,stv2_current_tilemap.fade_control & 2);
	2789	stv_vdp2_compute_color_offset(&r,&g,&b,stv2_current_tilemap.fade_control & 2);
2813	2790
2814	2791	dest[x] = MAKE_RGB(r, g, b);
2815	2792	x_index += dx;
r20790	r20791
2836	2813	g = pal5bit((data & 0x03e0) >> 5);
2837	2814	r = pal5bit( data & 0x001f);
2838	2815	if(stv2_current_tilemap.fade_control & 1)
2839		stv_vdp2_compute_color_offset(machine,&r,&g,&b,stv2_current_tilemap.fade_control & 2);
	2816	stv_vdp2_compute_color_offset(&r,&g,&b,stv2_current_tilemap.fade_control & 2);
2840	2817
2841	2818	if( data ) dest[x] = MAKE_RGB(r, g, b);
2842	2819	x_index += dx;
r20790	r20791
2863	2840	g = pal5bit((data & 0x03e0) >> 5);
2864	2841	r = pal5bit( data & 0x001f);
2865	2842	if(stv2_current_tilemap.fade_control & 1)
2866		stv_vdp2_compute_color_offset(machine,&r,&g,&b,stv2_current_tilemap.fade_control & 2);
	2843	stv_vdp2_compute_color_offset(&r,&g,&b,stv2_current_tilemap.fade_control & 2);
2867	2844
2868	2845	if( data ) dest[x] = alpha_blend_r32(dest[x], MAKE_RGB(r, g, b), alpha);
2869	2846	x_index += dx;
r20790	r20791
2890	2867	g = pal5bit((data & 0x03e0) >> 5);
2891	2868	r = pal5bit( data & 0x001f);
2892	2869	if(stv2_current_tilemap.fade_control & 1)
2893		stv_vdp2_compute_color_offset(machine,&r,&g,&b,stv2_current_tilemap.fade_control & 2);
	2870	stv_vdp2_compute_color_offset(&r,&g,&b,stv2_current_tilemap.fade_control & 2);
2894	2871
2895	2872	if( data ) dest[x] = stv_add_blend(dest[x], MAKE_RGB(r, g, b));
2896	2873	x_index += dx;
r20790	r20791
2907	2884	}
2908	2885
2909	2886
2910		static void stv_vdp2_drawgfx_rgb555( bitmap_rgb32 &dest_bmp, const rectangle &clip, running_machine &machine, UINT32 code, int flipx, int flipy,
2911		int sx, int sy, int transparency, int alpha)
	2887	void saturn_state::stv_vdp2_drawgfx_rgb555( bitmap_rgb32 &dest_bmp, const rectangle &clip, UINT32 code, int flipx, int flipy, int sx, int sy, int transparency, int alpha)
2912	2888	{
2913		saturn_state *state = machine.driver_data<saturn_state>();
2914	2889	rectangle myclip;
2915	2890	UINT8* gfxdata;
2916	2891	int sprite_screen_width, sprite_screen_height;
2917	2892
2918		gfxdata = state->m_vdp2.gfx_decode + code * 0x20;
	2893	gfxdata = m_vdp2.gfx_decode + code * 0x20;
2919	2894	sprite_screen_width = sprite_screen_height = 8;
2920	2895
2921	2896	/* KW 991012 -- Added code to force clip to bitmap boundary */
r20790	r20791
2998	2973	g = pal5bit((data & 0x03e0) >> 5);
2999	2974	r = pal5bit( data & 0x001f);
3000	2975	if(stv2_current_tilemap.fade_control & 1)
3001		stv_vdp2_compute_color_offset(machine,&r,&g,&b,stv2_current_tilemap.fade_control & 2);
	2976	stv_vdp2_compute_color_offset(&r,&g,&b,stv2_current_tilemap.fade_control & 2);
3002	2977
3003	2978	if ( transparency == STV_TRANSPARENCY_ALPHA )
3004	2979	dest[x] = alpha_blend_r32( dest[x], MAKE_RGB(r, g, b), alpha );
r20790	r20791
3018	2993	}
3019	2994
3020	2995
3021		static void stv_vdp2_drawgfx_rgb888( bitmap_rgb32 &dest_bmp, const rectangle &clip, running_machine &machine, UINT32 code, int flipx, int flipy,
	2996	void saturn_state::stv_vdp2_drawgfx_rgb888( bitmap_rgb32 &dest_bmp, const rectangle &clip, UINT32 code, int flipx, int flipy,
3022	2997	int sx, int sy, int transparency, int alpha)
3023	2998	{
3024		saturn_state *state = machine.driver_data<saturn_state>();
3025	2999	rectangle myclip;
3026	3000	UINT8* gfxdata;
3027	3001	int sprite_screen_width, sprite_screen_height;
3028	3002
3029		gfxdata = state->m_vdp2.gfx_decode + code * 0x20;
	3003	gfxdata = m_vdp2.gfx_decode + code * 0x20;
3030	3004	sprite_screen_width = sprite_screen_height = 8;
3031	3005
3032	3006	/* KW 991012 -- Added code to force clip to bitmap boundary */
r20790	r20791
3110	3084	r = (data & 0x0000ff);
3111	3085
3112	3086	if(stv2_current_tilemap.fade_control & 1)
3113		stv_vdp2_compute_color_offset(machine,&r,&g,&b,stv2_current_tilemap.fade_control & 2);
	3087	stv_vdp2_compute_color_offset(&r,&g,&b,stv2_current_tilemap.fade_control & 2);
3114	3088
3115	3089	if ( transparency == STV_TRANSPARENCY_ALPHA )
3116	3090	dest[x] = alpha_blend_r32( dest[x], MAKE_RGB(r, g, b), alpha );
r20790	r20791
3129	3103
3130	3104	}
3131	3105
3132		static void stv_vdp2_draw_basic_bitmap(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	3106	void saturn_state::stv_vdp2_draw_basic_bitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect)
3133	3107	{
3134		saturn_state *state = machine.driver_data<saturn_state>();
3135
3136	3108	//  if(LOG_VDP2) logerror ("bitmap enable %02x size %08x depth %08x\n", stv2_current_tilemap.layer_name, stv2_current_tilemap.bitmap_size, stv2_current_tilemap.colour_depth);
3137	3109	//  popmessage ("bitmap enable %02x size %08x depth %08x number %02x", stv2_current_tilemap.layer_name, stv2_current_tilemap.bitmap_size, stv2_current_tilemap.colour_depth,stv2_current_tilemap.bitmap_palette_number);
3138	3110	//popmessage("%04x",STV_VDP2_SCRCTL);
r20790	r20791
3141	3113	int ysize = 0/*, ysizemask = 0*/;
3142	3114	int xlinesize = 0/*, xpixelsize = 0*/;
3143	3115	int xcnt,ycnt;
3144		UINT8* gfxdata = state->m_vdp2.gfx_decode;
	3116	UINT8* gfxdata = m_vdp2.gfx_decode;
3145	3117	UINT32 *destline;
3146	3118	UINT16 pal_color_offset = 0;
3147	3119	UINT8* gfxdatalow, *gfxdatahigh;
r20790	r20791
3195	3167	stv2_current_tilemap.bitmap_palette_number+=stv2_current_tilemap.colour_ram_address_offset;
3196	3168	stv2_current_tilemap.bitmap_palette_number&=7;//safety check
3197	3169
3198		screen_x = machine.primary_screen->visible_area().max_x;
3199		screen_y = machine.primary_screen->visible_area().max_y;
	3170	screen_x = machine().primary_screen->visible_area().max_x;
	3171	screen_y = machine().primary_screen->visible_area().max_y;
3200	3172
3201	3173	switch(stv2_current_tilemap.colour_depth)
3202	3174	{
r20790	r20791
3206	3178	{
3207	3179	for (xcnt = 0; xcnt <xsize;xcnt+=2)
3208	3180	{
3209		if (!stv_vdp2_window_process(machine,xcnt+1,ycnt))
	3181	if (!stv_vdp2_window_process(xcnt+1,ycnt))
3210	3182	{
3211	3183	if ((gfxdata[0] & 0x0f) || (stv2_current_tilemap.transparency == STV_TRANSPARENCY_NONE))
3212	3184	{
3213	3185	if (((xcnt + 1) <= screen_x) && (ycnt <= screen_y))
3214	3186	{
3215	3187	if ( stv2_current_tilemap.colour_calculation_enabled == 0 )
3216		bitmap.pix32(ycnt, xcnt+1) = machine.pens[((gfxdata[0] & 0x0f) >> 0) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset];
	3188	bitmap.pix32(ycnt, xcnt+1) = machine().pens[((gfxdata[0] & 0x0f) >> 0) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset];
3217	3189	else
3218		bitmap.pix32(ycnt, xcnt+1) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt+1), machine.pens[((gfxdata[0] & 0x0f) >> 0) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset], stv2_current_tilemap.alpha);
	3190	bitmap.pix32(ycnt, xcnt+1) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt+1), machine().pens[((gfxdata[0] & 0x0f) >> 0) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset], stv2_current_tilemap.alpha);
3219	3191	}
3220	3192	}
3221	3193	}
3222		if (!stv_vdp2_window_process(machine,xcnt,ycnt))
	3194	if (!stv_vdp2_window_process(xcnt,ycnt))
3223	3195	{
3224	3196	if ((gfxdata[0] & 0xf0) || (stv2_current_tilemap.transparency == STV_TRANSPARENCY_NONE))
3225	3197	{
3226	3198	if (((xcnt + 0) <= screen_x) && (ycnt <= screen_y))
3227	3199	{
3228	3200	if ( stv2_current_tilemap.colour_calculation_enabled == 0 )
3229		bitmap.pix32(ycnt, xcnt) = machine.pens[((gfxdata[0] & 0xf0) >> 4) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset];
	3201	bitmap.pix32(ycnt, xcnt) = machine().pens[((gfxdata[0] & 0xf0) >> 4) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset];
3230	3202	else
3231		bitmap.pix32(ycnt, xcnt) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt), machine.pens[((gfxdata[0] & 0xf0) >> 4) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset], stv2_current_tilemap.alpha);
	3203	bitmap.pix32(ycnt, xcnt) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt), machine().pens[((gfxdata[0] & 0xf0) >> 4) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset], stv2_current_tilemap.alpha);
3232	3204	}
3233	3205	}
3234	3206	}
r20790	r20791
3250	3222	{
3251	3223	int xs = xcnt & xsizemask;
3252	3224
3253		if (!stv_vdp2_window_process(machine,xcnt,ycnt))
	3225	if (!stv_vdp2_window_process(xcnt,ycnt))
3254	3226	{
3255	3227	//60aee2c = $0013 at @605d838
3256	3228	if ((gfxdata[xs] & 0xff) || (stv2_current_tilemap.transparency == STV_TRANSPARENCY_NONE))
r20790	r20791
3258	3230	if (((xcnt + 0) <= screen_x) && (ycnt <= screen_y))
3259	3231	{
3260	3232	if ( stv2_current_tilemap.colour_calculation_enabled == 0 )
3261		bitmap.pix32(ycnt, xcnt) = machine.pens[(gfxdata[xs] & 0xff) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset];
	3233	bitmap.pix32(ycnt, xcnt) = machine().pens[(gfxdata[xs] & 0xff) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset];
3262	3234	else
3263		bitmap.pix32(ycnt, xcnt) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt), machine.pens[(gfxdata[xs] & 0xff) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset], stv2_current_tilemap.alpha);
	3235	bitmap.pix32(ycnt, xcnt) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt), machine().pens[(gfxdata[xs] & 0xff) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset], stv2_current_tilemap.alpha);
3264	3236	}
3265	3237	}
3266	3238	}
r20790	r20791
3293	3265	for (xcnt = cliprect.min_x; xcnt <= cliprect.max_x; xx+=stv2_current_tilemap.incx, xcnt++)
3294	3266	{
3295	3267	xs = xx >> 16;
3296		if (!stv_vdp2_window_process(machine,xcnt,ycnt))
	3268	if (!stv_vdp2_window_process(xcnt,ycnt))
3297	3269	{
3298	3270	if ((gfxdata[xs] & 0xff) || (stv2_current_tilemap.transparency == STV_TRANSPARENCY_NONE))
3299	3271	{
3300	3272	if (((xcnt + 0) <= screen_x) && (ycnt <= screen_y))
3301	3273	{
3302	3274	if ( stv2_current_tilemap.colour_calculation_enabled == 0 )
3303		bitmap.pix32(ycnt, xcnt) = machine.pens[(gfxdata[xs] & 0xff) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset];
	3275	bitmap.pix32(ycnt, xcnt) = machine().pens[(gfxdata[xs] & 0xff) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset];
3304	3276	else
3305		bitmap.pix32(ycnt, xcnt) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt), machine.pens[(gfxdata[xs] & 0xff) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset], stv2_current_tilemap.alpha);
	3277	bitmap.pix32(ycnt, xcnt) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt), machine().pens[(gfxdata[xs] & 0xff) | (stv2_current_tilemap.bitmap_palette_number * 0x100) | pal_color_offset], stv2_current_tilemap.alpha);
3306	3278	}
3307	3279	}
3308	3280	}
r20790	r20791
3318	3290	{
3319	3291	for (xcnt = 0; xcnt <xsize;xcnt++)
3320	3292	{
3321		if (!stv_vdp2_window_process(machine,xcnt,ycnt))
	3293	if (!stv_vdp2_window_process(xcnt,ycnt))
3322	3294	{
3323	3295	if (((gfxdata[0] & 0x07) | (gfxdata[1] & 0xff)) || (stv2_current_tilemap.transparency == STV_TRANSPARENCY_NONE))
3324	3296	{
3325	3297	if (((xcnt + 0) <= screen_x) && (ycnt <= screen_y))
3326	3298	{
3327	3299	if ( stv2_current_tilemap.colour_calculation_enabled == 0 )
3328		bitmap.pix32(ycnt, xcnt) = machine.pens[((gfxdata[0] & 0x07) * 0x100) | (gfxdata[1] & 0xff) | pal_color_offset];
	3300	bitmap.pix32(ycnt, xcnt) = machine().pens[((gfxdata[0] & 0x07) * 0x100) | (gfxdata[1] & 0xff) | pal_color_offset];
3329	3301	else
3330		bitmap.pix32(ycnt, xcnt) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt), machine.pens[((gfxdata[0] & 0x07) * 0x100) | (gfxdata[1] & 0xff) | pal_color_offset], stv2_current_tilemap.alpha);
	3302	bitmap.pix32(ycnt, xcnt) = alpha_blend_r32(bitmap.pix32(ycnt, xcnt), machine().pens[((gfxdata[0] & 0x07) * 0x100) | (gfxdata[1] & 0xff) | pal_color_offset], stv2_current_tilemap.alpha);
3331	3303	}
3332	3304	}
3333	3305	}
r20790	r20791
3365	3337	g = pal5bit(((gfxdata[2*xs] & 0x03) << 3) | ((gfxdata[2*xs+1] & 0xe0) >> 5));
3366	3338	r = pal5bit(gfxdata[2*xs+1] & 0x1f);
3367	3339	if(stv2_current_tilemap.fade_control & 1)
3368		stv_vdp2_compute_color_offset(machine,&r,&g,&b,stv2_current_tilemap.fade_control & 2);
	3340	stv_vdp2_compute_color_offset(&r,&g,&b,stv2_current_tilemap.fade_control & 2);
3369	3341
3370		if (!stv_vdp2_window_process(machine,xcnt,ycnt))
	3342	if (!stv_vdp2_window_process(xcnt,ycnt))
3371	3343	{
3372	3344	if (((xcnt + 0) <= screen_x) && (ycnt <= screen_y))
3373	3345	{
r20790	r20791
3407	3379	g = pal5bit(((gfxdata[2*xs] & 0x03) << 3) | ((gfxdata[2*xs+1] & 0xe0) >> 5));
3408	3380	r = pal5bit(gfxdata[2*xs+1] & 0x1f);
3409	3381	if(stv2_current_tilemap.fade_control & 1)
3410		stv_vdp2_compute_color_offset(machine, &r,&g,&b,stv2_current_tilemap.fade_control & 2);
	3382	stv_vdp2_compute_color_offset( &r,&g,&b,stv2_current_tilemap.fade_control & 2);
3411	3383
3412		if (!stv_vdp2_window_process(machine,xcnt,ycnt))
	3384	if (!stv_vdp2_window_process(xcnt,ycnt))
3413	3385	{
3414	3386	if ((gfxdata[2*xs] & 0x80) || (stv2_current_tilemap.transparency == STV_TRANSPARENCY_NONE))
3415	3387	{
r20790	r20791
3460	3432	r = ((dot_data & 0x000000ff) >> 0);
3461	3433
3462	3434	if(stv2_current_tilemap.fade_control & 1)
3463		stv_vdp2_compute_color_offset(machine,&r,&g,&b,stv2_current_tilemap.fade_control & 2);
	3435	stv_vdp2_compute_color_offset(&r,&g,&b,stv2_current_tilemap.fade_control & 2);
3464	3436
3465		if (!stv_vdp2_window_process(machine,xcnt,ycnt))
	3437	if (!stv_vdp2_window_process(xcnt,ycnt))
3466	3438	{
3467	3439	if (((xcnt + 0) <= screen_x) && (ycnt <= screen_y))
3468	3440	{
r20790	r20791
3653	3625	*_map = map;
3654	3626	}
3655	3627
3656		static void stv_vdp2_draw_basic_tilemap(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	3628	void saturn_state::stv_vdp2_draw_basic_tilemap(bitmap_rgb32 &bitmap, const rectangle &cliprect)
3657	3629	{
3658		saturn_state *state = machine.driver_data<saturn_state>();
3659	3630	/* hopefully this is easier to follow than it is efficient .. */
3660	3631
3661	3632	/* I call character patterns tiles .. even if they represent up to 4 tiles */
r20790	r20791
3934	3905	/* 1 word per tile mode with supplement bits */
3935	3906	if (stv2_current_tilemap.pattern_data_size ==1)
3936	3907	{
3937		data = state->m_vdp2_vram[newbase + offs/2];
	3908	data = m_vdp2_vram[newbase + offs/2];
3938	3909	data = (offs&1) ? (data & 0x0000ffff) : ((data & 0xffff0000) >> 16);
3939	3910
3940	3911	/* Supplement Mode 12 bits, no flip */
r20790	r20791
3959	3930	/* 2 words per tile, no supplement bits */
3960	3931	else
3961	3932	{
3962		data = state->m_vdp2_vram[newbase + offs];
	3933	data = m_vdp2_vram[newbase + offs];
3963	3934	tilecode = (data & 0x00007fff);
3964	3935	pal   = (data &    0x007f0000)>>16;
3965	3936	//          specialc = (data & 0x10000000)>>28;
r20790	r20791
4018	3989	else if ( stv2_current_tilemap.colour_depth == 3 )
4019	3990	{
4020	3991	/* RGB555 */
4021		stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,machine,tilecode+(0+(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos >> 16, drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
4022		stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,machine,tilecode+(1-(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,(drawxpos+tilesizex) >> 16,drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
4023		stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,machine,tilecode+(2+(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos >> 16,(drawypos+tilesizey) >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y1(tilesizey),stv2_current_tilemap.alpha);
4024		stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,machine,tilecode+(3-(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,(drawxpos+tilesizex)>> 16,(drawypos+tilesizey) >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y1(tilesizey),stv2_current_tilemap.alpha);
	3992	stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,tilecode+(0+(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos >> 16, drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
	3993	stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,tilecode+(1-(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,(drawxpos+tilesizex) >> 16,drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
	3994	stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,tilecode+(2+(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos >> 16,(drawypos+tilesizey) >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y1(tilesizey),stv2_current_tilemap.alpha);
	3995	stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,tilecode+(3-(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,(drawxpos+tilesizex)>> 16,(drawypos+tilesizey) >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y1(tilesizey),stv2_current_tilemap.alpha);
4025	3996	}
4026	3997	else
4027	3998	{
4028	3999	/* normal */
4029		stv_vdp2_drawgfxzoom(bitmap,cliprect,machine.gfx[gfx],tilecode+(0+(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos >> 16, drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
4030		stv_vdp2_drawgfxzoom(bitmap,cliprect,machine.gfx[gfx],tilecode+(1-(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,(drawxpos+tilesizex) >> 16,drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
4031		stv_vdp2_drawgfxzoom(bitmap,cliprect,machine.gfx[gfx],tilecode+(2+(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos >> 16,(drawypos+tilesizey) >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y1(tilesizey),stv2_current_tilemap.alpha);
4032		stv_vdp2_drawgfxzoom(bitmap,cliprect,machine.gfx[gfx],tilecode+(3-(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,(drawxpos+tilesizex)>> 16,(drawypos+tilesizey) >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y1(tilesizey),stv2_current_tilemap.alpha);
	4000	stv_vdp2_drawgfxzoom(bitmap,cliprect,machine().gfx[gfx],tilecode+(0+(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos >> 16, drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
	4001	stv_vdp2_drawgfxzoom(bitmap,cliprect,machine().gfx[gfx],tilecode+(1-(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,(drawxpos+tilesizex) >> 16,drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
	4002	stv_vdp2_drawgfxzoom(bitmap,cliprect,machine().gfx[gfx],tilecode+(2+(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos >> 16,(drawypos+tilesizey) >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y1(tilesizey),stv2_current_tilemap.alpha);
	4003	stv_vdp2_drawgfxzoom(bitmap,cliprect,machine().gfx[gfx],tilecode+(3-(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,(drawxpos+tilesizex)>> 16,(drawypos+tilesizey) >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y1(tilesizey),stv2_current_tilemap.alpha);
4033	4004	}
4034	4005	}
4035	4006	else
r20790	r20791
4038	4009	popmessage("Unsupported tilemap gfx zoom color depth = 4, tile size = 0, contact MAMEdev");
4039	4010	else if ( stv2_current_tilemap.colour_depth == 3)
4040	4011	{
4041		stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,machine,tilecode,pal,flipyx&1,flipyx&2, drawxpos >> 16, drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X,SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
	4012	stv_vdp2_drawgfxzoom_rgb555(bitmap,cliprect,tilecode,pal,flipyx&1,flipyx&2, drawxpos >> 16, drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X,SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
4042	4013	}
4043	4014	else
4044		stv_vdp2_drawgfxzoom(bitmap,cliprect,machine.gfx[gfx],tilecode,pal,flipyx&1,flipyx&2, drawxpos >> 16, drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X,SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
	4015	stv_vdp2_drawgfxzoom(bitmap,cliprect,machine().gfx[gfx],tilecode,pal,flipyx&1,flipyx&2, drawxpos >> 16, drawypos >> 16,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X,SCR_TILESIZE_Y,stv2_current_tilemap.alpha);
4045	4016	}
4046	4017	}
4047	4018	else
r20790	r20791
4054	4025	if ( stv2_current_tilemap.colour_depth == 4 )
4055	4026	{
4056	4027	/* normal */
4057		stv_vdp2_drawgfx_rgb888(bitmap,cliprect,machine,tilecode+(0+(flipyx&1)+(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos, drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4058		stv_vdp2_drawgfx_rgb888(bitmap,cliprect,machine,tilecode+(1-(flipyx&1)+(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos+8,drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4059		stv_vdp2_drawgfx_rgb888(bitmap,cliprect,machine,tilecode+(2+(flipyx&1)-(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos,drawypos+8,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4060		stv_vdp2_drawgfx_rgb888(bitmap,cliprect,machine,tilecode+(3-(flipyx&1)-(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos+8,drawypos+8,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4028	stv_vdp2_drawgfx_rgb888(bitmap,cliprect,tilecode+(0+(flipyx&1)+(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos, drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4029	stv_vdp2_drawgfx_rgb888(bitmap,cliprect,tilecode+(1-(flipyx&1)+(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos+8,drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4030	stv_vdp2_drawgfx_rgb888(bitmap,cliprect,tilecode+(2+(flipyx&1)-(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos,drawypos+8,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4031	stv_vdp2_drawgfx_rgb888(bitmap,cliprect,tilecode+(3-(flipyx&1)-(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos+8,drawypos+8,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4061	4032	}
4062	4033	else if ( stv2_current_tilemap.colour_depth == 3 )
4063	4034	{
4064	4035	/* normal */
4065		stv_vdp2_drawgfx_rgb555(bitmap,cliprect,machine,tilecode+(0+(flipyx&1)+(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos, drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4066		stv_vdp2_drawgfx_rgb555(bitmap,cliprect,machine,tilecode+(1-(flipyx&1)+(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos+8,drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4067		stv_vdp2_drawgfx_rgb555(bitmap,cliprect,machine,tilecode+(2+(flipyx&1)-(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos,drawypos+8,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4068		stv_vdp2_drawgfx_rgb555(bitmap,cliprect,machine,tilecode+(3-(flipyx&1)-(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos+8,drawypos+8,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4036	stv_vdp2_drawgfx_rgb555(bitmap,cliprect,tilecode+(0+(flipyx&1)+(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos, drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4037	stv_vdp2_drawgfx_rgb555(bitmap,cliprect,tilecode+(1-(flipyx&1)+(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos+8,drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4038	stv_vdp2_drawgfx_rgb555(bitmap,cliprect,tilecode+(2+(flipyx&1)-(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos,drawypos+8,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4039	stv_vdp2_drawgfx_rgb555(bitmap,cliprect,tilecode+(3-(flipyx&1)-(flipyx&2))*4,flipyx&1,flipyx&2,drawxpos+8,drawypos+8,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4069	4040	}
4070	4041	else if (stv2_current_tilemap.transparency == STV_TRANSPARENCY_ALPHA)
4071	4042	{
4072	4043	/* alpha */
4073		drawgfx_alpha(bitmap,cliprect,machine.gfx[gfx],tilecode+(0+(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos, drawypos,0,stv2_current_tilemap.alpha);
4074		drawgfx_alpha(bitmap,cliprect,machine.gfx[gfx],tilecode+(1-(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos+8,drawypos,0,stv2_current_tilemap.alpha);
4075		drawgfx_alpha(bitmap,cliprect,machine.gfx[gfx],tilecode+(2+(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos,drawypos+8,0,stv2_current_tilemap.alpha);
4076		drawgfx_alpha(bitmap,cliprect,machine.gfx[gfx],tilecode+(3-(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos+8,drawypos+8,0,stv2_current_tilemap.alpha);
	4044	drawgfx_alpha(bitmap,cliprect,machine().gfx[gfx],tilecode+(0+(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos, drawypos,0,stv2_current_tilemap.alpha);
	4045	drawgfx_alpha(bitmap,cliprect,machine().gfx[gfx],tilecode+(1-(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos+8,drawypos,0,stv2_current_tilemap.alpha);
	4046	drawgfx_alpha(bitmap,cliprect,machine().gfx[gfx],tilecode+(2+(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos,drawypos+8,0,stv2_current_tilemap.alpha);
	4047	drawgfx_alpha(bitmap,cliprect,machine().gfx[gfx],tilecode+(3-(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos+8,drawypos+8,0,stv2_current_tilemap.alpha);
4077	4048	}
4078	4049	else
4079	4050	{
4080	4051	/* normal */
4081		drawgfx_transpen(bitmap,cliprect,machine.gfx[gfx],tilecode+(0+(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos, drawypos,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
4082		drawgfx_transpen(bitmap,cliprect,machine.gfx[gfx],tilecode+(1-(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos+8,drawypos,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
4083		drawgfx_transpen(bitmap,cliprect,machine.gfx[gfx],tilecode+(2+(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos,drawypos+8,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
4084		drawgfx_transpen(bitmap,cliprect,machine.gfx[gfx],tilecode+(3-(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos+8,drawypos+8,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
	4052	drawgfx_transpen(bitmap,cliprect,machine().gfx[gfx],tilecode+(0+(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos, drawypos,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
	4053	drawgfx_transpen(bitmap,cliprect,machine().gfx[gfx],tilecode+(1-(flipyx&1)+(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos+8,drawypos,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
	4054	drawgfx_transpen(bitmap,cliprect,machine().gfx[gfx],tilecode+(2+(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos,drawypos+8,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
	4055	drawgfx_transpen(bitmap,cliprect,machine().gfx[gfx],tilecode+(3-(flipyx&1)-(flipyx&2))*tilecodespacing,pal,flipyx&1,flipyx&2,drawxpos+8,drawypos+8,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
4085	4056	}
4086	4057	}
4087	4058	else
4088	4059	{
4089	4060	if ( stv2_current_tilemap.colour_depth == 4)
4090	4061	{
4091		stv_vdp2_drawgfx_rgb888(bitmap,cliprect,machine,tilecode,flipyx&1,flipyx&2,drawxpos,drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4062	stv_vdp2_drawgfx_rgb888(bitmap,cliprect,tilecode,flipyx&1,flipyx&2,drawxpos,drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4092	4063	}
4093	4064	else if ( stv2_current_tilemap.colour_depth == 3)
4094	4065	{
4095		stv_vdp2_drawgfx_rgb555(bitmap,cliprect,machine,tilecode,flipyx&1,flipyx&2,drawxpos,drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
	4066	stv_vdp2_drawgfx_rgb555(bitmap,cliprect,tilecode,flipyx&1,flipyx&2,drawxpos,drawypos,stv2_current_tilemap.transparency,stv2_current_tilemap.alpha);
4096	4067	}
4097	4068	else
4098	4069	{
4099	4070	if (stv2_current_tilemap.transparency == STV_TRANSPARENCY_ALPHA)
4100		drawgfx_alpha(bitmap,cliprect,machine.gfx[gfx],tilecode,pal,flipyx&1,flipyx&2, drawxpos, drawypos,0,stv2_current_tilemap.alpha);
	4071	drawgfx_alpha(bitmap,cliprect,machine().gfx[gfx],tilecode,pal,flipyx&1,flipyx&2, drawxpos, drawypos,0,stv2_current_tilemap.alpha);
4101	4072	else
4102		drawgfx_transpen(bitmap,cliprect,machine.gfx[gfx],tilecode,pal,flipyx&1,flipyx&2, drawxpos, drawypos,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
	4073	drawgfx_transpen(bitmap,cliprect,machine().gfx[gfx],tilecode,pal,flipyx&1,flipyx&2, drawxpos, drawypos,(stv2_current_tilemap.transparency==STV_TRANSPARENCY_PEN)?0:-1);
4103	4074	}
4104	4075	}
4105	4076	drawxpos = olddrawxpos;
r20790	r20791
4154	4125
4155	4126	#define STV_VDP2_READ_VERTICAL_LINESCROLL( _val, _address ) \
4156	4127	{ \
4157		_val = state->m_vdp2_vram[ _address ]; \
	4128	_val = m_vdp2_vram[ _address ]; \
4158	4129	_val &= 0x07ffff00; \
4159	4130	if ( _val & 0x04000000 ) _val |= 0xf8000000; \
4160	4131	}
4161	4132
4162	4133
4163		static void stv_vdp2_check_tilemap_with_linescroll(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	4134	void saturn_state::stv_vdp2_check_tilemap_with_linescroll(bitmap_rgb32 &bitmap, const rectangle &cliprect)
4164	4135	{
4165		saturn_state *state = machine.driver_data<saturn_state>();
4166	4136	rectangle mycliprect;
4167	4137	int cur_line = cliprect.min_y;
4168	4138	int address;
r20790	r20791
4214	4184	}
4215	4185	else
4216	4186	{
4217		prev_scroll_values[i] = state->m_vdp2_vram[ (address / 4) + i ];
	4187	prev_scroll_values[i] = m_vdp2_vram[ (address / 4) + i ];
4218	4188	}
4219	4189	}
4220	4190
r20790	r20791
4239	4209	}
4240	4210	else
4241	4211	{
4242		scroll_values[i] = state->m_vdp2_vram[ (address / 4) + i ];
	4212	scroll_values[i] = m_vdp2_vram[ (address / 4) + i ];
4243	4213	}
4244	4214	}
4245	4215
r20790	r20791
4284	4254
4285	4255	//      if ( LOG_VDP2 ) logerror( "Linescroll: y < %d, %d >, scrollx = %d, scrolly = %d, incx = %f\n", mycliprect.min_y, mycliprect.max_y, stv2_current_tilemap.scrollx, stv2_current_tilemap.scrolly, (float)stv2_current_tilemap.incx/65536.0 );
4286	4256	// render current tilemap portion
4287		stv_vdp2_apply_window_on_layer(machine,mycliprect);
	4257	stv_vdp2_apply_window_on_layer(mycliprect);
4288	4258
4289	4259	if (stv2_current_tilemap.bitmap_enable) // this layer is a bitmap
4290	4260	{
r20790	r20791
4292	4262	//if ( window_applied && stv2_current_tilemap.colour_depth != 4)
4293	4263	//  stv2_current_tilemap.window_control = 0;
4294	4264
4295		stv_vdp2_draw_basic_bitmap(machine, bitmap, mycliprect);
	4265	stv_vdp2_draw_basic_bitmap(bitmap, mycliprect);
4296	4266	}
4297	4267	else
4298	4268	{
4299		stv_vdp2_draw_basic_tilemap(machine, bitmap, mycliprect);
	4269	stv_vdp2_draw_basic_tilemap(bitmap, mycliprect);
4300	4270	}
4301	4271
4302	4272	// update parameters for next iteration
r20790	r20791
4305	4275	}
4306	4276	}
4307	4277
4308		static void stv_vdp2_draw_line(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	4278	void saturn_state::stv_vdp2_draw_line(bitmap_rgb32 &bitmap, const rectangle &cliprect)
4309	4279	{
4310		saturn_state *state = machine.driver_data<saturn_state>();
4311	4280	int x,y;
4312		UINT8* gfxdata = state->m_vdp2.gfx_decode;
	4281	UINT8* gfxdata = m_vdp2.gfx_decode;
4313	4282	UINT32 base_offs,base_mask;
4314	4283	UINT32 pix;
4315	4284	UINT8 interlace;
r20790	r20791
4333	4302	pen = (gfxdata[base_offs+0]<<8)|gfxdata[base_offs+1];
4334	4303	pix = bitmap.pix32(y, x);
4335	4304
4336		bitmap.pix32(y, x) = stv_add_blend(machine.pens[pen & 0x7ff],pix);
	4305	bitmap.pix32(y, x) = stv_add_blend(machine().pens[pen & 0x7ff],pix);
4337	4306	}
4338	4307	}
4339	4308	}
4340	4309	}
4341	4310
4342		static void stv_vdp2_draw_mosaic(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 is_roz)
	4311	void saturn_state::stv_vdp2_draw_mosaic(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 is_roz)
4343	4312	{
4344		saturn_state *state = machine.driver_data<saturn_state>();
4345	4313	int x,y,xi,yi;
4346	4314	UINT8 h_size,v_size;
4347	4315	UINT32 pix;
r20790	r20791
4371	4339	}
4372	4340	}
4373	4341
4374		static void stv_vdp2_check_tilemap(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	4342	void saturn_state::stv_vdp2_check_tilemap(bitmap_rgb32 &bitmap, const rectangle &cliprect)
4375	4343	{
4376	4344	/* the idea is here we check the tilemap capabilities / whats enabled and call an appropriate tilemap drawing routine, or
4377	4345	at the very list throw up a few errors if the tilemaps want to do something we don't support yet */
4378		saturn_state *state = machine.driver_data<saturn_state>();
4379
4380	4346	//  int window_applied = 0;
4381	4347	rectangle mycliprect = cliprect;
4382	4348
r20790	r20791
4384	4350	stv2_current_tilemap.vertical_linescroll_enable ||
4385	4351	stv2_current_tilemap.linezoom_enable )
4386	4352	{
4387		stv_vdp2_check_tilemap_with_linescroll(machine, bitmap, cliprect);
	4353	stv_vdp2_check_tilemap_with_linescroll(bitmap, cliprect);
4388	4354	return;
4389	4355	}
4390	4356
4391	4357	//  window_applied =
4392		stv_vdp2_apply_window_on_layer(machine,mycliprect);
	4358	stv_vdp2_apply_window_on_layer(mycliprect);
4393	4359
4394	4360	if (stv2_current_tilemap.bitmap_enable) // this layer is a bitmap
4395	4361	{
r20790	r20791
4397	4363	//if ( window_applied && stv2_current_tilemap.colour_depth != 4)
4398	4364	//  stv2_current_tilemap.window_control = 0;
4399	4365
4400		stv_vdp2_draw_basic_bitmap(machine, bitmap, mycliprect);
	4366	stv_vdp2_draw_basic_bitmap(bitmap, mycliprect);
4401	4367	}
4402	4368	else
4403	4369	{
4404		stv_vdp2_draw_basic_tilemap(machine, bitmap, mycliprect);
	4370	stv_vdp2_draw_basic_tilemap(bitmap, mycliprect);
4405	4371	}
4406	4372
4407	4373	/* post-processing functions (TODO: needs layer bitmaps to be individual planes to work correctly) */
4408	4374	if(stv2_current_tilemap.line_screen_enabled && TEST_FUNCTIONS)
4409		stv_vdp2_draw_line(machine,bitmap,cliprect);
	4375	stv_vdp2_draw_line(bitmap,cliprect);
4410	4376
4411	4377	if(stv2_current_tilemap.mosaic_screen_enabled && TEST_FUNCTIONS)
4412		stv_vdp2_draw_mosaic(machine,bitmap,cliprect,stv2_current_tilemap.layer_name & 0x80);
	4378	stv_vdp2_draw_mosaic(bitmap,cliprect,stv2_current_tilemap.layer_name & 0x80);
4413	4379
4414	4380
4415	4381	{
r20790	r20791
4483	4449	}
4484	4450	}
4485	4451
4486		static void stv_vdp2_draw_rotation_screen(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, int iRP);
4487	4452
4488
4489		static void stv_vdp2_copy_roz_bitmap(bitmap_rgb32 &bitmap,
4490		running_machine &machine,
	4453	void saturn_state::stv_vdp2_copy_roz_bitmap(bitmap_rgb32 &bitmap,
4491	4454	bitmap_rgb32 &roz_bitmap,
4492	4455	const rectangle &cliprect,
4493	4456	int iRP,
r20790	r20791
4496	4459	int planerenderedsizex,
4497	4460	int planerenderedsizey)
4498	4461	{
4499		saturn_state *state = machine.driver_data<saturn_state>();
4500	4462	INT32 xsp, ysp, xp, yp, dx, dy, x, y, xs, ys, dxs, dys;
4501	4463	INT32 vcnt, hcnt;
4502	4464	INT32 kx, ky;
r20790	r20791
4561	4523	{
4562	4524	if ( STV_VDP2_CRKTE == 0 )
4563	4525	{
4564		coeff_table_base = state->m_vdp2_vram;
	4526	coeff_table_base = m_vdp2_vram;
4565	4527	}
4566	4528	else
4567	4529	{
4568		coeff_table_base = state->m_vdp2_cram;
	4530	coeff_table_base = m_vdp2_cram;
4569	4531	}
4570	4532	if ( coeff_table_size == 0 )
4571	4533	{
r20790	r20791
4728	4690	if (pix & 0xffffff)
4729	4691	{
4730	4692	if(stv2_current_tilemap.fade_control & 1)
4731		stv_vdp2_compute_color_offset_UINT32(machine,&pix,stv2_current_tilemap.fade_control & 2);
	4693	stv_vdp2_compute_color_offset_UINT32(&pix,stv2_current_tilemap.fade_control & 2);
4732	4694
4733	4695	line[hcnt] = pix;
4734	4696	}
4735	4697	break;
4736	4698	case STV_TRANSPARENCY_NONE:
4737	4699	if(stv2_current_tilemap.fade_control & 1)
4738		stv_vdp2_compute_color_offset_UINT32(machine,&pix,stv2_current_tilemap.fade_control & 2);
	4700	stv_vdp2_compute_color_offset_UINT32(&pix,stv2_current_tilemap.fade_control & 2);
4739	4701
4740	4702	line[hcnt] = pix;
4741	4703	break;
r20790	r20791
4743	4705	if (pix & 0xffffff)
4744	4706	{
4745	4707	if(stv2_current_tilemap.fade_control & 1)
4746		stv_vdp2_compute_color_offset_UINT32(machine,&pix,stv2_current_tilemap.fade_control & 2);
	4708	stv_vdp2_compute_color_offset_UINT32(&pix,stv2_current_tilemap.fade_control & 2);
4747	4709
4748	4710	line[hcnt] = alpha_blend_r32( line[hcnt], pix, stv2_current_tilemap.alpha );
4749	4711	}
r20790	r20791
4752	4714	if (pix & 0xffffff)
4753	4715	{
4754	4716	if(stv2_current_tilemap.fade_control & 1)
4755		stv_vdp2_compute_color_offset_UINT32(machine,&pix,stv2_current_tilemap.fade_control & 2);
	4717	stv_vdp2_compute_color_offset_UINT32(&pix,stv2_current_tilemap.fade_control & 2);
4756	4718
4757	4719	line[hcnt] = stv_add_blend( line[hcnt], pix );
4758	4720	}
r20790	r20791
4839	4801	if (pix & 0xffffff)
4840	4802	{
4841	4803	if(stv2_current_tilemap.fade_control & 1)
4842		stv_vdp2_compute_color_offset_UINT32(machine,&pix,stv2_current_tilemap.fade_control & 2);
	4804	stv_vdp2_compute_color_offset_UINT32(&pix,stv2_current_tilemap.fade_control & 2);
4843	4805
4844	4806	line[hcnt] = pix;
4845	4807	}
4846	4808	break;
4847	4809	case STV_TRANSPARENCY_NONE:
4848	4810	if(stv2_current_tilemap.fade_control & 1)
4849		stv_vdp2_compute_color_offset_UINT32(machine,&pix,stv2_current_tilemap.fade_control & 2);
	4811	stv_vdp2_compute_color_offset_UINT32(&pix,stv2_current_tilemap.fade_control & 2);
4850	4812
4851	4813	line[hcnt] = pix;
4852	4814	break;
r20790	r20791
4854	4816	if (pix & 0xffffff)
4855	4817	{
4856	4818	if(stv2_current_tilemap.fade_control & 1)
4857		stv_vdp2_compute_color_offset_UINT32(machine,&pix,stv2_current_tilemap.fade_control & 2);
	4819	stv_vdp2_compute_color_offset_UINT32(&pix,stv2_current_tilemap.fade_control & 2);
4858	4820
4859	4821	line[hcnt] = alpha_blend_r32( line[hcnt], pix, stv2_current_tilemap.alpha );
4860	4822	}
r20790	r20791
4863	4825	if (pix & 0xffffff)
4864	4826	{
4865	4827	if(stv2_current_tilemap.fade_control & 1)
4866		stv_vdp2_compute_color_offset_UINT32(machine,&pix,stv2_current_tilemap.fade_control & 2);
	4828	stv_vdp2_compute_color_offset_UINT32(&pix,stv2_current_tilemap.fade_control & 2);
4867	4829
4868	4830	line[hcnt] = stv_add_blend( line[hcnt], pix );
4869	4831	}
r20790	r20791
4874	4836	}
4875	4837	}
4876	4838
4877		static void stv_vdp2_draw_NBG0(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	4839	void saturn_state::stv_vdp2_draw_NBG0(bitmap_rgb32 &bitmap, const rectangle &cliprect)
4878	4840	{
4879		saturn_state *state = machine.driver_data<saturn_state>();
4880	4841	UINT32 base_mask;
4881	4842
4882	4843	base_mask = STV_VDP2_VRAMSZ ? 0x7ffff : 0x3ffff;
r20790	r20791
4951	4912	stv2_current_tilemap.plane_size = (STV_VDP2_R1ON) ? STV_VDP2_RBPLSZ : STV_VDP2_N0PLSZ;
4952	4913	stv2_current_tilemap.colour_ram_address_offset = STV_VDP2_N0CAOS;
4953	4914	stv2_current_tilemap.fade_control = (STV_VDP2_N0COEN * 1) | (STV_VDP2_N0COSL * 2);
4954		stv_vdp2_check_fade_control_for_layer(machine);
	4915	stv_vdp2_check_fade_control_for_layer();
4955	4916	stv2_current_tilemap.window_control = (STV_VDP2_N0LOG << 0) |
4956	4917	(STV_VDP2_N0W0E << 1) |
4957	4918	(STV_VDP2_N0W1E << 2) |
r20790	r20791
4967	4928
4968	4929	if ( stv2_current_tilemap.enabled && (!(STV_VDP2_R1ON))) /* TODO: check cycle pattern for RBG1 */
4969	4930	{
4970		stv2_current_tilemap.enabled = stv_vdp2_check_vram_cycle_pattern_registers( machine, STV_VDP2_CP_NBG0_PNMDR, STV_VDP2_CP_NBG0_CPDR, stv2_current_tilemap.bitmap_enable );
	4931	stv2_current_tilemap.enabled = stv_vdp2_check_vram_cycle_pattern_registers( STV_VDP2_CP_NBG0_PNMDR, STV_VDP2_CP_NBG0_CPDR, stv2_current_tilemap.bitmap_enable );
4971	4932	}
4972	4933
4973	4934	if(STV_VDP2_R1ON)
4974		stv_vdp2_draw_rotation_screen(machine, bitmap, cliprect, 2 );
	4935	stv_vdp2_draw_rotation_screen(bitmap, cliprect, 2 );
4975	4936	else
4976		stv_vdp2_check_tilemap(machine, bitmap, cliprect);
	4937	stv_vdp2_check_tilemap(bitmap, cliprect);
4977	4938	}
4978	4939
4979		static void stv_vdp2_draw_NBG1(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	4940	void saturn_state::stv_vdp2_draw_NBG1(bitmap_rgb32 &bitmap, const rectangle &cliprect)
4980	4941	{
4981		saturn_state *state = machine.driver_data<saturn_state>();
4982	4942	UINT32 base_mask;
4983	4943
4984	4944	base_mask = STV_VDP2_VRAMSZ ? 0x7ffff : 0x3ffff;
r20790	r20791
5052	5012	stv2_current_tilemap.plane_size = STV_VDP2_N1PLSZ;
5053	5013	stv2_current_tilemap.colour_ram_address_offset = STV_VDP2_N1CAOS;
5054	5014	stv2_current_tilemap.fade_control = (STV_VDP2_N1COEN * 1) | (STV_VDP2_N1COSL * 2);
5055		stv_vdp2_check_fade_control_for_layer(machine);
	5015	stv_vdp2_check_fade_control_for_layer();
5056	5016	stv2_current_tilemap.window_control = (STV_VDP2_N1LOG << 0) |
5057	5017	(STV_VDP2_N1W0E << 1) |
5058	5018	(STV_VDP2_N1W1E << 2) |
r20790	r20791
5068	5028
5069	5029	if ( stv2_current_tilemap.enabled )
5070	5030	{
5071		stv2_current_tilemap.enabled = stv_vdp2_check_vram_cycle_pattern_registers( machine, STV_VDP2_CP_NBG1_PNMDR, STV_VDP2_CP_NBG1_CPDR, stv2_current_tilemap.bitmap_enable );
	5031	stv2_current_tilemap.enabled = stv_vdp2_check_vram_cycle_pattern_registers( STV_VDP2_CP_NBG1_PNMDR, STV_VDP2_CP_NBG1_CPDR, stv2_current_tilemap.bitmap_enable );
5072	5032	}
5073	5033
5074		stv_vdp2_check_tilemap(machine, bitmap, cliprect);
	5034	stv_vdp2_check_tilemap(bitmap, cliprect);
5075	5035	}
5076	5036
5077		static void stv_vdp2_draw_NBG2(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	5037	void saturn_state::stv_vdp2_draw_NBG2(bitmap_rgb32 &bitmap, const rectangle &cliprect)
5078	5038	{
5079		saturn_state *state = machine.driver_data<saturn_state>();
5080
5081	5039	/*
5082	5040	NBG2 is the first of the 2 more basic tilemaps, it has exactly the same capabilities as NBG3
5083	5041
r20790	r20791
5155	5113
5156	5114	stv2_current_tilemap.colour_ram_address_offset = STV_VDP2_N2CAOS;
5157	5115	stv2_current_tilemap.fade_control = (STV_VDP2_N2COEN * 1) | (STV_VDP2_N2COSL * 2);
5158		stv_vdp2_check_fade_control_for_layer(machine);
	5116	stv_vdp2_check_fade_control_for_layer();
5159	5117	stv2_current_tilemap.window_control = (STV_VDP2_N2LOG << 0) |
5160	5118	(STV_VDP2_N2W0E << 1) |
5161	5119	(STV_VDP2_N2W1E << 2) |
r20790	r20791
5173	5131
5174	5132	if ( stv2_current_tilemap.enabled )
5175	5133	{
5176		stv2_current_tilemap.enabled = stv_vdp2_check_vram_cycle_pattern_registers( machine, STV_VDP2_CP_NBG2_PNMDR, STV_VDP2_CP_NBG2_CPDR, stv2_current_tilemap.bitmap_enable );
	5134	stv2_current_tilemap.enabled = stv_vdp2_check_vram_cycle_pattern_registers( STV_VDP2_CP_NBG2_PNMDR, STV_VDP2_CP_NBG2_CPDR, stv2_current_tilemap.bitmap_enable );
5177	5135	}
5178	5136
5179		stv_vdp2_check_tilemap(machine, bitmap, cliprect);
	5137	stv_vdp2_check_tilemap(bitmap, cliprect);
5180	5138	}
5181	5139
5182		static void stv_vdp2_draw_NBG3(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	5140	void saturn_state::stv_vdp2_draw_NBG3(bitmap_rgb32 &bitmap, const rectangle &cliprect)
5183	5141	{
5184		saturn_state *state = machine.driver_data<saturn_state>();
5185	5142	/*
5186	5143	NBG3 is the second of the 2 more basic tilemaps, it has exactly the same capabilities as NBG2
5187	5144
r20790	r20791
5259	5216
5260	5217	stv2_current_tilemap.colour_ram_address_offset = STV_VDP2_N3CAOS;
5261	5218	stv2_current_tilemap.fade_control = (STV_VDP2_N3COEN * 1) | (STV_VDP2_N3COSL * 2);
5262		stv_vdp2_check_fade_control_for_layer(machine);
	5219	stv_vdp2_check_fade_control_for_layer();
5263	5220	stv2_current_tilemap.window_control = (STV_VDP2_N3LOG << 0) |
5264	5221	(STV_VDP2_N3W0E << 1) |
5265	5222	(STV_VDP2_N3W1E << 2) |
r20790	r20791
5277	5234
5278	5235	if ( stv2_current_tilemap.enabled )
5279	5236	{
5280		stv2_current_tilemap.enabled = stv_vdp2_check_vram_cycle_pattern_registers( machine, STV_VDP2_CP_NBG3_PNMDR, STV_VDP2_CP_NBG3_CPDR, stv2_current_tilemap.bitmap_enable );
	5237	stv2_current_tilemap.enabled = stv_vdp2_check_vram_cycle_pattern_registers( STV_VDP2_CP_NBG3_PNMDR, STV_VDP2_CP_NBG3_CPDR, stv2_current_tilemap.bitmap_enable );
5281	5238	}
5282	5239
5283		stv_vdp2_check_tilemap(machine, bitmap, cliprect);
	5240	stv_vdp2_check_tilemap(bitmap, cliprect);
5284	5241	}
5285	5242
5286	5243
5287		static void stv_vdp2_draw_rotation_screen(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, int iRP)
	5244	void saturn_state::stv_vdp2_draw_rotation_screen(bitmap_rgb32 &bitmap, const rectangle &cliprect, int iRP)
5288	5245	{
5289		saturn_state *state = machine.driver_data<saturn_state>();
5290	5246	rectangle roz_clip_rect, mycliprect;
5291	5247	int planesizex = 0, planesizey = 0;
5292	5248	int planerenderedsizex, planerenderedsizey;
r20790	r20791
5337	5293	stv2_current_tilemap.map_count = 16;
5338	5294	}
5339	5295
5340		stv_vdp2_fill_rotation_parameter_table(machine, iRP);
	5296	stv_vdp2_fill_rotation_parameter_table(iRP);
5341	5297
5342	5298	if ( iRP == 1 )
5343	5299	{
r20790	r20791
5384	5340	stv2_current_tilemap.scrollx = stv_current_rotation_parameter_table.mx >> 16;
5385	5341	stv2_current_tilemap.scrolly = stv_current_rotation_parameter_table.my >> 16;
5386	5342
5387		stv_vdp2_check_tilemap(machine, bitmap,cliprect);
	5343	stv_vdp2_check_tilemap(bitmap,cliprect);
5388	5344	}
5389	5345	else
5390	5346	{
5391		if ( !state->m_vdp2.roz_bitmap[iRP-1].valid() )
5392		state->m_vdp2.roz_bitmap[iRP-1].allocate(4096, 4096);
	5347	if ( !m_vdp2.roz_bitmap[iRP-1].valid() )
	5348	m_vdp2.roz_bitmap[iRP-1].allocate(4096, 4096);
5393	5349
5394	5350	roz_clip_rect.min_x = roz_clip_rect.min_y = 0;
5395	5351	if ( (iRP == 1 && STV_VDP2_RAOVR == 3) ||
r20790	r20791
5426	5382	if ( (stv_rbg_cache_data.is_cache_dirty & iRP) ||
5427	5383	memcmp(&stv_rbg_cache_data.layer_data[iRP-1],&stv2_current_tilemap,sizeof(stv2_current_tilemap)) != 0 )
5428	5384	{
5429		state->m_vdp2.roz_bitmap[iRP-1].fill(get_black_pen(machine), roz_clip_rect );
5430		stv_vdp2_check_tilemap(machine, state->m_vdp2.roz_bitmap[iRP-1], roz_clip_rect);
	5385	m_vdp2.roz_bitmap[iRP-1].fill(get_black_pen(machine()), roz_clip_rect );
	5386	stv_vdp2_check_tilemap(m_vdp2.roz_bitmap[iRP-1], roz_clip_rect);
5431	5387	// prepare cache data
5432	5388	stv_rbg_cache_data.watch_vdp2_vram_writes |= iRP;
5433	5389	stv_rbg_cache_data.is_cache_dirty &= ~iRP;
r20790	r20791
5453	5409	if ( window_control )
5454	5410	{
5455	5411	stv2_current_tilemap.window_control = window_control;
5456		stv_vdp2_apply_window_on_layer(machine,mycliprect);
	5412	stv_vdp2_apply_window_on_layer(mycliprect);
5457	5413	}
5458	5414
5459	5415	stv2_current_tilemap.fade_control = fade_control;
5460	5416
5461	5417	g_profiler.start(PROFILER_USER2);
5462		stv_vdp2_copy_roz_bitmap(bitmap, machine, state->m_vdp2.roz_bitmap[iRP-1], mycliprect, iRP, planesizex, planesizey, planerenderedsizex, planerenderedsizey );
	5418	stv_vdp2_copy_roz_bitmap(bitmap, m_vdp2.roz_bitmap[iRP-1], mycliprect, iRP, planesizex, planesizey, planerenderedsizex, planerenderedsizey );
5463	5419	g_profiler.stop();
5464	5420	}
5465	5421
5466	5422	}
5467	5423
5468		static void stv_vdp2_draw_RBG0(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	5424	void saturn_state::stv_vdp2_draw_RBG0(bitmap_rgb32 &bitmap, const rectangle &cliprect)
5469	5425	{
5470		saturn_state *state = machine.driver_data<saturn_state>();
5471	5426	/*
5472	5427	Colours           : 16, 256, 2048, 32768, 16770000
5473	5428	Char Size         : 1x1 cells, 2x2 cells
r20790	r20791
5520	5475
5521	5476	stv2_current_tilemap.colour_ram_address_offset = STV_VDP2_R0CAOS;
5522	5477	stv2_current_tilemap.fade_control = (STV_VDP2_R0COEN * 1) | (STV_VDP2_R0COSL * 2);
5523		stv_vdp2_check_fade_control_for_layer(machine);
	5478	stv_vdp2_check_fade_control_for_layer();
5524	5479	stv2_current_tilemap.window_control = (STV_VDP2_R0LOG << 0) |
5525	5480	(STV_VDP2_R0W0E << 1) |
5526	5481	(STV_VDP2_R0W1E << 2) |
r20790	r20791
5551	5506	switch(STV_VDP2_RPMD)
5552	5507	{
5553	5508	case 0://Rotation Parameter A
5554		stv_vdp2_draw_rotation_screen(machine, bitmap, cliprect, 1 );
	5509	stv_vdp2_draw_rotation_screen(bitmap, cliprect, 1 );
5555	5510	break;
5556	5511	case 1://Rotation Parameter B
5557	5512	//case 2:
5558		stv_vdp2_draw_rotation_screen(machine, bitmap, cliprect, 2 );
	5513	stv_vdp2_draw_rotation_screen(bitmap, cliprect, 2 );
5559	5514	break;
5560	5515	case 2://Rotation Parameter A & B CKTE
5561		stv_vdp2_draw_rotation_screen(machine, bitmap, cliprect, 2 );
5562		stv_vdp2_draw_rotation_screen(machine, bitmap, cliprect, 1 );
	5516	stv_vdp2_draw_rotation_screen(bitmap, cliprect, 2 );
	5517	stv_vdp2_draw_rotation_screen(bitmap, cliprect, 1 );
5563	5518	break;
5564	5519	case 3://Rotation Parameter A & B Window (wrong)
5565		stv_vdp2_draw_rotation_screen(machine, bitmap, cliprect, 1 );
	5520	stv_vdp2_draw_rotation_screen(bitmap, cliprect, 1 );
5566	5521	break;
5567	5522	}
5568	5523
5569	5524	}
5570	5525
5571		static void stv_vdp2_draw_back(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	5526	void saturn_state::stv_vdp2_draw_back(bitmap_rgb32 &bitmap, const rectangle &cliprect)
5572	5527	{
5573		saturn_state *state = machine.driver_data<saturn_state>();
5574	5528	int x,y;
5575		UINT8* gfxdata = state->m_vdp2.gfx_decode;
	5529	UINT8* gfxdata = m_vdp2.gfx_decode;
5576	5530	UINT32 base_offs,base_mask;
5577	5531	UINT8 interlace;
5578	5532
r20790	r20791
5582	5536
5583	5537	/* draw black if BDCLMD and DISP are cleared */
5584	5538	if(!(STV_VDP2_BDCLMD) && !(STV_VDP2_DISP))
5585		bitmap.fill(get_black_pen(machine), cliprect);
	5539	bitmap.fill(get_black_pen(machine()), cliprect);
5586	5540	else
5587	5541	{
5588	5542	base_mask = STV_VDP2_VRAMSZ ? 0x7ffff : 0x3ffff;
r20790	r20791
5603	5557	g = pal5bit((dot & 0x03e0) >> 5);
5604	5558	r = pal5bit( dot & 0x001f);
5605	5559	if(STV_VDP2_BKCOEN)
5606		stv_vdp2_compute_color_offset( machine, &r, &g, &b, STV_VDP2_BKCOSL );
	5560	stv_vdp2_compute_color_offset( &r, &g, &b, STV_VDP2_BKCOSL );
5607	5561
5608	5562	bitmap.pix32(y, x) = MAKE_RGB(r, g, b);
5609	5563	}
r20790	r20791
5611	5565	}
5612	5566	}
5613	5567
5614		READ32_HANDLER ( saturn_vdp2_vram_r )
	5568	READ32_MEMBER ( saturn_state::saturn_vdp2_vram_r )
5615	5569	{
5616		saturn_state *state = space.machine().driver_data<saturn_state>();
5617
5618		return state->m_vdp2_vram[offset];
	5570	return m_vdp2_vram[offset];
5619	5571	}
5620	5572
5621		WRITE32_HANDLER ( saturn_vdp2_vram_w )
	5573	WRITE32_MEMBER ( saturn_state::saturn_vdp2_vram_w )
5622	5574	{
5623		saturn_state *state = space.machine().driver_data<saturn_state>();
5624		UINT8* gfxdata = state->m_vdp2.gfx_decode;
	5575	UINT8* gfxdata = m_vdp2.gfx_decode;
5625	5576
5626		COMBINE_DATA(&state->m_vdp2_vram[offset]);
	5577	COMBINE_DATA(&m_vdp2_vram[offset]);
5627	5578
5628		data = state->m_vdp2_vram[offset];
	5579	data = m_vdp2_vram[offset];
5629	5580	/* put in gfx region for easy decoding */
5630	5581	gfxdata[offset*4+0] = (data & 0xff000000) >> 24;
5631	5582	gfxdata[offset*4+1] = (data & 0x00ff0000) >> 16;
r20790	r20791
5675	5626
5676	5627	}
5677	5628
5678		READ16_HANDLER ( saturn_vdp2_regs_r )
	5629	READ16_MEMBER ( saturn_state::saturn_vdp2_regs_r )
5679	5630	{
5680		saturn_state *state = space.machine().driver_data<saturn_state>();
5681
5682	5631	switch(offset)
5683	5632	{
5684	5633	case 0x002/2:
r20790	r20791
5689	5638	/* TODO: handle various h/v settings. */
5690	5639	if(!space.debugger_access())
5691	5640	{
5692		state->m_vdp2.h_count = space.machine().primary_screen->hpos() & 0x3ff;
5693		state->m_vdp2.v_count = space.machine().primary_screen->vpos() & (STV_VDP2_LSMD == 3 ? 0x7ff : 0x3ff);
	5641	m_vdp2.h_count = space.machine().primary_screen->hpos() & 0x3ff;
	5642	m_vdp2.v_count = space.machine().primary_screen->vpos() & (STV_VDP2_LSMD == 3 ? 0x7ff : 0x3ff);
5694	5643	/* latch flag */
5695		state->m_vdp2.exltfg |= 1;
	5644	m_vdp2.exltfg |= 1;
5696	5645	}
5697	5646	}
5698	5647
r20790	r20791
5702	5651	{
5703	5652	/*Screen Status Register*/
5704	5653	/*VBLANK              HBLANK            ODD               PAL    */
5705		state->m_vdp2_regs[offset] = (state->m_vdp2.exltfg<<9) |
5706		(state->m_vdp2.exsyfg<<8) |
5707		(get_vblank(space.machine()) << 3) |
5708		(get_hblank(space.machine()) << 2) |
5709		(get_odd_bit(space.machine()) << 1) |
5710		(state->m_vdp2.pal << 0);
	5654	m_vdp2_regs[offset] = (m_vdp2.exltfg<<9) |
	5655	(m_vdp2.exsyfg<<8) |
	5656	(get_vblank() << 3) |
	5657	(get_hblank() << 2) |
	5658	(get_odd_bit() << 1) |
	5659	(m_vdp2.pal << 0);
5711	5660
5712	5661	/* vblank bit is always 1 if DISP bit is disabled */
5713	5662	if(!STV_VDP2_DISP)
5714		state->m_vdp2_regs[offset] |= 1 << 3;
	5663	m_vdp2_regs[offset] |= 1 << 3;
5715	5664
5716	5665	/* HV latches clears if this register is read */
5717	5666	if(!space.debugger_access())
5718	5667	{
5719		state->m_vdp2.exltfg &= ~1;
5720		state->m_vdp2.exsyfg &= ~1;
	5668	m_vdp2.exltfg &= ~1;
	5669	m_vdp2.exsyfg &= ~1;
5721	5670	}
5722	5671	break;
5723	5672	}
5724	5673	case 0x006/2:
5725	5674	{
5726		state->m_vdp2_regs[offset] = (STV_VDP2_VRAMSZ << 15) |
	5675	m_vdp2_regs[offset] = (STV_VDP2_VRAMSZ << 15) |
5727	5676	((0 << 0) & 0xf); // VDP2 version
5728	5677
5729	5678	if(!space.debugger_access())
r20790	r20791
5734	5683	/* HCNT */
5735	5684	case 0x008/2:
5736	5685	{
5737		state->m_vdp2_regs[offset] = (state->m_vdp2.h_count);
	5686	m_vdp2_regs[offset] = (m_vdp2.h_count);
5738	5687	break;
5739	5688	}
5740	5689
5741	5690	/* VCNT */
5742	5691	case 0x00a/2:
5743	5692	{
5744		state->m_vdp2_regs[offset] = (state->m_vdp2.v_count);
	5693	m_vdp2_regs[offset] = (m_vdp2.v_count);
5745	5694	break;
5746	5695	}
5747	5696
r20790	r20791
5751	5700	break;
5752	5701	}
5753	5702
5754		return state->m_vdp2_regs[offset];
	5703	return m_vdp2_regs[offset];
5755	5704	}
5756	5705
5757		READ32_HANDLER ( saturn_vdp2_cram_r )
	5706	READ32_MEMBER ( saturn_state::saturn_vdp2_cram_r )
5758	5707	{
5759		saturn_state *state = space.machine().driver_data<saturn_state>();
5760
5761	5708	offset &= (0xfff) >> (2);
5762
5763		return state->m_vdp2_cram[offset];
	5709	return m_vdp2_cram[offset];
5764	5710	}
5765	5711
5766	5712
5767	5713
5768	5714
5769		WRITE32_HANDLER ( saturn_vdp2_cram_w )
	5715	WRITE32_MEMBER ( saturn_state::saturn_vdp2_cram_w )
5770	5716	{
5771		saturn_state *state = space.machine().driver_data<saturn_state>();
5772	5717	int r,g,b;
5773	5718	UINT8 cmode0;
5774	5719
5775	5720	cmode0 = (STV_VDP2_CRMD & 3) == 0;
5776	5721
5777	5722	offset &= (0xfff) >> (2);
5778		COMBINE_DATA(&state->m_vdp2_cram[offset]);
	5723	COMBINE_DATA(&m_vdp2_cram[offset]);
5779	5724
5780	5725	switch( STV_VDP2_CRMD )
5781	5726	{
r20790	r20791
5785	5730	{
5786	5731	//offset &= (0xfff) >> 2;
5787	5732
5788		b = ((state->m_vdp2_cram[offset] & 0x00ff0000) >> 16);
5789		g = ((state->m_vdp2_cram[offset] & 0x0000ff00) >> 8);
5790		r = ((state->m_vdp2_cram[offset] & 0x000000ff) >> 0);
	5733	b = ((m_vdp2_cram[offset] & 0x00ff0000) >> 16);
	5734	g = ((m_vdp2_cram[offset] & 0x0000ff00) >> 8);
	5735	r = ((m_vdp2_cram[offset] & 0x000000ff) >> 0);
5791	5736	palette_set_color(space.machine(),offset,MAKE_RGB(r,g,b));
5792	5737	palette_set_color(space.machine(),offset^0x400,MAKE_RGB(r,g,b));
5793	5738	}
r20790	r20791
5798	5743	{
5799	5744	offset &= (0xfff) >> (cmode0+2);
5800	5745
5801		b = ((state->m_vdp2_cram[offset] & 0x00007c00) >> 10);
5802		g = ((state->m_vdp2_cram[offset] & 0x000003e0) >> 5);
5803		r = ((state->m_vdp2_cram[offset] & 0x0000001f) >> 0);
	5746	b = ((m_vdp2_cram[offset] & 0x00007c00) >> 10);
	5747	g = ((m_vdp2_cram[offset] & 0x000003e0) >> 5);
	5748	r = ((m_vdp2_cram[offset] & 0x0000001f) >> 0);
5804	5749	palette_set_color_rgb(space.machine(),(offset*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
5805	5750	if(cmode0)
5806	5751	palette_set_color_rgb(space.machine(),((offset*2)+1)^0x400,pal5bit(r),pal5bit(g),pal5bit(b));
5807	5752
5808		b = ((state->m_vdp2_cram[offset] & 0x7c000000) >> 26);
5809		g = ((state->m_vdp2_cram[offset] & 0x03e00000) >> 21);
5810		r = ((state->m_vdp2_cram[offset] & 0x001f0000) >> 16);
	5753	b = ((m_vdp2_cram[offset] & 0x7c000000) >> 26);
	5754	g = ((m_vdp2_cram[offset] & 0x03e00000) >> 21);
	5755	r = ((m_vdp2_cram[offset] & 0x001f0000) >> 16);
5811	5756	palette_set_color_rgb(space.machine(),offset*2,pal5bit(r),pal5bit(g),pal5bit(b));
5812	5757	if(cmode0)
5813	5758	palette_set_color_rgb(space.machine(),(offset*2)^0x400,pal5bit(r),pal5bit(g),pal5bit(b));
r20790	r20791
5816	5761	}
5817	5762	}
5818	5763
5819		static void refresh_palette_data(running_machine &machine)
	5764	void saturn_state::refresh_palette_data( void )
5820	5765	{
5821		saturn_state *state = machine.driver_data<saturn_state>();
5822	5766	int r,g,b;
5823	5767	int c_i;
5824	5768	UINT8 bank;
r20790	r20791
5830	5774	{
5831	5775	for(c_i=0;c_i<0x400;c_i++)
5832	5776	{
5833		b = ((state->m_vdp2_cram[c_i] & 0x00ff0000) >> 16);
5834		g = ((state->m_vdp2_cram[c_i] & 0x0000ff00) >> 8);
5835		r = ((state->m_vdp2_cram[c_i] & 0x000000ff) >> 0);
5836		palette_set_color(machine,c_i,MAKE_RGB(r,g,b));
5837		palette_set_color(machine,c_i+0x400,MAKE_RGB(r,g,b));
	5777	b = ((m_vdp2_cram[c_i] & 0x00ff0000) >> 16);
	5778	g = ((m_vdp2_cram[c_i] & 0x0000ff00) >> 8);
	5779	r = ((m_vdp2_cram[c_i] & 0x000000ff) >> 0);
	5780	palette_set_color(machine(),c_i,MAKE_RGB(r,g,b));
	5781	palette_set_color(machine(),c_i+0x400,MAKE_RGB(r,g,b));
5838	5782	}
5839	5783	}
5840	5784	break;
r20790	r20791
5844	5788	{
5845	5789	for(c_i=0;c_i<0x400;c_i++)
5846	5790	{
5847		b = ((state->m_vdp2_cram[c_i] & 0x00007c00) >> 10);
5848		g = ((state->m_vdp2_cram[c_i] & 0x000003e0) >> 5);
5849		r = ((state->m_vdp2_cram[c_i] & 0x0000001f) >> 0);
5850		palette_set_color_rgb(machine,(c_i*2)+1+bank*0x400,pal5bit(r),pal5bit(g),pal5bit(b));
5851		b = ((state->m_vdp2_cram[c_i] & 0x7c000000) >> 26);
5852		g = ((state->m_vdp2_cram[c_i] & 0x03e00000) >> 21);
5853		r = ((state->m_vdp2_cram[c_i] & 0x001f0000) >> 16);
5854		palette_set_color_rgb(machine,c_i*2+bank*0x400,pal5bit(r),pal5bit(g),pal5bit(b));
	5791	b = ((m_vdp2_cram[c_i] & 0x00007c00) >> 10);
	5792	g = ((m_vdp2_cram[c_i] & 0x000003e0) >> 5);
	5793	r = ((m_vdp2_cram[c_i] & 0x0000001f) >> 0);
	5794	palette_set_color_rgb(machine(),(c_i*2)+1+bank*0x400,pal5bit(r),pal5bit(g),pal5bit(b));
	5795	b = ((m_vdp2_cram[c_i] & 0x7c000000) >> 26);
	5796	g = ((m_vdp2_cram[c_i] & 0x03e00000) >> 21);
	5797	r = ((m_vdp2_cram[c_i] & 0x001f0000) >> 16);
	5798	palette_set_color_rgb(machine(),c_i*2+bank*0x400,pal5bit(r),pal5bit(g),pal5bit(b));
5855	5799	}
5856	5800	}
5857	5801	}
r20790	r20791
5860	5804	{
5861	5805	for(c_i=0;c_i<0x800;c_i++)
5862	5806	{
5863		b = ((state->m_vdp2_cram[c_i] & 0x00007c00) >> 10);
5864		g = ((state->m_vdp2_cram[c_i] & 0x000003e0) >> 5);
5865		r = ((state->m_vdp2_cram[c_i] & 0x0000001f) >> 0);
5866		palette_set_color_rgb(machine,(c_i*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
5867		b = ((state->m_vdp2_cram[c_i] & 0x7c000000) >> 26);
5868		g = ((state->m_vdp2_cram[c_i] & 0x03e00000) >> 21);
5869		r = ((state->m_vdp2_cram[c_i] & 0x001f0000) >> 16);
5870		palette_set_color_rgb(machine,c_i*2,pal5bit(r),pal5bit(g),pal5bit(b));
	5807	b = ((m_vdp2_cram[c_i] & 0x00007c00) >> 10);
	5808	g = ((m_vdp2_cram[c_i] & 0x000003e0) >> 5);
	5809	r = ((m_vdp2_cram[c_i] & 0x0000001f) >> 0);
	5810	palette_set_color_rgb(machine(),(c_i*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
	5811	b = ((m_vdp2_cram[c_i] & 0x7c000000) >> 26);
	5812	g = ((m_vdp2_cram[c_i] & 0x03e00000) >> 21);
	5813	r = ((m_vdp2_cram[c_i] & 0x001f0000) >> 16);
	5814	palette_set_color_rgb(machine(),c_i*2,pal5bit(r),pal5bit(g),pal5bit(b));
5871	5815	}
5872	5816	}
5873	5817	break;
5874	5818	}
5875	5819	}
5876	5820
5877		WRITE16_HANDLER ( saturn_vdp2_regs_w )
	5821	WRITE16_MEMBER ( saturn_state::saturn_vdp2_regs_w )
5878	5822	{
5879		saturn_state *state = space.machine().driver_data<saturn_state>();
5880		COMBINE_DATA(&state->m_vdp2_regs[offset]);
	5823	COMBINE_DATA(&m_vdp2_regs[offset]);
5881	5824
5882		if(state->m_vdp2.old_crmd != STV_VDP2_CRMD)
	5825	if(m_vdp2.old_crmd != STV_VDP2_CRMD)
5883	5826	{
5884		state->m_vdp2.old_crmd = STV_VDP2_CRMD;
5885		refresh_palette_data(space.machine());
	5827	m_vdp2.old_crmd = STV_VDP2_CRMD;
	5828	refresh_palette_data();
5886	5829	}
5887		if(state->m_vdp2.old_tvmd != STV_VDP2_TVMD)
	5830	if(m_vdp2.old_tvmd != STV_VDP2_TVMD)
5888	5831	{
5889		state->m_vdp2.old_tvmd = STV_VDP2_TVMD;
5890		stv_vdp2_dynamic_res_change(space.machine());
	5832	m_vdp2.old_tvmd = STV_VDP2_TVMD;
	5833	stv_vdp2_dynamic_res_change();
5891	5834	}
5892	5835
5893	5836	if(STV_VDP2_VRAMSZ)
5894	5837	printf("VDP2 sets up 8 Mbit VRAM!\n");
5895	5838	}
5896	5839
5897		static int get_hblank_duration(running_machine &machine)
	5840	int saturn_state::get_hblank_duration( void )
5898	5841	{
5899		saturn_state *state = machine.driver_data<saturn_state>();
5900	5842	int res;
5901	5843
5902	5844	res = (STV_VDP2_HRES & 1) ? 455 : 427;
r20790	r20791
5910	5852
5911	5853	/*some vblank lines measurements (according to Charles MacDonald)*/
5912	5854	/* TODO: interlace mode "eats" one line, should be 262.5 */
5913		static int get_vblank_duration(running_machine &machine)
	5855	int saturn_state::get_vblank_duration( void )
5914	5856	{
5915		saturn_state *state = machine.driver_data<saturn_state>();
5916	5857	int res;
5917	5858
5918		res = (state->m_vdp2.pal) ? 313 : 263;
	5859	res = (m_vdp2.pal) ? 313 : 263;
5919	5860
5920	5861	/* compensate for interlacing */
5921	5862	if((STV_VDP2_LSMD & 3) == 3)
r20790	r20791
5927	5868	return res;
5928	5869	}
5929	5870
5930		static int get_pixel_clock(running_machine &machine)
	5871	int saturn_state::get_pixel_clock( void )
5931	5872	{
5932		saturn_state *state = machine.driver_data<saturn_state>();
5933	5873	int res,divider;
5934	5874
5935		res = state->m_vdp2.dotsel ? MASTER_CLOCK_352 : MASTER_CLOCK_320;
	5875	res = m_vdp2.dotsel ? MASTER_CLOCK_352 : MASTER_CLOCK_320;
5936	5876	/* TODO: divider is ALWAYS 8, this thing is just to over-compensate for MAME framework faults ... */
5937	5877	divider = 8;
5938	5878
r20790	r20791
5948	5888	return res/divider;
5949	5889	}
5950	5890
5951		static UINT8 get_hblank(running_machine &machine)
	5891	UINT8 saturn_state::get_hblank( void )
5952	5892	{
5953		const rectangle &visarea = machine.primary_screen->visible_area();
5954		int cur_h = machine.primary_screen->hpos();
	5893	const rectangle &visarea = machine().primary_screen->visible_area();
	5894	int cur_h = machine().primary_screen->hpos();
5955	5895
5956	5896	if (cur_h > visarea.max_x) //TODO
5957	5897	return 1;
r20790	r20791
5959	5899	return 0;
5960	5900	}
5961	5901
5962		UINT8 get_vblank(running_machine &machine)
	5902	UINT8 saturn_state::get_vblank( void )
5963	5903	{
5964		saturn_state *state = machine.driver_data<saturn_state>();
5965	5904	int cur_v,vblank;
5966		cur_v = machine.primary_screen->vpos();
	5905	cur_v = machine().primary_screen->vpos();
5967	5906
5968		vblank = (state->m_vdp2.pal) ? 288 : 240;
	5907	vblank = (m_vdp2.pal) ? 288 : 240;
5969	5908
5970	5909	if((STV_VDP2_LSMD & 3) == 3)
5971	5910	vblank<<=1;
r20790	r20791
5976	5915	return 0;
5977	5916	}
5978	5917
5979		static UINT8 get_odd_bit(running_machine &machine)
	5918	UINT8 saturn_state::get_odd_bit( void )
5980	5919	{
5981		saturn_state *state = machine.driver_data<saturn_state>();
5982	5920	int cur_v;
5983		cur_v = machine.primary_screen->vpos();
	5921	cur_v = machine().primary_screen->vpos();
5984	5922
5985	5923	if(STV_VDP2_HRES & 4) //exclusive monitor mode makes this bit to be always 1
5986	5924	return 1;
r20790	r20791
5994	5932	return 0;
5995	5933	}
5996	5934
5997		static void stv_vdp2_state_save_postload(running_machine &machine)
	5935	void saturn_state::stv_vdp2_state_save_postload( void )
5998	5936	{
5999		saturn_state *state = machine.driver_data<saturn_state>();
6000		UINT8 *gfxdata = state->m_vdp2.gfx_decode;
	5937	UINT8 *gfxdata = m_vdp2.gfx_decode;
6001	5938	int offset;
6002	5939	UINT32 data;
6003	5940
6004	5941	for ( offset = 0; offset < 0x100000/4; offset++ )
6005	5942	{
6006		data = state->m_vdp2_vram[offset];
	5943	data = m_vdp2_vram[offset];
6007	5944	/* put in gfx region for easy decoding */
6008	5945	gfxdata[offset*4+0] = (data & 0xff000000) >> 24;
6009	5946	gfxdata[offset*4+1] = (data & 0x00ff0000) >> 16;
6010	5947	gfxdata[offset*4+2] = (data & 0x0000ff00) >> 8;
6011	5948	gfxdata[offset*4+3] = (data & 0x000000ff) >> 0;
6012	5949
6013		machine.gfx[0]->mark_dirty(offset/8);
6014		machine.gfx[1]->mark_dirty(offset/8);
6015		machine.gfx[2]->mark_dirty(offset/8);
6016		machine.gfx[3]->mark_dirty(offset/8);
	5950	machine().gfx[0]->mark_dirty(offset/8);
	5951	machine().gfx[1]->mark_dirty(offset/8);
	5952	machine().gfx[2]->mark_dirty(offset/8);
	5953	machine().gfx[3]->mark_dirty(offset/8);
6017	5954
6018	5955	/* 8-bit tiles overlap, so this affects the previous one as well */
6019	5956	if (offset/8 != 0)
6020	5957	{
6021		machine.gfx[2]->mark_dirty(offset/8 - 1);
6022		machine.gfx[3]->mark_dirty(offset/8 - 1);
	5958	machine().gfx[2]->mark_dirty(offset/8 - 1);
	5959	machine().gfx[3]->mark_dirty(offset/8 - 1);
6023	5960	}
6024	5961
6025	5962	}
r20790	r20791
6028	5965	stv_rbg_cache_data.is_cache_dirty = 3;
6029	5966	memset( &stv_vdp2_layer_data_placement, 0, sizeof(stv_vdp2_layer_data_placement));
6030	5967
6031		refresh_palette_data(machine);
	5968	refresh_palette_data();
6032	5969	}
6033	5970
6034		static void stv_vdp2_exit (running_machine &machine)
	5971	void saturn_state::stv_vdp2_exit ( void )
6035	5972	{
6036		saturn_state *state = machine.driver_data<saturn_state>();
6037		state->m_vdp2.roz_bitmap[0].reset();
6038		state->m_vdp2.roz_bitmap[1].reset();
	5973	m_vdp2.roz_bitmap[0].reset();
	5974	m_vdp2.roz_bitmap[1].reset();
6039	5975	}
6040	5976
6041		static int stv_vdp2_start (running_machine &machine)
	5977	int saturn_state::stv_vdp2_start ( void )
6042	5978	{
6043		saturn_state *state = machine.driver_data<saturn_state>();
6044		machine.add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(stv_vdp2_exit), &machine));
	5979	machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(saturn_state::stv_vdp2_exit), this));
6045	5980
6046		state->m_vdp2_regs = auto_alloc_array_clear(machine, UINT16, 0x040000/2 );
6047		state->m_vdp2_vram = auto_alloc_array_clear(machine, UINT32, 0x100000/4 );
6048		state->m_vdp2_cram = auto_alloc_array_clear(machine, UINT32, 0x080000/4 );
6049		state->m_vdp2.gfx_decode = auto_alloc_array(machine, UINT8, 0x100000 );
	5981	m_vdp2_regs = auto_alloc_array_clear(machine(), UINT16, 0x040000/2 );
	5982	m_vdp2_vram = auto_alloc_array_clear(machine(), UINT32, 0x100000/4 );
	5983	m_vdp2_cram = auto_alloc_array_clear(machine(), UINT32, 0x080000/4 );
	5984	m_vdp2.gfx_decode = auto_alloc_array(machine(), UINT8, 0x100000 );
6050	5985
6051		//  machine.gfx[0]->granularity()=4;
6052		//  machine.gfx[1]->granularity()=4;
	5986	//  machine().gfx[0]->granularity()=4;
	5987	//  machine().gfx[1]->granularity()=4;
6053	5988
6054	5989	memset( &stv_rbg_cache_data, 0, sizeof(stv_rbg_cache_data));
6055	5990	stv_rbg_cache_data.is_cache_dirty = 3;
6056	5991	memset( &stv_vdp2_layer_data_placement, 0, sizeof(stv_vdp2_layer_data_placement));
6057	5992
6058		state_save_register_global_pointer(machine, state->m_vdp2_regs, 0x040000/2);
6059		state_save_register_global_pointer(machine, state->m_vdp2_vram, 0x100000/4);
6060		state_save_register_global_pointer(machine, state->m_vdp2_cram, 0x080000/4);
6061		machine.save().register_postload(save_prepost_delegate(FUNC(stv_vdp2_state_save_postload), &machine));
	5993	state_save_register_global_pointer(machine(), m_vdp2_regs, 0x040000/2);
	5994	state_save_register_global_pointer(machine(), m_vdp2_vram, 0x100000/4);
	5995	state_save_register_global_pointer(machine(), m_vdp2_cram, 0x080000/4);
	5996	machine().save().register_postload(save_prepost_delegate(FUNC(saturn_state::stv_vdp2_state_save_postload), this));
6062	5997
6063	5998	return 0;
6064	5999	}
r20790	r20791
6067	6002	VIDEO_START_MEMBER(saturn_state,stv_vdp2)
6068	6003	{
6069	6004	machine().primary_screen->register_screen_bitmap(m_tmpbitmap);
6070		stv_vdp2_start(machine());
6071		stv_vdp1_start(machine());
	6005	stv_vdp2_start();
	6006	stv_vdp1_start();
6072	6007	vdpdebug.l_en = 0xff;
6073	6008	vdpdebug.error = 0xffffffff;
6074	6009	vdpdebug.roz = 0;
r20790	r20791
6082	6017	machine().gfx[7]->set_source(m_vdp1.gfx_decode);
6083	6018	}
6084	6019
6085		void stv_vdp2_dynamic_res_change(running_machine &machine)
	6020	void saturn_state::stv_vdp2_dynamic_res_change( void )
6086	6021	{
6087		saturn_state *state = machine.driver_data<saturn_state>();
6088	6022	const int d_vres[4] = { 224, 240, 256, 256 };
6089	6023	const int d_hres[4] = { 320, 352, 640, 704 };
6090	6024	int horz_res,vert_res;
6091	6025	int vres_mask;
6092	6026
6093		vres_mask = (state->m_vdp2.pal << 1)|1; //PAL uses mask 3, NTSC uses mask 1
	6027	vres_mask = (m_vdp2.pal << 1)|1; //PAL uses mask 3, NTSC uses mask 1
6094	6028	vert_res = d_vres[STV_VDP2_VRES & vres_mask];
6095	6029
6096	6030	if((STV_VDP2_VRES & 3) == 3)
r20790	r20791
6110	6044	attoseconds_t refresh;;
6111	6045	rectangle visarea(0, horz_res-1, 0, vert_res-1);
6112	6046
6113		vblank_period = get_vblank_duration(machine);
6114		hblank_period = get_hblank_duration(machine);
6115		refresh  = HZ_TO_ATTOSECONDS(get_pixel_clock(machine)) * (hblank_period) * vblank_period;
	6047	vblank_period = get_vblank_duration();
	6048	hblank_period = get_hblank_duration();
	6049	refresh  = HZ_TO_ATTOSECONDS(get_pixel_clock()) * (hblank_period) * vblank_period;
6116	6050	//printf("%d %d %d %d\n",horz_res,vert_res,horz_res+hblank_period,vblank_period);
6117	6051
6118		machine.primary_screen->configure((hblank_period), (vblank_period), visarea, refresh );
	6052	machine().primary_screen->configure((hblank_period), (vblank_period), visarea, refresh );
6119	6053	}
6120		//  machine.primary_screen->set_visible_area(0*8, horz_res-1,0*8, vert_res-1);
6121		//if(LOG_VDP2) popmessage("%04d %04d",horz_res-1,vert-1);
	6054	//  machine().primary_screen->set_visible_area(0*8, horz_res-1,0*8, vert_res-1);
6122	6055	}
6123	6056
6124	6057	/*This is for calculating the rgb brightness*/
6125	6058	/*TODO: Optimize this...*/
6126		static void stv_vdp2_fade_effects(running_machine &machine)
	6059	void saturn_state::stv_vdp2_fade_effects( void )
6127	6060	{
6128		saturn_state *state = machine.driver_data<saturn_state>();
6129	6061	/*
6130	6062	Note:We have to use temporary storages because palette_get_color must use
6131	6063	variables setted with unsigned int8
r20790	r20791
6138	6070	for(i=0;i<2048;i++)
6139	6071	{
6140	6072	/*Fade A*/
6141		color = palette_get_color(machine, i);
	6073	color = palette_get_color(machine(), i);
6142	6074	t_r = (STV_VDP2_COAR & 0x100) ? (RGB_RED(color) - (0x100 - (STV_VDP2_COAR & 0xff))) : ((STV_VDP2_COAR & 0xff) + RGB_RED(color));
6143	6075	t_g = (STV_VDP2_COAG & 0x100) ? (RGB_GREEN(color) - (0x100 - (STV_VDP2_COAG & 0xff))) : ((STV_VDP2_COAG & 0xff) + RGB_GREEN(color));
6144	6076	t_b = (STV_VDP2_COAB & 0x100) ? (RGB_BLUE(color) - (0x100 - (STV_VDP2_COAB & 0xff))) : ((STV_VDP2_COAB & 0xff) + RGB_BLUE(color));
r20790	r20791
6151	6083	r = t_r;
6152	6084	g = t_g;
6153	6085	b = t_b;
6154		palette_set_color(machine,i+(2048*1),MAKE_RGB(r,g,b));
	6086	palette_set_color(machine(),i+(2048*1),MAKE_RGB(r,g,b));
6155	6087
6156	6088	/*Fade B*/
6157		color = palette_get_color(machine, i);
	6089	color = palette_get_color(machine(), i);
6158	6090	t_r = (STV_VDP2_COBR & 0x100) ? (RGB_RED(color) - (0xff - (STV_VDP2_COBR & 0xff))) : ((STV_VDP2_COBR & 0xff) + RGB_RED(color));
6159	6091	t_g = (STV_VDP2_COBG & 0x100) ? (RGB_GREEN(color) - (0xff - (STV_VDP2_COBG & 0xff))) : ((STV_VDP2_COBG & 0xff) + RGB_GREEN(color));
6160	6092	t_b = (STV_VDP2_COBB & 0x100) ? (RGB_BLUE(color) - (0xff - (STV_VDP2_COBB & 0xff))) : ((STV_VDP2_COBB & 0xff) + RGB_BLUE(color));
r20790	r20791
6167	6099	r = t_r;
6168	6100	g = t_g;
6169	6101	b = t_b;
6170		palette_set_color(machine,i+(2048*2),MAKE_RGB(r,g,b));
	6102	palette_set_color(machine(),i+(2048*2),MAKE_RGB(r,g,b));
6171	6103	}
6172	6104	//popmessage("%04x %04x %04x %04x %04x %04x",STV_VDP2_COAR,STV_VDP2_COAG,STV_VDP2_COAB,STV_VDP2_COBR,STV_VDP2_COBG,STV_VDP2_COBB);
6173	6105	}
r20790	r20791
6205	6137	(0 = OR,1 = AND)
6206	6138	******************************************************************************************/
6207	6139
6208		static void stv_vdp2_get_window0_coordinates(running_machine &machine,UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y)
	6140	void saturn_state::stv_vdp2_get_window0_coordinates(UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y)
6209	6141	{
6210		saturn_state *state = machine.driver_data<saturn_state>();
6211
6212	6142	/*W0*/
6213	6143	switch(STV_VDP2_LSMD & 3)
6214	6144	{
r20790	r20791
6252	6182	}
6253	6183	}
6254	6184
6255		static void stv_vdp2_get_window1_coordinates(running_machine &machine,UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y)
	6185	void saturn_state::stv_vdp2_get_window1_coordinates(UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y)
6256	6186	{
6257		saturn_state *state = machine.driver_data<saturn_state>();
6258
6259	6187	/*W1*/
6260	6188	switch(STV_VDP2_LSMD & 3)
6261	6189	{
r20790	r20791
6300	6228
6301	6229	}
6302	6230
6303		static int get_window_pixel(UINT16 s_x,UINT16 e_x,UINT16 s_y,UINT16 e_y,int x, int y,UINT8 win_num)
	6231	int saturn_state::get_window_pixel(UINT16 s_x,UINT16 e_x,UINT16 s_y,UINT16 e_y,int x, int y,UINT8 win_num)
6304	6232	{
6305	6233	if(stv2_current_tilemap.window_control & (2 << win_num))
6306	6234	{
r20790	r20791
6333	6261	return 0;
6334	6262	}
6335	6263
6336		static int stv_vdp2_window_process(running_machine &machine,int x,int y)
	6264	int saturn_state::stv_vdp2_window_process(int x,int y)
6337	6265	{
6338	6266	UINT16 s_x=0,e_x=0,s_y=0,e_y=0;
6339	6267	UINT8 w0_pix, w1_pix;
r20790	r20791
6341	6269	if ((stv2_current_tilemap.window_control & 6) == 0)
6342	6270	return 0;
6343	6271
6344		stv_vdp2_get_window0_coordinates(machine,&s_x, &e_x, &s_y, &e_y);
	6272	stv_vdp2_get_window0_coordinates(&s_x, &e_x, &s_y, &e_y);
6345	6273	w0_pix = get_window_pixel(s_x,e_x,s_y,e_y,x,y,0);
6346	6274
6347		stv_vdp2_get_window1_coordinates(machine,&s_x, &e_x, &s_y, &e_y);
	6275	stv_vdp2_get_window1_coordinates(&s_x, &e_x, &s_y, &e_y);
6348	6276	w1_pix = get_window_pixel(s_x,e_x,s_y,e_y,x,y,1);
6349	6277
6350	6278	return stv2_current_tilemap.window_control & 1 ? (w0_pix & w1_pix) : (w0_pix | w1_pix);
6351	6279	}
6352	6280
6353		static int stv_vdp2_apply_window_on_layer(running_machine &machine,rectangle &cliprect)
	6281	int saturn_state::stv_vdp2_apply_window_on_layer(rectangle &cliprect)
6354	6282	{
6355		//saturn_state *state = machine.driver_data<saturn_state>();
6356	6283	UINT16 s_x=0,e_x=0,s_y=0,e_y=0;
6357	6284
6358	6285	if ( stv2_current_tilemap.window_control == 0x12 )
6359	6286	{
6360	6287	/* w0, transparent outside supported */
6361		stv_vdp2_get_window0_coordinates(machine,&s_x, &e_x, &s_y, &e_y);
	6288	stv_vdp2_get_window0_coordinates(&s_x, &e_x, &s_y, &e_y);
6362	6289
6363	6290	if ( s_x > cliprect.min_x ) cliprect.min_x = s_x;
6364	6291	if ( e_x < cliprect.max_x ) cliprect.max_x = e_x;
r20790	r20791
6370	6297	else if ( stv2_current_tilemap.window_control == 0x24 )
6371	6298	{
6372	6299	/* w1, transparent outside supported */
6373		stv_vdp2_get_window1_coordinates(machine,&s_x, &e_x, &s_y, &e_y);
	6300	stv_vdp2_get_window1_coordinates(&s_x, &e_x, &s_y, &e_y);
6374	6301
6375	6302	if ( s_x > cliprect.min_x ) cliprect.min_x = s_x;
6376	6303	if ( e_x < cliprect.max_x ) cliprect.max_x = e_x;
r20790	r20791
6390	6317	static int      stv_sprite_priorities_usage_valid;
6391	6318	static UINT8    stv_sprite_priorities_in_fb_line[512][8];
6392	6319
6393		static void draw_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 pri)
	6320	void saturn_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 pri)
6394	6321	{
6395		saturn_state *state = machine.driver_data<saturn_state>();
6396	6322	int x,y,r,g,b;
6397	6323	int i;
6398	6324	UINT16 pix;
r20790	r20791
6483	6409	}
6484	6410
6485	6411	/* framebuffer interlace */
6486		if ( (STV_VDP2_LSMD == 3) && state->m_vdp1.framebuffer_double_interlace == 0 )
	6412	if ( (STV_VDP2_LSMD == 3) && m_vdp1.framebuffer_double_interlace == 0 )
6487	6413	interlace_framebuffer = 1;
6488	6414	else
6489	6415	interlace_framebuffer = 0;
r20790	r20791
6505	6431	(STV_VDP2_SPSWA * 0x40);
6506	6432	mycliprect = cliprect;
6507	6433
6508		stv_vdp2_apply_window_on_layer(machine,mycliprect);
	6434	stv_vdp2_apply_window_on_layer(mycliprect);
6509	6435
6510	6436	if (interlace_framebuffer == 0 && double_x == 0 )
6511	6437	{
r20790	r20791
6517	6443	if (stv_sprite_priorities_in_fb_line[y][pri] == 0)
6518	6444	continue;
6519	6445
6520		framebuffer_line = state->m_vdp1.framebuffer_display_lines[y];
	6446	framebuffer_line = m_vdp1.framebuffer_display_lines[y];
6521	6447	bitmap_line = &bitmap.pix32(y);
6522	6448
6523	6449	for ( x = mycliprect.min_x; x <= mycliprect.max_x; x++ )
r20790	r20791
6540	6466	r = pal5bit( pix & 0x001f);
6541	6467	if ( color_offset_pal )
6542	6468	{
6543		stv_vdp2_compute_color_offset( machine, &r, &g, &b, STV_VDP2_SPCOSL );
	6469	stv_vdp2_compute_color_offset( &r, &g, &b, STV_VDP2_SPCOSL );
6544	6470	}
6545	6471
6546	6472	bitmap_line[x] = MAKE_RGB(r, g, b);
r20790	r20791
6572	6498	pix += (STV_VDP2_SPCAOS << 8);
6573	6499	pix &= 0x7ff;
6574	6500	pix += color_offset_pal;
6575		bitmap_line[x] = machine.pens[ pix ];
	6501	bitmap_line[x] = machine().pens[ pix ];
6576	6502	}
6577	6503	}
6578	6504
r20790	r20791
6597	6523	if (stv_sprite_priorities_in_fb_line[y][pri] == 0)
6598	6524	continue;
6599	6525
6600		framebuffer_line = state->m_vdp1.framebuffer_display_lines[y];
	6526	framebuffer_line = m_vdp1.framebuffer_display_lines[y];
6601	6527	bitmap_line = &bitmap.pix32(y);
6602	6528
6603	6529	for ( x = mycliprect.min_x; x <= mycliprect.max_x; x++ )
r20790	r20791
6617	6543	r = pal5bit( pix & 0x001f);
6618	6544	if ( color_offset_pal )
6619	6545	{
6620		stv_vdp2_compute_color_offset( machine, &r, &g, &b, STV_VDP2_SPCOSL );
	6546	stv_vdp2_compute_color_offset( &r, &g, &b, STV_VDP2_SPCOSL );
6621	6547	}
6622	6548	ccr = sprite_ccr[0];
6623	6549	if ( STV_VDP2_CCMD )
r20790	r20791
6669	6595	{
6670	6596	if ( STV_VDP2_CCMD )
6671	6597	{
6672		bitmap_line[x] = stv_add_blend( bitmap_line[x], machine.pens[pix] );
	6598	bitmap_line[x] = stv_add_blend( bitmap_line[x], machine().pens[pix] );
6673	6599	}
6674	6600	else
6675	6601	{
6676		bitmap_line[x] = alpha_blend_r32( bitmap_line[x], machine.pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
	6602	bitmap_line[x] = alpha_blend_r32( bitmap_line[x], machine().pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
6677	6603	}
6678	6604	}
6679	6605	else
6680		bitmap_line[x] = machine.pens[pix];
	6606	bitmap_line[x] = machine().pens[pix];
6681	6607	}
6682	6608	}
6683	6609
r20790	r20791
6703	6629	if (stv_sprite_priorities_in_fb_line[y][pri] == 0)
6704	6630	continue;
6705	6631
6706		framebuffer_line = state->m_vdp1.framebuffer_display_lines[y];
	6632	framebuffer_line = m_vdp1.framebuffer_display_lines[y];
6707	6633	if ( interlace_framebuffer == 0 )
6708	6634	{
6709	6635	bitmap_line = &bitmap.pix32(y);
r20790	r20791
6731	6657	r = pal5bit( pix & 0x001f);
6732	6658	if ( color_offset_pal )
6733	6659	{
6734		stv_vdp2_compute_color_offset( machine, &r, &g, &b, STV_VDP2_SPCOSL );
	6660	stv_vdp2_compute_color_offset( &r, &g, &b, STV_VDP2_SPCOSL );
6735	6661	}
6736	6662	if ( alpha_enabled == 0 )
6737	6663	{
r20790	r20791
6833	6759	{
6834	6760	if(double_x)
6835	6761	{
6836		bitmap_line[x*2] = machine.pens[ pix ];
6837		if ( interlace_framebuffer == 1 ) bitmap_line2[x*2] = machine.pens[ pix ];
6838		bitmap_line[x*2+1] = machine.pens[ pix ];
6839		if ( interlace_framebuffer == 1 ) bitmap_line2[x*2+1] = machine.pens[ pix ];
	6762	bitmap_line[x*2] = machine().pens[ pix ];
	6763	if ( interlace_framebuffer == 1 ) bitmap_line2[x*2] = machine().pens[ pix ];
	6764	bitmap_line[x*2+1] = machine().pens[ pix ];
	6765	if ( interlace_framebuffer == 1 ) bitmap_line2[x*2+1] = machine().pens[ pix ];
6840	6766	}
6841	6767	else
6842	6768	{
6843		bitmap_line[x] = machine.pens[ pix ];
6844		if ( interlace_framebuffer == 1 ) bitmap_line2[x] = machine.pens[ pix ];
	6769	bitmap_line[x] = machine().pens[ pix ];
	6770	if ( interlace_framebuffer == 1 ) bitmap_line2[x] = machine().pens[ pix ];
6845	6771	}
6846	6772	}
6847	6773	else // alpha_blend == 1
r20790	r20791
6850	6776	{
6851	6777	if(double_x)
6852	6778	{
6853		bitmap_line[x*2] = stv_add_blend( bitmap_line[x*2], machine.pens[pix] );
6854		if ( interlace_framebuffer == 1 ) bitmap_line2[x*2] = stv_add_blend( bitmap_line2[x], machine.pens[pix] );
6855		bitmap_line[x*2+1] = stv_add_blend( bitmap_line[x*2+1], machine.pens[pix] );
6856		if ( interlace_framebuffer == 1 ) bitmap_line2[x*2+1] = stv_add_blend( bitmap_line2[x], machine.pens[pix] );
	6779	bitmap_line[x*2] = stv_add_blend( bitmap_line[x*2], machine().pens[pix] );
	6780	if ( interlace_framebuffer == 1 ) bitmap_line2[x*2] = stv_add_blend( bitmap_line2[x], machine().pens[pix] );
	6781	bitmap_line[x*2+1] = stv_add_blend( bitmap_line[x*2+1], machine().pens[pix] );
	6782	if ( interlace_framebuffer == 1 ) bitmap_line2[x*2+1] = stv_add_blend( bitmap_line2[x], machine().pens[pix] );
6857	6783	}
6858	6784	else
6859	6785	{
6860		bitmap_line[x] = stv_add_blend( bitmap_line[x], machine.pens[pix] );
6861		if ( interlace_framebuffer == 1 ) bitmap_line2[x] = stv_add_blend( bitmap_line2[x], machine.pens[pix] );
	6786	bitmap_line[x] = stv_add_blend( bitmap_line[x], machine().pens[pix] );
	6787	if ( interlace_framebuffer == 1 ) bitmap_line2[x] = stv_add_blend( bitmap_line2[x], machine().pens[pix] );
6862	6788	}
6863	6789	}
6864	6790	else
6865	6791	{
6866	6792	if(double_x)
6867	6793	{
6868		bitmap_line[x*2] = alpha_blend_r32( bitmap_line[x*2], machine.pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
6869		if ( interlace_framebuffer == 1 ) bitmap_line2[x*2] = alpha_blend_r32( bitmap_line2[x], machine.pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
6870		bitmap_line[x*2+1] = alpha_blend_r32( bitmap_line[x*2+1], machine.pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
6871		if ( interlace_framebuffer == 1 ) bitmap_line2[x*2+1] = alpha_blend_r32( bitmap_line2[x], machine.pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
	6794	bitmap_line[x*2] = alpha_blend_r32( bitmap_line[x*2], machine().pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
	6795	if ( interlace_framebuffer == 1 ) bitmap_line2[x*2] = alpha_blend_r32( bitmap_line2[x], machine().pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
	6796	bitmap_line[x*2+1] = alpha_blend_r32( bitmap_line[x*2+1], machine().pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
	6797	if ( interlace_framebuffer == 1 ) bitmap_line2[x*2+1] = alpha_blend_r32( bitmap_line2[x], machine().pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
6872	6798	}
6873	6799	else
6874	6800	{
6875		bitmap_line[x] = alpha_blend_r32( bitmap_line[x], machine.pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
6876		if ( interlace_framebuffer == 1 ) bitmap_line2[x] = alpha_blend_r32( bitmap_line2[x], machine.pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
	6801	bitmap_line[x] = alpha_blend_r32( bitmap_line[x], machine().pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
	6802	if ( interlace_framebuffer == 1 ) bitmap_line2[x] = alpha_blend_r32( bitmap_line2[x], machine().pens[pix], ((UINT16)(0x1f-ccr)*0xff)/0x1f );
6877	6803	}
6878	6804	}
6879	6805	}
r20790	r20791
6907	6833
6908	6834	UINT32 saturn_state::screen_update_stv_vdp2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
6909	6835	{
6910		saturn_state *state = machine().driver_data<saturn_state>();
	6836	stv_vdp2_fade_effects();
6911	6837
6912		stv_vdp2_fade_effects(machine());
	6838	stv_vdp2_draw_back(m_tmpbitmap,cliprect);
6913	6839
6914		stv_vdp2_draw_back(machine(), m_tmpbitmap,cliprect);
6915
6916		#if DEBUG_MODE
6917		if(machine().input().code_pressed_once(KEYCODE_T))
6918		{
6919		vdpdebug.l_en^=1;
6920		popmessage("NBG3 %sabled",vdpdebug.l_en & 1 ? "en" : "dis");
6921		}
6922		if(machine().input().code_pressed_once(KEYCODE_Y))
6923		{
6924		vdpdebug.l_en^=2;
6925		popmessage("NBG2 %sabled",vdpdebug.l_en & 2 ? "en" : "dis");
6926		}
6927		if(machine().input().code_pressed_once(KEYCODE_U))
6928		{
6929		vdpdebug.l_en^=4;
6930		popmessage("NBG1 %sabled",vdpdebug.l_en & 4 ? "en" : "dis");
6931		}
6932		if(machine().input().code_pressed_once(KEYCODE_I))
6933		{
6934		vdpdebug.l_en^=8;
6935		popmessage("NBG0 %sabled",vdpdebug.l_en & 8 ? "en" : "dis");
6936		}
6937		if(machine().input().code_pressed_once(KEYCODE_K))
6938		{
6939		vdpdebug.l_en^=0x10;
6940		popmessage("RBG0 %sabled",vdpdebug.l_en & 0x10 ? "en" : "dis");
6941		}
6942		if(machine().input().code_pressed_once(KEYCODE_O))
6943		{
6944		vdpdebug.l_en^=0x20;
6945		popmessage("SPRITE %sabled",vdpdebug.l_en & 0x20 ? "en" : "dis");
6946		}
6947		#endif
6948
6949	6840	if(STV_VDP2_DISP)
6950	6841	{
6951	6842	UINT8 pri;
r20790	r20791
6957	6848	/*If a plane has a priority value of zero it isn't shown at all.*/
6958	6849	for(pri=1;pri<8;pri++)
6959	6850	{
6960		if (vdpdebug.l_en & 1)    { if(pri==STV_VDP2_N3PRIN) stv_vdp2_draw_NBG3(machine(), m_tmpbitmap,cliprect); }
6961		if (vdpdebug.l_en & 2)    { if(pri==STV_VDP2_N2PRIN) stv_vdp2_draw_NBG2(machine(), m_tmpbitmap,cliprect); }
6962		if (vdpdebug.l_en & 4)    { if(pri==STV_VDP2_N1PRIN) stv_vdp2_draw_NBG1(machine(), m_tmpbitmap,cliprect); }
6963		if (vdpdebug.l_en & 8)    { if(pri==STV_VDP2_N0PRIN) stv_vdp2_draw_NBG0(machine(), m_tmpbitmap,cliprect); }
6964		if (vdpdebug.l_en & 0x10) { if(pri==STV_VDP2_R0PRIN) stv_vdp2_draw_RBG0(machine(), m_tmpbitmap,cliprect); }
6965		if (vdpdebug.l_en & 0x20) { draw_sprites(machine(),m_tmpbitmap,cliprect,pri); }
	6851	if(pri==STV_VDP2_N3PRIN) { stv_vdp2_draw_NBG3(m_tmpbitmap,cliprect); }
	6852	if(pri==STV_VDP2_N2PRIN) { stv_vdp2_draw_NBG2(m_tmpbitmap,cliprect); }
	6853	if(pri==STV_VDP2_N1PRIN) { stv_vdp2_draw_NBG1(m_tmpbitmap,cliprect); }
	6854	if(pri==STV_VDP2_N0PRIN) { stv_vdp2_draw_NBG0(m_tmpbitmap,cliprect); }
	6855	if(pri==STV_VDP2_R0PRIN) { stv_vdp2_draw_RBG0(m_tmpbitmap,cliprect); }
	6856	{ draw_sprites(m_tmpbitmap,cliprect,pri); }
6966	6857	}
6967	6858	}
6968	6859
6969		#if DEBUG_MODE
6970		/*popmessage("N0 %02x %04x %02x %04x N1 %02x %04x %02x %04x"
6971		,STV_VDP2_N0ZMXI,STV_VDP2_N0ZMXD
6972		,STV_VDP2_N0ZMYI,STV_VDP2_N0ZMYD
6973		,STV_VDP2_N1ZMXI,STV_VDP2_N1ZMXD
6974		,STV_VDP2_N1ZMYI,STV_VDP2_N1ZMYD);*/
6975
6976		if ( machine().input().code_pressed_once(KEYCODE_W) )
6977		{
6978		int tilecode;
6979
6980		for (tilecode = 0;tilecode<0x8000;tilecode++)
6981		{
6982		machine().gfx[0]->mark_dirty(tilecode);
6983		}
6984
6985		for (tilecode = 0;tilecode<0x2000;tilecode++)
6986		{
6987		machine().gfx[1]->mark_dirty(tilecode);
6988		}
6989
6990		for (tilecode = 0;tilecode<0x4000;tilecode++)
6991		{
6992		machine().gfx[2]->mark_dirty(tilecode);
6993		}
6994
6995		for (tilecode = 0;tilecode<0x1000;tilecode++)
6996		{
6997		machine().gfx[3]->mark_dirty(tilecode);
6998		}
6999
7000		/* vdp 1 ... doesn't have to be tile based */
7001
7002		for (tilecode = 0;tilecode<0x8000;tilecode++)
7003		{
7004		machine().gfx[4]->mark_dirty(tilecode);
7005		}
7006		for (tilecode = 0;tilecode<0x2000;tilecode++)
7007		{
7008		machine().gfx[5]->mark_dirty(tilecode);
7009		}
7010		for (tilecode = 0;tilecode<0x4000;tilecode++)
7011		{
7012		machine().gfx[6]->mark_dirty(tilecode);
7013		}
7014		for (tilecode = 0;tilecode<0x1000;tilecode++)
7015		{
7016		machine().gfx[7]->mark_dirty(tilecode);
7017		}
7018		}
7019
7020		if ( machine().input().code_pressed_once(KEYCODE_N) )
7021		{
7022		FILE *fp;
7023
7024		fp=fopen("mamevdp1", "w+b");
7025		if (fp)
7026		{
7027		fwrite(m_vdp1_vram, 0x80000, 1, fp);
7028		fclose(fp);
7029		}
7030		}
7031
7032		if ( machine().input().code_pressed_once(KEYCODE_M) )
7033		{
7034		FILE *fp;
7035
7036		fp=fopen("vdp1_vram.bin", "r+b");
7037		if (fp)
7038		{
7039		fread(m_vdp1_vram, 0x80000, 1, fp);
7040		fclose(fp);
7041		}
7042		}
7043
7044		#endif
7045
7046	6860	copybitmap(bitmap, m_tmpbitmap, 0, 0, 0, 0, cliprect);
7047
7048	6861	return 0;
7049	6862	}
7050	6863
7051		/* below is some old code we might use .. */
7052	6864
7053		#if 0
7054
7055		static void stv_dump_ram()
7056		{
7057		FILE *fp;
7058
7059		fp=fopen("workraml.dmp", "w+b");
7060		if (fp)
7061		{
7062		fwrite(stv_workram_l, 0x00100000, 1, fp);
7063		fclose(fp);
7064		}
7065		fp=fopen("workramh.dmp", "w+b");
7066		if (fp)
7067		{
7068		fwrite(stv_workram_h, 0x00100000, 1, fp);
7069		fclose(fp);
7070		}
7071		fp=fopen("scu.dmp", "w+b");
7072		if (fp)
7073		{
7074		fwrite(stv_scu, 0xd0, 1, fp);
7075		fclose(fp);
7076		}
7077		fp=fopen("stv_a0_vram.dmp", "w+b");
7078		if (fp)
7079		{
7080		fwrite(stv_a0_vram, 0x00020000, 1, fp);
7081		fclose(fp);
7082		}
7083		fp=fopen("stv_a1_vram.dmp", "w+b");
7084		if (fp)
7085		{
7086		fwrite(stv_a1_vram, 0x00020000, 1, fp);
7087		fclose(fp);
7088		}
7089		fp=fopen("stv_b0_vram.dmp", "w+b");
7090		if (fp)
7091		{
7092		fwrite(stv_b0_vram, 0x00020000, 1, fp);
7093		fclose(fp);
7094		}
7095		fp=fopen("stv_b1_vram.dmp", "w+b");
7096		if (fp)
7097		{
7098		fwrite(stv_b1_vram, 0x00020000, 1, fp);
7099		fclose(fp);
7100		}
7101		fp=fopen("cram.dmp", "w+b");
7102		if (fp)
7103		{
7104		fwrite(stv_cram, 0x00080000, 1, fp);
7105		fclose(fp);
7106		}
7107		fp=fopen("68k.dmp", "w+b");
7108		if (fp)
7109		{
7110		fwrite(machine.root_device().memregion(REGION_CPU3)->base(), 0x100000, 1, fp);
7111		fclose(fp);
7112		}
7113		}
7114
7115
7116		#endif
7117

Previous

199869 Revisions

Next

---

© 1997-2024 The MAME Team