trunk/src/mess/machine/apple2gs.c
| r20754 | r20755 | |
| 261 | 261 | logerror("apple2gs_add_irq(): adding %s\n", apple2gs_irq_name(irq_mask)); |
| 262 | 262 | |
| 263 | 263 | state->m_pending_irqs |= irq_mask; |
| 264 | | machine.device("maincpu")->execute().set_input_line(G65816_LINE_IRQ, state->m_pending_irqs ? ASSERT_LINE : CLEAR_LINE); |
| 264 | state->m_maincpu->set_input_line(G65816_LINE_IRQ, state->m_pending_irqs ? ASSERT_LINE : CLEAR_LINE); |
| 265 | 265 | } |
| 266 | 266 | } |
| 267 | 267 | |
| r20754 | r20755 | |
| 276 | 276 | logerror("apple2gs_remove_irq(): removing %s\n", apple2gs_irq_name(irq_mask)); |
| 277 | 277 | |
| 278 | 278 | state->m_pending_irqs &= ~irq_mask; |
| 279 | | machine.device("maincpu")->execute().set_input_line(G65816_LINE_IRQ, state->m_pending_irqs ? ASSERT_LINE : CLEAR_LINE); |
| 279 | state->m_maincpu->set_input_line(G65816_LINE_IRQ, state->m_pending_irqs ? ASSERT_LINE : CLEAR_LINE); |
| 280 | 280 | } |
| 281 | 281 | } |
| 282 | 282 | |
| r20754 | r20755 | |
| 513 | 513 | state->m_adb_command_length = 0; |
| 514 | 514 | state->m_adb_command_pos = 0; |
| 515 | 515 | |
| 516 | // printf("ADB command %02x\n", data); |
| 516 | 517 | switch(data) |
| 517 | 518 | { |
| 518 | 519 | case 0x00: /* ??? */ |
| r20754 | r20755 | |
| 534 | 535 | break; |
| 535 | 536 | |
| 536 | 537 | case 0x07: /* synchronize */ |
| 537 | | if (state->memregion("maincpu")->bytes() == 0x40000) /* HACK */ |
| 538 | | state->m_adb_command_length = 8; |
| 538 | if (state->m_is_rom3) |
| 539 | state->m_adb_command_length = 8; // ROM 3 has 8 bytes: mode byte, 3 config bytes, kbd/mouse params, disk eject options |
| 539 | 540 | else |
| 540 | | state->m_adb_command_length = 4; |
| 541 | state->m_adb_command_length = 4; // ROM 0/1 has 4 bytes sync |
| 541 | 542 | break; |
| 542 | 543 | |
| 543 | 544 | case 0x08: /* write memory */ |
| r20754 | r20755 | |
| 603 | 604 | |
| 604 | 605 | case ADBSTATE_INCOMMAND: |
| 605 | 606 | assert(state->m_adb_command_pos < ARRAY_LENGTH(state->m_adb_command_bytes)); |
| 607 | // printf("ADB param %02x\n", data); |
| 606 | 608 | state->m_adb_command_bytes[state->m_adb_command_pos++] = data; |
| 607 | 609 | break; |
| 608 | 610 | |
| r20754 | r20755 | |
| 1057 | 1059 | case 0x74: case 0x75: case 0x76: case 0x77: |
| 1058 | 1060 | case 0x78: case 0x79: case 0x7a: case 0x7b: |
| 1059 | 1061 | case 0x7c: case 0x7d: case 0x7e: case 0x7f: |
| 1060 | | offset |= (space.machine().root_device().memregion("maincpu")->bytes() - 1) & ~0x3FFF; |
| 1061 | | result = space.machine().root_device().memregion("maincpu")->base()[offset]; |
| 1062 | offset |= (memregion("maincpu")->bytes() - 1) & ~0x3FFF; |
| 1063 | result = memregion("maincpu")->base()[offset]; |
| 1062 | 1064 | break; |
| 1063 | 1065 | |
| 1064 | 1066 | case 0x21: /* C021 - MONOCOLOR */ |
| r20754 | r20755 | |
| 1160 | 1162 | |
| 1161 | 1163 | case 0x2D: /* C02D - SLTROMSEL */ |
| 1162 | 1164 | m_sltromsel = data; |
| 1163 | | apple2_update_memory(space.machine()); |
| 1165 | apple2_update_memory(); |
| 1164 | 1166 | break; |
| 1165 | 1167 | |
| 1166 | 1168 | case 0x31: /* C031 - DISKREG */ |
| r20754 | r20755 | |
| 1186 | 1188 | if (m_shadow != data) |
| 1187 | 1189 | { |
| 1188 | 1190 | m_shadow = data; |
| 1189 | | apple2_update_memory(space.machine()); |
| 1191 | apple2_update_memory(); |
| 1190 | 1192 | } |
| 1191 | 1193 | break; |
| 1192 | 1194 | |
| 1193 | 1195 | case 0x36: /* C036 - CYAREG */ |
| 1194 | 1196 | m_cyareg = data & ~0x20; |
| 1195 | | space.machine().device("maincpu")->set_unscaled_clock((data & 0x80) ? APPLE2GS_14M/5 : APPLE2GS_7M/7); |
| 1197 | m_maincpu->set_unscaled_clock((data & 0x80) ? APPLE2GS_14M/5 : APPLE2GS_7M/7); |
| 1196 | 1198 | break; |
| 1197 | 1199 | |
| 1198 | 1200 | case 0x38: /* C038 - SCCBREG */ |
| r20754 | r20755 | |
| 1587 | 1589 | } |
| 1588 | 1590 | else if ((address & 0x000F00) == 0x000000) // accessing C0xx? |
| 1589 | 1591 | { |
| 1590 | | result = state->apple2gs_c0xx_r(machine.device("maincpu")->memory().space(AS_PROGRAM), address, 0); |
| 1592 | result = state->apple2gs_c0xx_r(state->m_maincpu->space(AS_PROGRAM), address, 0); |
| 1591 | 1593 | } |
| 1592 | 1594 | else |
| 1593 | 1595 | { |
| r20754 | r20755 | |
| 1603 | 1605 | { |
| 1604 | 1606 | // accessing a slot mapped to internal, let's put back the internal ROM |
| 1605 | 1607 | state->m_a2_cnxx_slot = -1; |
| 1606 | | apple2_update_memory(space.machine()); |
| 1608 | state->apple2_update_memory(); |
| 1607 | 1609 | result = *apple2gs_getslotmem(machine, address); |
| 1608 | 1610 | } |
| 1609 | 1611 | else |
| r20754 | r20755 | |
| 1614 | 1616 | if (slotdevice->take_c800()) |
| 1615 | 1617 | { |
| 1616 | 1618 | state->m_a2_cnxx_slot = slot; |
| 1617 | | apple2_update_memory(space.machine()); |
| 1619 | state->apple2_update_memory(); |
| 1618 | 1620 | } |
| 1619 | 1621 | result = slotdevice->read_cnxx(space, address&0xff); |
| 1620 | 1622 | } |
| r20754 | r20755 | |
| 1634 | 1636 | if ((address & 0xfff) == 0xfff) |
| 1635 | 1637 | { |
| 1636 | 1638 | state->m_a2_cnxx_slot = -1; |
| 1637 | | apple2_update_memory(space.machine()); |
| 1639 | state->apple2_update_memory(); |
| 1638 | 1640 | } |
| 1639 | 1641 | } |
| 1640 | 1642 | |
| r20754 | r20755 | |
| 1669 | 1671 | if ((address & 0xfff) == 0xfff) |
| 1670 | 1672 | { |
| 1671 | 1673 | state->m_a2_cnxx_slot = -1; |
| 1672 | | apple2_update_memory(space.machine()); |
| 1674 | state->apple2_update_memory(); |
| 1673 | 1675 | } |
| 1674 | 1676 | } |
| 1675 | 1677 | |
| r20754 | r20755 | |
| 1679 | 1681 | } |
| 1680 | 1682 | else if ((address & 0x000F00) == 0x000000) |
| 1681 | 1683 | { |
| 1682 | | state->apple2gs_c0xx_w(machine.device("maincpu")->memory().space(AS_PROGRAM), address, data, 0); |
| 1684 | state->apple2gs_c0xx_w(state->m_maincpu->space(AS_PROGRAM), address, data, 0); |
| 1683 | 1685 | } |
| 1684 | 1686 | else |
| 1685 | 1687 | { |
| r20754 | r20755 | |
| 1696 | 1698 | { |
| 1697 | 1699 | // accessing a slot mapped to internal, let's put back the internal ROM |
| 1698 | 1700 | state->m_a2_cnxx_slot = -1; |
| 1699 | | apple2_update_memory(space.machine()); |
| 1701 | state->apple2_update_memory(); |
| 1700 | 1702 | *apple2gs_getslotmem(machine, address) = data; |
| 1701 | 1703 | } |
| 1702 | 1704 | else |
| r20754 | r20755 | |
| 1707 | 1709 | if (slotdevice->take_c800()) |
| 1708 | 1710 | { |
| 1709 | 1711 | state->m_a2_cnxx_slot = slot; |
| 1710 | | apple2_update_memory(space.machine()); |
| 1712 | state->apple2_update_memory(); |
| 1711 | 1713 | } |
| 1712 | 1714 | slotdevice->write_cnxx(space, address&0xff, data); |
| 1713 | 1715 | } |
| r20754 | r20755 | |
| 1722 | 1724 | if ((address & 0xfff) == 0xfff) |
| 1723 | 1725 | { |
| 1724 | 1726 | state->m_a2_cnxx_slot = -1; |
| 1725 | | apple2_update_memory(space.machine()); |
| 1727 | state->apple2_update_memory(); |
| 1726 | 1728 | } |
| 1727 | 1729 | |
| 1728 | 1730 | if ( state->m_a2_cnxx_slot >= 0 && state->m_a2_cnxx_slot <= 7 ) |
| r20754 | r20755 | |
| 1829 | 1831 | static void apple2gs_setup_memory(running_machine &machine) |
| 1830 | 1832 | { |
| 1831 | 1833 | apple2gs_state *state = machine.driver_data<apple2gs_state>(); |
| 1832 | | address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM); |
| 1834 | address_space& space = state->m_maincpu->space(AS_PROGRAM); |
| 1833 | 1835 | offs_t begin, end; |
| 1834 | 1836 | apple2_memmap_config cfg; |
| 1835 | 1837 | |
| r20754 | r20755 | |
| 1873 | 1875 | state->membank("bank2")->set_base(state->m_slowmem); |
| 1874 | 1876 | |
| 1875 | 1877 | /* install alternate ROM bank */ |
| 1876 | | begin = 0x1000000 - machine.root_device().memregion("maincpu")->bytes(); |
| 1878 | begin = 0x1000000 - state->memregion("maincpu")->bytes(); |
| 1877 | 1879 | end = 0xffffff; |
| 1878 | 1880 | space.install_read_bank(begin, end, "bank3"); |
| 1879 | | state->membank("bank3")->set_base(machine.root_device().memregion("maincpu")->base()); |
| 1881 | state->membank("bank3")->set_base(state->memregion("maincpu")->base()); |
| 1880 | 1882 | |
| 1881 | 1883 | /* install new xxC000-xxCFFF handlers */ |
| 1882 | 1884 | space.install_legacy_read_handler(0x00c000, 0x00cfff, FUNC(apple2gs_00Cxxx_r)); |
| r20754 | r20755 | |
| 1901 | 1903 | cfg.memmap = apple2gs_memmap_entries; |
| 1902 | 1904 | cfg.auxmem = state->m_slowmem; |
| 1903 | 1905 | cfg.auxmem_length = 0x20000; |
| 1904 | | apple2_setup_memory(machine, &cfg); |
| 1906 | state->apple2_setup_memory(&cfg); |
| 1905 | 1907 | } |
| 1906 | 1908 | |
| 1907 | 1909 | |
| r20754 | r20755 | |
| 1919 | 1921 | { |
| 1920 | 1922 | apple2gs_refresh_delegates(); |
| 1921 | 1923 | |
| 1924 | // call "base class" machine reset to set up m_rambase and the language card |
| 1925 | machine_reset(); |
| 1926 | |
| 1922 | 1927 | m_cur_slot6_image = NULL; |
| 1923 | 1928 | m_newvideo = 0x00; |
| 1924 | 1929 | m_vgcint = 0x00; |
| r20754 | r20755 | |
| 1970 | 1975 | apple2_init_common(machine()); |
| 1971 | 1976 | |
| 1972 | 1977 | /* set up Apple IIgs vectoring */ |
| 1973 | | g65816_set_read_vector_callback(machine().device("maincpu"), read8_delegate(FUNC(apple2gs_state::apple2gs_read_vector),this)); |
| 1978 | g65816_set_read_vector_callback(m_maincpu, read8_delegate(FUNC(apple2gs_state::apple2gs_read_vector),this)); |
| 1974 | 1979 | |
| 1975 | 1980 | /* setup globals */ |
| 1976 | 1981 | m_is_rom3 = true; |
| r20754 | r20755 | |
| 2187 | 2192 | m_glu_sysstat |= 0x80; |
| 2188 | 2193 | } |
| 2189 | 2194 | m_glu_816_read_dstat = true; |
| 2190 | | printf("816 gets %02x in sysstat (data avail %02x)\n", m_glu_sysstat, m_glu_sysstat & 0x20); |
| 2195 | // printf("816 gets %02x in sysstat (data avail %02x)\n", m_glu_sysstat, m_glu_sysstat & 0x20); |
| 2191 | 2196 | return m_glu_sysstat; |
| 2192 | 2197 | |
| 2193 | 2198 | case GLU_DATA: |
trunk/src/mess/machine/apple2.c
| r20754 | r20755 | |
| 46 | 46 | |
| 47 | 47 | |
| 48 | 48 | |
| 49 | | void apple2_setup_memory(running_machine &machine, const apple2_memmap_config *config) |
| 49 | void apple2_state::apple2_setup_memory(const apple2_memmap_config *config) |
| 50 | 50 | { |
| 51 | | apple2_state *state = machine.driver_data<apple2_state>(); |
| 52 | | state->m_mem_config = *config; |
| 53 | | state->m_current_meminfo = NULL; |
| 54 | | apple2_update_memory(machine); |
| 51 | m_mem_config = *config; |
| 52 | m_current_meminfo = NULL; |
| 53 | apple2_update_memory(); |
| 55 | 54 | } |
| 56 | 55 | |
| 57 | 56 | |
| 58 | 57 | |
| 59 | | void apple2_update_memory(running_machine &machine) |
| 58 | void apple2_state::apple2_update_memory() |
| 60 | 59 | { |
| 61 | | apple2_state *state = machine.driver_data<apple2_state>(); |
| 62 | | address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM); |
| 60 | address_space& space = m_maincpu->space(AS_PROGRAM); |
| 63 | 61 | int i, bank; |
| 64 | 62 | char rbank[10], wbank[10]; |
| 65 | 63 | int full_update = 0; |
| r20754 | r20755 | |
| 73 | 71 | int wh_nop = 0; |
| 74 | 72 | |
| 75 | 73 | /* need to build list of current info? */ |
| 76 | | if (!state->m_current_meminfo) |
| 74 | if (!m_current_meminfo) |
| 77 | 75 | { |
| 78 | | for (i = 0; state->m_mem_config.memmap[i].end; i++) |
| 76 | for (i = 0; m_mem_config.memmap[i].end; i++) |
| 79 | 77 | ; |
| 80 | | state->m_current_meminfo = auto_alloc_array(machine, apple2_meminfo, i); |
| 78 | m_current_meminfo = auto_alloc_array(machine(), apple2_meminfo, i); |
| 81 | 79 | full_update = 1; |
| 82 | 80 | } |
| 83 | 81 | |
| 84 | 82 | /* get critical info */ |
| 85 | | rom = machine.root_device().memregion("maincpu")->base(); |
| 86 | | rom_length = machine.root_device().memregion("maincpu")->bytes() & ~0xFFF; |
| 83 | rom = memregion("maincpu")->base(); |
| 84 | rom_length = memregion("maincpu")->bytes() & ~0xFFF; |
| 87 | 85 | |
| 88 | 86 | /* loop through the entire memory map */ |
| 89 | | bank = state->m_mem_config.first_bank; |
| 90 | | for (i = 0; state->m_mem_config.memmap[i].get_meminfo; i++) |
| 87 | bank = m_mem_config.first_bank; |
| 88 | for (i = 0; m_mem_config.memmap[i].get_meminfo; i++) |
| 91 | 89 | { |
| 92 | 90 | /* retrieve information on this entry */ |
| 93 | 91 | memset(&meminfo, 0, sizeof(meminfo)); |
| 94 | | state->m_mem_config.memmap[i].get_meminfo(machine, state->m_mem_config.memmap[i].begin, state->m_mem_config.memmap[i].end, &meminfo); |
| 92 | m_mem_config.memmap[i].get_meminfo(machine(), m_mem_config.memmap[i].begin, m_mem_config.memmap[i].end, &meminfo); |
| 95 | 93 | |
| 96 | | bank_disposition = state->m_mem_config.memmap[i].bank_disposition; |
| 94 | bank_disposition = m_mem_config.memmap[i].bank_disposition; |
| 97 | 95 | |
| 98 | 96 | /* do we need to memory reading? */ |
| 99 | 97 | if (full_update |
| 100 | | || (meminfo.read_mem != state->m_current_meminfo[i].read_mem) |
| 101 | | || (meminfo.read_handler != state->m_current_meminfo[i].read_handler)) |
| 98 | || (meminfo.read_mem != m_current_meminfo[i].read_mem) |
| 99 | || (meminfo.read_handler != m_current_meminfo[i].read_handler)) |
| 102 | 100 | { |
| 103 | 101 | rbase = NULL; |
| 104 | 102 | sprintf(rbank,"bank%d",bank); |
| 105 | | begin = state->m_mem_config.memmap[i].begin; |
| 106 | | end_r = state->m_mem_config.memmap[i].end; |
| 103 | begin = m_mem_config.memmap[i].begin; |
| 104 | end_r = m_mem_config.memmap[i].end; |
| 107 | 105 | rh = NULL; |
| 108 | 106 | |
| 109 | 107 | LOG(("apple2_update_memory(): Updating RD {%06X..%06X} [#%02d] --> %08X\n", |
| r20754 | r20755 | |
| 118 | 116 | else if (meminfo.read_mem == APPLE2_MEM_FLOATING) |
| 119 | 117 | { |
| 120 | 118 | /* floating RAM */ |
| 121 | | rh = &state->read_delegates_master[0]; |
| 119 | rh = &read_delegates_master[0]; |
| 122 | 120 | } |
| 123 | 121 | else if ((meminfo.read_mem & 0xC0000000) == APPLE2_MEM_AUX) |
| 124 | 122 | { |
| 125 | 123 | /* auxillary memory */ |
| 126 | | assert(state->m_mem_config.auxmem); |
| 124 | assert(m_mem_config.auxmem); |
| 127 | 125 | offset = meminfo.read_mem & APPLE2_MEM_MASK; |
| 128 | | rbase = &state->m_mem_config.auxmem[offset]; |
| 126 | rbase = &m_mem_config.auxmem[offset]; |
| 129 | 127 | } |
| 130 | 128 | else if ((meminfo.read_mem & 0xC0000000) == APPLE2_MEM_SLOT) |
| 131 | 129 | { |
| 132 | 130 | // slots 1-2 |
| 133 | 131 | if ((meminfo.write_mem & APPLE2_MEM_MASK) == 0) |
| 134 | 132 | { |
| 135 | | rh = &state->read_delegates_master[1]; |
| 133 | rh = &read_delegates_master[1]; |
| 136 | 134 | } |
| 137 | 135 | else if ((meminfo.write_mem & APPLE2_MEM_MASK) == 0x200) |
| 138 | 136 | { // slot 3 |
| 139 | | rh = &state->read_delegates_master[2]; |
| 137 | rh = &read_delegates_master[2]; |
| 140 | 138 | } |
| 141 | 139 | else if ((meminfo.write_mem & APPLE2_MEM_MASK) == 0x300) |
| 142 | 140 | { // slots 4-7 |
| 143 | | rh = &state->read_delegates_master[3]; |
| 141 | rh = &read_delegates_master[3]; |
| 144 | 142 | } |
| 145 | 143 | else |
| 146 | 144 | { |
| r20754 | r20755 | |
| 156 | 154 | else |
| 157 | 155 | { |
| 158 | 156 | /* RAM */ |
| 159 | | if (end_r >= state->m_ram->size()) |
| 160 | | end_r = state->m_ram->size() - 1; |
| 157 | if (end_r >= m_ram->size()) |
| 158 | end_r = m_ram->size() - 1; |
| 161 | 159 | offset = meminfo.read_mem & APPLE2_MEM_MASK; |
| 162 | 160 | if (end_r >= begin) |
| 163 | | rbase = &state->m_ram->pointer()[offset]; |
| 161 | rbase = &m_ram->pointer()[offset]; |
| 164 | 162 | } |
| 165 | 163 | |
| 166 | 164 | /* install the actual handlers */ |
| r20754 | r20755 | |
| 173 | 171 | } |
| 174 | 172 | |
| 175 | 173 | /* did we 'go past the end?' */ |
| 176 | | if (end_r < state->m_mem_config.memmap[i].end) |
| 177 | | space.nop_read(end_r + 1, state->m_mem_config.memmap[i].end); |
| 174 | if (end_r < m_mem_config.memmap[i].end) |
| 175 | space.nop_read(end_r + 1, m_mem_config.memmap[i].end); |
| 178 | 176 | |
| 179 | 177 | /* set the memory bank */ |
| 180 | 178 | if (rbase) |
| 181 | 179 | { |
| 182 | | state->membank(rbank)->set_base(rbase); |
| 180 | membank(rbank)->set_base(rbase); |
| 183 | 181 | } |
| 184 | 182 | |
| 185 | 183 | /* record the current settings */ |
| 186 | | state->m_current_meminfo[i].read_mem = meminfo.read_mem; |
| 187 | | state->m_current_meminfo[i].read_handler = meminfo.read_handler; |
| 184 | m_current_meminfo[i].read_mem = meminfo.read_mem; |
| 185 | m_current_meminfo[i].read_handler = meminfo.read_handler; |
| 188 | 186 | } |
| 189 | 187 | |
| 190 | 188 | /* do we need to memory writing? */ |
| 191 | 189 | if (full_update |
| 192 | | || (meminfo.write_mem != state->m_current_meminfo[i].write_mem) |
| 193 | | || (meminfo.write_handler != state->m_current_meminfo[i].write_handler)) |
| 190 | || (meminfo.write_mem != m_current_meminfo[i].write_mem) |
| 191 | || (meminfo.write_handler != m_current_meminfo[i].write_handler)) |
| 194 | 192 | { |
| 195 | 193 | wbase = NULL; |
| 196 | 194 | if (bank_disposition == A2MEM_MONO) |
| 197 | 195 | sprintf(wbank,"bank%d",bank); |
| 198 | 196 | else if (bank_disposition == A2MEM_DUAL) |
| 199 | 197 | sprintf(wbank,"bank%d",bank+1); |
| 200 | | begin = state->m_mem_config.memmap[i].begin; |
| 201 | | end_w = state->m_mem_config.memmap[i].end; |
| 198 | begin = m_mem_config.memmap[i].begin; |
| 199 | end_w = m_mem_config.memmap[i].end; |
| 202 | 200 | wh = NULL; |
| 203 | 201 | |
| 204 | 202 | LOG(("apple2_update_memory(): Updating WR {%06X..%06X} [#%02d] --> %08X\n", |
| r20754 | r20755 | |
| 213 | 211 | else if ((meminfo.write_mem & 0xC0000000) == APPLE2_MEM_AUX) |
| 214 | 212 | { |
| 215 | 213 | /* auxillary memory */ |
| 216 | | assert(state->m_mem_config.auxmem); |
| 214 | assert(m_mem_config.auxmem); |
| 217 | 215 | offset = meminfo.write_mem & APPLE2_MEM_MASK; |
| 218 | | wbase = &state->m_mem_config.auxmem[offset]; |
| 216 | wbase = &m_mem_config.auxmem[offset]; |
| 219 | 217 | } |
| 220 | 218 | else if ((meminfo.write_mem & 0xC0000000) == APPLE2_MEM_SLOT) |
| 221 | 219 | { |
| r20754 | r20755 | |
| 224 | 222 | // slots 1-2 |
| 225 | 223 | if ((meminfo.write_mem & APPLE2_MEM_MASK) == 0) |
| 226 | 224 | { |
| 227 | | wh = &state->write_delegates_master[0]; |
| 225 | wh = &write_delegates_master[0]; |
| 228 | 226 | } |
| 229 | 227 | else if ((meminfo.write_mem & APPLE2_MEM_MASK) == 0x200) |
| 230 | 228 | { // slot 3 |
| 231 | | wh = &state->write_delegates_master[1]; |
| 229 | wh = &write_delegates_master[1]; |
| 232 | 230 | } |
| 233 | 231 | else if ((meminfo.write_mem & APPLE2_MEM_MASK) == 0x300) |
| 234 | 232 | { // slots 4-7 |
| 235 | | wh = &state->write_delegates_master[2]; |
| 233 | wh = &write_delegates_master[2]; |
| 236 | 234 | } |
| 237 | 235 | } |
| 238 | 236 | else if ((meminfo.write_mem & 0xC0000000) == APPLE2_MEM_ROM) |
| r20754 | r20755 | |
| 243 | 241 | else |
| 244 | 242 | { |
| 245 | 243 | /* RAM */ |
| 246 | | if (end_w >= state->m_ram->size()) |
| 247 | | end_w = state->m_ram->size() - 1; |
| 244 | if (end_w >= m_ram->size()) |
| 245 | end_w = m_ram->size() - 1; |
| 248 | 246 | offset = meminfo.write_mem & APPLE2_MEM_MASK; |
| 249 | 247 | if (end_w >= begin) |
| 250 | | wbase = &state->m_ram->pointer()[offset]; |
| 248 | wbase = &m_ram->pointer()[offset]; |
| 251 | 249 | } |
| 252 | 250 | |
| 253 | 251 | |
| r20754 | r20755 | |
| 265 | 263 | } |
| 266 | 264 | |
| 267 | 265 | /* did we 'go past the end?' */ |
| 268 | | if (end_w < state->m_mem_config.memmap[i].end) |
| 269 | | space.nop_write(end_w + 1, state->m_mem_config.memmap[i].end); |
| 266 | if (end_w < m_mem_config.memmap[i].end) |
| 267 | space.nop_write(end_w + 1, m_mem_config.memmap[i].end); |
| 270 | 268 | |
| 271 | 269 | /* set the memory bank */ |
| 272 | 270 | if (wbase) |
| 273 | 271 | { |
| 274 | | state->membank(wbank)->set_base(wbase); |
| 272 | membank(wbank)->set_base(wbase); |
| 275 | 273 | } |
| 276 | 274 | |
| 277 | 275 | /* record the current settings */ |
| 278 | | state->m_current_meminfo[i].write_mem = meminfo.write_mem; |
| 279 | | state->m_current_meminfo[i].write_handler = meminfo.write_handler; |
| 276 | m_current_meminfo[i].write_mem = meminfo.write_mem; |
| 277 | m_current_meminfo[i].write_handler = meminfo.write_handler; |
| 280 | 278 | } |
| 281 | 279 | bank += bank_disposition; |
| 282 | 280 | } |
| r20754 | r20755 | |
| 286 | 284 | |
| 287 | 285 | void apple2_state::apple2_update_memory_postload() |
| 288 | 286 | { |
| 289 | | apple2_update_memory(machine()); |
| 287 | apple2_update_memory(); |
| 290 | 288 | } |
| 291 | 289 | |
| 292 | 290 | |
| r20754 | r20755 | |
| 394 | 392 | UINT32 rom_length, slot_length; |
| 395 | 393 | |
| 396 | 394 | // find slot_ram if any |
| 397 | | rom = space.machine().root_device().memregion("maincpu")->base(); |
| 398 | | rom_length = space.machine().root_device().memregion("maincpu")->bytes() & ~0xFFF; |
| 395 | rom = state->memregion("maincpu")->base(); |
| 396 | rom_length = state->memregion("maincpu")->bytes() & ~0xFFF; |
| 399 | 397 | slot_length = state->memregion("maincpu")->bytes() - rom_length; |
| 400 | 398 | slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL; |
| 401 | 399 | |
| r20754 | r20755 | |
| 405 | 403 | { |
| 406 | 404 | // printf("slotram_r: taking cnxx_slot to -1\n"); |
| 407 | 405 | state->m_a2_cnxx_slot = -1; |
| 408 | | apple2_update_memory(space.machine()); |
| 406 | state->apple2_update_memory(); |
| 409 | 407 | } |
| 410 | 408 | |
| 411 | 409 | return slot_ram[offset]; |
| r20754 | r20755 | |
| 429 | 427 | { |
| 430 | 428 | // printf("c1xx_r: taking cnxx_slot to %d\n", slotnum); |
| 431 | 429 | m_a2_cnxx_slot = slotnum; |
| 432 | | apple2_update_memory(space.machine()); |
| 430 | apple2_update_memory(); |
| 433 | 431 | } |
| 434 | 432 | |
| 435 | 433 | return slotdevice->read_cnxx(space, offset&0xff); |
| r20754 | r20755 | |
| 451 | 449 | UINT32 rom_length, slot_length; |
| 452 | 450 | |
| 453 | 451 | // find slot_ram if any |
| 454 | | rom = space.machine().root_device().memregion("maincpu")->base(); |
| 455 | | rom_length = space.machine().root_device().memregion("maincpu")->bytes() & ~0xFFF; |
| 452 | rom = memregion("maincpu")->base(); |
| 453 | rom_length = memregion("maincpu")->bytes() & ~0xFFF; |
| 456 | 454 | slot_length = memregion("maincpu")->bytes() - rom_length; |
| 457 | 455 | slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL; |
| 458 | 456 | |
| r20754 | r20755 | |
| 486 | 484 | { |
| 487 | 485 | // printf("c3xx_r: taking cnxx_slot to %d\n", slotnum); |
| 488 | 486 | m_a2_cnxx_slot = slotnum; |
| 489 | | apple2_update_memory(space.machine()); |
| 487 | apple2_update_memory(); |
| 490 | 488 | } |
| 491 | 489 | return slotdevice->read_cnxx(space, offset&0xff); |
| 492 | 490 | } |
| r20754 | r20755 | |
| 507 | 505 | UINT32 rom_length, slot_length; |
| 508 | 506 | |
| 509 | 507 | // find slot_ram if any |
| 510 | | rom = space.machine().root_device().memregion("maincpu")->base(); |
| 511 | | rom_length = space.machine().root_device().memregion("maincpu")->bytes() & ~0xFFF; |
| 508 | rom = memregion("maincpu")->base(); |
| 509 | rom_length = memregion("maincpu")->bytes() & ~0xFFF; |
| 512 | 510 | slot_length = memregion("maincpu")->bytes() - rom_length; |
| 513 | 511 | slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL; |
| 514 | 512 | |
| r20754 | r20755 | |
| 521 | 519 | { |
| 522 | 520 | // printf("c3xx_w: taking cnxx_slot to %d\n", slotnum); |
| 523 | 521 | m_a2_cnxx_slot = slotnum; |
| 524 | | apple2_update_memory(space.machine()); |
| 522 | apple2_update_memory(); |
| 525 | 523 | } |
| 526 | 524 | slotdevice->write_cnxx(space, offset&0xff, data); |
| 527 | 525 | } |
| r20754 | r20755 | |
| 546 | 544 | if (slotdevice->take_c800() && (m_a2_cnxx_slot != slotnum)) |
| 547 | 545 | { |
| 548 | 546 | m_a2_cnxx_slot = slotnum; |
| 549 | | apple2_update_memory(space.machine()); |
| 547 | apple2_update_memory(); |
| 550 | 548 | } |
| 551 | 549 | return slotdevice->read_cnxx(space, offset&0xff); |
| 552 | 550 | } |
| r20754 | r20755 | |
| 567 | 565 | UINT32 rom_length, slot_length; |
| 568 | 566 | |
| 569 | 567 | // find slot_ram if any |
| 570 | | rom = space.machine().root_device().memregion("maincpu")->base(); |
| 571 | | rom_length = space.machine().root_device().memregion("maincpu")->bytes() & ~0xFFF; |
| 568 | rom = memregion("maincpu")->base(); |
| 569 | rom_length = memregion("maincpu")->bytes() & ~0xFFF; |
| 572 | 570 | slot_length = memregion("maincpu")->bytes() - rom_length; |
| 573 | 571 | slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL; |
| 574 | 572 | |
| r20754 | r20755 | |
| 581 | 579 | { |
| 582 | 580 | // printf("c4xx_w: taking cnxx_slot to %d\n", slotnum); |
| 583 | 581 | m_a2_cnxx_slot = slotnum; |
| 584 | | apple2_update_memory(space.machine()); |
| 582 | apple2_update_memory(); |
| 585 | 583 | } |
| 586 | 584 | slotdevice->write_cnxx(space, offset&0xff, data); |
| 587 | 585 | } |
| r20754 | r20755 | |
| 599 | 597 | { |
| 600 | 598 | // printf("cfff_r: taking cnxx_slot to -1\n"); |
| 601 | 599 | m_a2_cnxx_slot = -1; |
| 602 | | apple2_update_memory(space.machine()); |
| 600 | apple2_update_memory(); |
| 603 | 601 | } |
| 604 | 602 | |
| 605 | 603 | return apple2_getfloatingbusvalue(space.machine()); |
| r20754 | r20755 | |
| 611 | 609 | { |
| 612 | 610 | // printf("cfff_w: taking cnxx_slot to -1\n"); |
| 613 | 611 | m_a2_cnxx_slot = -1; |
| 614 | | apple2_update_memory(space.machine()); |
| 612 | apple2_update_memory(); |
| 615 | 613 | } |
| 616 | 614 | } |
| 617 | 615 | |
| r20754 | r20755 | |
| 1001 | 999 | { |
| 1002 | 1000 | apple2_state *state = machine.driver_data<apple2_state>(); |
| 1003 | 1001 | LOG(("apple2_setvar(): val=0x%06x mask=0x%06x pc=0x%04x\n", val, mask, |
| 1004 | | (unsigned int) machine.device("maincpu")->safe_pc())); |
| 1002 | (unsigned int) state->m_maincpu->pc())); |
| 1005 | 1003 | |
| 1006 | 1004 | assert((val & mask) == val); |
| 1007 | 1005 | |
| r20754 | r20755 | |
| 1016 | 1014 | // disable flags that don't apply (INTCXROM/SLOTC3ROM on II/II+ for instance) |
| 1017 | 1015 | state->m_flags &= ~state->m_flags_mask; |
| 1018 | 1016 | |
| 1019 | | apple2_update_memory(machine); |
| 1017 | state->apple2_update_memory(); |
| 1020 | 1018 | } |
| 1021 | 1019 | |
| 1022 | 1020 | |
| r20754 | r20755 | |
| 1064 | 1062 | |
| 1065 | 1063 | // video scanner data |
| 1066 | 1064 | // |
| 1067 | | i = (machine.device<cpu_device>("maincpu"))->total_cycles() % kClocksPerVSync; // cycles into this VSync |
| 1065 | i = state->m_maincpu->total_cycles() % kClocksPerVSync; // cycles into this VSync |
| 1068 | 1066 | |
| 1069 | 1067 | // machine state switches |
| 1070 | 1068 | // |
| r20754 | r20755 | |
| 1566 | 1564 | |
| 1567 | 1565 | if (offset == 0) |
| 1568 | 1566 | { |
| 1569 | | m_joystick_x1_time = space.machine().time().as_double() + x_calibration * m_joy1x->read(); |
| 1570 | | m_joystick_y1_time = space.machine().time().as_double() + y_calibration * m_joy1y->read(); |
| 1571 | | m_joystick_x2_time = space.machine().time().as_double() + x_calibration * m_joy2x->read(); |
| 1572 | | m_joystick_y2_time = space.machine().time().as_double() + y_calibration * m_joy2y->read(); |
| 1567 | m_joystick_x1_time = machine().time().as_double() + x_calibration * m_joy1x->read(); |
| 1568 | m_joystick_y1_time = machine().time().as_double() + y_calibration * m_joy1y->read(); |
| 1569 | m_joystick_x2_time = machine().time().as_double() + x_calibration * m_joy2x->read(); |
| 1570 | m_joystick_y2_time = machine().time().as_double() + y_calibration * m_joy2y->read(); |
| 1573 | 1571 | } |
| 1574 | 1572 | } |
| 1575 | 1573 | return 0; |
| r20754 | r20755 | |
| 1583 | 1581 | |
| 1584 | 1582 | WRITE8_MEMBER ( apple2_state::apple2_c07x_w ) |
| 1585 | 1583 | { |
| 1584 | // this a machine with an aux slot? |
| 1585 | if (m_machinetype == APPLE_IIE) |
| 1586 | { |
| 1587 | device_a2eauxslot_card_interface *auxslotdevice = NULL; |
| 1588 | |
| 1589 | auxslotdevice = m_a2eauxslot->get_a2eauxslot_card(); |
| 1590 | |
| 1591 | if (auxslotdevice) |
| 1592 | { |
| 1593 | auxslotdevice->write_c07x(space, offset&0xf, data); |
| 1594 | } |
| 1595 | } |
| 1596 | |
| 1597 | // AE RamWorks manual indicates that even if the auxslot card sees the c07x write, |
| 1598 | // so does the motherboard and it will trigger the paddles. So always call this. |
| 1586 | 1599 | apple2_c07x_r(space, offset, 0); |
| 1587 | 1600 | } |
| 1588 | 1601 | |
| r20754 | r20755 | |
| 1804 | 1817 | mem_cfg.first_bank = 1; |
| 1805 | 1818 | mem_cfg.memmap = apple2_memmap_entries; |
| 1806 | 1819 | mem_cfg.auxmem = (UINT8*)apple2cp_ce00_ram; |
| 1807 | | apple2_setup_memory(machine(), &mem_cfg); |
| 1820 | apple2_setup_memory(&mem_cfg); |
| 1808 | 1821 | } |
| 1809 | 1822 | |
| 1823 | MACHINE_START_MEMBER(apple2_state,apple2e) |
| 1824 | { |
| 1825 | apple2_memmap_config mem_cfg; |
| 1826 | void *apple2cp_ce00_ram = NULL; |
| 1827 | |
| 1828 | m_flags_mask = 0; |
| 1829 | |
| 1830 | /* there appears to be some hidden RAM that is swapped in on the Apple |
| 1831 | * IIc plus; I have not found any official documentation but the BIOS |
| 1832 | * clearly uses this area as writeable memory */ |
| 1833 | if (!strcmp(machine().system().name, "apple2cp")) |
| 1834 | apple2cp_ce00_ram = auto_alloc_array(machine(), UINT8, 0x200); |
| 1835 | |
| 1836 | m_machinetype = APPLE_IIE; |
| 1837 | |
| 1838 | apple2_init_common(machine()); |
| 1839 | |
| 1840 | /* setup memory */ |
| 1841 | memset(&mem_cfg, 0, sizeof(mem_cfg)); |
| 1842 | mem_cfg.first_bank = 1; |
| 1843 | mem_cfg.memmap = apple2_memmap_entries; |
| 1844 | mem_cfg.auxmem = (UINT8*)apple2cp_ce00_ram; |
| 1845 | apple2_setup_memory(&mem_cfg); |
| 1846 | } |
| 1847 | |
| 1810 | 1848 | MACHINE_START_MEMBER(apple2_state,laser128) |
| 1811 | 1849 | { |
| 1812 | 1850 | apple2_memmap_config mem_cfg; |
| r20754 | r20755 | |
| 1821 | 1859 | mem_cfg.first_bank = 1; |
| 1822 | 1860 | mem_cfg.memmap = apple2_memmap_entries; |
| 1823 | 1861 | mem_cfg.auxmem = (UINT8*)NULL; |
| 1824 | | apple2_setup_memory(machine(), &mem_cfg); |
| 1862 | apple2_setup_memory(&mem_cfg); |
| 1825 | 1863 | } |
| 1826 | 1864 | |
| 1827 | 1865 | MACHINE_START_MEMBER(apple2_state,apple2orig) |
| r20754 | r20755 | |
| 1841 | 1879 | mem_cfg.first_bank = 1; |
| 1842 | 1880 | mem_cfg.memmap = apple2_memmap_entries; |
| 1843 | 1881 | mem_cfg.auxmem = (UINT8*)apple2cp_ce00_ram; |
| 1844 | | apple2_setup_memory(machine(), &mem_cfg); |
| 1882 | apple2_setup_memory(&mem_cfg); |
| 1845 | 1883 | } |
| 1846 | 1884 | |
| 1847 | 1885 | MACHINE_START_MEMBER(apple2_state,space84) |
| r20754 | r20755 | |
| 1861 | 1899 | mem_cfg.first_bank = 1; |
| 1862 | 1900 | mem_cfg.memmap = apple2_memmap_entries; |
| 1863 | 1901 | mem_cfg.auxmem = (UINT8*)apple2cp_ce00_ram; |
| 1864 | | apple2_setup_memory(machine(), &mem_cfg); |
| 1902 | apple2_setup_memory(&mem_cfg); |
| 1865 | 1903 | } |
| 1866 | 1904 | |
| 1867 | 1905 | MACHINE_START_MEMBER(apple2_state,tk2000) |
| r20754 | r20755 | |
| 1880 | 1918 | mem_cfg.first_bank = 1; |
| 1881 | 1919 | mem_cfg.memmap = tk2000_memmap_entries; |
| 1882 | 1920 | mem_cfg.auxmem = (UINT8*)NULL; |
| 1883 | | apple2_setup_memory(machine(), &mem_cfg); |
| 1921 | apple2_setup_memory(&mem_cfg); |
| 1884 | 1922 | } |
| 1885 | 1923 | |
| 1886 | 1924 | int apple2_state::apple2_pressed_specialkey(UINT8 key) |