Previous 199869 Revisions Next

r20719 Monday 4th February, 2013 at 07:39:00 UTC by Miodrag Milanović
Compile fix (no whatsnew)
[src/emu/cpu/es5510]es5510.c

trunk/src/emu/cpu/es5510/es5510.c
r20718r20719
8484  icount = 0;
8585  pc = 0;
8686  state = STATE_HALTED;
87  bzero(gpr, 0xc0 * sizeof(gpr[0]));
87  memset(gpr, 0, 0xc0 * sizeof(gpr[0]));
8888  ser0r = 0;
8989  ser0l = 0;
9090  ser1r = 0;
r20718r20719
110110  dol[0] = dol[1] = 0;
111111  dol_count = 0;
112112
113  bzero(instr, 160 * sizeof(instr[0]));
114  bzero(dram, (1<<20) * sizeof(dram[0]));
113  memset(instr, 0, 160 * sizeof(instr[0]));
114  memset(dram, 0, (1<<20) * sizeof(dram[0]));
115115
116116  dol_latch = 0;
117117  dil_latch = 0;
r20718r20719
121121  ram_sel = 0;
122122  host_control = 0;
123123
124  bzero(&alu, sizeof(alu));
125  bzero(&mulacc, sizeof(mulacc));
124  memset(&alu, 0, sizeof(alu));
125  memset(&mulacc, 0, sizeof(mulacc));
126126}
127127
128128typedef es5510_device::alu_op_t alu_op_t;
r20718r20719
165165}
166166
167167static inline char * DESCRIBE_REG(char *s, UINT8 r) {
168  return stpcpy(s, REGNAME(r));
168  return strcpy(s, REGNAME(r));
169169}
170170
171171const alu_op_t es5510_device::ALU_OPS[16] = {
r20718r20719
214214  case es5510_device::SRC_DST_REG:
215215    return DESCRIBE_REG(s, reg);
216216  case es5510_device::SRC_DST_DELAY:
217    return stpcpy(s, "Delay");
217    return strcpy(s, "Delay");
218218  case es5510_device::SRC_DST_BOTH:
219219    s = DESCRIBE_REG(s, reg);
220    return stpcpy(s, ",Delay");
220    return strcpy(s, ",Delay");
221221  }
222222  // should never happen!
223223  return s;
r20718r20719
243243
244244  switch (op.operands) {
245245  case 0:
246    return stpcpy(s, op.opcode);
246    return strcpy(s, op.opcode);
247247
248248  case 1:
249249    s += sprintf(s, "%s %s >", op.opcode, REGNAME(bReg));
r20718r20719
363363    break;
364364
365365    /* 0x03 to 0x08 INSTR Register */
366  case 0x03: instr_latch = ((instr_latch&0x00ffffffffff) | ((INT64)data&0xff)<<40); logerror("ES5510: Write INSTR latch[5] = %02x -> %012llx\n", data, instr_latch); break;
367  case 0x04: instr_latch = ((instr_latch&0xff00ffffffff) | ((INT64)data&0xff)<<32); logerror("ES5510: Write INSTR latch[4] = %02x -> %012llx\n", data, instr_latch); break;
368  case 0x05: instr_latch = ((instr_latch&0xffff00ffffff) | ((INT64)data&0xff)<<24); logerror("ES5510: Write INSTR latch[3] = %02x -> %012llx\n", data, instr_latch); break;
369  case 0x06: instr_latch = ((instr_latch&0xffffff00ffff) | ((INT64)data&0xff)<<16); logerror("ES5510: Write INSTR latch[2] = %02x -> %012llx\n", data, instr_latch); break;
370  case 0x07: instr_latch = ((instr_latch&0xffffffff00ff) | ((INT64)data&0xff)<< 8); logerror("ES5510: Write INSTR latch[1] = %02x -> %012llx\n", data, instr_latch); break;
371  case 0x08: instr_latch = ((instr_latch&0xffffffffff00) | ((INT64)data&0xff)<< 0); logerror("ES5510: Write INSTR latch[0] = %02x -> %012llx\n", data, instr_latch); break;
366  case 0x03: instr_latch = ((instr_latch&0x00ffffffffff) | ((INT64)data&0xff)<<40); logerror("ES5510: Write INSTR latch[5] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
367  case 0x04: instr_latch = ((instr_latch&0xff00ffffffff) | ((INT64)data&0xff)<<32); logerror("ES5510: Write INSTR latch[4] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
368  case 0x05: instr_latch = ((instr_latch&0xffff00ffffff) | ((INT64)data&0xff)<<24); logerror("ES5510: Write INSTR latch[3] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
369  case 0x06: instr_latch = ((instr_latch&0xffffff00ffff) | ((INT64)data&0xff)<<16); logerror("ES5510: Write INSTR latch[2] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
370  case 0x07: instr_latch = ((instr_latch&0xffffffff00ff) | ((INT64)data&0xff)<< 8); logerror("ES5510: Write INSTR latch[1] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
371  case 0x08: instr_latch = ((instr_latch&0xffffffffff00) | ((INT64)data&0xff)<< 0); logerror("ES5510: Write INSTR latch[0] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
372372
373373    /* 0x09 to 0x0b DIL Register (r/o) */
374374
r20718r20719
418418    break;
419419
420420  case 0x80: /* Read select - GPR + INSTR */
421    logerror("ES5510: Read INSTR+GPR %02x (%s): %012llx %06x (%d)\n", data, REGNAME(data & 0xff), instr[data] & 0xffffffffffffL, gpr[data] & 0xffffff, gpr[data]);
421    logerror("ES5510: Read INSTR+GPR %02x (%s): %012" I64FMT "x %06x (%d)\n", data, REGNAME(data & 0xff), instr[data] & 0xffffffffffffL, gpr[data] & 0xffffff, gpr[data]);
422422
423423    /* Check if an INSTR address is selected */
424424    if (data < 0xa0) {
r20718r20719
438438
439439  case 0xc0: /* Write select - INSTR */
440440    DESCRIBE_INSTR(buf, instr_latch, gpr[data]);
441    logerror("ES5510: Write INSTR %02x %012llx: %s\n",data, instr_latch&0xffffffffffffL, buf);
441    logerror("ES5510: Write INSTR %02x %012" I64FMT "x: %s\n",data, instr_latch&0xffffffffffffL, buf);
442442    if (data < 0xa0) {
443443      instr[data] = instr_latch&0xffffffffffffL;
444444    }
r20718r20719
446446
447447  case 0xe0: /* Write select - GPR + INSTR */
448448    DESCRIBE_INSTR(buf, instr_latch, gpr_latch);
449    logerror("ES5510:  Write INSTR+GPR %02x (%s): %012llx %06x (%d): %s\n",data, REGNAME(data&0xff), instr_latch, gpr_latch, SX(gpr_latch), buf);
449    logerror("ES5510:  Write INSTR+GPR %02x (%s): %012" I64FMT "x %06x (%d): %s\n",data, REGNAME(data&0xff), instr_latch, gpr_latch, SX(gpr_latch), buf);
450450    if (data < 0xa0) {
451451      instr[data] = instr_latch;
452452    }
r20718r20719
511511   char buf[1024];
512512   for (addr = 0; addr < 0xa0; addr++) {
513513     DESCRIBE_INSTR(buf, instr[addr], gpr[addr]);
514     logerror("%02x: %012llx %06x  %s\n", addr, instr[addr], gpr[addr]&0xffffff, buf);
514     logerror("%02x: %012" I64FMT "x %06x  %s\n", addr, instr[addr], gpr[addr]&0xffffff, buf);
515515   }
516516   for (; addr < 0xc0; addr++) {
517517     logerror("%02x: %06x (%d)\n", addr, gpr[addr]&0xffffff, gpr[addr]);

Previous 199869 Revisions Next

© 1997-2024 The MAME Team