trunk/src/emu/cpu/sh2/sh2drc.c
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| 274 | 274 | static void cfunc_unimplemented(void *param) |
| 275 | 275 | { |
| 276 | 276 | sh2_state *sh2 = (sh2_state *)param; |
| 277 | | UINT16 opcode = sh2->arg0; |
| 278 | | fatalerror("PC=%08X: Unimplemented op %04X\n", sh2->pc, opcode); |
| 277 | |
| 278 | // set up an invalid opcode exception |
| 279 | sh2->evec = RL( sh2, sh2->vbr + 4 * 4 ); |
| 280 | sh2->evec &= AM; |
| 281 | sh2->irqsr = sh2->sr; |
| 282 | // claim it's an NMI, because it pretty much is |
| 283 | sh2->pending_nmi = 1; |
| 279 | 284 | } |
| 280 | 285 | |
| 281 | 286 | /*------------------------------------------------- |
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| 1622 | 1627 | /* compile the instruction */ |
| 1623 | 1628 | if (!generate_opcode(sh2, block, compiler, desc, ovrpc)) |
| 1624 | 1629 | { |
| 1630 | // handle an illegal op |
| 1625 | 1631 | UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc |
| 1626 | 1632 | UML_MOV(block, mem(&sh2->arg0), desc->opptr.w[0]); // mov [arg0],opcode |
| 1627 | 1633 | UML_CALLC(block, cfunc_unimplemented, sh2); // callc cfunc_unimplemented |
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| 1790 | 1796 | UML_MOV(block, R32(Rn), scratch2); |
| 1791 | 1797 | return TRUE; |
| 1792 | 1798 | |
| 1793 | | case 15: // NOP |
| 1794 | | return TRUE; |
| 1799 | case 15: |
| 1800 | return FALSE; |
| 1795 | 1801 | } |
| 1796 | 1802 | |
| 1797 | 1803 | return FALSE; |
| r20644 | r20645 | |
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| 1801 | 1807 | { |
| 1802 | 1808 | switch (opcode & 0x3F) |
| 1803 | 1809 | { |
| 1804 | | case 0x00: // NOP(); |
| 1805 | | case 0x01: // NOP(); |
| 1810 | case 0x00: // these are all illegal |
| 1811 | case 0x01: |
| 1812 | case 0x10: |
| 1813 | case 0x11: |
| 1814 | case 0x13: |
| 1815 | case 0x20: |
| 1816 | case 0x21: |
| 1817 | case 0x30: |
| 1818 | case 0x31: |
| 1819 | case 0x32: |
| 1820 | case 0x33: |
| 1821 | case 0x38: |
| 1822 | case 0x39: |
| 1823 | case 0x3a: |
| 1824 | case 0x3b: |
| 1825 | return FALSE; |
| 1826 | |
| 1806 | 1827 | case 0x09: // NOP(); |
| 1807 | | case 0x10: // NOP(); |
| 1808 | | case 0x11: // NOP(); |
| 1809 | | case 0x13: // NOP(); |
| 1810 | | case 0x20: // NOP(); |
| 1811 | | case 0x21: // NOP(); |
| 1812 | | case 0x30: // NOP(); |
| 1813 | | case 0x31: // NOP(); |
| 1814 | | case 0x32: // NOP(); |
| 1815 | | case 0x33: // NOP(); |
| 1816 | | case 0x38: // NOP(); |
| 1817 | | case 0x39: // NOP(); |
| 1818 | | case 0x3a: // NOP(); |
| 1819 | | case 0x3b: // NOP(); |
| 1820 | 1828 | return TRUE; |
| 1821 | 1829 | |
| 1822 | 1830 | case 0x02: // STCSR(Rn); |
| r20644 | r20645 | |
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| 2093 | 2101 | generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE); |
| 2094 | 2102 | return TRUE; |
| 2095 | 2103 | |
| 2096 | | case 3: // NOP(); |
| 2097 | | return TRUE; |
| 2104 | case 3: |
| 2105 | return FALSE; |
| 2098 | 2106 | |
| 2099 | 2107 | case 4: // MOVBM(Rm, Rn); |
| 2100 | 2108 | UML_MOV(block, I1, R32(Rm)); // mov r1, Rm |
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| 2265 | 2273 | UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1 |
| 2266 | 2274 | return TRUE; |
| 2267 | 2275 | |
| 2268 | | case 1: // NOP(); |
| 2269 | | case 9: // NOP(); |
| 2270 | | return TRUE; |
| 2276 | case 1: |
| 2277 | case 9: |
| 2278 | return FALSE; |
| 2271 | 2279 | |
| 2272 | 2280 | case 4: // DIV1(Rm, Rn); |
| 2273 | 2281 | save_fast_iregs(sh2, block); |
| r20644 | r20645 | |
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| 2680 | 2688 | UML_MOV(block, mem(&sh2->vbr), R32(Rn)); // mov vbr, Rn |
| 2681 | 2689 | return TRUE; |
| 2682 | 2690 | |
| 2683 | | case 0x0c: // NOP(); |
| 2684 | | case 0x0d: // NOP(); |
| 2685 | | case 0x14: // NOP(); |
| 2686 | | case 0x1c: // NOP(); |
| 2687 | | case 0x1d: // NOP(); |
| 2688 | | case 0x2c: // NOP(); |
| 2689 | | case 0x2d: // NOP(); |
| 2690 | | case 0x30: // NOP(); |
| 2691 | | case 0x31: // NOP(); |
| 2692 | | case 0x32: // NOP(); |
| 2693 | | case 0x33: // NOP(); |
| 2694 | | case 0x34: // NOP(); |
| 2695 | | case 0x35: // NOP(); |
| 2696 | | case 0x36: // NOP(); |
| 2697 | | case 0x37: // NOP(); |
| 2698 | | case 0x38: // NOP(); |
| 2699 | | case 0x39: // NOP(); |
| 2700 | | case 0x3a: // NOP(); |
| 2701 | | case 0x3b: // NOP(); |
| 2702 | | case 0x3c: // NOP(); |
| 2703 | | case 0x3d: // NOP(); |
| 2704 | | case 0x3e: // NOP(); |
| 2705 | | return TRUE; |
| 2691 | case 0x0c: |
| 2692 | case 0x0d: |
| 2693 | case 0x14: |
| 2694 | case 0x1c: |
| 2695 | case 0x1d: |
| 2696 | case 0x2c: |
| 2697 | case 0x2d: |
| 2698 | case 0x30: |
| 2699 | case 0x31: |
| 2700 | case 0x32: |
| 2701 | case 0x33: |
| 2702 | case 0x34: |
| 2703 | case 0x35: |
| 2704 | case 0x36: |
| 2705 | case 0x37: |
| 2706 | case 0x38: |
| 2707 | case 0x39: |
| 2708 | case 0x3a: |
| 2709 | case 0x3b: |
| 2710 | case 0x3c: |
| 2711 | case 0x3d: |
| 2712 | case 0x3e: |
| 2713 | return FALSE; |
| 2706 | 2714 | } |
| 2707 | 2715 | |
| 2708 | 2716 | return FALSE; |
| r20644 | r20645 | |
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| 2866 | 2874 | generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE); |
| 2867 | 2875 | return TRUE; |
| 2868 | 2876 | |
| 2869 | | case 2<< 8: // NOP(); |
| 2870 | | case 3<< 8: // NOP(); |
| 2871 | | case 6<< 8: // NOP(); |
| 2872 | | case 7<< 8: // NOP(); |
| 2873 | | case 10<< 8: // NOP(); |
| 2874 | | case 12<< 8: // NOP(); |
| 2875 | | case 14<< 8: // NOP(); |
| 2876 | | return TRUE; |
| 2877 | case 2<< 8: |
| 2878 | case 3<< 8: |
| 2879 | case 6<< 8: |
| 2880 | case 7<< 8: |
| 2881 | case 10<< 8: |
| 2882 | case 12<< 8: |
| 2883 | case 14<< 8: |
| 2884 | return FALSE; |
| 2877 | 2885 | |
| 2878 | 2886 | case 4<< 8: // MOVBL4(Rm, opcode & 0x0f); |
| 2879 | 2887 | udisp = opcode & 0x0f; |