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r20599 Tuesday 29th January, 2013 at 15:11:04 UTC by Curt Coder
(MESS) c64: Cartridge WIP. (nw)
[hash]c64_cart.xml
[src/mess/machine]c64_fcc.c c64_fcc.h
[src/mess/video]mos6566.c

trunk/hash/c64_cart.xml
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64156415   </software>
64166416
64176417   <software name="fcc" supported="no">
6418      <description>The Final ChessCard</description>
6418      <description>The Final ChessCard (Ger)</description>
64196419      <year>1989</year>
64206420      <publisher>Tasc</publisher>
64216421
64226422      <part name="cart" interface="c64_cart">
64236423         <feature name="slot" value="fcc" />
64246424         <feature name="exrom" value="0" />
6425         <feature name="game" value="1" />
6425         <feature name="game" value="0" />
64266426
64276427         <dataarea name="roml" size="0x8000">
64286428            <rom name="fcc_rom2" size="0x8000" crc="8fc0f156" sha1="c843729870e7ce59bb64b60ebec028f7200f93d1" offset="0x0000" />
64296429         </dataarea>
6430
6431         <dataarea name="nvram" size="0x2000" />
64306432      </part>
64316433   </software>
64326434
trunk/src/mess/machine/c64_fcc.c
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77
88**********************************************************************/
99
10/*
11
12   TODO:
13
14   629D ldx #$00
15   629F stx $0e
16   62A1 sta $df00
17   62A4 inc $d020
18   62A7 dec $d020
19   62AA cpx $0e
20   62AC beq $62a4 <-- eternal loop here
21   62AE rts
22
23*/
24
1025#include "c64_fcc.h"
1126
1227
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5065//-------------------------------------------------
5166
5267static ADDRESS_MAP_START( c64_fcc_map, AS_PROGRAM, 8, c64_final_chesscard_device )
53   AM_RANGE(0x0000, 0x7fff) AM_RAM
68   AM_RANGE(0x0000, 0x1fff) AM_MIRROR(0x6000) AM_READWRITE(nvram_r, nvram_w)
5469   AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION(G65SC02P4_TAG, 0)
5570ADDRESS_MAP_END
5671
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6075//-------------------------------------------------
6176
6277static MACHINE_CONFIG_FRAGMENT( c64_fcc )
63   MCFG_CPU_ADD(G65SC02P4_TAG, M65SC02, 5000000)
78   MCFG_CPU_ADD(G65SC02P4_TAG, M65SC02, XTAL_5MHz)
6479   MCFG_CPU_PROGRAM_MAP(c64_fcc_map)
6580MACHINE_CONFIG_END
6681
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117132c64_final_chesscard_device::c64_final_chesscard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
118133   device_t(mconfig, C64_FCC, "Final ChessCard", tag, owner, clock),
119134   device_c64_expansion_card_interface(mconfig, *this),
120   m_maincpu(*this, G65SC02P4_TAG)
135   device_nvram_interface(mconfig, *this),
136   m_maincpu(*this, G65SC02P4_TAG),
137   m_bank(0),
138   m_ramen(0)
121139{
122140}
123141
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137155
138156void c64_final_chesscard_device::device_reset()
139157{
158   m_maincpu->reset();
159
160   m_bank = 0;
161   m_ramen = 0;
162   m_game = 0;
140163}
141164
142165
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148171{
149172   if (!roml)
150173   {
151      data = m_roml[(m_bank << 13) | (offset & 0x1fff)];
174      if (m_ramen)
175      {
176         data = m_nvram[offset & 0x1fff];
177      }
178      else
179      {
180         data = m_roml[(m_bank << 14) | (offset & 0x3fff)];
181      }
152182   }
183   else if (!romh)
184   {
185      data = m_roml[(m_bank << 14) | (offset & 0x3fff)];
186   }
153187
154188   return data;
155189}
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161195
162196void c64_final_chesscard_device::c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2)
163197{
164   if (!io1)
198   if (!roml)
165199   {
166         printf("IO1 %04x %02x\n", offset, data);
167      m_bank = data;
200      if (m_ramen)
201      {
202         m_nvram[offset & 0x1fff] = data;
203      }
168204   }
205   else if (!io1)
206   {
207      /*
208     
209          bit     description
210     
211          0       ?
212          1       
213          2       
214          3       
215          4       
216          5       
217          6       
218          7       
219     
220      */
169221
170   if (!io2) printf("IO1 %04x %02x\n", offset, data);
222      printf("IO1 %04x %02x\n", offset, data);
223      m_bank = BIT(data, 0);
224   }
225   else if (!io2)
226   {
227      /*
228     
229          bit     description
230     
231          0       ?
232          1       
233          2       
234          3       
235          4       
236          5       
237          6       
238          7       ?
239     
240      */
241
242      printf("IO2 %04x %02x\n", offset, data);
243      m_ramen = BIT(data, 0);
244      m_game = BIT(data, 7);
245   }
171246}
247
248
249//-------------------------------------------------
250//  nvram_r - NVRAM read
251//-------------------------------------------------
252
253READ8_MEMBER( c64_final_chesscard_device::nvram_r )
254{
255   return m_nvram[offset & m_nvram_mask];
256}
257
258
259//-------------------------------------------------
260//  nvram_w - NVRAM write
261//-------------------------------------------------
262
263WRITE8_MEMBER( c64_final_chesscard_device::nvram_w )
264{
265   m_nvram[offset & m_nvram_mask] = data;
266}
trunk/src/mess/machine/c64_fcc.h
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2525// ======================> c64_final_chesscard_device
2626
2727class c64_final_chesscard_device : public device_t,
28                           public device_c64_expansion_card_interface
28                           public device_c64_expansion_card_interface,
29                           public device_nvram_interface
2930{
3031public:
3132   // construction/destruction
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3738   virtual ioport_constructor device_input_ports() const;
3839
3940   DECLARE_INPUT_CHANGED_MEMBER( reset );
41   DECLARE_READ8_MEMBER( nvram_r );
42   DECLARE_WRITE8_MEMBER( nvram_w );
4043
4144protected:
4245   // device-level overrides
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4447   virtual void device_start();
4548   virtual void device_reset();
4649
50   // device_nvram_interface overrides
51   virtual void nvram_default() { }
52   virtual void nvram_read(emu_file &file) { if (m_nvram != NULL) { file.read(m_nvram, m_nvram_size); } }
53   virtual void nvram_write(emu_file &file) { if (m_nvram != NULL) { file.write(m_nvram, m_nvram_size); } }
54
4755   // device_c64_expansion_card_interface overrides
4856   virtual UINT8 c64_cd_r(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2);
4957   virtual void c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2);
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5260   required_device<m65sc02_device> m_maincpu;
5361
5462   UINT8 m_bank;
63   int m_ramen;
5564};
5665
5766
trunk/src/mess/video/mos6566.c
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8989   REGISTER_FAST
9090};
9191
92static int UNUSED_BITS[0x40] =
93{
94   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
95   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00,   0x01, 0x70, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00,
96   0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,   0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xff,
97   0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,   0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
98};
9299
93100// VICE palette
94101static const rgb_t PALETTE[] =
r20598r20599
24602467   {
24612468   case 0x11:
24622469      val = (m_reg[offset] & ~0x80) | ((m_rasterline & 0x100) >> 1);
2470      val |= UNUSED_BITS[offset];
24632471      break;
24642472
24652473   case 0x12:
24662474      val = m_rasterline & 0xff;
2475      val |= UNUSED_BITS[offset];
24672476      break;
24682477
24692478   case 0x16:
24702479      val = m_reg[offset] | 0xc0;
2480      val |= UNUSED_BITS[offset];
24712481      break;
24722482
24732483   case 0x18:
24742484      val = m_reg[offset] | 0x01;
2485      val |= UNUSED_BITS[offset];
24752486      break;
24762487
24772488   case 0x19:                          /* interrupt flag register */
24782489      /* clear_interrupt(0xf); */
24792490      val = m_reg[offset] | 0x70;
2491      val |= UNUSED_BITS[offset];
24802492      break;
24812493
24822494   case 0x1a:
24832495      val = m_reg[offset] | 0xf0;
2496      val |= UNUSED_BITS[offset];
24842497      break;
24852498
24862499   case 0x1e:                          /* sprite to sprite collision detect */
24872500      val = m_reg[offset];
24882501      m_reg[offset] = 0;
24892502      clear_interrupt(4);
2503      val |= UNUSED_BITS[offset];
24902504      break;
24912505
24922506   case 0x1f:                          /* sprite to background collision detect */
24932507      val = m_reg[offset];
24942508      m_reg[offset] = 0;
24952509      clear_interrupt(2);
2510      val |= UNUSED_BITS[offset];
24962511      break;
24972512
24982513   case 0x20:
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25012516   case 0x23:
25022517   case 0x24:
25032518      val = m_reg[offset];
2519      val |= UNUSED_BITS[offset];
25042520      break;
25052521
25062522   case 0x00:
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25352551   case 0x2d:
25362552   case 0x2e:
25372553      val = m_reg[offset];
2554      val |= UNUSED_BITS[offset];
25382555      break;
25392556
25402557   case REGISTER_KCR:
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25452562         DBG_LOG(2, "vic read", ("%.2x:%.2x\n", offset, val));
25462563      }
25472564      else
2548         val = 0xff;
2565      {
2566         val |= UNUSED_BITS[offset];
2567      }
25492568      break;
25502569
25512570   case 0x31:
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25632582   case 0x3d:
25642583   case 0x3e:
25652584   case 0x3f:                          /* not used */
2566      // val = m_reg[offset]; //
2567      val = 0xff;
25682585      DBG_LOG(2, "vic read", ("%.2x:%.2x\n", offset, val));
2586      val |= UNUSED_BITS[offset];
25692587      break;
25702588
25712589   default:
25722590      val = m_reg[offset];
2591      val |= UNUSED_BITS[offset];
25732592   }
25742593
25752594   if ((offset != 0x11) && (offset != 0x12))

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