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r20521 Sunday 27th January, 2013 at 00:51:09 UTC by Robbbert
(MESS) ATM cleanup of tags(nw)

[src/mess/drivers]

atm.c

trunk/src/mess/drivers/atm.c

r20520	r20521
25	25	{
26	26	public:
27	27	atm_state(const machine_config &mconfig, device_type type, const char *tag)
28		: spectrum_state(mconfig, type, tag) { }
	28	: spectrum_state(mconfig, type, tag)
	29	, m_maincpu(*this, "maincpu")
	30	, m_bank1(*this, "bank1")
	31	, m_bank2(*this, "bank2")
	32	, m_bank3(*this, "bank3")
	33	, m_bank4(*this, "bank4")
	34	, m_beta(*this, BETA_DISK_TAG)
	35	, m_ram(*this, RAM_TAG)
	36	{ }
29	37
30	38	DECLARE_WRITE8_MEMBER(atm_port_7ffd_w);
31	39	DIRECT_UPDATE_MEMBER(atm_direct);
32	40	DECLARE_MACHINE_RESET(atm);
	41	void atm_update_memory();
	42	protected:
	43	required_device<cpu_device> m_maincpu;
	44	required_memory_bank m_bank1;
	45	required_memory_bank m_bank2;
	46	required_memory_bank m_bank3;
	47	required_memory_bank m_bank4;
	48	required_device<device_t> m_beta;
	49	required_device<ram_device> m_ram;
	50	private:
	51	UINT8 *m_p_ram;
33	52	};
34	53
35	54
36	55	DIRECT_UPDATE_MEMBER(atm_state::atm_direct)
37	56	{
38		device_t *beta = machine().device(BETA_DISK_TAG);
39		UINT16 pc = machine().device("maincpu")->state().state_int(STATE_GENPCBASE);
	57	UINT16 pc = m_maincpu->state_int(STATE_GENPCBASE);
40	58
41		if (beta->started() && betadisk_is_active(beta))
	59	if (m_beta->started() && betadisk_is_active(m_beta))
42	60	{
43	61	if (pc >= 0x4000)
44	62	{
45		m_ROMSelection = ((m_port_7ffd_data>>4) & 0x01) ? 1 : 0;
46		betadisk_disable(beta);
47		membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
	63	m_ROMSelection = BIT(m_port_7ffd_data, 4);
	64	betadisk_disable(m_beta);
	65	m_bank1->set_base(&m_p_ram[0x10000 + (m_ROMSelection<<14)]);
48	66	}
49	67	}
50	68	else if (((pc & 0xff00) == 0x3d00) && (m_ROMSelection==1))
51	69	{
52	70	m_ROMSelection = 3;
53		if (beta->started())
54		betadisk_enable(beta);
	71	if (m_beta->started())
	72	betadisk_enable(m_beta);
55	73
56	74	}
57	75	if(address<=0x3fff)
58	76	{
59		if (m_ROMSelection == 3) {
60		direct.explicit_configure(0x0000, 0x3fff, 0x3fff, memregion("maincpu")->base() + 0x018000);
61		membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x018000);
62		} else {
63		direct.explicit_configure(0x0000, 0x3fff, 0x3fff, memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
64		membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
	77	if (m_ROMSelection == 3)
	78	{
	79	direct.explicit_configure(0x0000, 0x3fff, 0x3fff, &m_p_ram[0x18000]);
	80	m_bank1->set_base(&m_p_ram[0x18000]);
65	81	}
	82	else
	83	{
	84	direct.explicit_configure(0x0000, 0x3fff, 0x3fff, &m_p_ram[0x10000 + (m_ROMSelection<<14)]);
	85	m_bank1->set_base(&m_p_ram[0x10000 + (m_ROMSelection<<14)]);
	86	}
66	87	return ~0;
67	88	}
68	89	return address;
69	90	}
70	91
71		static void atm_update_memory(running_machine &machine)
	92	void atm_state::atm_update_memory()
72	93	{
73		spectrum_state *state = machine.driver_data<spectrum_state>();
74		device_t *beta = machine.device(BETA_DISK_TAG);
75		UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
	94	spectrum_state *state = machine().driver_data<spectrum_state>();
	95	UINT8 *messram = m_ram->pointer();
76	96
77	97	state->m_screen_location = messram + ((state->m_port_7ffd_data & 8) ? (7<<14) : (5<<14));
78	98
79		state->membank("bank4")->set_base(messram + ((state->m_port_7ffd_data & 0x07) * 0x4000));
	99	m_bank4->set_base(messram + ((state->m_port_7ffd_data & 0x07) * 0x4000));
80	100
81		if (beta->started() && betadisk_is_active(beta) && !( state->m_port_7ffd_data & 0x10 ) )
82		{
	101	if (m_beta->started() && betadisk_is_active(m_beta) && !( state->m_port_7ffd_data & 0x10 ) )
83	102	state->m_ROMSelection = 3;
84		}
85		else {
	103	else
86	104	/* ROM switching */
87		state->m_ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01) ;
88		}
	105	state->m_ROMSelection = BIT(state->m_port_7ffd_data, 4) ;
	106
89	107	/* rom 0 is 128K rom, rom 1 is 48 BASIC */
90		state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	108	m_bank1->set_base(&m_p_ram[0x10000 + (state->m_ROMSelection<<14)]);
91	109	}
92	110
93	111	WRITE8_MEMBER(atm_state::atm_port_7ffd_w)
r20520	r20521
100	118	m_port_7ffd_data = data;
101	119
102	120	/* update memory */
103		atm_update_memory(machine());
	121	atm_update_memory();
104	122	}
105	123
106	124	static ADDRESS_MAP_START (atm_io, AS_IO, 8, atm_state )
r20520	r20521
118	136
119	137	MACHINE_RESET_MEMBER(atm_state,atm)
120	138	{
121		UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
122		address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM);
123		device_t *beta = machine().device(BETA_DISK_TAG);
	139	UINT8 *messram = m_ram->pointer();
	140	address_space &space = m_maincpu->space(AS_PROGRAM);
	141	m_p_ram = memregion("maincpu")->base();
124	142
125	143	space.install_read_bank(0x0000, 0x3fff, "bank1");
126	144	space.unmap_write(0x0000, 0x3fff);
127	145
128		if (beta->started())  {
129		betadisk_enable(beta);
130		betadisk_clear_status(beta);
	146	if (m_beta->started())
	147	{
	148	betadisk_enable(m_beta);
	149	betadisk_clear_status(m_beta);
131	150	}
132	151	space.set_direct_update_handler(direct_update_delegate(FUNC(atm_state::atm_direct), this));
133	152
134	153	memset(messram,0,128*1024);
135	154
136		/* Bank 5 is always in 0x4000 - 0x7fff */
137		membank("bank2")->set_base(messram + (5<<14));
	155	/* Bank 2 is always in 0x4000 - 0x7fff */
	156	m_bank2->set_base(messram + (5<<14));
138	157
139		/* Bank 2 is always in 0x8000 - 0xbfff */
140		membank("bank3")->set_base(messram + (2<<14));
	158	/* Bank 3 is always in 0x8000 - 0xbfff */
	159	m_bank3->set_base(messram + (2<<14));
141	160
142	161	m_port_7ffd_data = 0;
143	162	m_port_1ffd_data = -1;
144	163
145		atm_update_memory(machine());
	164	atm_update_memory();
146	165	}
147	166
148	167	/* F4 Character Displayer */
r20520	r20521
228	247	ROM_LOAD( "sgen.rom", 0x0000, 0x0800, CRC(1f4387d6) SHA1(93b3774dc8a486643a1bdd48c606b0c84fa0e22b))
229	248	ROM_END
230	249
231		/*    YEAR  NAME      PARENT    COMPAT  MACHINE     INPUT       INIT    COMPANY     FULLNAME */
232		COMP( 1991, atm,    spec128,    0,      atm,    spec_plus, driver_device,   0,          "MicroART",     "ATM", GAME_NOT_WORKING)
233		//COMP( 1991, atmtb1,   spec128,    0,      atm,    spec_plus, driver_device,  0,      "MicroART",     "ATM-turbo1", GAME_NOT_WORKING)
234		COMP( 1993, atmtb2, spec128,    0,      atmtb2, spec_plus, driver_device,   0,          "MicroART",     "ATM-turbo2", GAME_NOT_WORKING)
235		//COMP( 1994, turbo2, spec128,  0,      atm,    spec_plus, driver_device,  0,          "MicroART",     "TURBO 2+", GAME_NOT_WORKING)
	250	/*    YEAR  NAME    PARENT   COMPAT  MACHINE INPUT      CLASS          INIT    COMPANY     FULLNAME */
	251	COMP( 1991, atm,    spec128, 0,      atm,    spec_plus, driver_device, 0,    "MicroART", "ATM", GAME_NOT_WORKING)
	252	//COMP( 1991, atmtb1, spec128, 0,      atm,    spec_plus, driver_device, 0,    "MicroART", "ATM-turbo1", GAME_NOT_WORKING)
	253	COMP( 1993, atmtb2, spec128, 0,      atmtb2, spec_plus, driver_device, 0,    "MicroART", "ATM-turbo2", GAME_NOT_WORKING)
	254	//COMP( 1994, turbo2, spec128, 0,      atm,    spec_plus, driver_device, 0,    "MicroART", "TURBO 2+", GAME_NOT_WORKING)

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