trunk/src/mess/includes/ti89.h
| r20516 | r20517 | |
|---|
| 15 | 15 | ti68k_state(const machine_config &mconfig, device_type type, const char *tag) |
| 16 | 16 | : driver_device(mconfig, type, tag), |
| 17 | 17 | m_maincpu(*this, "maincpu"), |
| 18 | | m_flash(*this, "flash") |
| 18 | m_flash(*this, "flash"), |
| 19 | m_io_bit0(*this, "BIT0"), |
| 20 | m_io_bit1(*this, "BIT1"), |
| 21 | m_io_bit2(*this, "BIT2"), |
| 22 | m_io_bit3(*this, "BIT3"), |
| 23 | m_io_bit4(*this, "BIT4"), |
| 24 | m_io_bit5(*this, "BIT5"), |
| 25 | m_io_bit6(*this, "BIT6"), |
| 26 | m_io_bit7(*this, "BIT7") |
| 19 | 27 | { } |
| 20 | 28 | |
| 21 | 29 | required_device<cpu_device> m_maincpu; |
| 22 | 30 | required_device<sharp_unk128mbit_device> m_flash; |
| 31 | required_ioport m_io_bit0; |
| 32 | required_ioport m_io_bit1; |
| 33 | required_ioport m_io_bit2; |
| 34 | required_ioport m_io_bit3; |
| 35 | required_ioport m_io_bit4; |
| 36 | required_ioport m_io_bit5; |
| 37 | required_ioport m_io_bit6; |
| 38 | required_ioport m_io_bit7; |
| 23 | 39 | |
| 24 | 40 | // hardware versions |
| 25 | | enum { m_HW1=1, m_HW2, m_HW3, m_HW4 }; |
| 41 | enum { HW1=1, HW2, HW3, HW4 }; |
| 26 | 42 | |
| 27 | 43 | // HW specifications |
| 28 | 44 | UINT8 m_hw_version; |
| 29 | 45 | bool m_flash_mem; |
| 30 | 46 | UINT32 m_initial_pc; |
| 31 | 47 | |
| 48 | UINT16 *m_rom_base; |
| 49 | |
| 32 | 50 | // keyboard |
| 33 | 51 | UINT16 m_kb_mask; |
| 34 | 52 | UINT8 m_on_key; |
trunk/src/mess/drivers/ti89.c
| r20516 | r20517 | |
|---|
| 25 | 25 | |
| 26 | 26 | UINT8 ti68k_state::keypad_r (running_machine &machine) |
| 27 | 27 | { |
| 28 | | UINT8 port, bit, data = 0xff; |
| 29 | | static const char *const bitnames[] = {"BIT0", "BIT1", "BIT2", "BIT3", "BIT4", "BIT5", "BIT6", "BIT7"}; |
| 28 | UINT8 bit, data = 0xff; |
| 30 | 29 | |
| 31 | 30 | for (bit = 0; bit < 10; bit++) |
| 31 | { |
| 32 | 32 | if (~m_kb_mask & (0x01 << bit)) |
| 33 | | for (port = 0; port < 8; port++) |
| 34 | | data ^= machine.root_device().ioport(bitnames[port])->read() & (0x01 << bit) ? 0x01 << port : 0x00; |
| 33 | { |
| 34 | data ^= m_io_bit0->read() & (0x01 << bit) ? 0x01 : 0x00; |
| 35 | data ^= m_io_bit1->read() & (0x01 << bit) ? 0x02 : 0x00; |
| 36 | data ^= m_io_bit2->read() & (0x01 << bit) ? 0x04 : 0x00; |
| 37 | data ^= m_io_bit3->read() & (0x01 << bit) ? 0x08 : 0x00; |
| 38 | data ^= m_io_bit4->read() & (0x01 << bit) ? 0x10 : 0x00; |
| 39 | data ^= m_io_bit5->read() & (0x01 << bit) ? 0x20 : 0x00; |
| 40 | data ^= m_io_bit6->read() & (0x01 << bit) ? 0x40 : 0x00; |
| 41 | data ^= m_io_bit7->read() & (0x01 << bit) ? 0x80 : 0x00; |
| 42 | } |
| 43 | } |
| 44 | |
| 35 | 45 | return data; |
| 36 | 46 | } |
| 37 | 47 | |
| r20516 | r20517 | |
|---|
| 145 | 155 | } |
| 146 | 156 | else |
| 147 | 157 | { |
| 148 | | UINT16 *rom_base = (UINT16 *)(*space.machine().root_device().memregion("flash")); |
| 149 | | |
| 150 | | return rom_base[offset]; |
| 158 | return m_rom_base[offset]; |
| 151 | 159 | } |
| 152 | 160 | } |
| 153 | 161 | |
| r20516 | r20517 | |
|---|
| 166 | 174 | m_timer_val = (m_io_hw1[0x0b]) & 0xff; |
| 167 | 175 | } |
| 168 | 176 | |
| 169 | | if (!BIT(m_io_hw1[0x0a], 7) && ((m_hw_version == m_HW1) || (!BIT(m_io_hw1[0x0f], 2) && !BIT(m_io_hw1[0x0f], 1)))) |
| 177 | if (!BIT(m_io_hw1[0x0a], 7) && ((m_hw_version == HW1) || (!BIT(m_io_hw1[0x0f], 2) && !BIT(m_io_hw1[0x0f], 1)))) |
| 170 | 178 | { |
| 171 | 179 | if (!(m_timer & 0x003f)) |
| 172 | 180 | m_maincpu->set_input_line(M68K_IRQ_1, HOLD_LINE); |
| r20516 | r20517 | |
|---|
| 416 | 424 | |
| 417 | 425 | void ti68k_state::machine_start() |
| 418 | 426 | { |
| 419 | | UINT16 *rom = (UINT16 *)(*machine().root_device().memregion("flash")); |
| 427 | m_rom_base = (UINT16 *)(*memregion("flash")); |
| 420 | 428 | int i; |
| 421 | 429 | |
| 422 | | m_flash_mem = !((rom[0x32] & 0x0f) != 0); |
| 430 | m_flash_mem = !((m_rom_base[0x32] & 0x0f) != 0); |
| 423 | 431 | |
| 424 | 432 | if (m_flash_mem) |
| 425 | 433 | { |
| 426 | | UINT32 base = ((((rom[0x82]) << 16) | rom[0x83]) & 0xffff)>>1; |
| 434 | UINT32 base = ((((m_rom_base[0x82]) << 16) | m_rom_base[0x83]) & 0xffff)>>1; |
| 427 | 435 | |
| 428 | | if (rom[base] >= 8) |
| 429 | | m_hw_version = ((rom[base + 0x0b]) << 16) | rom[base + 0x0c]; |
| 436 | if (m_rom_base[base] >= 8) |
| 437 | m_hw_version = ((m_rom_base[base + 0x0b]) << 16) | m_rom_base[base + 0x0c]; |
| 430 | 438 | |
| 431 | 439 | if (!m_hw_version) |
| 432 | | m_hw_version = m_HW1; |
| 440 | m_hw_version = HW1; |
| 433 | 441 | |
| 434 | 442 | for (i = 0x9000; i < 0x100000; i++) |
| 435 | | if (rom[i] == 0xcccc && rom[i + 1] == 0xcccc) |
| 443 | if (m_rom_base[i] == 0xcccc && m_rom_base[i + 1] == 0xcccc) |
| 436 | 444 | break; |
| 437 | 445 | |
| 438 | | m_initial_pc = ((rom[i + 4]) << 16) | rom[i + 5]; |
| 446 | m_initial_pc = ((m_rom_base[i + 4]) << 16) | m_rom_base[i + 5]; |
| 439 | 447 | } |
| 440 | 448 | else |
| 441 | 449 | { |
| 442 | | m_hw_version = m_HW1; |
| 443 | | m_initial_pc = ((rom[2]) << 16) | rom[3]; |
| 450 | m_hw_version = HW1; |
| 451 | m_initial_pc = ((m_rom_base[2]) << 16) | m_rom_base[3]; |
| 444 | 452 | |
| 445 | 453 | m_maincpu->space(AS_PROGRAM).unmap_read(0x200000, 0x5fffff); |
| 446 | 454 | |