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r20494 Saturday 26th January, 2013 at 16:02:20 UTC by Robbbert
(MESS) IP22 tag cleanup (nw)
[src/mess/drivers]ip22.c

trunk/src/mess/drivers/ip22.c
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9595public:
9696   ip22_state(const machine_config &mconfig, device_type type, const char *tag)
9797      : driver_device(mconfig, type, tag),
98      m_wd33c93(*this, "scsi:wd33c93"),
99      m_unkpbus0(*this, "unkpbus0"),
100      m_mainram(*this, "mainram") { }
98   m_maincpu(*this, "maincpu"),
99   m_wd33c93(*this, "scsi:wd33c93"),
100   m_unkpbus0(*this, "unkpbus0"),
101   m_mainram(*this, "mainram"),
102   m_lpt0(*this, "lpt_0"),
103   m_pit(*this, "pit8254"),
104   m_dac(*this, "dac")
105   { }
101106
102   required_device<wd33c93_device> m_wd33c93;
103   required_shared_ptr<UINT32> m_unkpbus0;
104   required_shared_ptr<UINT32> m_mainram;
105107   RTC_t m_RTC;
106108   UINT32 m_int3_regs[64];
107109   UINT32 m_nIOC_ParReadCnt;
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134136   INTERRUPT_GEN_MEMBER(ip22_vbl);
135137   TIMER_CALLBACK_MEMBER(ip22_dma);
136138   TIMER_CALLBACK_MEMBER(ip22_timer);
139   required_device<cpu_device> m_maincpu;
140   required_device<wd33c93_device> m_wd33c93;
141   required_shared_ptr<UINT32> m_unkpbus0;
142   required_shared_ptr<UINT32> m_mainram;
143   required_device<device_t> m_lpt0;
144   required_device<pit8254_device> m_pit;
145   required_device<dac_device> m_dac;
137146};
138147
139148
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208217
209218   // if it's not masked, also assert it now at the CPU
210219   if (state->m_int3_regs[1] & source_mask)
211   {
212      machine.device("maincpu")->execute().set_input_line(MIPS3_IRQ0, ASSERT_LINE);
213   }
220      state->m_maincpu->set_input_line(MIPS3_IRQ0, ASSERT_LINE);
214221}
215222
216223// lower a local0 interrupt
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229236
230237   // if it's not masked, also assert it now at the CPU
231238   if (state->m_int3_regs[2] & source_mask)
232   {
233      machine.device("maincpu")->execute().set_input_line(MIPS3_IRQ1, ASSERT_LINE);
234   }
239      state->m_maincpu->set_input_line(MIPS3_IRQ1, ASSERT_LINE);
235240}
236241
237242// lower a local1 interrupt
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244249
245250READ32_MEMBER(ip22_state::hpc3_pbus6_r)
246251{
247   device_t *lpt = machine().device("lpt_0");
248252   UINT8 ret8;
249253   switch( offset )
250254   {
251255   case 0x004/4:
252      ret8 = pc_lpt_control_r(lpt, space, 0) ^ 0x0d;
256      ret8 = pc_lpt_control_r(m_lpt0, space, 0) ^ 0x0d;
253257      //verboselog(( machine, 0, "Parallel Control Read: %02x\n", ret8 );
254258      return ret8;
255259   case 0x008/4:
256      ret8 = pc_lpt_status_r(lpt, space, 0) ^ 0x80;
260      ret8 = pc_lpt_status_r(m_lpt0, space, 0) ^ 0x80;
257261      //verboselog(( machine, 0, "Parallel Status Read: %02x\n", ret8 );
258262      return ret8;
259263   case 0x030/4:
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293297//      mame_printf_info("INT3: r @ %x mask %08x (PC=%x)\n", offset*4, mem_mask, activecpu_get_pc());
294298      return m_int3_regs[offset-0x80/4];
295299   case 0xb0/4:
296      ret8 = pit8253_r(machine().device("pit8254"), space, 0);
300      ret8 = pit8253_r(m_pit, space, 0);
297301      //verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 0 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
298302      return ret8;
299303   case 0xb4/4:
300      ret8 = pit8253_r(machine().device("pit8254"), space, 1);
304      ret8 = pit8253_r(m_pit, space, 1);
301305      //verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 1 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
302306      return ret8;
303307   case 0xb8/4:
304      ret8 = pit8253_r(machine().device("pit8254"), space, 2);
308      ret8 = pit8253_r(m_pit, space, 2);
305309      //verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 2 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
306310      return ret8;
307311   case 0xbc/4:
308      ret8 = pit8253_r(machine().device("pit8254"), space, 3);
312      ret8 = pit8253_r(m_pit, space, 3);
309313      //verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Control Word Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
310314      return ret8;
311315   default:
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317321
318322WRITE32_MEMBER(ip22_state::hpc3_pbus6_w)
319323{
320   device_t *lpt = machine().device("lpt_0");
321324   char cChar;
322325
323326   switch( offset )
324327   {
325328   case 0x004/4:
326329      //verboselog(( machine, 0, "Parallel Control Write: %08x\n", data );
327      pc_lpt_control_w(lpt, space, 0, data ^ 0x0d);
330      pc_lpt_control_w(m_lpt0, space, 0, data ^ 0x0d);
328331      //m_nIOC_ParCntl = data;
329332      break;
330333   case 0x030/4:
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378381
379382      // if no local0 interrupts now, clear the input to the CPU
380383      if ((m_int3_regs[0] & m_int3_regs[1]) == 0)
381      {
382         machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ0, CLEAR_LINE);
383      }
384         m_maincpu->set_input_line(MIPS3_IRQ0, CLEAR_LINE);
384385      else
385      {
386         machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ0, ASSERT_LINE);
387      }
386         m_maincpu->set_input_line(MIPS3_IRQ0, ASSERT_LINE);
388387
389388      // if no local1 interrupts now, clear the input to the CPU
390389      if ((m_int3_regs[2] & m_int3_regs[3]) == 0)
391      {
392         machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ1, CLEAR_LINE);
393      }
390         m_maincpu->set_input_line(MIPS3_IRQ1, CLEAR_LINE);
394391      else
395      {
396         machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ1, ASSERT_LINE);
397      }
392         m_maincpu->set_input_line(MIPS3_IRQ1, ASSERT_LINE);
393
398394      break;
399395   case 0xb0/4:
400396      //verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 0 Register Write: 0x%08x (%08x)\n", data, mem_mask );
401      pit8253_w(machine().device("pit8254"), space, 0, data & 0x000000ff);
397      pit8253_w(m_pit, space, 0, data & 0x000000ff);
402398      return;
403399   case 0xb4/4:
404400      //verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 1 Register Write: 0x%08x (%08x)\n", data, mem_mask );
405      pit8253_w(machine().device("pit8254"), space, 1, data & 0x000000ff);
401      pit8253_w(m_pit, space, 1, data & 0x000000ff);
406402      return;
407403   case 0xb8/4:
408404      //verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 2 Register Write: 0x%08x (%08x)\n", data, mem_mask );
409      pit8253_w(machine().device("pit8254"), space, 2, data & 0x000000ff);
405      pit8253_w(m_pit, space, 2, data & 0x000000ff);
410406      return;
411407   case 0xbc/4:
412408      //verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Control Word Register Write: 0x%08x (%08x)\n", data, mem_mask );
413      pit8253_w(machine().device("pit8254"), space, 3, data & 0x000000ff);
409      pit8253_w(m_pit, space, 3, data & 0x000000ff);
414410      return;
415411   default:
416412      //verboselog(( machine, 0, "Unknown HPC PBUS6 Write: 0x%08x: 0x%08x (%08x)\n", 0x1fbd9800 + ( offset << 2 ), data, mem_mask );
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418414   }
419415}
420416
421//UINT32 nHPC3_hd0_register;
422//UINT32 nHPC3_hd0_regs[0x20];
423//UINT32 nHPC3_hd1_regs[0x20];
424
425417READ32_MEMBER(ip22_state::hpc3_hd_enet_r)
426418{
427   //running_machine &machine = machine();
428
429419   switch( offset )
430420   {
431421   case 0x0004/4:
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449439
450440WRITE32_MEMBER(ip22_state::hpc3_hd_enet_w)
451441{
452   //running_machine &machine = machine();
453
454442   switch( offset )
455443   {
456444   case 0x0004/4:
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477465
478466READ32_MEMBER(ip22_state::hpc3_hd0_r)
479467{
480   //running_machine &machine = machine();
481
482468   switch( offset )
483469   {
484470   case 0x0000/4:
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512498
513499WRITE32_MEMBER(ip22_state::hpc3_hd0_w)
514500{
515   //running_machine &machine = machine();
516
517501   switch( offset )
518502   {
519503   case 0x0000/4:
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541525
542526READ32_MEMBER(ip22_state::hpc3_pbus4_r)
543527{
544   //running_machine &machine = machine();
545
546528   switch( offset )
547529   {
548530   case 0x0004/4:
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563545
564546WRITE32_MEMBER(ip22_state::hpc3_pbus4_w)
565547{
566   //running_machine &machine = machine();
567
568548   switch( offset )
569549   {
570550   case 0x0004/4:
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621601{
622602   ip22_state *state = machine().driver_data<ip22_state>();
623603
624//  mame_printf_info("RTC_R: offset %x = %x (PC=%x)\n", offset, m_RTC.nRegs[offset], activecpu_get_pc());
625
626604   if( offset <= 0x0d )
627605   {
628606      switch( offset )
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674652         return 0;
675653      }
676654   }
655
677656   if( offset >= 0x0e && offset < 0x40 )
678   {
679657      return m_RTC.nRegs[offset];
680   }
658
681659   if( offset >= 0x40 && offset < 0x80 && !( RTC_REGISTERA & 0x10 ) )
682   {
683660      return m_RTC.nUserRAM[offset - 0x40];
684   }
661
685662   if( offset >= 0x40 && offset < 0x80 && ( RTC_REGISTERA & 0x10 ) )
686663   {
687664      switch( offset )
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743720         return 0;
744721      }
745722   }
723
746724   if( offset >= 0x80 )
747   {
748725      return m_RTC.nUserRAM[ offset - 0x80 ];
749   }
726
750727   return 0;
751728}
752729
753730WRITE32_MEMBER(ip22_state::rtc_w)
754731{
755   //running_machine &machine = machine();
756732   ip22_state *state = machine().driver_data<ip22_state>();
757733   RTC_WRITECNT++;
758734
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928904
929905READ32_MEMBER(ip22_state::hal2_r)
930906{
931   //running_machine &machine = machine();
932
933907   switch( offset )
934908   {
935909   case 0x0010/4:
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945919
946920WRITE32_MEMBER(ip22_state::hal2_w)
947921{
948   //running_machine &machine = machine();
949
950922   switch( offset )
951923   {
952924   case 0x0010/4:
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10841056      UINT16 temp16 = ( m_mainram[(m_PBUS_DMA.nCurPtr - 0x08000000)/4] & 0xffff0000 ) >> 16;
10851057      INT16 stemp16 = (INT16)((temp16 >> 8) | (temp16 << 8));
10861058
1087      machine().device<dac_device>("dac")->write_signed16(stemp16 ^ 0x8000);
1059      m_dac->write_signed16(stemp16 ^ 0x8000);
10881060
10891061      m_PBUS_DMA.nCurPtr += 4;
10901062
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12381210
12391211   m_PBUS_DMA.nActive = 0;
12401212
1241   mips3drc_set_options(machine().device("maincpu"), MIPS3DRC_COMPATIBLE_OPTIONS | MIPS3DRC_CHECK_OVERFLOWS);
1213   mips3drc_set_options(state->m_maincpu, MIPS3DRC_COMPATIBLE_OPTIONS | MIPS3DRC_CHECK_OVERFLOWS);
12421214}
12431215
12441216static void dump_chain(address_space &space, UINT32 ch_base)
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12611233static void scsi_irq(running_machine &machine, int state)
12621234{
12631235   ip22_state *drvstate = machine.driver_data<ip22_state>();
1264   address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1236   address_space &space = drvstate->m_maincpu->space(AS_PROGRAM);
12651237
12661238   if (state)
12671239   {
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15081480{
15091481}
15101482
1511static int ip22_get_out2(running_machine &machine) {
1512   return pit8253_get_output(machine.device("pit8254"), 2 );
1483static int ip22_get_out2(running_machine &machine)
1484{
1485   ip22_state *state = machine.driver_data<ip22_state>();
1486   return pit8253_get_output(state->m_pit, 2 );
15131487}
15141488
15151489void ip22_state::machine_start()

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