trunk/src/mess/drivers/ip20.c
| r20491 | r20492 | |
| 48 | 48 | public: |
| 49 | 49 | ip20_state(const machine_config &mconfig, device_type type, const char *tag) |
| 50 | 50 | : driver_device(mconfig, type, tag), |
| 51 | | m_wd33c93(*this, "scsi:wd33c93"){ } |
| 51 | m_wd33c93(*this, "scsi:wd33c93"), |
| 52 | m_scc(*this, "scc"), |
| 53 | m_eeprom(*this, "eeprom") |
| 54 | { } |
| 52 | 55 | |
| 53 | | required_device<wd33c93_device> m_wd33c93; |
| 54 | | |
| 55 | 56 | HPC_t m_HPC; |
| 56 | 57 | RTC_t m_RTC; |
| 57 | 58 | DECLARE_READ32_MEMBER(hpc_r); |
| r20491 | r20492 | |
| 63 | 64 | virtual void video_start(); |
| 64 | 65 | UINT32 screen_update_ip204415(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 65 | 66 | TIMER_CALLBACK_MEMBER(ip20_timer); |
| 67 | required_device<wd33c93_device> m_wd33c93; |
| 68 | required_device<scc8530_t> m_scc; |
| 69 | required_device<eeprom_device> m_eeprom; |
| 66 | 70 | }; |
| 67 | 71 | |
| 68 | 72 | |
| r20491 | r20492 | |
| 115 | 119 | |
| 116 | 120 | READ32_MEMBER(ip20_state::hpc_r) |
| 117 | 121 | { |
| 118 | | scc8530_t *scc; |
| 119 | 122 | offset <<= 2; |
| 120 | 123 | if( offset >= 0x0e00 && offset <= 0x0e7c ) |
| 121 | 124 | { |
| r20491 | r20492 | |
| 156 | 159 | return m_HPC.nMiscStatus; |
| 157 | 160 | case 0x01bc: |
| 158 | 161 | // verboselog(machine, 2, "HPC CPU Serial EEPROM Read\n" ); |
| 159 | | return ( (machine().device<eeprom_device>("eeprom")->read_bit() << 4 ) ); |
| 162 | return m_eeprom->read_bit() << 4; |
| 160 | 163 | case 0x01c4: |
| 161 | 164 | verboselog(machine(), 2, "HPC Local IO Register 0 Mask Read: %08x (%08x)\n", m_HPC.nLocalIOReg0Mask, mem_mask ); |
| 162 | 165 | return m_HPC.nLocalIOReg0Mask; |
| r20491 | r20492 | |
| 172 | 175 | case 0x0d00: |
| 173 | 176 | verboselog(machine(), 2, "HPC DUART0 Channel B Control Read\n" ); |
| 174 | 177 | // return 0x00000004; |
| 175 | | return 0x7c; //scc->reg_r(space, 0); |
| 178 | return 0x7c; //m_scc->reg_r(space, 0); |
| 176 | 179 | case 0x0d04: |
| 177 | 180 | verboselog(machine(), 2, "HPC DUART0 Channel B Data Read\n" ); |
| 178 | 181 | // return 0; |
| 179 | | scc = machine().device<scc8530_t>("scc"); |
| 180 | | return scc->reg_r(space, 2); |
| 182 | return m_scc->reg_r(space, 2); |
| 181 | 183 | case 0x0d08: |
| 182 | 184 | verboselog(machine(), 2, "HPC DUART0 Channel A Control Read (%08x)\n", mem_mask ); |
| 183 | 185 | // return 0x40; |
| 184 | | return 0x7c; //scc->reg_r(space, 1); |
| 186 | return 0x7c; //m_scc->reg_r(space, 1); |
| 185 | 187 | case 0x0d0c: |
| 186 | 188 | verboselog(machine(), 2, "HPC DUART0 Channel A Data Read\n" ); |
| 187 | 189 | // return 0; |
| 188 | | scc = machine().device<scc8530_t>("scc"); |
| 189 | | return scc->reg_r(space, 3); |
| 190 | return m_scc->reg_r(space, 3); |
| 190 | 191 | case 0x0d10: |
| 191 | 192 | // verboselog(machine, 2, "HPC DUART1 Channel B Control Read\n" ); |
| 192 | 193 | return 0x00000004; |
| r20491 | r20492 | |
| 230 | 231 | |
| 231 | 232 | WRITE32_MEMBER(ip20_state::hpc_w) |
| 232 | 233 | { |
| 233 | | scc8530_t *scc; |
| 234 | | eeprom_device *eeprom; |
| 235 | | eeprom = machine().device<eeprom_device>("eeprom"); |
| 236 | 234 | offset <<= 2; |
| 237 | 235 | if( offset >= 0x0e00 && offset <= 0x0e7c ) |
| 238 | 236 | { |
| r20491 | r20492 | |
| 345 | 343 | { |
| 346 | 344 | verboselog(machine(), 2, " CPU board LED on\n" ); |
| 347 | 345 | } |
| 348 | | eeprom->write_bit((data & 0x00000008) ? 1 : 0 ); |
| 349 | | eeprom->set_cs_line((data & 0x00000002) ? ASSERT_LINE : CLEAR_LINE ); |
| 350 | | eeprom->set_clock_line((data & 0x00000004) ? CLEAR_LINE : ASSERT_LINE ); |
| 346 | m_eeprom->write_bit((data & 0x00000008) ? 1 : 0 ); |
| 347 | m_eeprom->set_cs_line((data & 0x00000002) ? ASSERT_LINE : CLEAR_LINE ); |
| 348 | m_eeprom->set_clock_line((data & 0x00000004) ? CLEAR_LINE : ASSERT_LINE ); |
| 351 | 349 | break; |
| 352 | 350 | case 0x01c4: |
| 353 | 351 | verboselog(machine(), 2, "HPC Local IO Register 0 Mask Write: %08x (%08x)\n", data, mem_mask ); |
| r20491 | r20492 | |
| 367 | 365 | break; |
| 368 | 366 | case 0x0d00: |
| 369 | 367 | verboselog(machine(), 2, "HPC DUART0 Channel B Control Write: %08x (%08x)\n", data, mem_mask ); |
| 370 | | scc = machine().device<scc8530_t>("scc"); |
| 371 | | scc->reg_w(space, 0, data); |
| 368 | m_scc->reg_w(space, 0, data); |
| 372 | 369 | break; |
| 373 | 370 | case 0x0d04: |
| 374 | 371 | verboselog(machine(), 2, "HPC DUART0 Channel B Data Write: %08x (%08x)\n", data, mem_mask ); |
| 375 | | scc = machine().device<scc8530_t>("scc"); |
| 376 | | scc->reg_w(space, 2, data); |
| 372 | m_scc->reg_w(space, 2, data); |
| 377 | 373 | break; |
| 378 | 374 | case 0x0d08: |
| 379 | 375 | verboselog(machine(), 2, "HPC DUART0 Channel A Control Write: %08x (%08x)\n", data, mem_mask ); |
| 380 | | scc = machine().device<scc8530_t>("scc"); |
| 381 | | scc->reg_w(space, 1, data); |
| 376 | m_scc->reg_w(space, 1, data); |
| 382 | 377 | break; |
| 383 | 378 | case 0x0d0c: |
| 384 | 379 | verboselog(machine(), 2, "HPC DUART0 Channel A Data Write: %08x (%08x)\n", data, mem_mask ); |
| 385 | | scc = machine().device<scc8530_t>("scc"); |
| 386 | | scc->reg_w(space, 3, data); |
| 380 | m_scc->reg_w(space, 3, data); |
| 387 | 381 | break; |
| 388 | 382 | case 0x0d10: |
| 389 | 383 | if( ( data & 0x000000ff ) >= 0x00000020 ) |