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r20473 Friday 25th January, 2013 at 21:16:16 UTC by Wilbert Pol
(MESS) oric.c: Some cleanups (nw)

[src/mess/includes]	oric.h
[src/mess/machine]	oric.c
[src/mess/video]	oric.c

trunk/src/mess/machine/oric.c

r20472	r20473
49	49	};
50	50
51	51	/* called when ints are changed - cleared/set */
52		static void oric_refresh_ints(running_machine &machine)
	52	void oric_state::oric_refresh_ints()
53	53	{
54		oric_state *state = machine.driver_data<oric_state>();
55	54	/* telestrat has floppy hardware built-in! */
56		if (state->m_is_telestrat==0)
	55	if (m_is_telestrat==0)
57	56	{
58	57	/* oric 1 or oric atmos */
59	58
60	59	/* if floppy disc hardware is disabled, do not allow interrupts from it */
61		if ((machine.root_device().ioport("FLOPPY")->read() & 0x07) == ORIC_FLOPPY_INTERFACE_NONE)
62		state->m_irqs &=~(1<<1);
	60	if ((m_io_floppy->read() & 0x07) == ORIC_FLOPPY_INTERFACE_NONE)
	61	{
	62	m_irqs &=~(1<<1);
	63	}
63	64	}
64	65
65	66	/* any irq set? */
66		if (state->m_irqs & 0x0f)
67		machine.device("maincpu")->execute().set_input_line(0, HOLD_LINE);
	67	if (m_irqs & 0x0f)
	68	{
	69	m_maincpu->set_input_line(0, HOLD_LINE);
	70	}
68	71	else
69		machine.device("maincpu")->execute().set_input_line(0, CLEAR_LINE);
	72	{
	73	m_maincpu->set_input_line(0, CLEAR_LINE);
	74	}
70	75	}
71	76
72	77
r20472	r20473
80	85
81	86
82	87	/* refresh keyboard sense */
83		static void oric_keyboard_sense_refresh(running_machine &machine)
	88	void oric_state::oric_keyboard_sense_refresh()
84	89	{
85		oric_state *state = machine.driver_data<oric_state>();
86	90	/* The following assumes that if a 0 is written, it can be used to detect if any key has been pressed.. */
87	91	/* for each bit that is 0, it combines it's pressed state with the pressed state so far */
88	92
r20472	r20473
90	94	unsigned char key_bit = 0;
91	95
92	96	/* what if data is 0, can it sense if any of the keys on a line are pressed? */
93		int input_port_data;
94		static const char *const keynames[] = { "ROW0", "ROW1", "ROW2", "ROW3", "ROW4", "ROW5", "ROW6", "ROW7" };
	97	int input_port_data = 0;
95	98
96		input_port_data = machine.root_device().ioport(keynames[state->m_keyboard_line])->read();
	99	switch ( m_keyboard_line )
	100	{
	101	case 0: input_port_data = m_io_row0->read(); break;
	102	case 1: input_port_data = m_io_row1->read(); break;
	103	case 2: input_port_data = m_io_row2->read(); break;
	104	case 3: input_port_data = m_io_row3->read(); break;
	105	case 4: input_port_data = m_io_row4->read(); break;
	106	case 5: input_port_data = m_io_row5->read(); break;
	107	case 6: input_port_data = m_io_row6->read(); break;
	108	case 7: input_port_data = m_io_row7->read(); break;
	109	}
97	110
98	111	/* go through all bits in line */
99	112	for (i=0; i<8; i++)
100	113	{
101	114	/* sense this bit? */
102		if (((~state->m_keyboard_mask) & (1<<i)) != 0)
	115	if (((~m_keyboard_mask) & (1<<i)) != 0)
103	116	{
104	117	/* is key pressed? */
105	118	if (input_port_data & (1<<i))
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111	124	}
112	125
113	126	/* clear sense result */
114		state->m_key_sense_bit = 0;
	127	m_key_sense_bit = 0;
115	128
116	129	/* any keys pressed on this line? */
117	130	if (key_bit!=0)
118	131	{
119	132	/* set sense result */
120		state->m_key_sense_bit = (1<<3);
	133	m_key_sense_bit = (1<<3);
121	134	}
122	135	}
123	136
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143	156	{
144	157	/* if psg is in read register state return reg data */
145	158	if (m_psg_control==0x01)
146		return ay8910_r(machine().device("ay8912"), space, 0);
	159	{
	160	return ay8910_r(m_ay8912, space, 0);
	161	}
147	162
148	163	/* return high-impedance */
149	164	return 0x0ff;
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157	172	{
158	173	int data;
159	174
160		oric_keyboard_sense_refresh(machine());
	175	oric_keyboard_sense_refresh();
161	176
162	177	data = m_key_sense_bit;
163	178	data |= m_keyboard_line & 0x07;
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167	182
168	183
169	184	/* read/write data depending on state of bdir, bc1 pins and data output to psg */
170		static void oric_psg_connection_refresh(address_space &space)
	185	void oric_state::oric_psg_connection_refresh(address_space &space)
171	186	{
172		oric_state *state = space.machine().driver_data<oric_state>();
173		if (state->m_psg_control!=0)
	187	if (m_psg_control!=0)
174	188	{
175		switch (state->m_psg_control)
	189	switch (m_psg_control)
176	190	{
177	191	/* PSG inactive */
178	192	case 0:
179		break;
	193	break;
	194
180	195	/* read register data */
181	196	case 1:
182		{
183		//state->m_via_port_a_data = ay8910_read_port_0_r(space, 0);
184		}
185		break;
	197	//m_via_port_a_data = ay8910_read_port_0_r(space, 0);
	198	break;
	199
186	200	/* write register data */
187	201	case 2:
188		{
189		device_t *ay8912 = space.machine().device("ay8912");
190		ay8910_data_w(ay8912, space, 0, state->m_via_port_a_data);
191		}
192		break;
	202	ay8910_data_w(m_ay8912, space, 0, m_via_port_a_data);
	203	break;
	204
193	205	/* write register index */
194	206	case 3:
195		{
196		device_t *ay8912 = space.machine().device("ay8912");
197		ay8910_address_w(ay8912, space, 0, state->m_via_port_a_data);
198		}
199		break;
	207	ay8910_address_w(m_ay8912, space, 0, m_via_port_a_data);
	208	break;
200	209
201	210	default:
202	211	break;
r20472	r20473
212	221
213	222	oric_psg_connection_refresh(space);
214	223
215
216	224	if (m_psg_control==0)
217	225	{
218	226	/* if psg not selected, write to printer */
219		centronics_device *centronics = machine().device<centronics_device>("centronics");
220		centronics->write(machine().driver_data()->generic_space(), 0, data);
	227	m_centronics->write(space, 0, data);
221	228	}
222	229	}
223	230
r20472	r20473
243	250	*/
244	251
245	252
246		static cassette_image_device *cassette_device_image(running_machine &machine)
247		{
248		return machine.device<cassette_image_device>(CASSETTE_TAG);
249		}
250
251	253	/* not called yet - this will update the via with the state of the tape data.
252	254	This allows the via to trigger on bit changes and issue interrupts */
253	255	TIMER_CALLBACK_MEMBER(oric_state::oric_refresh_tape)
254	256	{
255	257	int data;
256	258	int input_port_9;
257		via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
258	259
259	260	data = 0;
260	261
261		if ((cassette_device_image(machine()))->input() > 0.0038)
	262	if (m_cassette->input() > 0.0038)
	263	{
262	264	data |= 1;
	265	}
263	266
264	267	/* "A simple cable to catch the vertical retrace signal !
265	268	This cable connects the video output for the television/monitor
266	269	to the via cb1 input. Interrupts can be generated from the vertical
267	270	sync, and flicker free games can be produced */
268	271
269		input_port_9 = machine().root_device().ioport("FLOPPY")->read();
	272	input_port_9 = m_io_floppy->read();
270	273	/* cable is enabled? */
271	274	if ((input_port_9 & 0x08)!=0)
272	275	{
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274	277	data = input_port_9>>4;
275	278	}
276	279
277		via_0->write_cb1(data);
	280	m_via6522_0->write_cb1(data);
278	281	}
279	282
280	283	WRITE8_MEMBER(oric_state::oric_via_out_b_func)
281	284	{
282		centronics_device *centronics = machine().device<centronics_device>("centronics");
283
284	285	/* KEYBOARD */
285	286	m_keyboard_line = data & 0x07;
286	287
287	288	/* CASSETTE */
288	289	/* cassette motor control */
289		cassette_device_image(machine())->change_state(
	290	m_cassette->change_state(
290	291	(data & 0x40) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,
291	292	CASSETTE_MOTOR_DISABLED);
292	293
293	294	/* cassette data out */
294		cassette_device_image(machine())->output((data & (1<<7)) ? -1.0 : +1.0);
	295	m_cassette->output((data & (1<<7)) ? -1.0 : +1.0);
295	296
296	297	/* centronics STROBE is connected to PB4 */
297		centronics->strobe_w(BIT(data, 4));
	298	m_centronics->strobe_w(BIT(data, 4));
298	299
299	300	oric_psg_connection_refresh(space);
300	301	m_previous_portb_data = data;
r20472	r20473
332	333	}
333	334
334	335
335		static void oric_via_irq_func(device_t *device, int state)
	336	WRITE_LINE_MEMBER(oric_state::oric_via_irq_func)
336	337	{
337		oric_state *drvstate = device->machine().driver_data<oric_state>();
338		drvstate->m_irqs &= ~(1<<0);
	338	m_irqs &= ~(1<<0);
339	339
340	340	if (state)
341		drvstate->m_irqs |=(1<<0);
	341	{
	342	m_irqs |=(1<<0);
	343	}
342	344
343		oric_refresh_ints(device->machine());
	345	oric_refresh_ints();
344	346	}
345	347
346	348
r20472	r20473
397	399	DEVCB_NULL,
398	400	DEVCB_DRIVER_MEMBER(oric_state,oric_via_out_ca2_func),
399	401	DEVCB_DRIVER_MEMBER(oric_state,oric_via_out_cb2_func),
400		DEVCB_LINE(oric_via_irq_func),
	402	DEVCB_DRIVER_LINE_MEMBER(oric_state,oric_via_irq_func),
401	403	};
402	404
403	405
r20472	r20473
414	416	CALL &320 to start, or use BOBY rom.
415	417	*/
416	418
417		static void oric_install_apple2_interface(running_machine &machine)
	419	void oric_state::oric_install_apple2_interface()
418	420	{
419		oric_state *state = machine.driver_data<oric_state>();
420		applefdc_base_device *fdc = machine.device<applefdc_base_device>("fdc");
421		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	421	applefdc_base_device *fdc = machine().device<applefdc_base_device>("fdc");
	422	address_space &space = m_maincpu->space(AS_PROGRAM);
422	423
423		if (state->m_is_telestrat)
	424	if (m_is_telestrat)
	425	{
424	426	return;
	427	}
425	428
426		space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r), state));
	429	space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r), this));
427	430	space.install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(applefdc_base_device::read), fdc));
428	431	space.install_read_bank(0x0320, 0x03ff, "bank4");
	432	m_bank4 = membank("bank4");
429	433
430		space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w), state));
	434	space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w), this));
431	435	space.install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(applefdc_base_device::write), fdc));
432		state->membank("bank4")->set_base(  state->memregion("maincpu")->base() + 0x014000 + 0x020);
	436	m_bank4->set_base(  m_region_maincpu->base() + 0x014000 + 0x020);
433	437	}
434	438
435	439
436		static void oric_enable_memory(running_machine &machine, int low, int high, int rd, int wr)
	440	void oric_state::oric_enable_memory(int low, int high, int rd, int wr)
437	441	{
438		oric_state *state = machine.driver_data<oric_state>();
439	442	int i;
440		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	443	address_space &space = m_maincpu->space(AS_PROGRAM);
441	444
442		if (state->m_is_telestrat)
	445	if (m_is_telestrat)
	446	{
443	447	return;
	448	}
	449
444	450	for (i = low; i <= high; i++)
445	451	{
446	452	switch(i) {
r20472	r20473
502	508	/*  logerror("apple 2 interface v2 rom page: %01x\n",(offset & 0x02)>>1); */
503	509
504	510	/* bit 0 is 0 for page 0, 1 for page 1 */
505		membank("bank4")->set_base(machine().root_device().memregion("maincpu")->base() + 0x014000 + 0x0100 + (((offset & 0x02)>>1)<<8));
	511	m_bank4->set_base(m_region_maincpu->base() + 0x014000 + 0x0100 + (((offset & 0x02)>>1)<<8));
506	512
507		oric_enable_memory(machine(), 1, 3, TRUE, TRUE);
	513	oric_enable_memory(1, 3, TRUE, TRUE);
508	514
509	515	/* bit 1 is 0, rom enabled, bit 1 is 1 ram enabled */
510	516	if ((offset & 0x01)==0)
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514	520	/* logerror("apple 2 interface v2: rom enabled\n"); */
515	521
516	522	/* enable rom */
517		rom_ptr = memregion("maincpu")->base() + 0x010000;
518		membank("bank1")->set_base(rom_ptr);
519		membank("bank2")->set_base(rom_ptr+0x02000);
520		membank("bank3")->set_base(rom_ptr+0x03800);
521		membank("bank5")->set_base(m_ram_0x0c000);
522		membank("bank6")->set_base(m_ram_0x0c000+0x02000);
523		membank("bank7")->set_base(m_ram_0x0c000+0x03800);
	523	rom_ptr = m_region_maincpu->base() + 0x010000;
	524	m_bank1->set_base(rom_ptr);
	525	m_bank2->set_base(rom_ptr+0x02000);
	526	m_bank3->set_base(rom_ptr+0x03800);
	527	m_bank5->set_base(m_ram_0x0c000);
	528	m_bank6->set_base(m_ram_0x0c000+0x02000);
	529	m_bank7->set_base(m_ram_0x0c000+0x03800);
524	530	}
525	531	else
526	532	{
527	533	/*logerror("apple 2 interface v2: ram enabled\n"); */
528	534
529	535	/* enable ram */
530		membank("bank1")->set_base(m_ram_0x0c000);
531		membank("bank2")->set_base(m_ram_0x0c000+0x02000);
532		membank("bank3")->set_base(m_ram_0x0c000+0x03800);
533		membank("bank5")->set_base(m_ram_0x0c000);
534		membank("bank6")->set_base(m_ram_0x0c000+0x02000);
535		membank("bank7")->set_base(m_ram_0x0c000+0x03800);
	536	m_bank1->set_base(m_ram_0x0c000);
	537	m_bank2->set_base(m_ram_0x0c000+0x02000);
	538	m_bank3->set_base(m_ram_0x0c000+0x03800);
	539	m_bank5->set_base(m_ram_0x0c000);
	540	m_bank6->set_base(m_ram_0x0c000+0x02000);
	541	m_bank7->set_base(m_ram_0x0c000+0x03800);
536	542	}
537	543	}
538	544
539	545
540	546	/* APPLE 2 INTERFACE V2 */
541		static void oric_install_apple2_v2_interface(running_machine &machine)
	547	void oric_state::oric_install_apple2_v2_interface()
542	548	{
543		oric_state *state = machine.driver_data<oric_state>();
544		applefdc_base_device *fdc = machine.device<applefdc_base_device>("fdc");
545		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	549	applefdc_base_device *fdc = machine().device<applefdc_base_device>("fdc");
	550	address_space &space = m_maincpu->space(AS_PROGRAM);
546	551
547		space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r), state));
	552	space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r), this));
548	553	space.install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(applefdc_base_device::read), fdc));
549	554	space.install_read_bank(0x0320, 0x03ff, "bank4");
	555	m_bank4 = membank("bank4");
550	556
551		space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w), state));
	557	space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w), this));
552	558	space.install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(applefdc_base_device::write), fdc));
553		space.install_write_handler(0x0380, 0x0383, write8_delegate(FUNC(oric_state::apple2_v2_interface_w),state));
	559	space.install_write_handler(0x0380, 0x0383, write8_delegate(FUNC(oric_state::apple2_v2_interface_w),this));
554	560
555		state->apple2_v2_interface_w(space, 0, 0);
	561	apple2_v2_interface_w(space, 0, 0);
556	562	}
557	563
558	564	/********************/
r20472	r20473
564	570	/* bit 0: ROMDIS (1 means internal Basic rom disabled) */
565	571
566	572
567		static void oric_jasmin_set_mem_0x0c000(running_machine &machine)
	573	void oric_state::oric_jasmin_set_mem_0x0c000()
568	574	{
569		oric_state *state = machine.driver_data<oric_state>();
570	575	/* assumption:
571	576	1. It is possible to access all 16k overlay ram.
572	577	2. If os is enabled, and overlay ram is enabled, all 16k can be accessed.
573	578	3. if os is disabled, and overlay ram is enabled, jasmin rom takes priority.
574	579	*/
575		if (state->m_is_telestrat)
	580	if (m_is_telestrat)
	581	{
576	582	return;
	583	}
577	584
578	585	/* the ram is disabled in the jasmin rom which indicates that jasmin takes
579	586	priority over the ram */
580	587
581	588	/* basic rom disabled? */
582		if ((state->m_port_3fb_w & 0x01)==0)
	589	if ((m_port_3fb_w & 0x01)==0)
583	590	{
584	591	/* no, it is enabled! */
585	592
586	593	/* overlay ram enabled? */
587		if ((state->m_port_3fa_w & 0x01)==0)
	594	if ((m_port_3fa_w & 0x01)==0)
588	595	{
589	596	unsigned char *rom_ptr;
590	597
591	598	/* no it is disabled */
592	599	/*logerror("&c000-&ffff is os rom\n"); */
593	600
594		oric_enable_memory(machine, 1, 3, TRUE, FALSE);
	601	oric_enable_memory(1, 3, TRUE, FALSE);
595	602
596		rom_ptr = state->memregion("maincpu")->base() + 0x010000;
597		state->membank("bank1")->set_base(rom_ptr);
598		state->membank("bank2")->set_base(rom_ptr+0x02000);
599		state->membank("bank3")->set_base(rom_ptr+0x03800);
	603	rom_ptr = m_region_maincpu->base() + 0x010000;
	604	m_bank1->set_base(rom_ptr);
	605	m_bank2->set_base(rom_ptr+0x02000);
	606	m_bank3->set_base(rom_ptr+0x03800);
600	607	}
601	608	else
602	609	{
603	610	/*logerror("&c000-&ffff is ram\n"); */
604	611
605		oric_enable_memory(machine, 1, 3, TRUE, TRUE);
	612	oric_enable_memory(1, 3, TRUE, TRUE);
606	613
607		state->membank("bank1")->set_base(state->m_ram_0x0c000);
608		state->membank("bank2")->set_base(state->m_ram_0x0c000+0x02000);
609		state->membank("bank3")->set_base(state->m_ram_0x0c000+0x03800);
610		state->membank("bank5")->set_base(state->m_ram_0x0c000);
611		state->membank("bank6")->set_base(state->m_ram_0x0c000+0x02000);
612		state->membank("bank7")->set_base(state->m_ram_0x0c000+0x03800);
	614	m_bank1->set_base(m_ram_0x0c000);
	615	m_bank2->set_base(m_ram_0x0c000+0x02000);
	616	m_bank3->set_base(m_ram_0x0c000+0x03800);
	617	m_bank5->set_base(m_ram_0x0c000);
	618	m_bank6->set_base(m_ram_0x0c000+0x02000);
	619	m_bank7->set_base(m_ram_0x0c000+0x03800);
613	620	}
614	621	}
615	622	else
616	623	{
617	624	/* yes, basic rom is disabled */
618	625
619		if ((state->m_port_3fa_w & 0x01)==0)
	626	if ((m_port_3fa_w & 0x01)==0)
620	627	{
621	628	/* overlay ram disabled */
622	629
623	630	/*logerror("&c000-&f8ff is nothing!\n"); */
624		oric_enable_memory(machine, 1, 2, FALSE, FALSE);
	631	oric_enable_memory(1, 2, FALSE, FALSE);
625	632	}
626	633	else
627	634	{
628	635	/*logerror("&c000-&f8ff is ram!\n"); */
629		oric_enable_memory(machine, 1, 2, TRUE, TRUE);
	636	oric_enable_memory(1, 2, TRUE, TRUE);
630	637
631		state->membank("bank1")->set_base(state->m_ram_0x0c000);
632		state->membank("bank2")->set_base(state->m_ram_0x0c000+0x02000);
633		state->membank("bank5")->set_base(state->m_ram_0x0c000);
634		state->membank("bank6")->set_base(state->m_ram_0x0c000+0x02000);
	638	m_bank1->set_base(m_ram_0x0c000);
	639	m_bank2->set_base(m_ram_0x0c000+0x02000);
	640	m_bank5->set_base(m_ram_0x0c000);
	641	m_bank6->set_base(m_ram_0x0c000+0x02000);
635	642	}
636	643
637	644	{
r20472	r20473
640	647
641	648	/*logerror("&f800-&ffff is jasmin rom\n"); */
642	649	/* jasmin rom enabled */
643		oric_enable_memory(machine, 3, 3, TRUE, TRUE);
644		rom_ptr = machine.root_device().memregion("maincpu")->base() + 0x010000+0x04000+0x02000;
645		state->membank("bank3")->set_base(rom_ptr);
646		state->membank("bank7")->set_base(rom_ptr);
	650	oric_enable_memory(3, 3, TRUE, TRUE);
	651	rom_ptr = m_region_maincpu->base() + 0x010000+0x04000+0x02000;
	652	m_bank3->set_base(rom_ptr);
	653	m_bank7->set_base(rom_ptr);
647	654	}
648	655	}
649	656	}
r20472	r20473
656	663	else
657	664	m_irqs &=~(1<<1);
658	665
659		oric_refresh_ints(machine());
	666	oric_refresh_ints();
660	667	}
661	668
662	669	READ8_MEMBER(oric_state::oric_jasmin_r)
663	670	{
664		via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
665	671	device_t *fdc = machine().device("wd179x");
666	672	unsigned char data = 0x0ff;
667	673
r20472	r20473
681	687	data = wd17xx_data_r(fdc, space, 0);
682	688	break;
683	689	default:
684		data = via_0->read(space,offset & 0x0f);
	690	data = m_via6522_0->read(space,offset & 0x0f);
685	691	//logerror("unhandled io read: %04x %02x\n", offset, data);
686	692	break;
687	693
r20472	r20473
692	698
693	699	WRITE8_MEMBER(oric_state::oric_jasmin_w)
694	700	{
695		via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
696	701	device_t *fdc = machine().device("wd179x");
697	702	switch (offset & 0x0f)
698	703	{
r20472	r20473
718	723	wd17xx_reset(fdc);
719	724	break;
720	725	case 0x0a:
721		//logerror("jasmin overlay ram w: %02x PC: %04x\n", data, machine().device("maincpu")->safe_pc());
	726	//logerror("jasmin overlay ram w: %02x PC: %04x\n", data, m_maincpu->pc());
722	727	m_port_3fa_w = data;
723		oric_jasmin_set_mem_0x0c000(machine());
	728	oric_jasmin_set_mem_0x0c000();
724	729	break;
725	730	case 0x0b:
726		//logerror("jasmin romdis w: %02x PC: %04x\n", data, machine().device("maincpu")->safe_pc());
	731	//logerror("jasmin romdis w: %02x PC: %04x\n", data, m_maincpu->pc());
727	732	m_port_3fb_w = data;
728		oric_jasmin_set_mem_0x0c000(machine());
	733	oric_jasmin_set_mem_0x0c000();
729	734	break;
730	735	/* bit 0,1 of addr is the drive */
731	736	case 0x0c:
r20472	r20473
736	741	break;
737	742
738	743	default:
739		via_0->write(space,offset & 0x0f, data);
	744	m_via6522_0->write(space,offset & 0x0f, data);
740	745	break;
741	746	}
742	747	}
743	748
744	749
745		static void oric_install_jasmin_interface(running_machine &machine)
	750	void oric_state::oric_install_jasmin_interface()
746	751	{
747		oric_state *state = machine.driver_data<oric_state>();
748		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	752	address_space &space = m_maincpu->space(AS_PROGRAM);
749	753	/* romdis */
750		state->m_port_3fb_w = 1;
751		oric_jasmin_set_mem_0x0c000(machine);
	754	m_port_3fb_w = 1;
	755	oric_jasmin_set_mem_0x0c000();
752	756
753		space.install_read_handler(0x0300, 0x03ef, read8_delegate(FUNC(oric_state::oric_IO_r),state));
754		space.install_read_handler(0x03f0, 0x03ff, read8_delegate(FUNC(oric_state::oric_jasmin_r),state));
	757	space.install_read_handler(0x0300, 0x03ef, read8_delegate(FUNC(oric_state::oric_IO_r),this));
	758	space.install_read_handler(0x03f0, 0x03ff, read8_delegate(FUNC(oric_state::oric_jasmin_r),this));
755	759
756		space.install_write_handler(0x0300, 0x03ef, write8_delegate(FUNC(oric_state::oric_IO_w),state));
757		space.install_write_handler(0x03f0, 0x03ff, write8_delegate(FUNC(oric_state::oric_jasmin_w),state));
	760	space.install_write_handler(0x0300, 0x03ef, write8_delegate(FUNC(oric_state::oric_IO_w),this));
	761	space.install_write_handler(0x03f0, 0x03ff, write8_delegate(FUNC(oric_state::oric_jasmin_w),this));
758	762	}
759	763
760	764	/*********************************/
r20472	r20473
770	774	/* bit 0: enable FDC IRQ to trigger IRQ on CPU */
771	775
772	776
773		static void oric_microdisc_refresh_wd179x_ints(running_machine &machine)
	777	void oric_state::oric_microdisc_refresh_wd179x_ints()
774	778	{
775		oric_state *state = machine.driver_data<oric_state>();
776		state->m_irqs &=~(1<<1);
	779	m_irqs &=~(1<<1);
777	780
778		if ((state->m_wd179x_int_state) && (state->m_port_314_w & (1<<0)))
	781	if ((m_wd179x_int_state) && (m_port_314_w & (1<<0)))
779	782	{
780	783	/*logerror("oric microdisc interrupt\n"); */
781	784
782		state->m_irqs |=(1<<1);
	785	m_irqs |=(1<<1);
783	786	}
784	787
785		oric_refresh_ints(machine);
	788	oric_refresh_ints();
786	789	}
787	790
788	791	WRITE_LINE_MEMBER(oric_state::oric_microdisc_wd179x_intrq_w)
r20472	r20473
794	797	else
795	798	m_port_314_r |=(1<<7);
796	799
797		oric_microdisc_refresh_wd179x_ints(machine());
	800	oric_microdisc_refresh_wd179x_ints();
798	801	}
799	802
800	803	WRITE_LINE_MEMBER(oric_state::oric_microdisc_wd179x_drq_w)
r20472	r20473
805	808	m_port_318_r |= (1<<7);
806	809	}
807	810
808		static void oric_microdisc_set_mem_0x0c000(running_machine &machine)
	811	void oric_state::oric_microdisc_set_mem_0x0c000()
809	812	{
810		oric_state *state = machine.driver_data<oric_state>();
811		if (state->m_is_telestrat)
	813	if (m_is_telestrat)
	814	{
812	815	return;
	816	}
813	817
814	818	/* for 0x0c000-0x0dfff: */
815	819	/* if os disabled, ram takes priority */
816	820	/* /ROMDIS */
817		if ((state->m_port_314_w & (1<<1))==0)
	821	if ((m_port_314_w & (1<<1))==0)
818	822	{
819	823	/*logerror("&c000-&dfff is ram\n"); */
820	824	/* rom disabled enable ram */
821		oric_enable_memory(machine, 1, 1, TRUE, TRUE);
822		state->membank("bank1")->set_base(state->m_ram_0x0c000);
823		state->membank("bank5")->set_base(state->m_ram_0x0c000);
	825	oric_enable_memory(1, 1, TRUE, TRUE);
	826	m_bank1->set_base(m_ram_0x0c000);
	827	m_bank5->set_base(m_ram_0x0c000);
824	828	}
825	829	else
826	830	{
827	831	unsigned char *rom_ptr;
828	832	/*logerror("&c000-&dfff is os rom\n"); */
829	833	/* basic rom */
830		oric_enable_memory(machine, 1, 1, TRUE, FALSE);
831		rom_ptr = machine.root_device().memregion("maincpu")->base() + 0x010000;
832		state->membank("bank1")->set_base(rom_ptr);
833		state->membank("bank5")->set_base(rom_ptr);
	834	oric_enable_memory(1, 1, TRUE, FALSE);
	835	rom_ptr = m_region_maincpu->base() + 0x010000;
	836	m_bank1->set_base(rom_ptr);
	837	m_bank5->set_base(rom_ptr);
834	838	}
835	839
836	840	/* for 0x0e000-0x0ffff */
837	841	/* if not disabled, os takes priority */
838		if ((state->m_port_314_w & (1<<1))!=0)
	842	if ((m_port_314_w & (1<<1))!=0)
839	843	{
840	844	unsigned char *rom_ptr;
841	845	/*logerror("&e000-&ffff is os rom\n"); */
842	846	/* basic rom */
843		oric_enable_memory(machine, 2, 3, TRUE, FALSE);
844		rom_ptr = machine.root_device().memregion("maincpu")->base() + 0x010000;
845		state->membank("bank2")->set_base(rom_ptr+0x02000);
846		state->membank("bank3")->set_base(rom_ptr+0x03800);
847		state->membank("bank6")->set_base(rom_ptr+0x02000);
848		state->membank("bank7")->set_base(rom_ptr+0x03800);
	847	oric_enable_memory(2, 3, TRUE, FALSE);
	848	rom_ptr = m_region_maincpu->base() + 0x010000;
	849	m_bank2->set_base(rom_ptr+0x02000);
	850	m_bank3->set_base(rom_ptr+0x03800);
	851	m_bank6->set_base(rom_ptr+0x02000);
	852	m_bank7->set_base(rom_ptr+0x03800);
849	853
850	854	}
851	855	else
852	856	{
853	857	/* if eprom is enabled, it takes priority over ram */
854		if ((state->m_port_314_w & (1<<7))==0)
	858	if ((m_port_314_w & (1<<7))==0)
855	859	{
856	860	unsigned char *rom_ptr;
857	861	/*logerror("&e000-&ffff is disk rom\n"); */
858		oric_enable_memory(machine, 2, 3, TRUE, FALSE);
	862	oric_enable_memory(2, 3, TRUE, FALSE);
859	863	/* enable rom of microdisc interface */
860		rom_ptr = machine.root_device().memregion("maincpu")->base() + 0x014000;
861		state->membank("bank2")->set_base(rom_ptr);
862		state->membank("bank3")->set_base(rom_ptr+0x01800);
	864	rom_ptr = m_region_maincpu->base() + 0x014000;
	865	m_bank2->set_base(rom_ptr);
	866	m_bank3->set_base(rom_ptr+0x01800);
863	867	}
864	868	else
865	869	{
866	870	/*logerror("&e000-&ffff is ram\n"); */
867	871	/* rom disabled enable ram */
868		oric_enable_memory(machine, 2, 3, TRUE, TRUE);
869		state->membank("bank2")->set_base(state->m_ram_0x0c000+0x02000);
870		state->membank("bank3")->set_base(state->m_ram_0x0c000+0x03800);
871		state->membank("bank6")->set_base(state->m_ram_0x0c000+0x02000);
872		state->membank("bank7")->set_base(state->m_ram_0x0c000+0x03800);
	872	oric_enable_memory(2, 3, TRUE, TRUE);
	873	m_bank2->set_base(m_ram_0x0c000+0x02000);
	874	m_bank3->set_base(m_ram_0x0c000+0x03800);
	875	m_bank6->set_base(m_ram_0x0c000+0x02000);
	876	m_bank7->set_base(m_ram_0x0c000+0x03800);
873	877	}
874	878	}
875	879	}
r20472	r20473
906	910	break;
907	911
908	912	default:
909		{
910		via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
911		data = via_0->read(space, offset & 0x0f);
912		}
	913	data = m_via6522_0->read(space, offset & 0x0f);
913	914	break;
914	915
915	916	}
r20472	r20473
949	950	wd17xx_set_side(fdc,(data>>4) & 0x01);
950	951	wd17xx_dden_w(fdc, !BIT(data, 3));
951	952
952		oric_microdisc_set_mem_0x0c000(machine());
953		oric_microdisc_refresh_wd179x_ints(machine());
	953	oric_microdisc_set_mem_0x0c000();
	954	oric_microdisc_refresh_wd179x_ints();
954	955	}
955	956	break;
956	957
957	958	default:
958		{
959		via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
960		via_0->write(space, offset & 0x0f, data);
961		}
	959	m_via6522_0->write(space, offset & 0x0f, data);
962	960	break;
963	961	}
964	962	}
965	963
966		static void oric_install_microdisc_interface(running_machine &machine)
	964	void oric_state::oric_install_microdisc_interface()
967	965	{
968		oric_state *state = machine.driver_data<oric_state>();
969		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	966	address_space &space = m_maincpu->space(AS_PROGRAM);
970	967
971		space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),state));
972		space.install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(oric_state::oric_microdisc_r),state));
973		space.install_read_handler(0x0320, 0x03ff, read8_delegate(FUNC(oric_state::oric_IO_r),state));
	968	space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),this));
	969	space.install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(oric_state::oric_microdisc_r),this));
	970	space.install_read_handler(0x0320, 0x03ff, read8_delegate(FUNC(oric_state::oric_IO_r),this));
974	971
975		space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),state));
976		space.install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(oric_state::oric_microdisc_w),state));
977		space.install_write_handler(0x0320, 0x03ff, write8_delegate(FUNC(oric_state::oric_IO_w),state));
	972	space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),this));
	973	space.install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(oric_state::oric_microdisc_w),this));
	974	space.install_write_handler(0x0320, 0x03ff, write8_delegate(FUNC(oric_state::oric_IO_w),this));
978	975
979	976	/* disable os rom, enable microdisc rom */
980	977	/* 0x0c000-0x0dfff will be ram, 0x0e000-0x0ffff will be microdisc rom */
981		state->m_port_314_w = 0x0ff^((1<<7) | (1<<1));
	978	m_port_314_w = 0x0ff^((1<<7) | (1<<1));
982	979
983		oric_microdisc_set_mem_0x0c000(machine);
	980	oric_microdisc_set_mem_0x0c000();
984	981	}
985	982
986	983
r20472	r20473
989	986
990	987	WRITE_LINE_MEMBER(oric_state::oric_wd179x_intrq_w)
991	988	{
992		if ((machine().root_device().ioport("FLOPPY")->read() & 0x07) == ORIC_FLOPPY_INTERFACE_MICRODISC)
	989	if ((m_io_floppy->read() & 0x07) == ORIC_FLOPPY_INTERFACE_MICRODISC)
	990	{
993	991	oric_microdisc_wd179x_intrq_w(state);
	992	}
994	993	}
995	994
996	995	WRITE_LINE_MEMBER(oric_state::oric_wd179x_drq_w)
997	996	{
998		switch (machine().root_device().ioport("FLOPPY")->read() &  0x07)
	997	switch (m_io_floppy->read() &  0x07)
999	998	{
1000	999	default:
1001	1000	case ORIC_FLOPPY_INTERFACE_NONE:
r20472	r20473
1018	1017	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
1019	1018	};
1020	1019
1021		static void oric_common_init_machine(running_machine &machine)
	1020	void oric_state::oric_common_init_machine()
1022	1021	{
1023		oric_state *state = machine.driver_data<oric_state>();
1024	1022	/* clear all irqs */
1025		state->m_irqs = 0;
1026		state->m_ram_0x0c000 = NULL;
1027		state->m_keyboard_line = 0;
1028		state->m_key_sense_bit = 0;
1029		state->m_keyboard_mask = 0;
1030		state->m_via_port_a_data = 0;
1031		state->m_psg_control = 0;
1032		state->m_previous_portb_data = 0;
1033		state->m_port_3fa_w = 0;
1034		state->m_port_3fb_w = 0;
1035		state->m_wd179x_int_state = 0;
1036		state->m_port_314_r = 0;
1037		state->m_port_318_r = 0;
1038		state->m_port_314_w = 0;
1039		machine.scheduler().timer_pulse(attotime::from_hz(4800), timer_expired_delegate(FUNC(oric_state::oric_refresh_tape),state));
	1023	m_irqs = 0;
	1024	m_ram_0x0c000 = NULL;
	1025	m_keyboard_line = 0;
	1026	m_key_sense_bit = 0;
	1027	m_keyboard_mask = 0;
	1028	m_via_port_a_data = 0;
	1029	m_psg_control = 0;
	1030	m_previous_portb_data = 0;
	1031	m_port_3fa_w = 0;
	1032	m_port_3fb_w = 0;
	1033	m_wd179x_int_state = 0;
	1034	m_port_314_r = 0;
	1035	m_port_318_r = 0;
	1036	m_port_314_w = 0;
	1037	machine().scheduler().timer_pulse(attotime::from_hz(4800), timer_expired_delegate(FUNC(oric_state::oric_refresh_tape),this));
1040	1038	}
1041	1039
1042	1040	void oric_state::machine_start()
1043	1041	{
1044		oric_common_init_machine(machine());
	1042	oric_common_init_machine();
1045	1043
1046	1044	m_is_telestrat = 0;
1047	1045
r20472	r20473
1051	1049
1052	1050	void oric_state::machine_reset()
1053	1051	{
1054		int disc_interface_id = machine().root_device().ioport("FLOPPY")->read() & 0x07;
1055		address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM);
	1052	int disc_interface_id = m_io_floppy->read() & 0x07;
	1053	address_space &space = m_maincpu->space(AS_PROGRAM);
1056	1054	if (m_is_telestrat)
1057	1055	return;
1058	1056
r20472	r20473
1067	1065	unsigned char *rom_ptr;
1068	1066
1069	1067	/* os rom */
1070		oric_enable_memory(machine(), 1, 3, TRUE, FALSE);
1071		rom_ptr = memregion("maincpu")->base() + 0x010000;
1072		membank("bank1")->set_base(rom_ptr);
1073		membank("bank2")->set_base(rom_ptr+0x02000);
1074		membank("bank3")->set_base(rom_ptr+0x03800);
1075		membank("bank5")->set_base(rom_ptr);
1076		membank("bank6")->set_base(rom_ptr+0x02000);
1077		membank("bank7")->set_base(rom_ptr+0x03800);
	1068	oric_enable_memory(1, 3, TRUE, FALSE);
	1069	rom_ptr = m_region_maincpu->base() + 0x010000;
	1070	m_bank1->set_base(rom_ptr);
	1071	m_bank2->set_base(rom_ptr+0x02000);
	1072	m_bank3->set_base(rom_ptr+0x03800);
	1073	m_bank5->set_base(rom_ptr);
	1074	m_bank6->set_base(rom_ptr+0x02000);
	1075	m_bank7->set_base(rom_ptr+0x03800);
1078	1076
1079	1077
1080	1078	if (disc_interface_id==ORIC_FLOPPY_INTERFACE_APPLE2)
1081	1079	{
1082		oric_install_apple2_interface(machine());
	1080	oric_install_apple2_interface();
1083	1081	}
1084	1082	else
1085	1083	{
r20472	r20473
1091	1089
1092	1090	case ORIC_FLOPPY_INTERFACE_APPLE2_V2:
1093	1091	{
1094		oric_install_apple2_v2_interface(machine());
	1092	oric_install_apple2_v2_interface();
1095	1093	}
1096	1094	break;
1097	1095
1098	1096
1099	1097	case ORIC_FLOPPY_INTERFACE_MICRODISC:
1100	1098	{
1101		oric_install_microdisc_interface(machine());
	1099	oric_install_microdisc_interface();
1102	1100	}
1103	1101	break;
1104	1102
1105	1103	case ORIC_FLOPPY_INTERFACE_JASMIN:
1106	1104	{
1107		oric_install_jasmin_interface(machine());
	1105	oric_install_jasmin_interface();
1108	1106	}
1109	1107	break;
1110	1108	}
1111		machine().device("maincpu")->reset();
	1109	m_maincpu->reset();
1112	1110	}
1113	1111
1114	1112
1115	1113	READ8_MEMBER(oric_state::oric_IO_r)
1116	1114	{
1117		via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
1118		switch (ioport("FLOPPY")->read() & 0x07)
	1115	switch (m_io_floppy->read() & 0x07)
1119	1116	{
1120	1117	default:
1121	1118	case ORIC_FLOPPY_INTERFACE_NONE:
r20472	r20473
1141	1138	}
1142	1139
1143	1140	/* it is repeated */
1144		return via_0->read(space, offset & 0x0f);
	1141	return m_via6522_0->read(space, offset & 0x0f);
1145	1142	}
1146	1143
1147	1144	WRITE8_MEMBER(oric_state::oric_IO_w)
1148	1145	{
1149		via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
1150		switch (ioport("FLOPPY")->read() & 0x07)
	1146	switch (m_io_floppy->read() & 0x07)
1151	1147	{
1152	1148	default:
1153	1149	case ORIC_FLOPPY_INTERFACE_NONE:
r20472	r20473
1175	1171	break;
1176	1172	}
1177	1173
1178		via_0->write(space, offset & 0x0f, data);
	1174	m_via6522_0->write(space, offset & 0x0f, data);
1179	1175	}
1180	1176
1181	1177
r20472	r20473
1231	1227	*/
1232	1228
1233	1229
1234		static void telestrat_refresh_mem(running_machine &machine)
	1230	void oric_state::telestrat_refresh_mem()
1235	1231	{
1236		oric_state *state = machine.driver_data<oric_state>();
1237		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	1232	address_space &space = m_maincpu->space(AS_PROGRAM);
1238	1233
1239		telestrat_mem_block *mem_block = &state->m_telestrat_blocks[state->m_telestrat_bank_selection];
	1234	telestrat_mem_block *mem_block = &m_telestrat_blocks[m_telestrat_bank_selection];
1240	1235
1241	1236	switch (mem_block->MemType)
1242	1237	{
1243	1238	case TELESTRAT_MEM_BLOCK_RAM:
1244	1239	{
1245		state->membank("bank1")->set_base(mem_block->ptr);
1246		state->membank("bank2")->set_base(mem_block->ptr);
	1240	m_bank1->set_base(mem_block->ptr);
	1241	m_bank2->set_base(mem_block->ptr);
1247	1242	space.install_read_bank(0xc000, 0xffff, "bank1");
1248	1243	space.install_write_bank(0xc000, 0xffff, "bank2");
1249	1244	}
r20472	r20473
1251	1246
1252	1247	case TELESTRAT_MEM_BLOCK_ROM:
1253	1248	{
1254		state->membank("bank1")->set_base(mem_block->ptr);
	1249	m_bank1->set_base(mem_block->ptr);
1255	1250	space.install_read_bank(0xc000, 0xffff, "bank1");
1256	1251	space.nop_write(0xc000, 0xffff);
1257	1252	}
r20472	r20473
1283	1278	{
1284	1279	m_telestrat_bank_selection = data & 0x07;
1285	1280
1286		telestrat_refresh_mem(machine());
	1281	telestrat_refresh_mem();
1287	1282	}
1288	1283	}
1289	1284
r20472	r20473
1314	1309	}
1315	1310
1316	1311
1317		static void telestrat_via2_irq_func(device_t *device, int state)
	1312	WRITE_LINE_MEMBER(oric_state::telestrat_via2_irq_func)
1318	1313	{
1319		oric_state *drvstate = device->machine().driver_data<oric_state>();
1320		drvstate->m_irqs &=~(1<<2);
	1314	m_irqs &=~(1<<2);
1321	1315
1322	1316	if (state)
1323	1317	{
1324	1318	//logerror("telestrat via2 interrupt\n");
1325	1319
1326		drvstate->m_irqs |=(1<<2);
	1320	m_irqs |=(1<<2);
1327	1321	}
1328	1322
1329		oric_refresh_ints(device->machine());
	1323	oric_refresh_ints();
1330	1324	}
1331	1325
1332	1326	const via6522_interface telestrat_via2_interface=
r20472	r20473
1343	1337	DEVCB_NULL,
1344	1338	DEVCB_NULL,
1345	1339	DEVCB_NULL,
1346		DEVCB_LINE(telestrat_via2_irq_func),
	1340	DEVCB_DRIVER_LINE_MEMBER(oric_state,telestrat_via2_irq_func),
1347	1341	};
1348	1342
1349	1343	#if 0
r20472	r20473
1358	1352	state->m_irqs |= (1<<3);
1359	1353	}
1360	1354
1361		oric_refresh_ints(machine);
	1355	oric_refresh_ints();
1362	1356	}
1363	1357	#endif
1364	1358
1365	1359	MACHINE_START_MEMBER(oric_state,telestrat)
1366	1360	{
1367		UINT8 *mem = memregion("maincpu")->base();
	1361	UINT8 *mem = m_region_maincpu->base();
1368	1362
1369		oric_common_init_machine(machine());
	1363	oric_common_init_machine();
1370	1364
1371	1365	m_telestrat_via2_port_a_data = 0;
1372	1366	m_telestrat_via2_port_b_data = 0;
r20472	r20473
1402	1396	m_telestrat_blocks[7].ptr = mem+0x01c000; // telmon24.rom
1403	1397
1404	1398	m_telestrat_bank_selection = 7;
1405		telestrat_refresh_mem(machine());
	1399	telestrat_refresh_mem();
1406	1400
1407	1401	/* disable os rom, enable microdisc rom */
1408	1402	/* 0x0c000-0x0dfff will be ram, 0x0e000-0x0ffff will be microdisc rom */

trunk/src/mess/includes/oric.h

r20472	r20473
70	70	{
71	71	public:
72	72	oric_state(const machine_config &mconfig, device_type type, const char *tag)
73		: driver_device(mconfig, type, tag),
74		m_ram(*this, "ram") { }
	73	: driver_device(mconfig, type, tag)
	74	, m_ram(*this, "ram")
	75	, m_maincpu(*this, "maincpu")
	76	, m_ay8912(*this, "ay8912")
	77	, m_centronics(*this, "centronics")
	78	, m_cassette(*this, CASSETTE_TAG)
	79	, m_via6522_0(*this, "via6522_0")
	80	, m_region_maincpu(*this, "maincpu")
	81	, m_bank1(*this, "bank1")
	82	, m_bank2(*this, "bank2")
	83	, m_bank3(*this, "bank3")
	84	, m_bank4(NULL)
	85	, m_bank5(*this, "bank5")
	86	, m_bank6(*this, "bank6")
	87	, m_bank7(*this, "bank7")
	88	, m_io_row0(*this, "ROW0")
	89	, m_io_row1(*this, "ROW1")
	90	, m_io_row2(*this, "ROW2")
	91	, m_io_row3(*this, "ROW3")
	92	, m_io_row4(*this, "ROW4")
	93	, m_io_row5(*this, "ROW5")
	94	, m_io_row6(*this, "ROW6")
	95	, m_io_row7(*this, "ROW7")
	96	, m_io_floppy(*this, "FLOPPY")
	97	{ }
75	98
76	99	optional_shared_ptr<UINT8> m_ram;
77	100	bool m_is_telestrat;
r20472	r20473
123	146	DECLARE_WRITE_LINE_MEMBER(oric_microdisc_wd179x_drq_w);
124	147	DECLARE_WRITE_LINE_MEMBER(oric_wd179x_intrq_w);
125	148	DECLARE_WRITE_LINE_MEMBER(oric_wd179x_drq_w);
	149	DECLARE_WRITE_LINE_MEMBER(oric_via_irq_func);
126	150	DECLARE_READ8_MEMBER(telestrat_via2_in_a_func);
127	151	DECLARE_WRITE8_MEMBER(telestrat_via2_out_a_func);
128	152	DECLARE_READ8_MEMBER(telestrat_via2_in_b_func);
129	153	DECLARE_WRITE8_MEMBER(telestrat_via2_out_b_func);
	154	DECLARE_WRITE_LINE_MEMBER(telestrat_via2_irq_func);
	155
	156	protected:
	157	required_device<cpu_device> m_maincpu;
	158	required_device<device_t> m_ay8912;
	159	required_device<centronics_device> m_centronics;
	160	required_device<cassette_image_device> m_cassette;
	161	required_device<via6522_device> m_via6522_0;
	162	required_memory_region m_region_maincpu;
	163	required_memory_bank m_bank1;
	164	required_memory_bank m_bank2;
	165	optional_memory_bank m_bank3;
	166	memory_bank *m_bank4;
	167	optional_memory_bank m_bank5;
	168	optional_memory_bank m_bank6;
	169	optional_memory_bank m_bank7;
	170	required_ioport m_io_row0;
	171	required_ioport m_io_row1;
	172	required_ioport m_io_row2;
	173	required_ioport m_io_row3;
	174	required_ioport m_io_row4;
	175	required_ioport m_io_row5;
	176	required_ioport m_io_row6;
	177	required_ioport m_io_row7;
	178	required_ioport m_io_floppy;
	179
	180	void oric_microdisc_refresh_wd179x_ints();
	181	void oric_refresh_ints();
	182	void oric_keyboard_sense_refresh();
	183	void oric_psg_connection_refresh(address_space &space);
	184	void oric_common_init_machine();
	185	void oric_install_apple2_interface();
	186	void oric_install_apple2_v2_interface();
	187	void oric_install_microdisc_interface();
	188	void oric_install_jasmin_interface();
	189	void oric_microdisc_set_mem_0x0c000();
	190	void telestrat_refresh_mem();
	191	void oric_enable_memory(int low, int high, int rd, int wr);
	192	void oric_jasmin_set_mem_0x0c000();
	193
	194	void oric_vh_update_attribute(UINT8 c);
	195	void oric_vh_update_flash();
	196	void oric_refresh_charset();
130	197	};
131	198
132	199	/*----------- defined in machine/oric.c -----------*/

trunk/src/mess/video/oric.c

r20472	r20473
18	18	m_vh_state.flash_count++;
19	19	}
20	20
21		static void oric_vh_update_flash(oric_state *state)
	21	void oric_state::oric_vh_update_flash()
22	22	{
23	23	/* flash active? */
24		if (BIT(state->m_vh_state.text_attributes, 2))
	24	if (BIT(m_vh_state.text_attributes, 2))
25	25	{
26	26	/* yes */
27	27
28	28	/* show or hide text? */
29		if (BIT(state->m_vh_state.flash_count, 4))
	29	if (BIT(m_vh_state.flash_count, 4))
30	30	{
31	31	/* hide */
32	32	/* set foreground and background to be the same */
33		state->m_vh_state.active_foreground_colour = state->m_vh_state.background_colour;
34		state->m_vh_state.active_background_colour = state->m_vh_state.background_colour;
	33	m_vh_state.active_foreground_colour = m_vh_state.background_colour;
	34	m_vh_state.active_background_colour = m_vh_state.background_colour;
35	35	return;
36	36	}
37	37	}
38	38
39	39
40	40	/* show */
41		state->m_vh_state.active_foreground_colour = state->m_vh_state.foreground_colour;
42		state->m_vh_state.active_background_colour = state->m_vh_state.background_colour;
	41	m_vh_state.active_foreground_colour = m_vh_state.foreground_colour;
	42	m_vh_state.active_background_colour = m_vh_state.background_colour;
43	43	}
44	44
45	45	/* the alternate charset follows from the standard charset.
46	46	Each charset holds 128 chars with 8 bytes for each char.
47	47
48	48	The start address for the standard charset is dependant on the video mode */
49		static void oric_refresh_charset(oric_state *state)
	49	void oric_state::oric_refresh_charset()
50	50	{
51	51	/* alternate char set? */
52		if (BIT(state->m_vh_state.text_attributes, 0))
	52	if (BIT(m_vh_state.text_attributes, 0))
53	53	{
54	54	/* yes */
55		state->m_vh_state.char_data = state->m_vh_state.char_base + (128*8);
	55	m_vh_state.char_data = m_vh_state.char_base + (128*8);
56	56	}
57	57	else
58	58	{
59	59	/* no */
60		state->m_vh_state.char_data = state->m_vh_state.char_base;
	60	m_vh_state.char_data = m_vh_state.char_base;
61	61	}
62	62	}
63	63
64	64	/* update video hardware state depending on the new attribute */
65		static void oric_vh_update_attribute(running_machine &machine, UINT8 c)
	65	void oric_state::oric_vh_update_attribute(UINT8 c)
66	66	{
67		oric_state *state = machine.driver_data<oric_state>();
68	67	/* attribute */
69	68	UINT8 attribute = c & 0x03f;
70		address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	69	address_space &space = m_maincpu->space(AS_PROGRAM);
71	70
72	71	switch ((attribute>>3) & 0x03)
73	72	{
74	73	case 0:
75	74	{
76	75	/* set foreground colour 00-07 = black,red,green,yellow,blue,magenta,cyan,white */
77		state->m_vh_state.foreground_colour = attribute & 0x07;
78		oric_vh_update_flash(state);
	76	m_vh_state.foreground_colour = attribute & 0x07;
	77	oric_vh_update_flash();
79	78	}
80	79	break;
81	80
82	81	case 1:
83	82	{
84		state->m_vh_state.text_attributes = attribute & 0x07;
	83	m_vh_state.text_attributes = attribute & 0x07;
85	84
86		oric_refresh_charset(state);
	85	oric_refresh_charset();
87	86
88	87	/* text attributes */
89		oric_vh_update_flash(state);
	88	oric_vh_update_flash();
90	89	}
91	90	break;
92	91
93	92	case 2:
94	93	{
95	94	/* set background colour */
96		state->m_vh_state.background_colour = attribute & 0x07;
97		oric_vh_update_flash(state);
	95	m_vh_state.background_colour = attribute & 0x07;
	96	oric_vh_update_flash();
98	97	}
99	98	break;
100	99
101	100	case 3:
102	101	{
103	102	/* set video mode */
104		state->m_vh_state.mode = attribute & 0x07;
	103	m_vh_state.mode = attribute & 0x07;
105	104
106	105	// a different charset base is used depending on the video mode
107	106	// hires takes all the data from 0x0a000 through to about 0x0bf68,
108	107	// so the charset is moved to 0x09800 */
109	108	// text mode starts at 0x0bb80 and so the charset is in a different location
110		if (BIT(state->m_vh_state.mode, 2))
	109	if (BIT(m_vh_state.mode, 2))
111	110	{
112	111	/* set screen memory base and standard charset location for this mode */
113		state->m_vh_state.read_addr = 0x0a000;
114		if (state->m_ram)
115		state->m_vh_state.char_base = state->m_ram + (offs_t)0x09800;
	112	m_vh_state.read_addr = 0x0a000;
	113	if (m_ram)
	114	m_vh_state.char_base = m_ram + (offs_t)0x09800;
116	115	else
117		state->m_vh_state.char_base = (UINT8 *)space.get_read_ptr(0x09800);
	116	m_vh_state.char_base = (UINT8 *)space.get_read_ptr(0x09800);
118	117	}
119	118	else
120	119	{
121	120	/* set screen memory base and standard charset location for this mode */
122		state->m_vh_state.read_addr = 0x0bb80;
123		if (state->m_ram)
124		state->m_vh_state.char_base = state->m_ram + (offs_t)0x0b400;
	121	m_vh_state.read_addr = 0x0bb80;
	122	if (m_ram)
	123	m_vh_state.char_base = m_ram + (offs_t)0x0b400;
125	124	else
126		state->m_vh_state.char_base = (UINT8 *)space.get_read_ptr(0x0b400);
	125	m_vh_state.char_base = (UINT8 *)space.get_read_ptr(0x0b400);
127	126	}
128	127	/* changing the mode also changes the position of the standard charset and alternative charset */
129		oric_refresh_charset(state);
	128	oric_refresh_charset();
130	129	}
131	130	break;
132	131
r20472	r20473
167	166	UINT8 *RAM, y;
168	167	offs_t byte_offset, read_addr_base;
169	168	bool hires_active;
	169	address_space &space = m_maincpu->space(AS_PROGRAM);
170	170
171	171	RAM = m_ram;
172	172
r20472	r20473
181	181	int x = 0;
182	182
183	183	/* foreground colour white */
184		oric_vh_update_attribute(machine(),7);
	184	oric_vh_update_attribute(7);
185	185	/* background colour black */
186		oric_vh_update_attribute(machine(),(1<<3));
187		oric_vh_update_attribute(machine(),(1<<4));
	186	oric_vh_update_attribute((1<<3));
	187	oric_vh_update_attribute((1<<4));
188	188
189	189	for (byte_offset=0; byte_offset<40; byte_offset++)
190	190	{
r20472	r20473
212	212	}
213	213
214	214	/* fetch data */
215		c = RAM ? RAM[read_addr] : machine().device("maincpu")->memory().space(AS_PROGRAM).read_byte(read_addr);
	215	c = RAM ? RAM[read_addr] : space.read_byte(read_addr);
216	216
217	217	/* if bits 6 and 5 are zero, the byte contains a serial attribute */
218	218	if ((c & ((1 << 6) | (1 << 5))) == 0)
219	219	{
220		oric_vh_update_attribute(machine(), c);
	220	oric_vh_update_attribute(c);
221	221
222	222	/* display background colour when attribute has been found */
223	223	oric_vh_render_6pixels(bitmap, x, y, m_vh_state.active_foreground_colour, m_vh_state.active_background_colour, 0, (c & 0x080));
r20472	r20473
300	300	m_vh_state.flash_count = 0;
301	301	machine().scheduler().timer_pulse(attotime::from_hz(50), timer_expired_delegate(FUNC(oric_state::oric_vh_timer_callback),this));
302	302	/* mode */
303		oric_vh_update_attribute(machine(),(1<<3)|(1<<4));
	303	oric_vh_update_attribute((1<<3)|(1<<4));
304	304	}

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