trunk/src/mess/drivers/pentagon.c
| r20453 | r20454 | |
| 13 | 13 | { |
| 14 | 14 | public: |
| 15 | 15 | pentagon_state(const machine_config &mconfig, device_type type, const char *tag) |
| 16 | | : spectrum_state(mconfig, type, tag) { } |
| 16 | : spectrum_state(mconfig, type, tag) |
| 17 | , m_maincpu(*this, "maincpu") |
| 18 | { } |
| 17 | 19 | |
| 18 | 20 | DECLARE_DIRECT_UPDATE_MEMBER(pentagon_direct); |
| 19 | 21 | DECLARE_WRITE8_MEMBER(pentagon_port_7ffd_w); |
| 20 | 22 | DECLARE_MACHINE_RESET(pentagon); |
| 23 | |
| 24 | protected: |
| 25 | required_device<cpu_device> m_maincpu; |
| 26 | UINT8 *m_maincpu_rom; |
| 27 | |
| 28 | void pentagon_update_memory(); |
| 21 | 29 | }; |
| 22 | 30 | |
| 23 | 31 | DIRECT_UPDATE_MEMBER(pentagon_state::pentagon_direct) |
| 24 | 32 | { |
| 25 | 33 | device_t *beta = machine().device(BETA_DISK_TAG); |
| 26 | | UINT16 pc = machine().device("maincpu")->safe_pcbase(); |
| 34 | UINT16 pc = m_maincpu->pcbase(); |
| 27 | 35 | |
| 28 | 36 | if (beta->started() && betadisk_is_active(beta)) |
| 29 | 37 | { |
| r20453 | r20454 | |
| 31 | 39 | { |
| 32 | 40 | m_ROMSelection = ((m_port_7ffd_data>>4) & 0x01) ? 1 : 0; |
| 33 | 41 | betadisk_disable(beta); |
| 34 | | membank("bank1")->set_base(memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14)); |
| 42 | membank("bank1")->set_base(m_maincpu_rom + 0x010000 + (m_ROMSelection<<14)); |
| 35 | 43 | } |
| 36 | 44 | } else if (((pc & 0xff00) == 0x3d00) && (m_ROMSelection==1)) |
| 37 | 45 | { |
| r20453 | r20454 | |
| 48 | 56 | membank("bank1")->set_base(machine().root_device().memregion("beta:beta")->base()); |
| 49 | 57 | } |
| 50 | 58 | } else { |
| 51 | | direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine().root_device().memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14)); |
| 52 | | membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14)); |
| 59 | direct.explicit_configure(0x0000, 0x3fff, 0x3fff, m_maincpu_rom + 0x010000 + (m_ROMSelection<<14)); |
| 60 | membank("bank1")->set_base(m_maincpu_rom + 0x010000 + (m_ROMSelection<<14)); |
| 53 | 61 | } |
| 54 | 62 | return ~0; |
| 55 | 63 | } |
| 56 | 64 | return address; |
| 57 | 65 | } |
| 58 | 66 | |
| 59 | | static void pentagon_update_memory(running_machine &machine) |
| 67 | void pentagon_state::pentagon_update_memory() |
| 60 | 68 | { |
| 61 | | spectrum_state *state = machine.driver_data<spectrum_state>(); |
| 62 | | device_t *beta = machine.device(BETA_DISK_TAG); |
| 63 | | UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer(); |
| 64 | | state->m_screen_location = messram + ((state->m_port_7ffd_data & 8) ? (7<<14) : (5<<14)); |
| 69 | device_t *beta = machine().device(BETA_DISK_TAG); |
| 70 | UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer(); |
| 71 | m_screen_location = messram + ((m_port_7ffd_data & 8) ? (7<<14) : (5<<14)); |
| 65 | 72 | |
| 66 | | state->membank("bank4")->set_base(messram + ((state->m_port_7ffd_data & 0x07) * 0x4000)); |
| 73 | membank("bank4")->set_base(messram + ((m_port_7ffd_data & 0x07) * 0x4000)); |
| 67 | 74 | |
| 68 | | if (beta->started() && betadisk_is_active(beta) && !( state->m_port_7ffd_data & 0x10 ) ) |
| 75 | if (beta->started() && betadisk_is_active(beta) && !( m_port_7ffd_data & 0x10 ) ) |
| 69 | 76 | { |
| 70 | 77 | /* GLUK */ |
| 71 | | if (strcmp(machine.system().name, "pent1024")==0) { |
| 72 | | state->m_ROMSelection = 2; |
| 78 | if (strcmp(machine().system().name, "pent1024")==0) { |
| 79 | m_ROMSelection = 2; |
| 73 | 80 | } else { |
| 74 | | state->m_ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01) ; |
| 81 | m_ROMSelection = ((m_port_7ffd_data>>4) & 0x01) ; |
| 75 | 82 | } |
| 76 | 83 | } |
| 77 | 84 | else { |
| 78 | 85 | /* ROM switching */ |
| 79 | | state->m_ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01) ; |
| 86 | m_ROMSelection = ((m_port_7ffd_data>>4) & 0x01) ; |
| 80 | 87 | } |
| 81 | 88 | /* rom 0 is 128K rom, rom 1 is 48 BASIC */ |
| 82 | | state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14)); |
| 89 | membank("bank1")->set_base(m_maincpu_rom + 0x010000 + (m_ROMSelection<<14)); |
| 83 | 90 | } |
| 84 | 91 | |
| 85 | 92 | WRITE8_MEMBER(pentagon_state::pentagon_port_7ffd_w) |
| r20453 | r20454 | |
| 92 | 99 | m_port_7ffd_data = data; |
| 93 | 100 | |
| 94 | 101 | /* update memory */ |
| 95 | | pentagon_update_memory(machine()); |
| 102 | pentagon_update_memory(); |
| 96 | 103 | } |
| 97 | 104 | |
| 98 | 105 | static ADDRESS_MAP_START (pentagon_io, AS_IO, 8, pentagon_state ) |
| r20453 | r20454 | |
| 112 | 119 | { |
| 113 | 120 | UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer(); |
| 114 | 121 | device_t *beta = machine().device(BETA_DISK_TAG); |
| 115 | | address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM); |
| 122 | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 116 | 123 | |
| 124 | m_maincpu_rom = memregion("maincpu")->base(); |
| 125 | |
| 117 | 126 | space.install_read_bank(0x0000, 0x3fff, "bank1"); |
| 118 | 127 | space.unmap_write(0x0000, 0x3fff); |
| 119 | 128 | |
| r20453 | r20454 | |
| 133 | 142 | |
| 134 | 143 | m_port_7ffd_data = 0; |
| 135 | 144 | m_port_1ffd_data = -1; |
| 136 | | pentagon_update_memory(machine()); |
| 145 | pentagon_update_memory(); |
| 137 | 146 | } |
| 138 | 147 | |
| 139 | 148 | /* F4 Character Displayer */ |