trunk/src/mess/drivers/svision.c
| r20449 | r20450 | |
| 19 | 19 | |
| 20 | 20 | |
| 21 | 21 | // in pixel |
| 22 | | #define XSIZE (state->m_reg[0]&~3) |
| 23 | | #define XPOS state->m_reg[2] |
| 24 | | #define YPOS state->m_reg[3] |
| 22 | #define XSIZE (m_reg[0]&~3) |
| 23 | #define XPOS m_reg[2] |
| 24 | #define YPOS m_reg[3] |
| 25 | 25 | #define BANK m_reg[0x26] |
| 26 | 26 | |
| 27 | 27 | TIMER_CALLBACK_MEMBER(svision_state::svision_pet_timer) |
| r20449 | r20450 | |
| 29 | 29 | switch (m_pet.state) |
| 30 | 30 | { |
| 31 | 31 | case 0: |
| 32 | | m_pet.input = machine().root_device().ioport("JOY2")->read(); |
| 32 | if ( m_joy2 ) |
| 33 | { |
| 34 | m_pet.input = m_joy2->read(); |
| 35 | } |
| 33 | 36 | /* fall through */ |
| 34 | 37 | |
| 35 | 38 | case 2: case 4: case 6: case 8: |
| 36 | 39 | case 10: case 12: case 14: |
| 37 | | m_pet.clock=m_pet.state&2; |
| 38 | | m_pet.data=m_pet.input&1; |
| 39 | | m_pet.input>>=1; |
| 40 | m_pet.clock = m_pet.state & 2; |
| 41 | m_pet.data = m_pet.input & 1; |
| 42 | m_pet.input >>= 1; |
| 40 | 43 | m_pet.state++; |
| 41 | 44 | break; |
| 42 | 45 | |
| r20449 | r20450 | |
| 55 | 58 | svision_pet_timer(ptr,param); |
| 56 | 59 | } |
| 57 | 60 | |
| 58 | | void svision_irq(running_machine &machine) |
| 61 | void svision_state::svision_irq() |
| 59 | 62 | { |
| 60 | | svision_state *state = machine.driver_data<svision_state>(); |
| 61 | | int irq = state->m_svision.timer_shot && (state->BANK & 2); |
| 62 | | irq = irq || (*state->m_dma_finished && (state->BANK & 4)); |
| 63 | int irq = m_svision.timer_shot && (BANK & 2); |
| 64 | irq = irq || (*m_dma_finished && (BANK & 4)); |
| 63 | 65 | |
| 64 | | machine.device("maincpu")->execute().set_input_line(M65C02_IRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE); |
| 66 | m_maincpu->set_input_line(M65C02_IRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE); |
| 65 | 67 | } |
| 66 | 68 | |
| 67 | 69 | TIMER_CALLBACK_MEMBER(svision_state::svision_timer) |
| 68 | 70 | { |
| 69 | 71 | m_svision.timer_shot = TRUE; |
| 70 | 72 | m_svision.timer1->enable(FALSE); |
| 71 | | svision_irq( machine() ); |
| 73 | svision_irq(); |
| 72 | 74 | } |
| 73 | 75 | |
| 74 | 76 | READ8_MEMBER(svision_state::svision_r) |
| r20449 | r20450 | |
| 77 | 79 | switch (offset) |
| 78 | 80 | { |
| 79 | 81 | case 0x20: |
| 80 | | data = ioport("JOY")->read(); |
| 82 | data = m_joy->read(); |
| 81 | 83 | break; |
| 84 | |
| 82 | 85 | case 0x21: |
| 83 | 86 | data &= ~0xf; |
| 84 | 87 | data |= m_reg[0x22] & 0xf; |
| 85 | 88 | if (m_pet.on) |
| 86 | 89 | { |
| 87 | 90 | if (!m_pet.clock) |
| 91 | { |
| 88 | 92 | data &= ~4; |
| 93 | } |
| 89 | 94 | if (!m_pet.data) |
| 95 | { |
| 90 | 96 | data &= ~8; |
| 97 | } |
| 91 | 98 | } |
| 92 | 99 | break; |
| 100 | |
| 93 | 101 | case 0x27: |
| 94 | 102 | data &= ~3; |
| 95 | 103 | if (m_svision.timer_shot) |
| 104 | { |
| 96 | 105 | data|=1; |
| 106 | } |
| 97 | 107 | if (*m_dma_finished) |
| 108 | { |
| 98 | 109 | data|=2; |
| 110 | } |
| 99 | 111 | break; |
| 112 | |
| 100 | 113 | case 0x24: |
| 101 | 114 | m_svision.timer_shot = FALSE; |
| 102 | | svision_irq(machine()); |
| 115 | svision_irq(); |
| 103 | 116 | break; |
| 117 | |
| 104 | 118 | case 0x25: |
| 105 | 119 | *m_dma_finished = FALSE; |
| 106 | | svision_irq(machine()); |
| 120 | svision_irq(); |
| 107 | 121 | break; |
| 122 | |
| 108 | 123 | default: |
| 109 | 124 | logerror("%.6f svision read %04x %02x\n", machine().time().as_double(),offset,data); |
| 110 | 125 | break; |
| r20449 | r20450 | |
| 125 | 140 | case 2: |
| 126 | 141 | case 3: |
| 127 | 142 | break; |
| 143 | |
| 128 | 144 | case 0x26: /* bits 5,6 memory management for a000? */ |
| 129 | 145 | logerror("%.6f svision write %04x %02x\n", machine().time().as_double(),offset,data); |
| 130 | | membank("bank1")->set_base(machine().root_device().memregion("user1")->base() + ((m_reg[0x26] & 0xe0) << 9)); |
| 131 | | svision_irq(machine()); |
| 146 | m_bank1->set_base(m_user1->base() + ((m_reg[0x26] & 0xe0) << 9)); |
| 147 | svision_irq(); |
| 132 | 148 | break; |
| 149 | |
| 133 | 150 | case 0x23: /* delta hero irq routine write */ |
| 134 | 151 | value = data; |
| 135 | 152 | if (!data) |
| 153 | { |
| 136 | 154 | value = 0x100; |
| 155 | } |
| 137 | 156 | if (BANK & 0x10) |
| 157 | { |
| 138 | 158 | delay = 16384; |
| 159 | } |
| 139 | 160 | else |
| 161 | { |
| 140 | 162 | delay = 256; |
| 163 | } |
| 141 | 164 | m_svision.timer1->enable(TRUE); |
| 142 | | m_svision.timer1->reset(machine().device<cpu_device>("maincpu")->cycles_to_attotime(value * delay)); |
| 165 | m_svision.timer1->reset(m_maincpu->cycles_to_attotime(value * delay)); |
| 143 | 166 | break; |
| 167 | |
| 144 | 168 | case 0x10: case 0x11: case 0x12: case 0x13: |
| 145 | 169 | svision_soundport_w(m_sound, 0, offset & 3, data); |
| 146 | 170 | break; |
| 171 | |
| 147 | 172 | case 0x14: case 0x15: case 0x16: case 0x17: |
| 148 | 173 | svision_soundport_w(m_sound, 1, offset & 3, data); |
| 149 | 174 | break; |
| 175 | |
| 150 | 176 | case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: |
| 151 | 177 | svision_sounddma_w(m_sound, space, offset - 0x18, data); |
| 152 | 178 | break; |
| 179 | |
| 153 | 180 | case 0x28: case 0x29: case 0x2a: |
| 154 | 181 | svision_noise_w(m_sound, space, offset - 0x28, data); |
| 155 | 182 | break; |
| 183 | |
| 156 | 184 | default: |
| 157 | 185 | logerror("%.6f svision write %04x %02x\n", machine().time().as_double(), offset, data); |
| 158 | 186 | break; |
| r20449 | r20450 | |
| 350 | 378 | |
| 351 | 379 | UINT32 svision_state::screen_update_svision(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 352 | 380 | { |
| 353 | | svision_state *state = machine().driver_data<svision_state>(); |
| 354 | 381 | int x, y, i, j=XPOS/4+YPOS*0x30; |
| 355 | 382 | UINT8 *videoram = m_videoram; |
| 356 | 383 | |
| r20449 | r20450 | |
| 382 | 409 | |
| 383 | 410 | UINT32 svision_state::screen_update_tvlink(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 384 | 411 | { |
| 385 | | svision_state *state = machine().driver_data<svision_state>(); |
| 386 | 412 | int x, y, i, j = XPOS/4+YPOS*0x30; |
| 387 | 413 | UINT8 *videoram = m_videoram; |
| 388 | 414 | |
| r20449 | r20450 | |
| 426 | 452 | m_sound = machine().device("custom"); |
| 427 | 453 | m_dma_finished = svision_dma_finished(m_sound); |
| 428 | 454 | m_pet.on = FALSE; |
| 429 | | membank("bank2")->set_base(memregion("user1")->base() + 0x1c000); |
| 455 | m_user1 = memregion("user1"); |
| 456 | m_bank1 = membank("bank1"); |
| 457 | m_bank2 = membank("bank2"); |
| 458 | m_bank2->set_base(m_user1->base() + 0x1c000); |
| 430 | 459 | } |
| 431 | 460 | |
| 432 | 461 | DRIVER_INIT_MEMBER(svision_state,svisions) |
| r20449 | r20450 | |
| 434 | 463 | m_svision.timer1 = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(svision_state::svision_timer),this)); |
| 435 | 464 | m_sound = machine().device("custom"); |
| 436 | 465 | m_dma_finished = svision_dma_finished(m_sound); |
| 437 | | membank("bank2")->set_base(memregion("user1")->base() + 0x1c000); |
| 438 | | m_svision.timer1 = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(svision_state::svision_timer),this)); |
| 466 | m_user1 = memregion("user1"); |
| 467 | m_bank1 = membank("bank1"); |
| 468 | m_bank2 = membank("bank2"); |
| 469 | m_bank2->set_base(m_user1->base() + 0x1c000); |
| 439 | 470 | m_pet.on = TRUE; |
| 440 | 471 | m_pet.timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(svision_state::svision_pet_timer),this)); |
| 441 | 472 | } |
| r20449 | r20450 | |
| 476 | 507 | |
| 477 | 508 | /* With the following, we mirror the cart in the whole "user1" memory region */ |
| 478 | 509 | for (i = 0; i < mirror; i++) |
| 510 | { |
| 479 | 511 | memcpy(image.device().machine().root_device().memregion("user1")->base() + i * size, temp_copy, size); |
| 512 | } |
| 480 | 513 | |
| 481 | 514 | auto_free(image.device().machine(), temp_copy); |
| 482 | 515 | |
| r20449 | r20450 | |
| 487 | 520 | { |
| 488 | 521 | m_svision.timer_shot = FALSE; |
| 489 | 522 | *m_dma_finished = FALSE; |
| 490 | | membank("bank1")->set_base(memregion("user1")->base()); |
| 523 | m_bank1->set_base(m_user1->base()); |
| 491 | 524 | } |
| 492 | 525 | |
| 493 | 526 | |
| r20449 | r20450 | |
| 495 | 528 | { |
| 496 | 529 | m_svision.timer_shot = FALSE; |
| 497 | 530 | *m_dma_finished = FALSE; |
| 498 | | membank("bank1")->set_base(memregion("user1")->base()); |
| 531 | m_bank1->set_base(m_user1->base()); |
| 499 | 532 | m_tvlink.palette_on = FALSE; |
| 500 | 533 | |
| 501 | 534 | memset(m_reg + 0x800, 0xff, 0x40); // normally done from m_tvlink microcontroller |