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r20379 Sunday 20th January, 2013 at 20:43:34 UTC by smf
Use devcb2 for cpu to spu hookup as it's on it's own 16 bit bus. Removed the spu hookup in taitogn at 0x1fa51c00 as it doesn't make sense, will wait for bug reports before investigating further. [smf]
[src/emu/cpu/psx]psx.c psx.h
[src/emu/sound]spu.c spu.h
[src/mame/drivers]taitogn.c

trunk/src/emu/cpu/psx/psx.c
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15381538   AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8( cd_r, cd_w, 0xffffffff )
15391539   AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
15401540   AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
1541   AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
1541   AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16( spu_r, spu_w, 0xffffffff )
15421542   AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
15431543   /* 1f802030 int 2000 */
15441544   /* 1f802040 dip switches */
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15661566   AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8( cd_r, cd_w, 0xffffffff )
15671567   AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
15681568   AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
1569   AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
1569   AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16( spu_r, spu_w, 0xffffffff )
15701570   AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
15711571   AM_RANGE(0x1f802040, 0x1f802043) AM_WRITENOP
15721572   AM_RANGE(0x20000000, 0x7fffffff) AM_READWRITE( berr_r, berr_w )
r20378r20379
15901590   m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, internal_map),
15911591   m_gpu_read_handler(*this),
15921592   m_gpu_write_handler(*this),
1593   m_spu_read_handler(*this),
1594   m_spu_write_handler(*this),
15931595   m_cd_read_handler(*this),
15941596   m_cd_write_handler(*this)
15951597{
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17781780
17791781   m_gpu_read_handler.resolve_safe(0);
17801782   m_gpu_write_handler.resolve_safe();
1783   m_spu_read_handler.resolve_safe(0);
1784   m_spu_write_handler.resolve_safe();
17811785   m_cd_read_handler.resolve_safe(0);
17821786   m_cd_write_handler.resolve_safe();
17831787}
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31783182   m_gpu_write_handler( space, offset, data, mem_mask );
31793183}
31803184
3185READ16_HANDLER( psxcpu_device::spu_r )
3186{
3187   return m_spu_read_handler( space, offset, mem_mask );
3188}
3189
3190WRITE16_HANDLER( psxcpu_device::spu_w )
3191{
3192   m_spu_write_handler( space, offset, data, mem_mask );
3193}
3194
31813195READ8_HANDLER( psxcpu_device::cd_r )
31823196{
31833197   return m_cd_read_handler( space, offset, mem_mask );
trunk/src/emu/cpu/psx/psx.h
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115115#define MCFG_PSX_GPU_WRITE_HANDLER(_devcb) \
116116   devcb = &psxcpu_device::set_gpu_write_handler(*device, DEVCB2_##_devcb);
117117
118#define MCFG_PSX_SPU_READ_HANDLER(_devcb) \
119   devcb = &psxcpu_device::set_spu_read_handler(*device, DEVCB2_##_devcb);
120#define MCFG_PSX_SPU_WRITE_HANDLER(_devcb) \
121   devcb = &psxcpu_device::set_spu_write_handler(*device, DEVCB2_##_devcb);
122
118123#define MCFG_PSX_CD_READ_HANDLER(_devcb) \
119124   devcb = &psxcpu_device::set_cd_read_handler(*device, DEVCB2_##_devcb);
120125#define MCFG_PSX_CD_WRITE_HANDLER(_devcb) \
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135140   // static configuration helpers
136141   template<class _Object> static devcb2_base &set_gpu_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_read_handler.set_callback(object); }
137142   template<class _Object> static devcb2_base &set_gpu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_write_handler.set_callback(object); }
143   template<class _Object> static devcb2_base &set_spu_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_spu_read_handler.set_callback(object); }
144   template<class _Object> static devcb2_base &set_spu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_spu_write_handler.set_callback(object); }
138145   template<class _Object> static devcb2_base &set_cd_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_read_handler.set_callback(object); }
139146   template<class _Object> static devcb2_base &set_cd_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_write_handler.set_callback(object); }
140147
r20378r20379
147154   DECLARE_WRITE32_MEMBER( gpu_w );
148155   DECLARE_READ32_MEMBER( gpu_r );
149156
157   DECLARE_WRITE16_MEMBER( spu_w );
158   DECLARE_READ16_MEMBER( spu_r );
159
150160   DECLARE_WRITE8_MEMBER( cd_w );
151161   DECLARE_READ8_MEMBER( cd_r );
152162
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291301
292302   devcb2_read32 m_gpu_read_handler;
293303   devcb2_write32 m_gpu_write_handler;
304   devcb2_read16 m_spu_read_handler;
305   devcb2_write16 m_spu_write_handler;
294306   devcb2_read8 m_cd_read_handler;
295307   devcb2_write8 m_cd_write_handler;
296308};
trunk/src/emu/sound/spu.c
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11521152//
11531153//
11541154
1155unsigned short spu_device::read_word(const unsigned int addr)
1155READ16_MEMBER( spu_device::read )
11561156{
1157   unsigned short ret=0, *rp=(unsigned short *)(reg+(addr&0x1ff));
1157   unsigned short ret=0, *rp=(unsigned short *)(reg+((offset*2)&0x1ff));
11581158
11591159   assert((addr&1)==0);
11601160
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11641164
11651165   #ifdef debug_spu_registers
11661166      printf("spu: read word %08x = %04x [%s]\n",
1167                                       addr,
1167                                       offset*2,
11681168                                       ret,
1169                                       get_register_name(addr));
1169                                       get_register_name(offset*2));
11701170   #endif
11711171
11721172   return ret;
r20378r20379
11761176//
11771177//
11781178
1179unsigned char spu_device::read_byte(const unsigned int addr)
1179WRITE16_MEMBER( spu_device::write )
11801180{
1181   unsigned char ret=0,
1182                        *rp=reg+(addr&0x1ff);
1183
1184   ret=*rp;
1185
11861181   #ifdef debug_spu_registers
1187      printf("spu: read byte %08x\n",addr);
1188   #endif
1189
1190   return ret;
1191}
1192
1193//
1194//
1195//
1196
1197void spu_device::write_word(const unsigned int addr, const unsigned short data)
1198{
1199   #ifdef debug_spu_registers
12001182      printf("spu: write %08x = %04x [%s]\n",
1201                                       addr,
1183                                       offset*2,
12021184                                       data,
1203                                       get_register_name(addr));
1185                                       get_register_name(offset*2));
12041186   #endif
12051187
1206   assert((addr&1)==0);
1207
12081188   m_stream->update();
12091189
1210   const unsigned int a=addr&0x1ff;
1190   const unsigned int a=(offset*2)&0x1ff;
12111191   switch (a)
12121192   {
12131193      case spureg_trans_addr:
r20378r20379
12221202
12231203      default:
12241204      {
1225         unsigned short *rp=(unsigned short *)(reg+(addr&0x1ff));
1205         unsigned short *rp=(unsigned short *)(reg+a);
12261206
12271207         if ((a==spureg_irq_addr) ||
12281208               ((a==spureg_ctrl) && ((rp[0]^data)&spuctrl_irq_enable)))
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12571237//
12581238//
12591239
1260void spu_device::write_byte(const unsigned int addr, const unsigned char data)
1261{
1262   #ifdef debug_spu_registers
1263      printf("spu: write %08x = %02x\n",addr,data);
1264   #endif
1265
1266   const unsigned int a=addr&0x1ff;
1267   reg[a]=data;
1268   if ((a>spureg_reverb_config) && (a<=spureg_last))
1269      dirty_flags|=dirtyflag_reverb;
1270   update_key();
1271}
1272
1273//
1274//
1275//
1276
12771240void spu_device::update_vol(const unsigned int addr)
12781241{
12791242   if (addr<0x180)
r20378r20379
31043067
31053068   start_dma(psxram + n_address, true, n_size*4);
31063069}
3107
3108READ16_HANDLER( spu_r )
3109{
3110   spu_device *spu = space.machine().device<spu_device>("spu");
3111
3112   if (spu == NULL )
3113   {
3114      return 0;
3115   }
3116
3117   return spu->read_word(offset*2);
3118}
3119
3120WRITE16_HANDLER( spu_w )
3121{
3122   spu_device *spu = space.machine().device<spu_device>("spu");
3123
3124   if (spu == NULL)
3125   {
3126      return;
3127   }
3128
3129   spu->write_word(offset*2, data);
3130}
trunk/src/emu/sound/spu.h
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1313   devcb = &spu_device::set_irq_handler(*device, DEVCB2_##_devcb);
1414
1515#define MCFG_SPU_ADD(_tag, _clock) \
16   MCFG_DEVICE_MODIFY( "maincpu" ) \
17   MCFG_PSX_SPU_READ_HANDLER(DEVREAD16(_tag, spu_device, read)) \
18   MCFG_PSX_SPU_WRITE_HANDLER(DEVWRITE16(_tag, spu_device, write)) \
1619   MCFG_DEVICE_ADD(_tag, SPU, _clock) \
1720   MCFG_SPU_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin9)) \
1821   MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 4, psx_dma_read_delegate( FUNC( spu_device::dma_read ), (spu_device *) device ) ) \
r20378r20379
234237   void flush_xa(const unsigned int sector=0);
235238   void flush_cdda(const unsigned int sector=0);
236239
237   unsigned char read_byte(const unsigned int addr);
238   unsigned short read_word(const unsigned int addr);
239   void write_byte(const unsigned int addr, const unsigned char byte);
240   void write_word(const unsigned int addr, const unsigned short word);
241
242240   sound_stream *m_stream;
241
242   DECLARE_READ16_MEMBER( read );
243   DECLARE_WRITE16_MEMBER( write );
243244};
244245
245246extern reverb_params *spu_reverb_cfg;
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247248// device type definition
248249extern const device_type SPU;
249250
250// MAME old-style interface
251DECLARE_READ16_HANDLER( spu_r );
252DECLARE_WRITE16_HANDLER( spu_w );
253
254251#endif
trunk/src/mame/drivers/taitogn.c
r20378r20379
812812   AM_RANGE(0x1fa10300, 0x1fa10303) AM_READWRITE(znsecsel_r, znsecsel_w)
813813   AM_RANGE(0x1fa20000, 0x1fa20003) AM_READWRITE(coin_r, coin_w)
814814   AM_RANGE(0x1fa30000, 0x1fa30003) AM_READWRITE(control3_r, control3_w)
815   AM_RANGE(0x1fa51c00, 0x1fa51dff) AM_READWRITE16_LEGACY(spu_r, spu_w, 0xffffffff) // systematic read at spu_address + 250000, result dropped, maybe other accesses
815   AM_RANGE(0x1fa51c00, 0x1fa51dff) AM_READNOP // systematic read at spu_address + 250000, result dropped, maybe other accesses
816816   AM_RANGE(0x1fa60000, 0x1fa60003) AM_READ(hack1_r)
817817   AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0xffffffff) /* eeprom */
818818   AM_RANGE(0x1fb00000, 0x1fb0ffff) AM_READWRITE(rf5c296_io_r, rf5c296_io_w)

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