trunk/src/emu/cpu/psx/psx.c
| r20375 | r20376 | |
| 1535 | 1535 | AM_RANGE(0x1f801070, 0x1f801077) AM_DEVREADWRITE( "irq", psxirq_device, read, write ) |
| 1536 | 1536 | AM_RANGE(0x1f801080, 0x1f8010ff) AM_DEVREADWRITE( "dma", psxdma_device, read, write ) |
| 1537 | 1537 | AM_RANGE(0x1f801100, 0x1f80112f) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write ) |
| 1538 | | /* 1f801800-1f801803 cd */ |
| 1538 | AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8( cd_r, cd_w, 0xffffffff ) |
| 1539 | 1539 | AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w ) |
| 1540 | 1540 | AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write ) |
| 1541 | 1541 | AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff ) |
| r20375 | r20376 | |
| 1563 | 1563 | AM_RANGE(0x1f801070, 0x1f801077) AM_DEVREADWRITE( "irq", psxirq_device, read, write ) |
| 1564 | 1564 | AM_RANGE(0x1f801080, 0x1f8010ff) AM_DEVREADWRITE( "dma", psxdma_device, read, write ) |
| 1565 | 1565 | AM_RANGE(0x1f801100, 0x1f80112f) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write ) |
| 1566 | AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8( cd_r, cd_w, 0xffffffff ) |
| 1566 | 1567 | AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w ) |
| 1567 | 1568 | AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write ) |
| 1568 | 1569 | AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff ) |
| r20375 | r20376 | |
| 1588 | 1589 | cpu_device(mconfig, type, name, tag, owner, clock), |
| 1589 | 1590 | m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, internal_map), |
| 1590 | 1591 | m_gpu_read_handler(*this), |
| 1591 | | m_gpu_write_handler(*this) |
| 1592 | m_gpu_write_handler(*this), |
| 1593 | m_cd_read_handler(*this), |
| 1594 | m_cd_write_handler(*this) |
| 1592 | 1595 | { |
| 1593 | 1596 | } |
| 1594 | 1597 | |
| r20375 | r20376 | |
| 1775 | 1778 | |
| 1776 | 1779 | m_gpu_read_handler.resolve_safe(0); |
| 1777 | 1780 | m_gpu_write_handler.resolve_safe(); |
| 1781 | m_cd_read_handler.resolve_safe(0); |
| 1782 | m_cd_write_handler.resolve_safe(); |
| 1778 | 1783 | } |
| 1779 | 1784 | |
| 1780 | 1785 | |
| r20375 | r20376 | |
| 3173 | 3178 | m_gpu_write_handler( space, offset, data, mem_mask ); |
| 3174 | 3179 | } |
| 3175 | 3180 | |
| 3181 | READ8_HANDLER( psxcpu_device::cd_r ) |
| 3182 | { |
| 3183 | return m_cd_read_handler( space, offset, mem_mask ); |
| 3184 | } |
| 3185 | |
| 3186 | WRITE8_HANDLER( psxcpu_device::cd_w ) |
| 3187 | { |
| 3188 | m_cd_write_handler( space, offset, data, mem_mask ); |
| 3189 | } |
| 3190 | |
| 3176 | 3191 | WRITE32_HANDLER( psxcpu_device::com_delay_w ) |
| 3177 | 3192 | { |
| 3178 | 3193 | COMBINE_DATA( &m_com_delay ); |
trunk/src/emu/cpu/psx/psx.h
| r20375 | r20376 | |
| 115 | 115 | #define MCFG_PSX_GPU_WRITE_HANDLER(_devcb) \ |
| 116 | 116 | devcb = &psxcpu_device::set_gpu_write_handler(*device, DEVCB2_##_devcb); |
| 117 | 117 | |
| 118 | #define MCFG_PSX_CD_READ_HANDLER(_devcb) \ |
| 119 | devcb = &psxcpu_device::set_cd_read_handler(*device, DEVCB2_##_devcb); |
| 120 | #define MCFG_PSX_CD_WRITE_HANDLER(_devcb) \ |
| 121 | devcb = &psxcpu_device::set_cd_write_handler(*device, DEVCB2_##_devcb); |
| 122 | |
| 118 | 123 | //************************************************************************** |
| 119 | 124 | // TYPE DEFINITIONS |
| 120 | 125 | //************************************************************************** |
| r20375 | r20376 | |
| 130 | 135 | // static configuration helpers |
| 131 | 136 | template<class _Object> static devcb2_base &set_gpu_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_read_handler.set_callback(object); } |
| 132 | 137 | template<class _Object> static devcb2_base &set_gpu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_write_handler.set_callback(object); } |
| 138 | template<class _Object> static devcb2_base &set_cd_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_read_handler.set_callback(object); } |
| 139 | template<class _Object> static devcb2_base &set_cd_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_write_handler.set_callback(object); } |
| 133 | 140 | |
| 134 | 141 | // public interfaces |
| 135 | 142 | DECLARE_WRITE32_MEMBER( biu_w ); |
| r20375 | r20376 | |
| 140 | 147 | DECLARE_WRITE32_MEMBER( gpu_w ); |
| 141 | 148 | DECLARE_READ32_MEMBER( gpu_r ); |
| 142 | 149 | |
| 150 | DECLARE_WRITE8_MEMBER( cd_w ); |
| 151 | DECLARE_READ8_MEMBER( cd_r ); |
| 152 | |
| 143 | 153 | DECLARE_WRITE32_MEMBER( com_delay_w ); |
| 144 | 154 | DECLARE_READ32_MEMBER( com_delay_r ); |
| 145 | 155 | |
| r20375 | r20376 | |
| 281 | 291 | |
| 282 | 292 | devcb2_read32 m_gpu_read_handler; |
| 283 | 293 | devcb2_write32 m_gpu_write_handler; |
| 294 | devcb2_read8 m_cd_read_handler; |
| 295 | devcb2_write8 m_cd_write_handler; |
| 284 | 296 | }; |
| 285 | 297 | |
| 286 | 298 | class cxd8530aq_device : public psxcpu_device |
trunk/src/mess/drivers/psx.c
| r20375 | r20376 | |
| 37 | 37 | UINT8 m_cd_io_status; |
| 38 | 38 | UINT8 m_cd_param[8]; |
| 39 | 39 | UINT8 m_cd_result[8]; |
| 40 | | DECLARE_READ8_MEMBER(psx_cd_r); |
| 41 | | DECLARE_WRITE8_MEMBER(psx_cd_w); |
| 42 | 40 | DECLARE_DIRECT_UPDATE_MEMBER(psx_default); |
| 43 | 41 | DECLARE_DIRECT_UPDATE_MEMBER(psx_setopbase); |
| 44 | 42 | DECLARE_DRIVER_INIT(psx); |
| r20375 | r20376 | |
| 477 | 475 | printf("cd_dma_write?!: addr %x, size %x\n", n_address, n_size); |
| 478 | 476 | } |
| 479 | 477 | |
| 480 | | READ8_MEMBER(psx1_state::psx_cd_r) |
| 481 | | { |
| 482 | | psxcd_device *psxcd = machine().device<psxcd_device>(PSXCD_TAG); |
| 483 | | |
| 484 | | return psxcd->read_byte(offset); |
| 485 | | } |
| 486 | | |
| 487 | | WRITE8_MEMBER(psx1_state::psx_cd_w) |
| 488 | | { |
| 489 | | psxcd_device *psxcd = machine().device<psxcd_device>(PSXCD_TAG); |
| 490 | | |
| 491 | | psxcd->write_byte(offset, data); |
| 492 | | } |
| 493 | | |
| 494 | 478 | static ADDRESS_MAP_START( psx_map, AS_PROGRAM, 32, psx1_state ) |
| 495 | 479 | AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_MIRROR(0x00600000) AM_SHARE("share1") /* ram */ |
| 496 | | AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8(psx_cd_r, psx_cd_w, 0xffffffff) |
| 497 | 480 | AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_SHARE("share2") AM_REGION("user1", 0) /* bios */ |
| 498 | 481 | AM_RANGE(0x80000000, 0x801fffff) AM_RAM AM_MIRROR(0x00600000) AM_SHARE("share1") /* ram mirror */ |
| 499 | 482 | AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */ |
| r20375 | r20376 | |
| 535 | 518 | MCFG_CDROM_ADD("cdrom",psx_cdrom) |
| 536 | 519 | MCFG_SOFTWARE_LIST_ADD("cd_list","psx") |
| 537 | 520 | |
| 521 | MCFG_DEVICE_MODIFY( "maincpu" ) |
| 522 | MCFG_PSX_CD_READ_HANDLER( DEVREAD8( PSXCD_TAG, psxcd_device, read ) ) |
| 523 | MCFG_PSX_CD_WRITE_HANDLER( DEVWRITE8( PSXCD_TAG, psxcd_device, write ) ) |
| 524 | |
| 538 | 525 | MCFG_PSXCD_ADD("cdrom") |
| 539 | 526 | MCFG_PSXCD_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin2)) |
| 540 | 527 | MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 3, psx_dma_read_delegate( FUNC( cd_dma_read ), (psxcd_device *) device ) ) |
| r20375 | r20376 | |
| 566 | 553 | MCFG_CDROM_ADD("cdrom",psx_cdrom) |
| 567 | 554 | MCFG_SOFTWARE_LIST_ADD("cd_list","psx") |
| 568 | 555 | |
| 556 | MCFG_DEVICE_MODIFY( "maincpu" ) |
| 557 | MCFG_PSX_CD_READ_HANDLER( DEVREAD8( PSXCD_TAG, psxcd_device, read ) ) |
| 558 | MCFG_PSX_CD_WRITE_HANDLER( DEVWRITE8( PSXCD_TAG, psxcd_device, write ) ) |
| 559 | |
| 569 | 560 | MCFG_PSXCD_ADD("cdrom") |
| 570 | 561 | MCFG_PSXCD_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin2)) |
| 571 | 562 | MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 3, psx_dma_read_delegate( FUNC( cd_dma_read ), (psxcd_device *) device ) ) |