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r20216 Saturday 12th January, 2013 at 12:13:59 UTC by Wilbert Pol
(MESS)Merged src/mess/machine/odyssey2.c and src/mess/drivers/odyssey2.c (nw)
[src/mess]mess.mak
[src/mess/drivers]odyssey2.c
[src/mess/machine]odyssey2.c

trunk/src/mess/machine/odyssey2.c
r20215r20216
1/***************************************************************************
2
3  odyssey2.c
4
5  Machine file to handle emulation of the Odyssey 2.
6
7***************************************************************************/
8
9#include "emu.h"
10#include "includes/odyssey2.h"
11#include "imagedev/cartslot.h"
12#include "sound/sp0256.h"
13
14
15
16void odyssey2_state::switch_banks()
17{
18   switch ( m_cart_size )
19   {
20      case 12288:
21         /* 12KB cart support (for instance, KTAA as released) */
22         membank( "bank1" )->set_base( memregion("user1")->base() + (m_p1 & 0x03) * 0xC00 );
23         membank( "bank2" )->set_base( memregion("user1")->base() + (m_p1 & 0x03) * 0xC00 + 0x800 );
24         break;
25
26      case 16384:
27         /* 16KB cart support (for instance, full sized version KTAA) */
28         membank( "bank1" )->set_base( memregion("user1")->base() + (m_p1 & 0x03) * 0x1000 + 0x400 );
29         membank( "bank2" )->set_base( memregion("user1")->base() + (m_p1 & 0x03) * 0x1000 + 0xC00 );
30         break;
31
32      default:
33         membank("bank1")->set_base(memregion("user1")->base() + (m_p1 & 0x03) * 0x800);
34         membank("bank2")->set_base(memregion("user1")->base() + (m_p1 & 0x03) * 0x800 );
35         break;
36   }
37}
38
39
40WRITE_LINE_MEMBER(odyssey2_state::the_voice_lrq_callback)
41{
42   m_the_voice_lrq_state = state;
43}
44
45
46READ8_MEMBER(odyssey2_state::t0_read)
47{
48   return ( m_the_voice_lrq_state == ASSERT_LINE ) ? 0 : 1;
49}
50
51
52DRIVER_INIT_MEMBER(odyssey2_state,odyssey2)
53{
54   int i;
55   int size = 0;
56   UINT8 *gfx = memregion("gfx1")->base();
57   device_image_interface *image = dynamic_cast<device_image_interface *>(machine().device("cart"));
58
59   m_ram        = auto_alloc_array(machine(), UINT8, 256);
60
61   for (i = 0; i < 256; i++)
62   {
63      gfx[i] = i;     /* TODO: Why i and not 0? */
64      m_ram[i] = 0;
65   }
66
67   if (image->exists())
68   {
69      if (image->software_entry() == NULL)
70      {
71         size = image->length();
72      }
73      else
74      {
75         size = image->get_software_region_length("rom");
76      }
77   }
78   m_cart_size = size;
79}
80
81
82void odyssey2_state::machine_start()
83{
84   save_item(NAME(m_ef934x_ram_a));
85   save_item(NAME(m_ef934x_ram_b));
86   save_item(NAME(m_ef9340.X));
87   save_item(NAME(m_ef9340.Y));
88   save_item(NAME(m_ef9340.Y0));
89   save_item(NAME(m_ef9340.R));
90   save_item(NAME(m_ef9340.M));
91   save_item(NAME(m_ef9341.TA));
92   save_item(NAME(m_ef9341.TB));
93   save_item(NAME(m_ef9341.busy));
94   save_item(NAME(m_ef934x_ext_char_ram));
95}
96
97
98void odyssey2_state::machine_reset()
99{
100   m_lum = 0;
101
102   /* jump to "last" bank, will work for all sizes due to being mirrored */
103   m_p1 = 0xFF;
104   m_p2 = 0xFF;
105   switch_banks();
106
107   for ( int i = 0; i < 8; i++ )
108   {
109      m_g7400_ic674_decode[i] = 0;
110      m_g7400_ic678_decode[i] = 0;
111   }
112}
113
114/****** External RAM ******************************/
115
116READ8_MEMBER(odyssey2_state::io_read)
117{
118   if ((m_p1 & (P1_VDC_COPY_MODE_ENABLE | P1_VDC_ENABLE)) == 0)
119   {
120      return m_i8244->read(space, offset); /* seems to have higher priority than ram??? */
121   }
122   if (!(m_p1 & P1_EXT_RAM_ENABLE))
123   {
124      return m_ram[offset];
125   }
126
127   return 0;
128}
129
130
131WRITE8_MEMBER(odyssey2_state::io_write)
132{
133   if ((m_p1 & (P1_EXT_RAM_ENABLE | P1_VDC_COPY_MODE_ENABLE)) == 0x00)
134   {
135      m_ram[offset] = data;
136      if ( offset & 0x80 )
137      {
138         if ( data & 0x20 )
139         {
140            logerror("voice write %02X, data = %02X (p1 = %02X)\n", offset, data, m_p1 );
141            sp0256_ALD_w( machine().device("sp0256_speech"), space, 0, offset & 0x7F );
142         }
143         else
144         {
145            /* TODO: Reset sp0256 in this case */
146         }
147      }
148   }
149   else if (!(m_p1 & P1_VDC_ENABLE))
150   {
151      m_i8244->write(space, offset, data);
152   }
153}
154
155
156READ8_MEMBER(odyssey2_state::g7400_io_read)
157{
158   if ((m_p1 & (P1_VDC_COPY_MODE_ENABLE | P1_VDC_ENABLE)) == 0)
159   {
160      return m_i8244->read(space, offset); /* seems to have higher priority than ram??? */
161   }
162   else if (!(m_p1 & P1_EXT_RAM_ENABLE))
163   {
164      return m_ram[offset];
165   }
166   else
167   {
168      return ef9341_r( offset & 0x02, offset & 0x01 );
169   }
170
171   return 0;
172}
173
174
175WRITE8_MEMBER(odyssey2_state::g7400_io_write)
176{
177   if ((m_p1 & (P1_EXT_RAM_ENABLE | P1_VDC_COPY_MODE_ENABLE)) == 0x00)
178   {
179      m_ram[offset] = data;
180   }
181   else if (!(m_p1 & P1_VDC_ENABLE))
182   {
183      m_i8244->write(space, offset, data);
184   }
185   else
186   {
187      ef9341_w( offset & 0x02, offset & 0x01, data );
188   }
189}
190
trunk/src/mess/drivers/odyssey2.c
r20215r20216
137137}
138138
139139
140void odyssey2_state::switch_banks()
141{
142   switch ( m_cart_size )
143   {
144      case 12288:
145         /* 12KB cart support (for instance, KTAA as released) */
146         membank( "bank1" )->set_base( memregion("user1")->base() + (m_p1 & 0x03) * 0xC00 );
147         membank( "bank2" )->set_base( memregion("user1")->base() + (m_p1 & 0x03) * 0xC00 + 0x800 );
148         break;
149
150      case 16384:
151         /* 16KB cart support (for instance, full sized version KTAA) */
152         membank( "bank1" )->set_base( memregion("user1")->base() + (m_p1 & 0x03) * 0x1000 + 0x400 );
153         membank( "bank2" )->set_base( memregion("user1")->base() + (m_p1 & 0x03) * 0x1000 + 0xC00 );
154         break;
155
156      default:
157         membank("bank1")->set_base(memregion("user1")->base() + (m_p1 & 0x03) * 0x800);
158         membank("bank2")->set_base(memregion("user1")->base() + (m_p1 & 0x03) * 0x800 );
159         break;
160   }
161}
162
163
164WRITE_LINE_MEMBER(odyssey2_state::the_voice_lrq_callback)
165{
166   m_the_voice_lrq_state = state;
167}
168
169
170READ8_MEMBER(odyssey2_state::t0_read)
171{
172   return ( m_the_voice_lrq_state == ASSERT_LINE ) ? 0 : 1;
173}
174
175
176DRIVER_INIT_MEMBER(odyssey2_state,odyssey2)
177{
178   int i;
179   int size = 0;
180   UINT8 *gfx = memregion("gfx1")->base();
181   device_image_interface *image = dynamic_cast<device_image_interface *>(machine().device("cart"));
182
183   m_ram        = auto_alloc_array(machine(), UINT8, 256);
184
185   for (i = 0; i < 256; i++)
186   {
187      gfx[i] = i;     /* TODO: Why i and not 0? */
188      m_ram[i] = 0;
189   }
190
191   if (image->exists())
192   {
193      if (image->software_entry() == NULL)
194      {
195         size = image->length();
196      }
197      else
198      {
199         size = image->get_software_region_length("rom");
200      }
201   }
202   m_cart_size = size;
203}
204
205
206void odyssey2_state::machine_start()
207{
208   save_item(NAME(m_ef934x_ram_a));
209   save_item(NAME(m_ef934x_ram_b));
210   save_item(NAME(m_ef9340.X));
211   save_item(NAME(m_ef9340.Y));
212   save_item(NAME(m_ef9340.Y0));
213   save_item(NAME(m_ef9340.R));
214   save_item(NAME(m_ef9340.M));
215   save_item(NAME(m_ef9341.TA));
216   save_item(NAME(m_ef9341.TB));
217   save_item(NAME(m_ef9341.busy));
218   save_item(NAME(m_ef934x_ext_char_ram));
219}
220
221
222void odyssey2_state::machine_reset()
223{
224   m_lum = 0;
225
226   /* jump to "last" bank, will work for all sizes due to being mirrored */
227   m_p1 = 0xFF;
228   m_p2 = 0xFF;
229   switch_banks();
230
231   for ( int i = 0; i < 8; i++ )
232   {
233      m_g7400_ic674_decode[i] = 0;
234      m_g7400_ic678_decode[i] = 0;
235   }
236}
237
238/****** External RAM ******************************/
239
240READ8_MEMBER(odyssey2_state::io_read)
241{
242   if ((m_p1 & (P1_VDC_COPY_MODE_ENABLE | P1_VDC_ENABLE)) == 0)
243   {
244      return m_i8244->read(space, offset); /* seems to have higher priority than ram??? */
245   }
246   if (!(m_p1 & P1_EXT_RAM_ENABLE))
247   {
248      return m_ram[offset];
249   }
250
251   return 0;
252}
253
254
255WRITE8_MEMBER(odyssey2_state::io_write)
256{
257   if ((m_p1 & (P1_EXT_RAM_ENABLE | P1_VDC_COPY_MODE_ENABLE)) == 0x00)
258   {
259      m_ram[offset] = data;
260      if ( offset & 0x80 )
261      {
262         if ( data & 0x20 )
263         {
264            logerror("voice write %02X, data = %02X (p1 = %02X)\n", offset, data, m_p1 );
265            sp0256_ALD_w( machine().device("sp0256_speech"), space, 0, offset & 0x7F );
266         }
267         else
268         {
269            /* TODO: Reset sp0256 in this case */
270         }
271      }
272   }
273   else if (!(m_p1 & P1_VDC_ENABLE))
274   {
275      m_i8244->write(space, offset, data);
276   }
277}
278
279
280READ8_MEMBER(odyssey2_state::g7400_io_read)
281{
282   if ((m_p1 & (P1_VDC_COPY_MODE_ENABLE | P1_VDC_ENABLE)) == 0)
283   {
284      return m_i8244->read(space, offset); /* seems to have higher priority than ram??? */
285   }
286   else if (!(m_p1 & P1_EXT_RAM_ENABLE))
287   {
288      return m_ram[offset];
289   }
290   else
291   {
292      return ef9341_r( offset & 0x02, offset & 0x01 );
293   }
294
295   return 0;
296}
297
298
299WRITE8_MEMBER(odyssey2_state::g7400_io_write)
300{
301   if ((m_p1 & (P1_EXT_RAM_ENABLE | P1_VDC_COPY_MODE_ENABLE)) == 0x00)
302   {
303      m_ram[offset] = data;
304   }
305   else if (!(m_p1 & P1_VDC_ENABLE))
306   {
307      m_i8244->write(space, offset, data);
308   }
309   else
310   {
311      ef9341_w( offset & 0x02, offset & 0x01, data );
312   }
313}
314
315
140316WRITE16_MEMBER(odyssey2_state::scanline_postprocess)
141317{
142318   int vpos = data;
trunk/src/mess/mess.mak
r20215r20216
13021302   $(MESS_MACHINE)/s1410.o     \
13031303
13041304$(MESSOBJ)/magnavox.a:          \
1305   $(MESS_MACHINE)/odyssey2.o  \
13061305   $(MESS_VIDEO)/odyssey2.o    \
13071306   $(MESS_DRIVERS)/odyssey2.o  \
13081307

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