trunk/src/emu/cpu/dsp16/dsp16ops.c
| r20136 | r20137 | |
|---|
| 4 | 4 | // The YL register is the lower half of the 32 bit Y register |
| 5 | 5 | void* dsp16_device::addressYL() |
| 6 | 6 | { |
| 7 | | return (((UINT8*)&m_y) + 2); |
| 7 | return (void*)(((UINT8*)&m_y) + 2); |
| 8 | 8 | } |
| 9 | 9 | |
| 10 | 10 | |
| r20136 | r20137 | |
|---|
| 127 | 127 | { |
| 128 | 128 | case 0x00: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break; |
| 129 | 129 | case 0x01: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break; |
| 130 | | case 0x02: m_p = (INT32)((INT16)m_x * (INT16)m_y); break; |
| 130 | case 0x02: m_p = (INT32)((INT16)m_x * (INT16)((m_y & 0xffff0000) >> 16)); break; |
| 131 | 131 | case 0x03: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break; |
| 132 | 132 | case 0x04: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break; |
| 133 | 133 | case 0x05: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break; |
| r20136 | r20137 | |
|---|
| 227 | 227 | } |
| 228 | 228 | case 0x17: |
| 229 | 229 | { |
| 230 | | // F1, y[l] = Y |
| 231 | | //const UINT8 Y = (op & 0x000f); |
| 232 | | //const UINT8 X = (op & 0x0010) >> 4; |
| 233 | | //const UINT8 S = (op & 0x0200) >> 9; |
| 234 | | //const UINT8 D = (op & 0x0400) >> 10; |
| 235 | | //const UINT8 F1 = (op & 0x01e0) >> 5; |
| 230 | // F1, y[l] = Y : (page 3-44) |
| 231 | const UINT8 Y = (op & 0x000f); |
| 232 | const UINT8 X = (op & 0x0010) >> 4; |
| 233 | const UINT8 S = (op & 0x0200) >> 9; |
| 234 | const UINT8 D = (op & 0x0400) >> 10; |
| 235 | const UINT8 F1 = (op & 0x01e0) >> 5; |
| 236 | executeF1Field(F1, D, S); |
| 237 | UINT16* sourceReg = (UINT16*)registerFromYFieldUpper(Y); |
| 238 | UINT16 sourceValue = data_read(*sourceReg); |
| 239 | switch (X) |
| 240 | { |
| 241 | case 0x00: writeRegister(addressYL(), sourceValue); break; |
| 242 | case 0x01: writeRegister(&m_y, sourceValue); break; |
| 243 | default: break; |
| 244 | } |
| 245 | executeYFieldPost(Y); |
| 246 | cycles = 1; |
| 247 | pcAdvance = 1; |
| 236 | 248 | break; |
| 237 | 249 | } |
| 238 | 250 | case 0x1f: |
| r20136 | r20137 | |
|---|
| 279 | 291 | break; |
| 280 | 292 | } |
| 281 | 293 | |
| 282 | | // Format 1a: Multiply/ALU Read/Write Group (major typo in docs on p3-51) |
| 294 | // Format 1a: Multiply/ALU Read/Write Group (TODO: Figure out major typo in docs on p3-51) |
| 283 | 295 | case 0x07: |
| 284 | 296 | { |
| 285 | | // F1, At[1] = Y |
| 286 | | //const UINT8 Y = (op & 0x000f); |
| 287 | | //const UINT8 S = (op & 0x0200) >> 9; |
| 288 | | //const UINT8 aT = (op & 0x0400) >> 10; |
| 289 | | //const UINT8 F1 = (op & 0x01e0) >> 5; |
| 297 | // F1, At[1] = Y : (page 3-50) |
| 298 | const UINT8 Y = (op & 0x000f); |
| 299 | const UINT8 S = (op & 0x0200) >> 9; |
| 300 | const UINT8 aT = (op & 0x0400) >> 10; |
| 301 | const UINT8 F1 = (op & 0x01e0) >> 5; |
| 302 | executeF1Field(F1, !aT, S); |
| 303 | UINT64* destinationReg = NULL; |
| 304 | switch(aT) |
| 305 | { |
| 306 | case 0: destinationReg = &m_a1; break; |
| 307 | case 1: destinationReg = &m_a0; break; |
| 308 | default: break; |
| 309 | } |
| 310 | UINT16 sourceAddress = *((UINT16*)registerFromYFieldUpper(Y)); |
| 311 | INT64 sourceValueSigned = (INT16)data_read(sourceAddress); |
| 312 | *destinationReg = sourceValueSigned & U64(0xffffffffff); |
| 313 | executeYFieldPost(Y); |
| 314 | cycles = 1; |
| 315 | pcAdvance = 1; |
| 290 | 316 | break; |
| 291 | 317 | } |
| 292 | 318 | |