trunk/src/emu/cpu/dsp16/dsp16ops.c
| r20087 | r20088 | |
|---|
| 4 | 4 | // The YL register is the lower half of the 32 bit Y register |
| 5 | 5 | void* dsp16_device::addressYL() |
| 6 | 6 | { |
| 7 | | return (((UINT8*)&m_y)+0x4); |
| 7 | return (((UINT8*)&m_y) + 2); |
| 8 | 8 | } |
| 9 | 9 | |
| 10 | |
| 11 | void dsp16_device::writeRegister(void* reg, const UINT16 &value) |
| 12 | { |
| 13 | if (reg == &m_auc || reg == &m_c0 || reg == &m_c1 || reg == &m_c2) |
| 14 | { |
| 15 | *(UINT8*)reg = value & 0x00ff; // 8 bit registers |
| 16 | } |
| 17 | else if (reg == &m_i) |
| 18 | { |
| 19 | m_i = value & 0x0fff; // 12 bit register |
| 20 | } |
| 21 | else if (reg == &m_y) |
| 22 | { |
| 23 | //writeYxRegister(value); // TODO - check a flag to see if clearing yl is necessary |
| 24 | m_y = (value << 16) | (m_y & 0x0000ffff); // Temporary |
| 25 | } |
| 26 | else if (reg == addressYL()) |
| 27 | { |
| 28 | m_y = value | (m_y & 0xffff0000); // Temporary |
| 29 | } |
| 30 | else |
| 31 | { |
| 32 | *(UINT16*)reg = value; // The rest |
| 33 | } |
| 34 | } |
| 35 | |
| 36 | |
| 10 | 37 | void* dsp16_device::registerFromRTable(const UINT8 &R) |
| 11 | 38 | { |
| 12 | 39 | switch (R) |
| r20087 | r20088 | |
|---|
| 258 | 285 | const UINT8 R = (op & 0x03f0) >> 4; |
| 259 | 286 | const UINT16 iVal = opcode_read(1); |
| 260 | 287 | void* reg = registerFromRTable(R); |
| 261 | | if (reg == &m_auc || reg == &m_c0 || reg == &m_c1 || reg == &m_c2) |
| 262 | | { |
| 263 | | *(UINT8*)reg = iVal & 0x00ff; // 8 bit registers |
| 264 | | } |
| 265 | | else if (reg == &m_i) |
| 266 | | { |
| 267 | | *(UINT16*)reg = iVal & 0x0fff; // 12 bit register |
| 268 | | } |
| 269 | | else if (reg == &m_y || reg == addressYL()) |
| 270 | | { |
| 271 | | *(UINT16*)reg = iVal; // Temporary |
| 272 | | //writeYxRegister(iVal); // TODO |
| 273 | | } |
| 274 | | else |
| 275 | | { |
| 276 | | *(UINT16*)reg = iVal; // The rest |
| 277 | | } |
| 288 | writeRegister(reg, iVal); |
| 278 | 289 | |
| 279 | 290 | cycles = 2; |
| 280 | 291 | pcAdvance = 2; |