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r20062 Friday 4th January, 2013 at 16:21:35 UTC by smf
removed psx_state, all code shared between mame and mess is now in src/emu/ [smf]
[src/emu/cpu/psx]dma.c dma.h mdec.c mdec.h psx.c psx.h rcnt.c
[src/emu/sound]spu.c spu.h
[src/emu/video]psx.c psx.h
[src/mame]mame.mak
[src/mame/drivers]konamigq.c konamigv.c ksys573.c namcos10.c namcos11.c namcos12.c taitogn.c twinkle.c zn.c
[src/mame/includes]psx.h
[src/mame/machine]psx.c
[src/mess]mess.mak
[src/mess/drivers]psx.c
[src/mess/machine]psxcard.c psxcd.c psxcddrv.c

trunk/src/emu/video/psx.c
r20061r20062
77
88#include "emu.h"
99#include "video/psx.h"
10#include "includes/psx.h"
1110
1211#define VERBOSE_LEVEL ( 0 )
1312
r20061r20062
29382937   }
29392938}
29402939
2941void psxgpu_device::dma_write( UINT32 n_address, INT32 n_size )
2940void psxgpu_device::dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
29422941{
2943   psx_state *p_psx = machine().driver_data<psx_state>();
2944   UINT32 *p_n_psxram = p_psx->m_p_n_psxram;
2945
29462942   gpu_write( &p_n_psxram[ n_address / 4 ], n_size );
29472943}
29482944
r20061r20062
35783574}
35793575
35803576
3581void psxgpu_device::dma_read( UINT32 n_address, INT32 n_size )
3577void psxgpu_device::dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
35823578{
3583   psx_state *p_psx = machine().driver_data<psx_state>();
3584   UINT32 *p_n_psxram = p_psx->m_p_n_psxram;
3585
35863579   gpu_read( &p_n_psxram[ n_address / 4 ], n_size );
35873580}
35883581
trunk/src/emu/video/psx.h
r20061r20062
197197   UINT32 update_screen(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
198198   DECLARE_WRITE32_MEMBER( write );
199199   DECLARE_READ32_MEMBER( read );
200   void dma_read( UINT32 n_address, INT32 n_size );
201   void dma_write( UINT32 n_address, INT32 n_size );
200   void dma_read( UINT32 *ram, UINT32 n_address, INT32 n_size );
201   void dma_write( UINT32 *ram, UINT32 n_address, INT32 n_size );
202202   void lightgun_set( int, int );
203203   int vramSize;
204204   void vblank(screen_device &screen, bool vblank_state);
trunk/src/emu/sound/spu.c
r20061r20062
99#include "emu.h"
1010#include "spu.h"
1111#include "spureverb.h"
12#include "includes/psx.h"
1312
1413//
1514//
r20061r20062
30813080   }
30823081}
30833082
3084// MAME I/O stuff.  This can get cleaner when machine/psx.c does.
3085
3086void spu_device::dma_read( UINT32 n_address, INT32 n_size )
3083void spu_device::dma_read( UINT32 *p_n_ram, UINT32 n_address, INT32 n_size )
30873084{
3088   UINT8 *psxram = (UINT8 *)machine().root_device().memshare("share1")->ptr();
3085   UINT8 *psxram = (UINT8 *)p_n_ram;
30893086
30903087   start_dma(psxram + n_address, false, n_size*4);
30913088}
30923089
3093void spu_device::dma_write( UINT32 n_address, INT32 n_size )
3090void spu_device::dma_write( UINT32 *p_n_ram, UINT32 n_address, INT32 n_size )
30943091{
3095   UINT8 *psxram = (UINT8 *)machine().root_device().memshare("share1")->ptr();
3092   UINT8 *psxram = (UINT8 *)p_n_ram;
30963093
30973094//  printf("SPU DMA write from %x, size %x\n", n_address, n_size);
30983095
trunk/src/emu/sound/spu.h
r20061r20062
220220   // static configuration helpers
221221   template<class _Object> static devcb2_base &set_irq_handler(device_t &device, _Object object) { return downcast<spu_device &>(device).m_irq_handler.set_callback(object); }
222222
223   void dma_read( UINT32 n_address, INT32 n_size );
224   void dma_write( UINT32 n_address, INT32 n_size );
223   void dma_read( UINT32 *ram, UINT32 n_address, INT32 n_size );
224   void dma_write( UINT32 *ram, UINT32 n_address, INT32 n_size );
225225
226226   void reinit_sound();
227227   void kill_sound();
trunk/src/emu/cpu/psx/dma.c
r20061r20062
77
88#include "emu.h"
99#include "dma.h"
10#include "includes/psx.h"
1110
1211#define VERBOSE_LEVEL ( 0 )
1312
r20061r20062
3635{
3736   int n;
3837
39   n_dpcp = 0;
40   n_dicr = 0;
38   m_dpcp = 0;
39   m_dicr = 0;
4140
4241   for( n = 0; n < 7; n++ )
4342   {
r20061r20062
6160
6261   for( int index = 0; index < 7; index++ )
6362   {
64      psx_dma_channel *dma = &channel[ index ];
63      psx_dma_channel *dma = &m_channel[ index ];
6564
6665      dma->timer = machine().scheduler().timer_alloc( timer_expired_delegate( FUNC( psxdma_device::dma_finished_callback ), this) );
6766
r20061r20062
7271      machine().save().save_item( "psxdma", tag(), index, NAME( dma->b_running ) );
7372   }
7473
75   save_item( NAME(n_dpcp) );
76   save_item( NAME(n_dicr) );
74   save_item( NAME(m_dpcp) );
75   save_item( NAME(m_dicr) );
76
77   /// TODO: access ram through the memory map
78   memory_share *share = machine().root_device().memshare("share1");
79   m_ram = (UINT32 *)share->ptr();
80   m_ramsize = share->bytes();
7781}
7882
7983void psxdma_device::dma_start_timer( int index, UINT32 n_ticks )
8084{
81   psx_dma_channel *dma = &channel[ index ];
85   psx_dma_channel *dma = &m_channel[ index ];
8286
8387   dma->timer->adjust( attotime::from_hz(33868800) * n_ticks, index);
8488   dma->n_ticks = n_ticks;
r20061r20062
8791
8892void psxdma_device::dma_stop_timer( int index )
8993{
90   psx_dma_channel *dma = &channel[ index ];
94   psx_dma_channel *dma = &m_channel[ index ];
9195
9296   dma->timer->adjust( attotime::never);
9397   dma->b_running = 0;
r20061r20062
9599
96100void psxdma_device::dma_timer_adjust( int index )
97101{
98   psx_dma_channel *dma = &channel[ index ];
102   psx_dma_channel *dma = &m_channel[ index ];
99103
100104   if( dma->b_running )
101105   {
r20061r20062
112116   int n_int;
113117   int n_mask;
114118
115   n_int = ( n_dicr >> 24 ) & 0x7f;
116   n_mask = ( n_dicr >> 16 ) & 0xff;
119   n_int = ( m_dicr >> 24 ) & 0x7f;
120   n_mask = ( m_dicr >> 16 ) & 0xff;
117121
118122   if( ( n_mask & 0x80 ) != 0 && ( n_int & n_mask ) != 0 )
119123   {
120124      verboselog( machine(), 2, "dma_interrupt_update( %02x, %02x ) interrupt triggered\n", n_int, n_mask );
121      n_dicr |= 0x80000000;
125      m_dicr |= 0x80000000;
122126      m_irq_handler(1);
123127   }
124128   else if( n_int != 0 )
125129   {
126130      verboselog( machine(), 2, "dma_interrupt_update( %02x, %02x ) interrupt not enabled\n", n_int, n_mask );
127131   }
128   n_dicr &= 0x00ffffff | ( n_dicr << 8 );
132   m_dicr &= 0x00ffffff | ( m_dicr << 8 );
129133}
130134
131135void psxdma_device::dma_finished( int index )
132136{
133   psx_state *p_psx = machine().driver_data<psx_state>();
134   UINT32 *p_n_psxram = p_psx->m_p_n_psxram;
137   psx_dma_channel *dma = &m_channel[ index ];
135138
136   psx_dma_channel *dma = &channel[ index ];
137
138139   if( dma->n_channelcontrol == 0x01000401 && index == 2 )
139140   {
140141      UINT32 n_size;
141142      UINT32 n_total;
142143      UINT32 n_address = ( dma->n_base & 0xffffff );
143      UINT32 n_adrmask = p_psx->m_n_psxramsize - 1;
144      UINT32 n_adrmask = m_ramsize - 1;
144145      UINT32 n_nextaddress;
145146
146147      if( n_address != 0xffffff )
r20061r20062
165166               return;
166167            }
167168            n_address &= n_adrmask;
168            n_nextaddress = p_n_psxram[ n_address / 4 ];
169            n_nextaddress = m_ram[ n_address / 4 ];
169170            n_size = n_nextaddress >> 24;
170            dma->fn_write( n_address + 4, n_size );
171            dma->fn_write( m_ram, n_address + 4, n_size );
171172            //FIXME:
172173            // The following conditions will cause an endless loop.
173174            // If stopping the transfer is correct I cannot judge
r20061r20062
175176            // the hardware.
176177            // Mametesters.org: psyforce0105u5red, raystorm0111u1red
177178            if ((n_nextaddress & 0xffffff) != 0xffffff)
178               if (n_address == p_n_psxram[ (n_nextaddress & 0xffffff) / 4])
179               if (n_address == m_ram[ (n_nextaddress & 0xffffff) / 4])
179180                  break;
180181            if (n_address == (n_nextaddress & 0xffffff) )
181182               break;
r20061r20062
188189
189190   dma->n_channelcontrol &= ~( ( 1L << 0x18 ) | ( 1L << 0x1c ) );
190191
191   n_dicr |= 1 << ( 24 + index );
192   m_dicr |= 1 << ( 24 + index );
192193   dma_interrupt_update();
193194   dma_stop_timer( index );
194195}
r20061r20062
200201
201202void psxdma_device::install_read_handler( int index, psx_dma_read_delegate p_fn_dma_read )
202203{
203   channel[ index ].fn_read = p_fn_dma_read;
204   m_channel[ index ].fn_read = p_fn_dma_read;
204205}
205206
206207void psxdma_device::install_write_handler( int index, psx_dma_read_delegate p_fn_dma_write )
207208{
208   channel[ index ].fn_write = p_fn_dma_write;
209   m_channel[ index ].fn_write = p_fn_dma_write;
209210}
210211
211212WRITE32_MEMBER( psxdma_device::write )
212213{
213   psx_state *p_psx = machine().driver_data<psx_state>();
214
215   UINT32 *p_n_psxram = p_psx->m_p_n_psxram;
216214   int index = offset / 4;
217   psx_dma_channel *dma = &channel[ index ];
215   psx_dma_channel *dma = &m_channel[ index ];
218216
219217   if( index < 7 )
220218   {
r20061r20062
231229      case 2:
232230         verboselog( machine(), 2, "dmachannelcontrol( %d ) = %08x\n", index, data );
233231         dma->n_channelcontrol = data;
234         if( ( dma->n_channelcontrol & ( 1L << 0x18 ) ) != 0 && ( n_dpcp & ( 1 << ( 3 + ( index * 4 ) ) ) ) != 0 )
232         if( ( dma->n_channelcontrol & ( 1L << 0x18 ) ) != 0 && ( m_dpcp & ( 1 << ( 3 + ( index * 4 ) ) ) ) != 0 )
235233         {
236234            INT32 n_size;
237235            UINT32 n_address;
238236            UINT32 n_nextaddress;
239237            UINT32 n_adrmask;
240238
241            n_adrmask = p_psx->m_n_psxramsize - 1;
239            n_adrmask = m_ramsize - 1;
242240
243241            n_address = ( dma->n_base & n_adrmask );
244242            n_size = dma->n_blockcontrol;
r20061r20062
257255               !dma->fn_read.isnull() )
258256            {
259257               verboselog( machine(), 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
260               dma->fn_read( n_address, n_size );
258               dma->fn_read( m_ram, n_address, n_size );
261259               dma_finished( index );
262260            }
263261            else if (dma->n_channelcontrol == 0x11000000 &&   // CD DMA
r20061r20062
270268               oursize = (oursize > 1) ? oursize : 1;
271269               oursize *= (dma->n_blockcontrol&0xffff);
272270
273               dma->fn_read( n_address, oursize );
271               dma->fn_read( m_ram, n_address, oursize );
274272               dma_finished( index );
275273            }
276274            else if( dma->n_channelcontrol == 0x01000200 &&
277275               !dma->fn_read.isnull() )
278276            {
279277               verboselog( machine(), 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
280               dma->fn_read( n_address, n_size );
278               dma->fn_read( m_ram, n_address, n_size );
281279               if( index == 1 )
282280               {
283281                  dma_start_timer( index, 26000 );
r20061r20062
291289               !dma->fn_write.isnull() )
292290            {
293291               verboselog( machine(), 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
294               dma->fn_write( n_address, n_size );
292               dma->fn_write( m_ram, n_address, n_size );
295293               dma_finished( index );
296294            }
297295            else if( dma->n_channelcontrol == 0x11050100 &&
r20061r20062
299297            {
300298               /* todo: check this is a write not a read... */
301299               verboselog( machine(), 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
302               dma->fn_write( n_address, n_size );
300               dma->fn_write( m_ram, n_address, n_size );
303301               dma_finished( index );
304302            }
305303            else if( dma->n_channelcontrol == 0x11150100 &&
r20061r20062
307305            {
308306               /* todo: check this is a write not a read... */
309307               verboselog( machine(), 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
310               dma->fn_write( n_address, n_size );
308               dma->fn_write( m_ram, n_address, n_size );
311309               dma_finished( index );
312310            }
313311            else if( dma->n_channelcontrol == 0x01000401 &&
r20061r20062
330328                  while( n_size > 0 )
331329                  {
332330                     n_nextaddress = ( n_address - 4 ) & 0xffffff;
333                     p_n_psxram[ n_address / 4 ] = n_nextaddress;
331                     m_ram[ n_address / 4 ] = n_nextaddress;
334332                     n_address = n_nextaddress;
335333                     n_size--;
336334                  }
337                  p_n_psxram[ n_address / 4 ] = 0xffffff;
335                  m_ram[ n_address / 4 ] = 0xffffff;
338336               }
339337               dma_start_timer( index, 2150 );
340338            }
r20061r20062
359357      {
360358      case 0x0:
361359         verboselog( machine(), 1, "psx_dma_w( %04x, %08x, %08x ) dpcp\n", offset, data, mem_mask );
362         n_dpcp = ( n_dpcp & ~mem_mask ) | data;
360         m_dpcp = ( m_dpcp & ~mem_mask ) | data;
363361         break;
364362      case 0x1:
365363
366         n_dicr = ( n_dicr & ( 0x80000000 | ~mem_mask ) ) |
367            ( n_dicr & ~data & 0x7f000000 & mem_mask ) |
364         m_dicr = ( m_dicr & ( 0x80000000 | ~mem_mask ) ) |
365            ( m_dicr & ~data & 0x7f000000 & mem_mask ) |
368366            ( data & 0x00ffffff & mem_mask );
369367
370         if( ( n_dicr & 0x80000000 ) != 0 && ( n_dicr & 0x7f000000 ) == 0 )
368         if( ( m_dicr & 0x80000000 ) != 0 && ( m_dicr & 0x7f000000 ) == 0 )
371369         {
372370            verboselog( machine(), 2, "dma interrupt cleared\n" );
373            n_dicr &= ~0x80000000;
371            m_dicr &= ~0x80000000;
374372         }
375373
376         verboselog( machine(), 1, "psx_dma_w( %04x, %08x, %08x ) dicr -> %08x\n", offset, data, mem_mask, n_dicr );
374         verboselog( machine(), 1, "psx_dma_w( %04x, %08x, %08x ) dicr -> %08x\n", offset, data, mem_mask, m_dicr );
377375         break;
378376      default:
379377         verboselog( machine(), 0, "psx_dma_w( %04x, %08x, %08x ) Unknown dma control register\n", offset, data, mem_mask );
r20061r20062
385383READ32_MEMBER( psxdma_device::read )
386384{
387385   int index = offset / 4;
388   psx_dma_channel *dma = &channel[ index ];
386   psx_dma_channel *dma = &m_channel[ index ];
389387
390388   if( index < 7 )
391389   {
r20061r20062
410408      switch( offset % 4 )
411409      {
412410      case 0x0:
413         verboselog( machine(), 1, "psx_dma_r dpcp ( %08x )\n", n_dpcp );
414         return n_dpcp;
411         verboselog( machine(), 1, "psx_dma_r dpcp ( %08x )\n", m_dpcp );
412         return m_dpcp;
415413      case 0x1:
416         verboselog( machine(), 1, "psx_dma_r dicr ( %08x )\n", n_dicr );
417         return n_dicr;
414         verboselog( machine(), 1, "psx_dma_r dicr ( %08x )\n", m_dicr );
415         return m_dicr;
418416      default:
419417         verboselog( machine(), 0, "psx_dma_r( %08x, %08x ) Unknown dma control register\n", offset, mem_mask );
420418         break;
trunk/src/emu/cpu/psx/dma.h
r20061r20062
1717#define MCFG_PSX_DMA_IRQ_HANDLER(_devcb) \
1818   devcb = &psxdma_device::set_irq_handler(*device, DEVCB2_##_devcb);
1919
20typedef delegate<void (UINT32, INT32)> psx_dma_read_delegate;
21typedef delegate<void (UINT32, INT32)> psx_dma_write_delegate;
20typedef delegate<void (UINT32 *, UINT32, INT32)> psx_dma_read_delegate;
21typedef delegate<void (UINT32 *, UINT32, INT32)> psx_dma_write_delegate;
2222
2323struct psx_dma_channel
2424{
r20061r20062
6161   void write( offs_t offset, UINT32 data, UINT32 mem_mask );
6262   UINT32 read( offs_t offset, UINT32 mem_mask );
6363
64   psx_dma_channel channel[7];
65   UINT32 n_dpcp;
66   UINT32 n_dicr;
64   psx_dma_channel m_channel[7];
65   UINT32 m_dpcp;
66   UINT32 m_dicr;
67   UINT32 *m_ram;
68   size_t m_ramsize;
6769
6870   devcb2_write_line m_irq_handler;
6971};
trunk/src/emu/cpu/psx/rcnt.c
r20061r20062
66 */
77
88#include "rcnt.h"
9#include "includes/psx.h"
109
1110#define VERBOSE_LEVEL ( 0 )
1211
trunk/src/emu/cpu/psx/mdec.c
r20061r20062
1010#include "emu.h"
1111#include "dma.h"
1212#include "mdec.h"
13#include "includes/psx.h"
1413
1514#define VERBOSE_LEVEL ( 0 )
1615
r20061r20062
170169   return ( ( (INT32)n_packed ) << 22 ) >> 22;
171170}
172171
173UINT32 psxmdec_device::mdec_unpack( UINT32 n_address )
172UINT32 psxmdec_device::mdec_unpack( UINT32 *p_n_psxram, UINT32 n_address )
174173{
175   psx_state *p_psx = machine().driver_data<psx_state>();
176   UINT32 *p_n_psxram = p_psx->m_p_n_psxram;
177
178174   UINT8 n_z;
179175   INT32 n_qscale;
180176   UINT16 n_packed;
r20061r20062
422418   n_decoded = ( 24 * 16 ) / 2;
423419}
424420
425void psxmdec_device::dma_write( UINT32 n_address, INT32 n_size )
421void psxmdec_device::dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
426422{
427   psx_state *p_psx = machine().driver_data<psx_state>();
428   UINT32 *p_n_psxram = p_psx->m_p_n_psxram;
429423   int n_index;
430424
431425   verboselog( machine(), 2, "mdec0_write( %08x, %08x )\n", n_address, n_size );
r20061r20062
481475   }
482476}
483477
484void psxmdec_device::dma_read( UINT32 n_address, INT32 n_size )
478void psxmdec_device::dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
485479{
486   psx_state *p_psx = machine().driver_data<psx_state>();
487   UINT32 *p_n_psxram = p_psx->m_p_n_psxram;
488480   UINT32 n_this;
489481   UINT32 n_nextaddress;
490482
r20061r20062
502494               break;
503495            }
504496
505            n_nextaddress = mdec_unpack( n_0_address );
497            n_nextaddress = mdec_unpack( p_n_psxram, n_0_address );
506498            n_0_size -= n_nextaddress - n_0_address;
507499            n_0_address = n_nextaddress;
508500
trunk/src/emu/cpu/psx/psx.c
r20061r20062
6464#include "emu.h"
6565#include "debugger.h"
6666#include "psx.h"
67#include "dma.h"
68#include "irq.h"
6967#include "mdec.h"
7068#include "rcnt.h"
71#include "sio.h"
72#include "includes/psx.h"
7369#include "sound/spu.h"
7470
7571#define LOG_BIOSCALL ( 0 )
r20061r20062
15301526   AM_RANGE(0x1f801000, 0x1f80101f) AM_RAM
15311527   /* 1f801014 spu delay */
15321528   /* 1f801018 dv delay */
1533   AM_RANGE(0x1f801020, 0x1f801023) AM_READWRITE_LEGACY( psx_com_delay_r, psx_com_delay_w )
1529   AM_RANGE(0x1f801020, 0x1f801023) AM_READWRITE( com_delay_r, com_delay_w )
15341530   AM_RANGE(0x1f801024, 0x1f80102f) AM_RAM
15351531   AM_RANGE(0x1f801040, 0x1f80104f) AM_DEVREADWRITE( "sio0", psxsio_device, read, write )
15361532   AM_RANGE(0x1f801050, 0x1f80105f) AM_DEVREADWRITE( "sio1", psxsio_device, read, write )
r20061r20062
15591555   AM_RANGE(0x1f800000, 0x1f8003ff) AM_NOP /* scratchpad */
15601556   AM_RANGE(0x1f800400, 0x1f800fff) AM_READWRITE( berr_r, berr_w )
15611557   AM_RANGE(0x1f801000, 0x1f80101f) AM_RAM
1562   AM_RANGE(0x1f801020, 0x1f801023) AM_READWRITE_LEGACY( psx_com_delay_r, psx_com_delay_w )
1558   AM_RANGE(0x1f801020, 0x1f801023) AM_READWRITE( com_delay_r, com_delay_w )
15631559   AM_RANGE(0x1f801024, 0x1f80102f) AM_RAM
15641560   AM_RANGE(0x1f801040, 0x1f80104f) AM_DEVREADWRITE( "sio0", psxsio_device, read, write )
15651561   AM_RANGE(0x1f801050, 0x1f80105f) AM_DEVREADWRITE( "sio1", psxsio_device, read, write )
r20061r20062
31773173   m_gpu_write_handler( space, offset, data, mem_mask );
31783174}
31793175
3176WRITE32_HANDLER( psxcpu_device::com_delay_w )
3177{
3178   COMBINE_DATA( &m_com_delay );
3179   //verboselog( p_psx, 1, "psx_com_delay_w( %08x %08x )\n", data, mem_mask );
3180}
3181
3182READ32_HANDLER( psxcpu_device::com_delay_r )
3183{
3184   //verboselog( p_psx, 1, "psx_com_delay_r( %08x )\n", mem_mask );
3185   return m_com_delay;
3186}
3187
31803188static MACHINE_CONFIG_FRAGMENT( psx )
31813189   MCFG_DEVICE_ADD("irq", PSX_IRQ, 0)
31823190   MCFG_PSX_IRQ_HANDLER(INPUTLINE(DEVICE_SELF, PSXCPU_IRQ0))
trunk/src/emu/cpu/psx/mdec.h
r20061r20062
2727   DECLARE_WRITE32_MEMBER( write );
2828   DECLARE_READ32_MEMBER( read );
2929
30   void dma_write( UINT32 n_address, INT32 n_size );
31   void dma_read( UINT32 n_address, INT32 n_size );
30   void dma_write( UINT32 *ram, UINT32 n_address, INT32 n_size );
31   void dma_read( UINT32 *ram, UINT32 n_address, INT32 n_size );
3232
3333protected:
3434   virtual void device_start();
r20061r20062
3838private:
3939   void mdec_cos_precalc();
4040   void mdec_idct( INT32 *p_n_src, INT32 *p_n_dst );
41   UINT32 mdec_unpack( UINT32 n_address );
41   UINT32 mdec_unpack( UINT32 *ram, UINT32 n_address );
4242   UINT16 mdec_clamp_r5( INT32 n_r ) const;
4343   UINT16 mdec_clamp_g5( INT32 n_g ) const;
4444   UINT16 mdec_clamp_b5( INT32 n_b ) const;
trunk/src/emu/cpu/psx/psx.h
r20061r20062
1010#ifndef __PSXCPU_H__
1111#define __PSXCPU_H__
1212
13#include "dma.h"
1314#include "gte.h"
14#include "dma.h"
15#include "irq.h"
1516#include "sio.h"
16#include "includes/psx.h"
1717
1818//**************************************************************************
1919//  CONSTANTS
r20061r20062
142142   DECLARE_WRITE32_MEMBER( gpu_w );
143143   DECLARE_READ32_MEMBER( gpu_r );
144144
145   DECLARE_WRITE32_MEMBER( com_delay_w );
146   DECLARE_READ32_MEMBER( com_delay_r );
147
145148   static psxcpu_device *getcpu( device_t &device, const char *cputag );
146149
147150protected:
r20061r20062
196199
197200   // other internal states
198201    int m_icount;
202   UINT32 m_com_delay;
199203   UINT32 m_delayv;
200204   UINT32 m_delayr;
201205   UINT32 m_berr;
trunk/src/mess/drivers/psx.c
r20061r20062
1212#include "video/psx.h"
1313#include "imagedev/snapquik.h"
1414#include "imagedev/chd_cd.h"
15#include "includes/psx.h"
1615#include "sound/spu.h"
1716#include "debugger.h"
1817#include "zlib.h"
r20061r20062
2019#include "machine/psxcard.h"
2120#include "machine/psxcport.h"
2221
23class psx1_state : public psx_state
22class psx1_state : public driver_device
2423{
2524public:
2625   psx1_state(const machine_config &mconfig, device_type type, const char *tag)
27      : psx_state(mconfig, type, tag) { }
26      : driver_device(mconfig, type, tag)
27   {
28   }
2829
2930   UINT8 *m_exe_buffer;
3031   int m_exe_size;
r20061r20062
7677
7778static int load_psxexe( device_t *cpu, unsigned char *p_n_file, int n_len )
7879{
79   psx_state *state = cpu->machine().driver_data<psx_state>();
8080   struct PSXEXE_HEADER
8181   {
8282      UINT8 id[ 8 ];
r20061r20062
138138      logerror( "psx_exe_load: sp    %08x\n", psxexe_header->s_addr );
139139      logerror( "psx_exe_load: len   %08x\n", psxexe_header->s_size );
140140
141      p_ram = (UINT8 *)state->m_p_n_psxram;
142      n_ram = state->m_n_psxramsize;
141      memory_share *share = cpu->machine().root_device().memshare("share1");
142      p_ram = (UINT8 *)share->ptr();
143      n_ram = share->bytes();
143144
144145      p_psxexe = p_n_file + sizeof( struct PSXEXE_HEADER );
145146
r20061r20062
212213
213214static int load_cpe( device_t *cpu, unsigned char *p_n_file, int n_len )
214215{
215   psx_state *state = cpu->machine().driver_data<psx_state>();
216216   if( n_len >= 4 &&
217217      memcmp( p_n_file, "CPE\001", 4 ) == 0 )
218218   {
r20061r20062
242242                  ( (int)p_n_file[ n_offset + 6 ] << 16 ) |
243243                  ( (int)p_n_file[ n_offset + 7 ] << 24 );
244244
245               UINT8 *p_ram = (UINT8 *)state->m_p_n_psxram;
246               UINT32 n_ram = state->m_n_psxramsize;
245               memory_share *share = cpu->machine().root_device().memshare("share1");
246               UINT8 *p_ram = (UINT8 *)share->ptr();
247               UINT32 n_ram = share->bytes();
247248
248249               n_offset += 8;
249250
r20061r20062
465466
466467/* ----------------------------------------------------------------------- */
467468
468static void cd_dma_read( psxcd_device *psxcd, UINT32 n_address, INT32 n_size )
469static void cd_dma_read( psxcd_device *psxcd, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
469470{
470   UINT8 *psxram = (UINT8 *)psxcd->machine().root_device().memshare("share1")->ptr();
471   UINT8 *psxram = (UINT8 *) p_n_psxram;
471472
472473   psxcd->start_dma(psxram + n_address, n_size*4);
473474}
474475
475static void cd_dma_write( psxcd_device *psxcd, UINT32 n_address, INT32 n_size )
476static void cd_dma_write( psxcd_device *psxcd, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
476477{
477478   printf("cd_dma_write?!: addr %x, size %x\n", n_address, n_size);
478479}
r20061r20062
500501   AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
501502   AM_RANGE(0xa0000000, 0xa01fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
502503   AM_RANGE(0xbfc00000, 0xbfc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
503   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
504504ADDRESS_MAP_END
505505
506506DRIVER_INIT_MEMBER(psx1_state,psx)
507507{
508   psx_driver_init(machine());
509508}
510509
511510static INPUT_PORTS_START( psx )
trunk/src/mess/mess.mak
r20061r20062
479479   $(MAME_VIDEO)/neogeo.o      \
480480   $(MAME_MACHINE)/neoprot.o   \
481481   $(MAME_MACHINE)/neocrypt.o   \
482   $(MAME_MACHINE)/psx.o      \
483482   $(MAME_DRIVERS)/cdi.o      \
484483   $(MAME_MACHINE)/cdi070.o   \
485484   $(MAME_MACHINE)/cdicdic.o   \
trunk/src/mess/machine/psxcard.c
r20061r20062
77
88#include "emu.h"
99#include "psxcard.h"
10#include "includes/psx.h"
1110
1211//
1312//
trunk/src/mess/machine/psxcd.c
r20061r20062
11#include "emu.h"
2#include "includes/psx.h"
32#include "psxcd.h"
43#include "sound/spu.h"
54#include "debugger.h"
trunk/src/mess/machine/psxcddrv.c
r20061r20062
11#include "emu.h"
2#include "includes/psx.h"
32#include "psxcd.h"
43#include "psxcddrv.h"
54
trunk/src/mame/drivers/twinkle.c
r20061r20062
230230#include "cpu/psx/psx.h"
231231#include "cpu/m68000/m68000.h"
232232#include "video/psx.h"
233#include "includes/psx.h"
234233#include "machine/scsibus.h"
235234#include "machine/scsicd.h"
236235#include "machine/am53cf96.h"
r20061r20062
241240#include "sound/cdda.h"
242241#include "sound/rf5c400.h"
243242
244class twinkle_state : public psx_state
243class twinkle_state : public driver_device
245244{
246245public:
247246   twinkle_state(const machine_config &mconfig, device_type type, const char *tag)
248      : psx_state(mconfig, type, tag),
247      : driver_device(mconfig, type, tag),
249248      m_am53cf96(*this, "scsi:am53cf96"){ }
250249
251250   required_device<am53cf96_device> m_am53cf96;
r20061r20062
652651   AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
653652   AM_RANGE(0xa0000000, 0xa03fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
654653   AM_RANGE(0xbfc00000, 0xbfc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
655   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
656654ADDRESS_MAP_END
657655
658656/* SPU board */
r20061r20062
768766
769767/* SCSI */
770768
771static void scsi_dma_read( twinkle_state *state, UINT32 n_address, INT32 n_size )
769static void scsi_dma_read( twinkle_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
772770{
773   UINT32 *p_n_psxram = state->m_p_n_psxram;
774
775771   int i;
776772   int n_this;
777773
r20061r20062
813809   }
814810}
815811
816static void scsi_dma_write( twinkle_state *state, UINT32 n_address, INT32 n_size )
812static void scsi_dma_write( twinkle_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
817813{
818   UINT32 *p_n_psxram = state->m_p_n_psxram;
819
820814   int i;
821815   int n_this;
822816
r20061r20062
850844
851845DRIVER_INIT_MEMBER(twinkle_state,twinkle)
852846{
853   psx_driver_init(machine());
854
855847   device_t *i2cmem = machine().device("security");
856848   i2cmem_e0_write( i2cmem, 0 );
857849   i2cmem_e1_write( i2cmem, 0 );
trunk/src/mame/drivers/ksys573.c
r20061r20062
482482#include "cdrom.h"
483483#include "cpu/psx/psx.h"
484484#include "video/psx.h"
485#include "includes/psx.h"
486485#include "machine/intelfsh.h"
487486#include "machine/cr589.h"
488487#include "machine/timekpr.h"
r20061r20062
529528#define MAX_TRANSFER_SIZE ( 63488 )
530529
531530
532class ksys573_state : public psx_state
531class ksys573_state : public driver_device
533532{
534533public:
535534   ksys573_state(const machine_config &mconfig, device_type type, const char *tag) :
536      psx_state(mconfig, type, tag),
535      driver_device(mconfig, type, tag),
537536      m_psxirq(*this, ":maincpu:irq"),
538537      m_cr589(*this, ":cdrom")
539538   {
r20061r20062
593592   int m_hyperbbc_lamp_strobe1;
594593   int m_hyperbbc_lamp_strobe2;
595594
595   UINT32 *m_p_n_psxram;
596
596597   /* memory */
597598   UINT8 m_atapi_regs[ATAPI_REG_MAX];
598599   UINT8 m_atapi_data[ATAPI_DATA_SIZE];
r20061r20062
12331234   }
12341235}
12351236
1236static void cdrom_dma_read( ksys573_state *state, UINT32 n_address, INT32 n_size )
1237static void cdrom_dma_read( ksys573_state *state, UINT32 *ram, UINT32 n_address, INT32 n_size )
12371238{
12381239   verboselog( state->machine(), 2, "cdrom_dma_read( %08x, %08x )\n", n_address, n_size );
12391240//  mame_printf_debug("DMA read: address %08x size %08x\n", n_address, n_size);
12401241}
12411242
1242static void cdrom_dma_write( ksys573_state *state, UINT32 n_address, INT32 n_size )
1243static void cdrom_dma_write( ksys573_state *state, UINT32 *ram, UINT32 n_address, INT32 n_size )
12431244{
1245   state->m_p_n_psxram = ram;
1246
12441247   verboselog( state->machine(), 2, "cdrom_dma_write( %08x, %08x )\n", n_address, n_size );
12451248//  mame_printf_debug("DMA write: address %08x size %08x\n", n_address, n_size);
12461249
r20061r20062
13641367   AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
13651368   AM_RANGE(0xa0000000, 0xa03fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
13661369   AM_RANGE(0xbfc00000, 0xbfc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
1367   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
13681370ADDRESS_MAP_END
13691371
13701372
r20061r20062
14241426
14251427DRIVER_INIT_MEMBER(ksys573_state,konami573)
14261428{
1427   psx_driver_init(machine());
14281429   atapi_init(machine());
14291430
14301431   save_item( NAME(m_n_security_control) );
r20061r20062
14411442
14421443void sys573_vblank(ksys573_state *state, screen_device &screen, bool vblank_state)
14431444{
1444   UINT32 *p_n_psxram = state->m_p_n_psxram;
1445
14461445   update_mode(state->machine());
14471446
1447   /// TODO: emulate the memory controller board
14481448   if( strcmp( state->machine().system().name, "ddr2ml" ) == 0 )
14491449   {
14501450      /* patch out security-plate error */
14511451
1452      UINT32 *p_n_psxram = (UINT32 *)state->machine().root_device().memshare("share1")->ptr();
1453
14521454      /* install cd */
14531455
14541456      /* 801e1540: jal $801e1f7c */
r20061r20062
14711473   {
14721474      /* patch out security-plate error */
14731475
1476      UINT32 *p_n_psxram = (UINT32 *)state->machine().root_device().memshare("share1")->ptr();
14741477      /* 8001f850: jal $8003221c */
14751478      if( p_n_psxram[ 0x1f850 / 4 ] == 0x0c00c887 )
14761479      {
trunk/src/mame/drivers/namcos11.c
r20061r20062
273273#include "cpu/psx/psx.h"
274274#include "cpu/m37710/m37710.h"
275275#include "video/psx.h"
276#include "includes/psx.h"
277276#include "machine/at28c16.h"
278277#include "sound/c352.h"
279278
280279#define C76_SPEEDUP   ( 1 ) /* sound cpu idle skipping */
281280#define VERBOSE_LEVEL ( 0 )
282281
283class namcos11_state : public psx_state
282class namcos11_state : public driver_device
284283{
285284public:
286285   namcos11_state(const machine_config &mconfig, device_type type, const char *tag)
287      : psx_state(mconfig, type, tag),
286      : driver_device(mconfig, type, tag),
288287      m_sharedram(*this,"sharedram"),
289288      m_keycus(*this,"keycus"),
290289      m_maincpu(*this,"maincpu"),
r20061r20062
740739   AM_RANGE(0x9fc00000, 0x9fffffff) AM_ROM AM_SHARE("share2") /* bios mirror */
741740   AM_RANGE(0xa0000000, 0xa03fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
742741   AM_RANGE(0xbfc00000, 0xbfffffff) AM_ROM AM_SHARE("share2") /* bios mirror */
743   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
744742ADDRESS_MAP_END
745743
746744READ16_MEMBER(namcos11_state::c76_shared_r)
r20061r20062
876874static void namcos11_init_common(running_machine &machine, int n_daughterboard)
877875{
878876   namcos11_state *state = machine.driver_data<namcos11_state>();
879   psx_driver_init(machine);
880877
881878   // C76 idle skipping, large speedboost
882879   if (C76_SPEEDUP)
trunk/src/mame/drivers/taitogn.c
r20061r20062
320320#include "emu.h"
321321#include "cpu/psx/psx.h"
322322#include "video/psx.h"
323#include "includes/psx.h"
324323#include "machine/at28c16.h"
325324#include "machine/intelfsh.h"
326325#include "machine/znsec.h"
r20061r20062
330329#include "sound/spu.h"
331330#include "audio/taito_zm.h"
332331
333class taitogn_state : public psx_state
332class taitogn_state : public driver_device
334333{
335334public:
336335   taitogn_state(const machine_config &mconfig, device_type type, const char *tag) :
337      psx_state(mconfig, type, tag),
336      driver_device(mconfig, type, tag),
338337      m_znsec0(*this,"maincpu:sio0:znsec0"),
339338      m_znsec1(*this,"maincpu:sio0:znsec1"),
340339      m_zndip(*this,"maincpu:sio0:zndip")
r20061r20062
768767   m_sndflash[1] = machine().device<intel_te28f160_device>("sndflash1");
769768   m_sndflash[2] = machine().device<intel_te28f160_device>("sndflash2");
770769
771   psx_driver_init(machine());
772770   m_znsec0->init(tt10);
773771   m_znsec1->init(tt16);
774772
r20061r20062
828826   AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
829827   AM_RANGE(0xa0000000, 0xa03fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
830828   AM_RANGE(0xbfc00000, 0xbfc7ffff) AM_WRITENOP AM_ROM AM_SHARE("share2") /* bios mirror */
831   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
832829ADDRESS_MAP_END
833830
834831
trunk/src/mame/drivers/konamigv.c
r20061r20062
122122#include "cdrom.h"
123123#include "cpu/psx/psx.h"
124124#include "video/psx.h"
125#include "includes/psx.h"
126125#include "machine/eeprom.h"
127126#include "machine/intelfsh.h"
128127#include "machine/scsibus.h"
r20061r20062
131130#include "sound/spu.h"
132131#include "sound/cdda.h"
133132
134class konamigv_state : public psx_state
133class konamigv_state : public driver_device
135134{
136135public:
137136   konamigv_state(const machine_config &mconfig, device_type type, const char *tag)
138      : psx_state(mconfig, type, tag),
137      : driver_device(mconfig, type, tag),
139138      m_am53cf96(*this, "scsi:am53cf96"){ }
140139
141140   required_device<am53cf96_device> m_am53cf96;
r20061r20062
207206   AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
208207   AM_RANGE(0xa0000000, 0xa01fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
209208   AM_RANGE(0xbfc00000, 0xbfc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
210   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
211209ADDRESS_MAP_END
212210
213211/* SCSI */
214212
215static void scsi_dma_read( konamigv_state *state, UINT32 n_address, INT32 n_size )
213static void scsi_dma_read( konamigv_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
216214{
217   UINT32 *p_n_psxram = state->m_p_n_psxram;
218215   UINT8 *sector_buffer = state->m_sector_buffer;
219216   int i;
220217   int n_this;
r20061r20062
257254   }
258255}
259256
260static void scsi_dma_write( konamigv_state *state, UINT32 n_address, INT32 n_size )
257static void scsi_dma_write( konamigv_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
261258{
262   UINT32 *p_n_psxram = state->m_p_n_psxram;
263259   UINT8 *sector_buffer = state->m_sector_buffer;
264260   int i;
265261   int n_this;
r20061r20062
294290
295291DRIVER_INIT_MEMBER(konamigv_state,konamigv)
296292{
297   psx_driver_init(machine());
298293}
299294
300295MACHINE_START_MEMBER(konamigv_state,konamigv)
trunk/src/mame/drivers/namcos10.c
r20061r20062
267267#include "emu.h"
268268#include "cpu/psx/psx.h"
269269#include "video/psx.h"
270#include "includes/psx.h"
271270
272class namcos10_state : public psx_state
271class namcos10_state : public driver_device
273272{
274273public:
275274   namcos10_state(const machine_config &mconfig, device_type type, const char *tag)
276      : psx_state(mconfig, type, tag) { }
275      : driver_device(mconfig, type, tag)
276   {
277   }
277278
278279   // memm variant interface
279280   DECLARE_WRITE32_MEMBER(key_w);
r20061r20062
325326   AM_RANGE(0x9fc00000, 0x9fffffff) AM_ROM AM_SHARE("share2") /* bios mirror */
326327   AM_RANGE(0xa0000000, 0xa0ffffff) AM_RAM AM_SHARE("share1") /* ram mirror */
327328   AM_RANGE(0xbfc00000, 0xbfffffff) AM_ROM AM_SHARE("share2") /* bios mirror */
328   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
329329ADDRESS_MAP_END
330330
331331
r20061r20062
404404ADDRESS_MAP_END
405405
406406
407static void memm_driver_init( running_machine &machine )
408{
409   psx_driver_init(machine);
410}
411
412
413407// memn variant interface
414408//
415409// Block access to the nand.  Something strange is going on with the
r20061r20062
512506
513507   state->nand_copy( (UINT32 *)( BIOS + 0x0000000 ), 0x08000, 0x001c000 );
514508   state->nand_copy( (UINT32 *)( BIOS + 0x0020000 ), 0x24000, 0x03e0000 );
515
516   psx_driver_init(machine);
517509}
518510
519511static void decrypt_bios( running_machine &machine, const char *regionName, int start, int b15, int b14, int b13, int b12, int b11, int b10, int b9, int b8,
r20061r20062
533525DRIVER_INIT_MEMBER(namcos10_state,mrdrilr2)
534526{
535527   decrypt_bios( machine(), "user1", 0, 0xc, 0xd, 0xf, 0xe, 0xb, 0xa, 0x9, 0x8, 0x7, 0x6, 0x4, 0x1, 0x2, 0x5, 0x0, 0x3 );
536   memm_driver_init(machine());
537528}
538529
539530DRIVER_INIT_MEMBER(namcos10_state,gjspace)
trunk/src/mame/drivers/zn.c
r20061r20062
1313#include "cpu/psx/psx.h"
1414#include "cpu/z80/z80.h"
1515#include "video/psx.h"
16#include "includes/psx.h"
1716#include "machine/at28c16.h"
1817#include "machine/nvram.h"
1918#include "machine/mb3773.h"
r20061r20062
3029
3130#define VERBOSE_LEVEL ( 0 )
3231
33class zn_state : public psx_state
32class zn_state : public driver_device
3433{
3534public:
3635   zn_state(const machine_config &mconfig, device_type type, const char *tag) :
37      psx_state(mconfig, type, tag),
36      driver_device(mconfig, type, tag),
3837      m_gpu(*this, "gpu"),
3938      m_znsec0(*this,"maincpu:sio0:znsec0"),
4039      m_znsec1(*this,"maincpu:sio0:znsec1"),
r20061r20062
402401   AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
403402   AM_RANGE(0xa0000000, 0xa03fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
404403   AM_RANGE(0xbfc00000, 0xbfc7ffff) AM_WRITENOP AM_ROM AM_SHARE("share2") /* bios mirror */
405   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
406404ADDRESS_MAP_END
407405
408406static ADDRESS_MAP_START( link_map, AS_PROGRAM, 8, zn_state )
r20061r20062
413411   zn_state *state = machine.driver_data<zn_state>();
414412   int n_game;
415413
416   psx_driver_init(machine);
417
418414   n_game = 0;
419415   while( zn_config_table[ n_game ].s_name != NULL )
420416   {
r20061r20062
13591355      *2                  - Unpopulated DIP28 socket
13601356*/
13611357
1362static void atpsx_dma_read( zn_state *state, UINT32 n_address, INT32 n_size )
1358static void atpsx_dma_read( zn_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
13631359{
1364   UINT32 *p_n_psxram = state->m_p_n_psxram;
13651360   device_t *ide = state->machine().device("ide");
13661361
13671362   logerror("DMA read: %d bytes (%d words) to %08x\n", n_size<<2, n_size, n_address);
r20061r20062
13841379   }
13851380}
13861381
1387static void atpsx_dma_write( zn_state *state, UINT32 n_address, INT32 n_size )
1382static void atpsx_dma_write( zn_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
13881383{
13891384   logerror("DMA write from %08x for %d bytes\n", n_address, n_size<<2);
13901385}
trunk/src/mame/drivers/namcos12.c
r20061r20062
10331033#include "cpu/psx/psx.h"
10341034#include "cpu/h83002/h8.h"
10351035#include "video/psx.h"
1036#include "includes/psx.h"
10371036#include "machine/at28c16.h"
10381037#include "sound/c352.h"
10391038#include "machine/rtc4543.h"
10401039
10411040#define VERBOSE_LEVEL ( 0 )
10421041
1043class namcos12_state : public psx_state
1042class namcos12_state : public driver_device
10441043{
10451044public:
10461045   namcos12_state(const machine_config &mconfig, device_type type, const char *tag)
1047      : psx_state(mconfig, type, tag),
1046      : driver_device(mconfig, type, tag),
10481047          m_rtc(*this, "rtc"),
10491048        m_sharedram(*this, "sharedram") { }
10501049
r20061r20062
11821181   verboselog( machine(), 1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_dmaoffset );
11831182}
11841183
1185static void namcos12_rom_read( namcos12_state *state, UINT32 n_address, INT32 n_size )
1184static void namcos12_rom_read( namcos12_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
11861185{
11871186   const char *n_region;
11881187   int n_offset;
11891188
1190   INT32 n_ramleft;
11911189   INT32 n_romleft;
11921190
11931191   UINT16 *source;
11941192   UINT16 *destination;
1193   INT32 n_ramleft;
11951194
1195   // TODO: the check for going past the end of ram should be in dma.c
1196   UINT32 m_n_psxramsize = state->machine().root_device().memshare("share1")->bytes();
1197
11961198   if(state->m_has_tektagt_dma && !state->m_n_dmaoffset)
11971199   {
11981200      n_region = "user2";
r20061r20062
12201222      n_size = n_romleft;
12211223   }
12221224
1223   destination = (UINT16 *)state->m_p_n_psxram;
1224   n_ramleft = ( state->m_n_psxramsize - n_address ) / 4;
1225   destination = (UINT16 *)p_n_psxram;
1226
1227   n_ramleft = ( m_n_psxramsize - n_address ) / 4;
12251228   if( n_size > n_ramleft )
12261229   {
12271230      verboselog( state->machine(), 1, "namcos12_rom_read dma truncated %d to %d passed end of ram\n", n_size, n_ramleft );
r20061r20062
12481251
12491252WRITE32_MEMBER(namcos12_state::s12_dma_bias_w)
12501253{
1251
12521254   m_n_dmabias = data;
12531255}
12541256
r20061r20062
12651267   AM_RANGE(0x9fc00000, 0x9fffffff) AM_ROM AM_SHARE("share2") /* bios mirror */
12661268   AM_RANGE(0xa0000000, 0xa03fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
12671269   AM_RANGE(0xbfc00000, 0xbfffffff) AM_ROM AM_SHARE("share2") /* bios mirror */
1268   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
12691270ADDRESS_MAP_END
12701271
12711272WRITE32_MEMBER(namcos12_state::system11gun_w)
r20061r20062
15911592
15921593DRIVER_INIT_MEMBER(namcos12_state,namcos12)
15931594{
1594
1595   psx_driver_init(machine());
1596
15971595   membank("bank1")->configure_entries(0, memregion( "user2" )->bytes() / 0x200000, memregion( "user2" )->base(), 0x200000 );
15981596
15991597   m_s12_porta = 0;
trunk/src/mame/drivers/konamigq.c
r20061r20062
4949#include "cpu/m68000/m68000.h"
5050#include "cpu/psx/psx.h"
5151#include "video/psx.h"
52#include "includes/psx.h"
53#include "includes/konamigx.h"
5452#include "machine/eeprom.h"
5553#include "machine/scsibus.h"
5654#include "machine/scsihd.h"
5755#include "machine/am53cf96.h"
5856#include "sound/k054539.h"
5957
60class konamigq_state : public psx_state
58class konamigq_state : public driver_device
6159{
6260public:
6361   konamigq_state(const machine_config &mconfig, device_type type, const char *tag)
64      : psx_state(mconfig, type, tag),
62      : driver_device(mconfig, type, tag),
6563      m_am53cf96(*this, "scsi:am53cf96"){ }
6664
6765   required_device<am53cf96_device> m_am53cf96;
r20061r20062
9290
9391WRITE32_MEMBER(konamigq_state::soundr3k_w)
9492{
95
96
9793   if( ACCESSING_BITS_16_31 )
9894   {
9995      m_sndto000[ ( offset << 1 ) + 1 ] = data >> 16;
r20061r20062
110106
111107READ32_MEMBER(konamigq_state::soundr3k_r)
112108{
113
114109   UINT32 data;
115110
116111   data = ( m_sndtor3k[ ( offset << 1 ) + 1 ] << 16 ) | m_sndtor3k[ offset << 1 ];
r20061r20062
160155
161156WRITE32_MEMBER(konamigq_state::pcmram_w)
162157{
163
164
165158   if( ACCESSING_BITS_0_7 )
166159   {
167160      m_p_n_pcmram[ offset << 1 ] = data;
r20061r20062
174167
175168READ32_MEMBER(konamigq_state::pcmram_r)
176169{
177
178
179170   return ( m_p_n_pcmram[ ( offset << 1 ) + 1 ] << 16 ) | m_p_n_pcmram[ offset << 1 ];
180171}
181172
r20061r20062
206197   AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
207198   AM_RANGE(0xa0000000, 0xa03fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
208199   AM_RANGE(0xbfc00000, 0xbfc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
209   AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP
210200ADDRESS_MAP_END
211201
212202/* SOUND CPU */
213203
214204READ16_MEMBER(konamigq_state::sndcomm68k_r)
215205{
216
217
218206   return m_sndto000[ offset ];
219207}
220208
221209WRITE16_MEMBER(konamigq_state::sndcomm68k_w)
222210{
223
224
225211   m_sndtor3k[ offset ] = data;
226212}
227213
r20061r20062
264250
265251/* SCSI */
266252
267static void scsi_dma_read( konamigq_state *state, UINT32 n_address, INT32 n_size )
253static void scsi_dma_read( konamigq_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
268254{
269   UINT32 *p_n_psxram = state->m_p_n_psxram;
270255   UINT8 *sector_buffer = state->m_sector_buffer;
271256   int i;
272257   int n_this;
r20061r20062
299284   }
300285}
301286
302static void scsi_dma_write( konamigq_state *state, UINT32 n_address, INT32 n_size )
287static void scsi_dma_write( konamigq_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
303288{
304289}
305290
306291DRIVER_INIT_MEMBER(konamigq_state,konamigq)
307292{
308   psx_driver_init(machine());
309
310293   m_p_n_pcmram = memregion( "shared" )->base() + 0x80000;
311294}
312295
trunk/src/mame/machine/psx.c
r20061r20062
1/***************************************************************************
2
3  machine/psx.c
4
5***************************************************************************/
6
7#include "emu.h"
8#include "cpu/psx/psx.h"
9#include "video/psx.h"
10#include "includes/psx.h"
11
12#define VERBOSE_LEVEL ( 0 )
13
14INLINE void ATTR_PRINTF(3,4) verboselog( psx_state *p_psx, int n_level, const char *s_fmt, ... )
15{
16   if( VERBOSE_LEVEL >= n_level )
17   {
18      va_list v;
19      char buf[ 32768 ];
20      va_start( v, s_fmt );
21      vsprintf( buf, s_fmt, v );
22      va_end( v );
23      logerror( "%s: %s", p_psx->machine().describe_context(), buf );
24   }
25}
26
27void psx_driver_init( running_machine &machine )
28{
29   psx_state *p_psx = machine.driver_data<psx_state>();
30
31   memory_share *share = machine.root_device().memshare("share1");
32   p_psx->m_p_n_psxram = (UINT32 *)share->ptr();
33   p_psx->m_n_psxramsize = share->bytes();
34}
35
36WRITE32_HANDLER( psx_com_delay_w )
37{
38   psx_state *p_psx = space.machine().driver_data<psx_state>();
39
40   COMBINE_DATA( &p_psx->n_com_delay );
41   verboselog( p_psx, 1, "psx_com_delay_w( %08x %08x )\n", data, mem_mask );
42}
43
44READ32_HANDLER( psx_com_delay_r )
45{
46   psx_state *p_psx = space.machine().driver_data<psx_state>();
47
48   verboselog( p_psx, 1, "psx_com_delay_r( %08x )\n", mem_mask );
49   return p_psx->n_com_delay;
50}
trunk/src/mame/includes/psx.h
r20061r20062
1/***************************************************************************
2
3  includes/psx.h
4
5***************************************************************************/
6
7#if !defined( PSX_H )
8
9#include "cpu/psx/dma.h"
10#include "cpu/psx/irq.h"
11#include "cpu/psx/sio.h"
12
13class psx_state : public driver_device
14{
15public:
16   psx_state(const machine_config &mconfig, device_type type, const char *tag)
17      : driver_device(mconfig, type, tag) { }
18
19   UINT32 *m_p_n_psxram;
20   size_t m_n_psxramsize;
21
22   UINT32 n_com_delay;
23};
24
25
26// mame/machine/psx.c
27extern void psx_driver_init( running_machine &machine );
28DECLARE_WRITE32_HANDLER( psx_com_delay_w );
29DECLARE_READ32_HANDLER( psx_com_delay_r );
30
31#define PSX_H ( 1 )
32#endif
trunk/src/mame/mame.mak
r20061r20062
13791379
13801380$(MAMEOBJ)/sony.a: \
13811381   $(DRIVERS)/zn.o $(MACHINE)/zndip.o $(MACHINE)/znsec.o \
1382   $(MACHINE)/psx.o
13831382
13841383$(MAMEOBJ)/stern.a: \
13851384   $(DRIVERS)/astinvad.o \

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