trunk/src/mess/machine/c64_supercpu.c
| r0 | r20042 | |
| 1 | /********************************************************************** |
| 2 | |
| 3 | CMD SuperCPU v2 + SuperRAM emulation |
| 4 | |
| 5 | Copyright MESS Team. |
| 6 | Visit http://mamedev.org for licensing and usage restrictions. |
| 7 | |
| 8 | **********************************************************************/ |
| 9 | |
| 10 | #include "c64_supercpu.h" |
| 11 | |
| 12 | |
| 13 | |
| 14 | //************************************************************************** |
| 15 | // MACROS/CONSTANTS |
| 16 | //************************************************************************** |
| 17 | |
| 18 | #define G65816_TAG "g65816" |
| 19 | |
| 20 | |
| 21 | //************************************************************************** |
| 22 | // DEVICE DEFINITIONS |
| 23 | //************************************************************************** |
| 24 | |
| 25 | const device_type C64_SUPERCPU = &device_creator<c64_supercpu_device>; |
| 26 | |
| 27 | |
| 28 | //------------------------------------------------- |
| 29 | // ROM( c64_supercpu ) |
| 30 | //------------------------------------------------- |
| 31 | |
| 32 | ROM_START( c64_supercpu ) |
| 33 | ROM_REGION( 0x20000, G65816_TAG, 0 ) |
| 34 | ROM_LOAD( "supercpu_dos_204.bin", 0x00000, 0x20000, CRC(f4151454) SHA1(6aa529a7b1b6de53e8979e407a77b4d5657727f5) ) |
| 35 | ROM_END |
| 36 | |
| 37 | |
| 38 | //------------------------------------------------- |
| 39 | // rom_region - device-specific ROM region |
| 40 | //------------------------------------------------- |
| 41 | |
| 42 | const rom_entry *c64_supercpu_device::device_rom_region() const |
| 43 | { |
| 44 | return ROM_NAME( c64_supercpu ); |
| 45 | } |
| 46 | |
| 47 | |
| 48 | //------------------------------------------------- |
| 49 | // ADDRESS_MAP( c64_supercpu_map ) |
| 50 | //------------------------------------------------- |
| 51 | |
| 52 | static ADDRESS_MAP_START( c64_supercpu_map, AS_PROGRAM, 8, c64_supercpu_device ) |
| 53 | AM_RANGE(0x000000, 0x01ffff) AM_RAM AM_SHARE("sram") |
| 54 | AM_RANGE(0x020000, 0xf7ffff) AM_RAM AM_SHARE("dimm") |
| 55 | AM_RANGE(0xf80000, 0xf9ffff) AM_MIRROR(0x60000) AM_ROM AM_REGION(G65816_TAG, 0) |
| 56 | ADDRESS_MAP_END |
| 57 | |
| 58 | |
| 59 | //------------------------------------------------- |
| 60 | // C64_EXPANSION_INTERFACE( expansion_intf ) |
| 61 | //------------------------------------------------- |
| 62 | |
| 63 | READ8_MEMBER( c64_supercpu_device::dma_cd_r ) |
| 64 | { |
| 65 | return m_slot->dma_cd_r(offset); |
| 66 | } |
| 67 | |
| 68 | WRITE8_MEMBER( c64_supercpu_device::dma_cd_w ) |
| 69 | { |
| 70 | m_slot->dma_cd_w(offset, data); |
| 71 | } |
| 72 | |
| 73 | WRITE_LINE_MEMBER( c64_supercpu_device::irq_w ) |
| 74 | { |
| 75 | m_slot->irq_w(state); |
| 76 | } |
| 77 | |
| 78 | WRITE_LINE_MEMBER( c64_supercpu_device::nmi_w ) |
| 79 | { |
| 80 | m_slot->nmi_w(state); |
| 81 | } |
| 82 | |
| 83 | WRITE_LINE_MEMBER( c64_supercpu_device::dma_w ) |
| 84 | { |
| 85 | m_slot->dma_w(state); |
| 86 | } |
| 87 | |
| 88 | WRITE_LINE_MEMBER( c64_supercpu_device::reset_w ) |
| 89 | { |
| 90 | m_slot->reset_w(state); |
| 91 | } |
| 92 | |
| 93 | static C64_EXPANSION_INTERFACE( expansion_intf ) |
| 94 | { |
| 95 | DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, c64_supercpu_device, dma_cd_r), |
| 96 | DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, c64_supercpu_device, dma_cd_w), |
| 97 | DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, c64_supercpu_device, irq_w), |
| 98 | DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, c64_supercpu_device, nmi_w), |
| 99 | DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, c64_supercpu_device, dma_w), |
| 100 | DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, c64_supercpu_device, reset_w) |
| 101 | }; |
| 102 | |
| 103 | |
| 104 | //------------------------------------------------- |
| 105 | // MACHINE_CONFIG_FRAGMENT( c64_supercpu ) |
| 106 | //------------------------------------------------- |
| 107 | |
| 108 | static MACHINE_CONFIG_FRAGMENT( c64_supercpu ) |
| 109 | MCFG_CPU_ADD(G65816_TAG, G65816, 1000000) |
| 110 | MCFG_CPU_PROGRAM_MAP(c64_supercpu_map) |
| 111 | |
| 112 | MCFG_C64_EXPANSION_SLOT_ADD(C64_EXPANSION_SLOT_TAG, 0, expansion_intf, c64_expansion_cards, NULL, NULL) |
| 113 | MACHINE_CONFIG_END |
| 114 | |
| 115 | |
| 116 | //------------------------------------------------- |
| 117 | // machine_config_additions - device-specific |
| 118 | // machine configurations |
| 119 | //------------------------------------------------- |
| 120 | |
| 121 | machine_config_constructor c64_supercpu_device::device_mconfig_additions() const |
| 122 | { |
| 123 | return MACHINE_CONFIG_NAME( c64_supercpu ); |
| 124 | } |
| 125 | |
| 126 | |
| 127 | //------------------------------------------------- |
| 128 | // INPUT_PORTS( c64_supercpu ) |
| 129 | //------------------------------------------------- |
| 130 | |
| 131 | INPUT_CHANGED_MEMBER( c64_supercpu_device::reset ) |
| 132 | { |
| 133 | if (!newval) |
| 134 | { |
| 135 | device_reset(); |
| 136 | } |
| 137 | |
| 138 | m_slot->reset_w(newval ? CLEAR_LINE : ASSERT_LINE); |
| 139 | } |
| 140 | |
| 141 | static INPUT_PORTS_START( c64_supercpu ) |
| 142 | PORT_START("FRONT") |
| 143 | PORT_DIPNAME( 0x01, 0x01, "Unit" ) |
| 144 | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 145 | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 146 | PORT_DIPNAME( 0x02, 0x02, "JiffyDOS" ) |
| 147 | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 148 | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 149 | PORT_DIPNAME( 0x04, 0x00, "Speed" ) |
| 150 | PORT_DIPSETTING( 0x04, "Normal" ) |
| 151 | PORT_DIPSETTING( 0x00, "Turbo" ) |
| 152 | |
| 153 | PORT_START("RESET") |
| 154 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Reset") PORT_CODE(KEYCODE_F11) PORT_CHANGED_MEMBER(DEVICE_SELF, c64_supercpu_device, reset, 0) |
| 155 | INPUT_PORTS_END |
| 156 | |
| 157 | |
| 158 | //------------------------------------------------- |
| 159 | // input_ports - device-specific input ports |
| 160 | //------------------------------------------------- |
| 161 | |
| 162 | ioport_constructor c64_supercpu_device::device_input_ports() const |
| 163 | { |
| 164 | return INPUT_PORTS_NAME( c64_supercpu ); |
| 165 | } |
| 166 | |
| 167 | |
| 168 | //************************************************************************** |
| 169 | // LIVE DEVICE |
| 170 | //************************************************************************** |
| 171 | |
| 172 | //------------------------------------------------- |
| 173 | // c64_supercpu_device - constructor |
| 174 | //------------------------------------------------- |
| 175 | |
| 176 | c64_supercpu_device::c64_supercpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : |
| 177 | device_t(mconfig, C64_SUPERCPU, "SuperCPU", tag, owner, clock), |
| 178 | device_c64_expansion_card_interface(mconfig, *this), |
| 179 | m_maincpu(*this, G65816_TAG), |
| 180 | m_exp(*this, C64_EXPANSION_SLOT_TAG), |
| 181 | m_sram(*this, "sram"), |
| 182 | m_dimm(*this, "dimm") |
| 183 | { |
| 184 | } |
| 185 | |
| 186 | |
| 187 | //------------------------------------------------- |
| 188 | // device_start - device-specific startup |
| 189 | //------------------------------------------------- |
| 190 | |
| 191 | void c64_supercpu_device::device_start() |
| 192 | { |
| 193 | } |
| 194 | |
| 195 | |
| 196 | //------------------------------------------------- |
| 197 | // device_reset - device-specific reset |
| 198 | //------------------------------------------------- |
| 199 | |
| 200 | void c64_supercpu_device::device_reset() |
| 201 | { |
| 202 | } |
| 203 | |
| 204 | |
| 205 | //------------------------------------------------- |
| 206 | // c64_cd_r - cartridge data read |
| 207 | //------------------------------------------------- |
| 208 | |
| 209 | UINT8 c64_supercpu_device::c64_cd_r(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2) |
| 210 | { |
| 211 | data = m_exp->cd_r(space, offset, data, sphi2, ba, roml, romh, io1, io2); |
| 212 | |
| 213 | switch (offset) |
| 214 | { |
| 215 | case 0xd0b0: |
| 216 | data = 0x40; |
| 217 | break; |
| 218 | |
| 219 | case 0xd0b1: |
| 220 | break; |
| 221 | |
| 222 | case 0xd0b2: |
| 223 | break; |
| 224 | |
| 225 | case 0xd0b3: |
| 226 | case 0xd0b4: |
| 227 | break; |
| 228 | |
| 229 | case 0xd0b5: |
| 230 | break; |
| 231 | |
| 232 | case 0xd0b6: |
| 233 | break; |
| 234 | |
| 235 | case 0xd0b7: |
| 236 | break; |
| 237 | |
| 238 | case 0xd0b8: |
| 239 | case 0xd0b9: |
| 240 | break; |
| 241 | |
| 242 | case 0xd0ba: |
| 243 | break; |
| 244 | |
| 245 | case 0xd0bb: |
| 246 | break; |
| 247 | |
| 248 | case 0xd0bc: |
| 249 | case 0xd0bd: |
| 250 | case 0xd0be: |
| 251 | case 0xd0bf: |
| 252 | break; |
| 253 | } |
| 254 | |
| 255 | return data; |
| 256 | } |
| 257 | |
| 258 | |
| 259 | //------------------------------------------------- |
| 260 | // c64_cd_w - cartridge data write |
| 261 | //------------------------------------------------- |
| 262 | |
| 263 | void c64_supercpu_device::c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2) |
| 264 | { |
| 265 | switch (offset) |
| 266 | { |
| 267 | case 0xd071: |
| 268 | break; |
| 269 | |
| 270 | case 0xd072: |
| 271 | break; |
| 272 | |
| 273 | case 0xd073: |
| 274 | break; |
| 275 | |
| 276 | case 0xd074: |
| 277 | case 0xd075: |
| 278 | case 0xd076: |
| 279 | case 0xd077: |
| 280 | break; |
| 281 | |
| 282 | case 0xd078: |
| 283 | break; |
| 284 | |
| 285 | case 0xd07a: |
| 286 | break; |
| 287 | |
| 288 | case 0xd079: |
| 289 | case 0xd07b: |
| 290 | break; |
| 291 | |
| 292 | case 0xd07c: |
| 293 | break; |
| 294 | |
| 295 | case 0xd07d: |
| 296 | case 0xd07f: |
| 297 | break; |
| 298 | |
| 299 | case 0xd0b0: |
| 300 | case 0xd0b1: |
| 301 | break; |
| 302 | |
| 303 | case 0xd0b2: |
| 304 | break; |
| 305 | |
| 306 | case 0xd0b3: |
| 307 | break; |
| 308 | |
| 309 | case 0xd0b4: |
| 310 | break; |
| 311 | |
| 312 | case 0xd0b5: |
| 313 | break; |
| 314 | |
| 315 | case 0xd0b6: |
| 316 | break; |
| 317 | |
| 318 | case 0xd0b7: |
| 319 | break; |
| 320 | |
| 321 | case 0xd0b8: |
| 322 | break; |
| 323 | |
| 324 | case 0xd0b9: |
| 325 | case 0xd0ba: |
| 326 | case 0xd0bb: |
| 327 | break; |
| 328 | |
| 329 | case 0xd0bc: |
| 330 | break; |
| 331 | |
| 332 | case 0xd0be: |
| 333 | break; |
| 334 | |
| 335 | case 0xd0bd: |
| 336 | case 0xd0bf: |
| 337 | break; |
| 338 | } |
| 339 | |
| 340 | m_exp->cd_w(space, offset, data, sphi2, ba, roml, romh, io1, io2); |
| 341 | } |
| 342 | |
| 343 | |
| 344 | //------------------------------------------------- |
| 345 | // c64_game_r - GAME read |
| 346 | //------------------------------------------------- |
| 347 | |
| 348 | int c64_supercpu_device::c64_game_r(offs_t offset, int sphi2, int ba, int rw, int hiram) |
| 349 | { |
| 350 | return m_exp->game_r(offset, sphi2, ba, rw, hiram); |
| 351 | } |
| 352 | |
| 353 | |
| 354 | //------------------------------------------------- |
| 355 | // c64_exrom_r - EXROM read |
| 356 | //------------------------------------------------- |
| 357 | |
| 358 | int c64_supercpu_device::c64_exrom_r(offs_t offset, int sphi2, int ba, int rw, int hiram) |
| 359 | { |
| 360 | return m_exp->exrom_r(offset, sphi2, ba, rw, hiram); |
| 361 | } |
trunk/src/mess/machine/c64_supercpu.h
| r0 | r20042 | |
| 1 | /********************************************************************** |
| 2 | |
| 3 | CMD SuperCPU v2 + SuperRAM emulation |
| 4 | |
| 5 | Copyright MESS Team. |
| 6 | Visit http://mamedev.org for licensing and usage restrictions. |
| 7 | |
| 8 | **********************************************************************/ |
| 9 | |
| 10 | #pragma once |
| 11 | |
| 12 | #ifndef __SUPERCPU__ |
| 13 | #define __SUPERCPU__ |
| 14 | |
| 15 | #include "emu.h" |
| 16 | #include "machine/c64exp.h" |
| 17 | #include "machine/cbmipt.h" |
| 18 | #include "cpu/g65816/g65816.h" |
| 19 | |
| 20 | |
| 21 | |
| 22 | //************************************************************************** |
| 23 | // TYPE DEFINITIONS |
| 24 | //************************************************************************** |
| 25 | |
| 26 | // ======================> c64_supercpu_device |
| 27 | |
| 28 | class c64_supercpu_device : public device_t, |
| 29 | public device_c64_expansion_card_interface |
| 30 | { |
| 31 | public: |
| 32 | // construction/destruction |
| 33 | c64_supercpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 34 | |
| 35 | // optional information overrides |
| 36 | virtual const rom_entry *device_rom_region() const; |
| 37 | virtual machine_config_constructor device_mconfig_additions() const; |
| 38 | virtual ioport_constructor device_input_ports() const; |
| 39 | |
| 40 | DECLARE_INPUT_CHANGED_MEMBER( reset ); |
| 41 | |
| 42 | DECLARE_READ8_MEMBER( dma_cd_r ); |
| 43 | DECLARE_WRITE8_MEMBER( dma_cd_w ); |
| 44 | DECLARE_WRITE_LINE_MEMBER( irq_w ); |
| 45 | DECLARE_WRITE_LINE_MEMBER( nmi_w ); |
| 46 | DECLARE_WRITE_LINE_MEMBER( dma_w ); |
| 47 | DECLARE_WRITE_LINE_MEMBER( reset_w ); |
| 48 | |
| 49 | protected: |
| 50 | // device-level overrides |
| 51 | virtual void device_config_complete() { m_shortname = "c64_supercpu"; } |
| 52 | virtual void device_start(); |
| 53 | virtual void device_reset(); |
| 54 | |
| 55 | // device_c64_expansion_card_interface overrides |
| 56 | virtual UINT8 c64_cd_r(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2); |
| 57 | virtual void c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2); |
| 58 | virtual int c64_game_r(offs_t offset, int sphi2, int ba, int rw, int hiram); |
| 59 | virtual int c64_exrom_r(offs_t offset, int sphi2, int ba, int rw, int hiram); |
| 60 | |
| 61 | private: |
| 62 | required_device<legacy_cpu_device> m_maincpu; |
| 63 | required_device<c64_expansion_slot_device> m_exp; |
| 64 | |
| 65 | required_shared_ptr<UINT8> m_sram; |
| 66 | required_shared_ptr<UINT8> m_dimm; |
| 67 | }; |
| 68 | |
| 69 | |
| 70 | // device type definition |
| 71 | extern const device_type C64_SUPERCPU; |
| 72 | |
| 73 | |
| 74 | |
| 75 | #endif |