trunk/src/mess/machine/pce.c
| r20024 | r20025 | |
|---|
| 2 | 2 | |
| 3 | 3 | PC Engine CD HW notes: |
| 4 | 4 | |
| 5 | TODO: |
| 6 | - Dragon Ball Z: ADPCM dies after the first upload; |
| 7 | - Dragon Slayer - The Legend of Heroes: black screen; |
| 8 | - Mirai Shonen Conan: dies at new game selection; |
| 9 | - Prince of Persia: black screen; |
| 10 | - Snatcher: black screen after Konami logo; |
| 11 | - Steam Heart's: needs transfer ready irq to get past the |
| 12 | gameplay hang, don't know exactly where to |
| 13 | put it; |
| 14 | - Steam Heart's: bad ADPCM irq, dialogue is cutted due of it; |
| 15 | |
| 16 | ============================================================= |
| 17 | |
| 5 | 18 | CD Interface Register 0x00 - CDC status |
| 6 | 19 | x--- ---- busy signal |
| 7 | 20 | -x-- ---- request signal |
| r20024 | r20025 | |
|---|
| 524 | 537 | { |
| 525 | 538 | pce_cd.data_timer->adjust(attotime::from_hz( PCE_CD_DATA_FRAMES_PER_SECOND ), 0, attotime::from_hz( PCE_CD_DATA_FRAMES_PER_SECOND )); |
| 526 | 539 | } |
| 540 | |
| 541 | /* TODO: correct place? */ |
| 542 | pce_cd_set_irq_line( machine, PCE_CD_IRQ_TRANSFER_READY, ASSERT_LINE ); |
| 527 | 543 | } |
| 528 | 544 | |
| 529 | 545 | /* 0xD8 - SET AUDIO PLAYBACK START POSITION (NEC) */ |
| r20024 | r20025 | |
|---|
| 1300 | 1316 | pce_cd.scsi_SEL = 0; |
| 1301 | 1317 | pce_cd.adpcm_dma_timer->adjust(attotime::never); // stop ADPCM DMA here |
| 1302 | 1318 | /* any write here clears CD transfer irqs */ |
| 1303 | | pce_cd.regs[0x03] &= ~0x70; |
| 1304 | | machine().device("maincpu")->execute().set_input_line(1, CLEAR_LINE ); |
| 1319 | pce_cd_set_irq_line( machine(), 0x70, CLEAR_LINE ); |
| 1305 | 1320 | break; |
| 1306 | 1321 | case 0x01: /* CDC command / status / data */ |
| 1307 | 1322 | break; |
| 1308 | 1323 | case 0x02: /* ADPCM / CD control / IRQ enable/disable */ |
| 1309 | 1324 | /* bit 6 - transfer ready irq */ |
| 1310 | 1325 | /* bit 5 - transfer done irq */ |
| 1311 | | /* bit 4 - ?? irq */ |
| 1312 | | /* bit 3 - ?? irq */ |
| 1313 | | /* bit 2 - ?? irq */ |
| 1326 | /* bit 4 - BRAM irq? */ |
| 1327 | /* bit 3 - ADPCM FULL irq */ |
| 1328 | /* bit 2 - ADPCM HALF irq */ |
| 1314 | 1329 | pce_cd.scsi_ACK = data & 0x80; |
| 1315 | | /* Update register now otherwise it won't catch the irq enable/disable change */ |
| 1330 | /* Update mask register now otherwise it won't catch the irq enable/disable change */ |
| 1316 | 1331 | pce_cd.regs[0x02] = data; |
| 1317 | 1332 | /* Don't set or reset any irq lines, but just verify the current state */ |
| 1318 | 1333 | pce_cd_set_irq_line( machine(), 0, 0 ); |