trunk/src/mame/drivers/s11b.c
| r20002 | r20003 | |
| 26 | 26 | #include "sound/hc55516.h" |
| 27 | 27 | #include "sound/2151intf.h" |
| 28 | 28 | #include "sound/dac.h" |
| 29 | #include "includes/s11.h" |
| 29 | 30 | #include "s11b.lh" |
| 30 | 31 | |
| 31 | | // 6802/8 CPU's input clock is 4MHz |
| 32 | | // but because it has an internal /4 divider, its E clock runs at 1/4 that frequency |
| 33 | | #define E_CLOCK (XTAL_4MHz/4) |
| 34 | | |
| 35 | | // Length of time in cycles between IRQs on the main 6808 CPU |
| 36 | | // This length is determined by the settings of the W14 and W15 jumpers |
| 37 | | // It can be 0x300, 0x380, 0x700 or 0x780 cycles long. |
| 38 | | // IRQ length is always 32 cycles |
| 39 | | #define S11_IRQ_CYCLES 0x380 |
| 40 | | |
| 41 | | class s11b_state : public genpin_class |
| 42 | | { |
| 43 | | public: |
| 44 | | s11b_state(const machine_config &mconfig, device_type type, const char *tag) |
| 45 | | : genpin_class(mconfig, type, tag), |
| 46 | | m_maincpu(*this, "maincpu"), |
| 47 | | m_audiocpu(*this, "audiocpu"), |
| 48 | | m_bgcpu(*this, "bgcpu"), |
| 49 | | m_dac(*this, "dac"), |
| 50 | | m_dac1(*this, "dac1"), |
| 51 | | m_hc55516(*this, "hc55516"), |
| 52 | | m_bg_hc55516(*this, "hc55516_bg"), |
| 53 | | m_pias(*this, "pias"), |
| 54 | | m_pia21(*this, "pia21"), |
| 55 | | m_pia24(*this, "pia24"), |
| 56 | | m_pia28(*this, "pia28"), |
| 57 | | m_pia2c(*this, "pia2c"), |
| 58 | | m_pia30(*this, "pia30"), |
| 59 | | m_pia34(*this, "pia34"), |
| 60 | | m_pia40(*this, "pia40"), |
| 61 | | m_ym(*this, "ym2151") |
| 62 | | { } |
| 63 | | |
| 64 | | DECLARE_READ8_MEMBER(dac_r); |
| 65 | | DECLARE_WRITE8_MEMBER(dac_w); |
| 66 | | DECLARE_WRITE8_MEMBER(bank_w); |
| 67 | | DECLARE_WRITE8_MEMBER(bgbank_w); |
| 68 | | DECLARE_WRITE8_MEMBER(dig0_w); |
| 69 | | DECLARE_WRITE8_MEMBER(dig1_w); |
| 70 | | DECLARE_WRITE8_MEMBER(lamp0_w); |
| 71 | | DECLARE_WRITE8_MEMBER(lamp1_w) { }; |
| 72 | | DECLARE_WRITE8_MEMBER(sol2_w) { }; // solenoids 8-15 |
| 73 | | DECLARE_WRITE8_MEMBER(sol3_w); // solenoids 0-7 |
| 74 | | DECLARE_WRITE8_MEMBER(sound_w); |
| 75 | | DECLARE_WRITE8_MEMBER(bg_speech_clock_w); |
| 76 | | DECLARE_WRITE8_MEMBER(bg_speech_digit_w); |
| 77 | | DECLARE_WRITE8_MEMBER(pia2c_pa_w); |
| 78 | | DECLARE_WRITE8_MEMBER(pia2c_pb_w); |
| 79 | | DECLARE_WRITE8_MEMBER(pia34_pa_w); |
| 80 | | DECLARE_WRITE8_MEMBER(pia34_pb_w); |
| 81 | | DECLARE_WRITE_LINE_MEMBER(pia34_cb2_w); |
| 82 | | DECLARE_WRITE8_MEMBER(pia40_pa_w); |
| 83 | | DECLARE_WRITE8_MEMBER(pia40_pb_w); |
| 84 | | DECLARE_WRITE_LINE_MEMBER(pia40_ca2_w); |
| 85 | | DECLARE_WRITE_LINE_MEMBER(pia40_cb2_w); |
| 86 | | DECLARE_READ8_MEMBER(dips_r); |
| 87 | | DECLARE_READ8_MEMBER(switch_r); |
| 88 | | DECLARE_WRITE8_MEMBER(switch_w); |
| 89 | | DECLARE_READ_LINE_MEMBER(pias_ca1_r); |
| 90 | | DECLARE_READ_LINE_MEMBER(pia21_ca1_r); |
| 91 | | DECLARE_READ8_MEMBER(pia28_w7_r); |
| 92 | | DECLARE_WRITE_LINE_MEMBER(pias_ca2_w); |
| 93 | | DECLARE_WRITE_LINE_MEMBER(pias_cb2_w); |
| 94 | | DECLARE_WRITE_LINE_MEMBER(pia21_ca2_w); |
| 95 | | DECLARE_WRITE_LINE_MEMBER(pia21_cb2_w) { }; // enable solenoids |
| 96 | | DECLARE_WRITE_LINE_MEMBER(pia24_cb2_w) { }; // dummy to stop error log filling up |
| 97 | | DECLARE_WRITE_LINE_MEMBER(pia28_ca2_w) { }; // comma3&4 |
| 98 | | DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w) { }; // comma1&2 |
| 99 | | DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w) { }; // dummy to stop error log filling up |
| 100 | | DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w); |
| 101 | | DECLARE_WRITE_LINE_MEMBER(pia_irq); |
| 102 | | DECLARE_INPUT_CHANGED_MEMBER(main_nmi); |
| 103 | | DECLARE_INPUT_CHANGED_MEMBER(audio_nmi); |
| 104 | | DECLARE_MACHINE_RESET(s11b); |
| 105 | | DECLARE_DRIVER_INIT(s11b); |
| 106 | | DECLARE_DRIVER_INIT(s11b_invert); |
| 107 | | protected: |
| 108 | | |
| 109 | | // devices |
| 110 | | required_device<cpu_device> m_maincpu; |
| 111 | | required_device<cpu_device> m_audiocpu; |
| 112 | | required_device<cpu_device> m_bgcpu; |
| 113 | | required_device<dac_device> m_dac; |
| 114 | | required_device<dac_device> m_dac1; |
| 115 | | required_device<hc55516_device> m_hc55516; |
| 116 | | required_device<hc55516_device> m_bg_hc55516; |
| 117 | | required_device<pia6821_device> m_pias; |
| 118 | | required_device<pia6821_device> m_pia21; |
| 119 | | required_device<pia6821_device> m_pia24; |
| 120 | | required_device<pia6821_device> m_pia28; |
| 121 | | required_device<pia6821_device> m_pia2c; |
| 122 | | required_device<pia6821_device> m_pia30; |
| 123 | | required_device<pia6821_device> m_pia34; |
| 124 | | required_device<pia6821_device> m_pia40; |
| 125 | | required_device<ym2151_device> m_ym; |
| 126 | | |
| 127 | | virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); |
| 128 | | private: |
| 129 | | UINT8 m_sound_data; |
| 130 | | UINT8 m_strobe; |
| 131 | | UINT8 m_kbdrow; |
| 132 | | UINT8 m_diag; |
| 133 | | UINT32 m_segment1; |
| 134 | | UINT32 m_segment2; |
| 135 | | bool m_ca1; |
| 136 | | bool m_invert; // later System 11B games start expecting inverted data to the display LED segments. |
| 137 | | emu_timer* m_irq_timer; |
| 138 | | bool m_irq_active; |
| 139 | | |
| 140 | | static const device_timer_id TIMER_IRQ = 0; |
| 141 | | }; |
| 142 | | |
| 143 | 32 | static ADDRESS_MAP_START( s11b_main_map, AS_PROGRAM, 8, s11b_state ) |
| 144 | 33 | AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("nvram") |
| 145 | 34 | AM_RANGE(0x2100, 0x2103) AM_MIRROR(0x00fc) AM_DEVREADWRITE("pia21", pia6821_device, read, write) // sound+solenoids |
| r20002 | r20003 | |
| 250 | 139 | PORT_CONFSETTING( 0x10, "English" ) |
| 251 | 140 | INPUT_PORTS_END |
| 252 | 141 | |
| 253 | | void s11b_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
| 254 | | { |
| 255 | | switch(id) |
| 256 | | { |
| 257 | | case TIMER_IRQ: |
| 258 | | if(param == 1) |
| 259 | | { |
| 260 | | m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE); |
| 261 | | m_irq_timer->adjust(attotime::from_ticks(32,E_CLOCK),0); |
| 262 | | m_pias->cb1_w(0); |
| 263 | | m_irq_active = true; |
| 264 | | m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance |
| 265 | | m_pia28->cb1_w(BIT(ioport("DIAGS")->read(), 3)); // Up/Down |
| 266 | | } |
| 267 | | else |
| 268 | | { |
| 269 | | m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE); |
| 270 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 271 | | m_pias->cb1_w(1); |
| 272 | | m_irq_active = false; |
| 273 | | m_pia28->ca1_w(1); |
| 274 | | m_pia28->cb1_w(1); |
| 275 | | } |
| 276 | | break; |
| 277 | | } |
| 278 | | } |
| 279 | | |
| 280 | 142 | MACHINE_RESET_MEMBER( s11b_state, s11b ) |
| 281 | 143 | { |
| 282 | 144 | membank("bank0")->set_entry(0); |
| r20002 | r20003 | |
| 287 | 149 | m_bgcpu->set_input_line(INPUT_LINE_RESET,PULSE_LINE); |
| 288 | 150 | } |
| 289 | 151 | |
| 290 | | INPUT_CHANGED_MEMBER( s11b_state::main_nmi ) |
| 291 | | { |
| 292 | | // Diagnostic button sends a pulse to NMI pin |
| 293 | | if (newval==CLEAR_LINE) |
| 294 | | m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); |
| 295 | | } |
| 296 | | |
| 297 | | INPUT_CHANGED_MEMBER( s11b_state::audio_nmi ) |
| 298 | | { |
| 299 | | // Diagnostic button sends a pulse to NMI pin |
| 300 | | if (newval==CLEAR_LINE) |
| 301 | | m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); |
| 302 | | } |
| 303 | | |
| 304 | | WRITE_LINE_MEMBER( s11b_state::pia_irq ) |
| 305 | | { |
| 306 | | if(state == CLEAR_LINE) |
| 307 | | { |
| 308 | | // restart IRQ timer |
| 309 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 310 | | m_irq_active = false; |
| 311 | | } |
| 312 | | else |
| 313 | | { |
| 314 | | // disable IRQ timer while other IRQs are being handled |
| 315 | | // (counter is reset every 32 cycles while a PIA IRQ is handled) |
| 316 | | m_irq_timer->adjust(attotime::zero); |
| 317 | | m_irq_active = true; |
| 318 | | } |
| 319 | | } |
| 320 | | |
| 321 | | WRITE8_MEMBER( s11b_state::sol3_w ) |
| 322 | | { |
| 323 | | |
| 324 | | } |
| 325 | | |
| 326 | | WRITE8_MEMBER( s11b_state::sound_w ) |
| 327 | | { |
| 328 | | m_sound_data = data; |
| 329 | | } |
| 330 | | |
| 331 | 152 | WRITE8_MEMBER( s11b_state::bg_speech_clock_w ) |
| 332 | 153 | { |
| 333 | 154 | hc55516_clock_w(m_bg_hc55516, data); |
| r20002 | r20003 | |
| 340 | 161 | popmessage("BG HC55516 Digit write %02x",data); |
| 341 | 162 | } |
| 342 | 163 | |
| 343 | | WRITE_LINE_MEMBER( s11b_state::pia21_ca2_w ) |
| 344 | | { |
| 345 | | // sound ns |
| 346 | | m_ca1 = state; |
| 347 | | m_pias->ca1_w(m_ca1); |
| 348 | | m_pia40->cb2_w(m_ca1); |
| 349 | | } |
| 350 | | |
| 351 | 164 | static const pia6821_interface pia21_intf = |
| 352 | 165 | { |
| 353 | | DEVCB_DRIVER_MEMBER(s11b_state, dac_r), /* port A in */ |
| 166 | DEVCB_DRIVER_MEMBER(s11_state, dac_r), /* port A in */ |
| 354 | 167 | DEVCB_NULL, /* port B in */ |
| 355 | 168 | DEVCB_NULL, /* line CA1 in */ |
| 356 | 169 | DEVCB_LINE_GND, /* line CB1 in */ |
| 357 | 170 | DEVCB_NULL, /* line CA2 in */ |
| 358 | 171 | DEVCB_NULL, /* line CB2 in */ |
| 359 | | DEVCB_DRIVER_MEMBER(s11b_state, sound_w), /* port A out */ |
| 360 | | DEVCB_DRIVER_MEMBER(s11b_state, sol2_w), /* port B out */ |
| 361 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia21_ca2_w), /* line CA2 out */ |
| 362 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia21_cb2_w), /* line CB2 out */ |
| 363 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq), /* IRQA */ |
| 364 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq) /* IRQB */ |
| 172 | DEVCB_DRIVER_MEMBER(s11_state, sound_w), /* port A out */ |
| 173 | DEVCB_DRIVER_MEMBER(s11_state, sol2_w), /* port B out */ |
| 174 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia21_ca2_w), /* line CA2 out */ |
| 175 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia21_cb2_w), /* line CB2 out */ |
| 176 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq), /* IRQA */ |
| 177 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq) /* IRQB */ |
| 365 | 178 | }; |
| 366 | 179 | |
| 367 | | WRITE8_MEMBER( s11b_state::lamp0_w ) |
| 368 | | { |
| 369 | | m_maincpu->set_input_line(M6800_IRQ_LINE, CLEAR_LINE); |
| 370 | | } |
| 371 | | |
| 372 | 180 | static const pia6821_interface pia24_intf = |
| 373 | 181 | { |
| 374 | 182 | DEVCB_NULL, /* port A in */ |
| r20002 | r20003 | |
| 377 | 185 | DEVCB_LINE_GND, /* line CB1 in */ |
| 378 | 186 | DEVCB_LINE_VCC, /* line CA2 in */ |
| 379 | 187 | DEVCB_LINE_VCC, /* line CB2 in */ |
| 380 | | DEVCB_DRIVER_MEMBER(s11b_state, lamp0_w), /* port A out */ |
| 381 | | DEVCB_DRIVER_MEMBER(s11b_state, lamp1_w), /* port B out */ |
| 188 | DEVCB_DRIVER_MEMBER(s11_state, lamp0_w), /* port A out */ |
| 189 | DEVCB_DRIVER_MEMBER(s11_state, lamp1_w), /* port B out */ |
| 382 | 190 | DEVCB_NULL, /* line CA2 out */ |
| 383 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia24_cb2_w), /* line CB2 out */ |
| 384 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq), /* IRQA */ |
| 385 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq) /* IRQB */ |
| 191 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia24_cb2_w), /* line CB2 out */ |
| 192 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq), /* IRQA */ |
| 193 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq) /* IRQB */ |
| 386 | 194 | }; |
| 387 | 195 | |
| 388 | | WRITE8_MEMBER( s11b_state::dig0_w ) |
| 389 | | { |
| 390 | | data &= 0x7f; |
| 391 | | m_strobe = data & 15; |
| 392 | | m_diag = (data & 0x70) >> 4; |
| 393 | | output_set_digit_value(60, 0); // not connected to PA5 or PA6? |
| 394 | | output_set_digit_value(61, m_diag & 0x01); // connected to PA4, normal behaviour is to be continually blinking |
| 395 | | output_set_digit_value(62, 0); |
| 396 | | m_segment1 = 0; |
| 397 | | m_segment2 = 0; |
| 398 | | } |
| 399 | | |
| 400 | 196 | WRITE8_MEMBER( s11b_state::dig1_w ) |
| 401 | 197 | { |
| 402 | | m_segment2 |= data; |
| 403 | | m_segment2 |= 0x20000; |
| 404 | | if ((m_segment2 & 0x70000) == 0x30000) |
| 198 | UINT32 seg = get_segment2(); |
| 199 | seg |= data; |
| 200 | seg |= 0x20000; |
| 201 | if((seg & 0x70000) == 0x30000) |
| 405 | 202 | { |
| 406 | 203 | if(m_invert) |
| 407 | | output_set_digit_value(m_strobe+16, BITSWAP16(~m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 204 | output_set_digit_value(get_strobe()+16, BITSWAP16(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 408 | 205 | else |
| 409 | | output_set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 410 | | m_segment2 |= 0x40000; |
| 206 | output_set_digit_value(get_strobe()+16, BITSWAP16(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 207 | seg |= 0x40000; |
| 411 | 208 | } |
| 209 | set_segment2(seg); |
| 412 | 210 | } |
| 413 | 211 | |
| 414 | | READ8_MEMBER( s11b_state::pia28_w7_r) |
| 415 | | { |
| 416 | | UINT8 ret = 0x80; |
| 417 | | |
| 418 | | ret |= m_strobe; |
| 419 | | ret |= m_diag << 4; |
| 420 | | |
| 421 | | if(BIT(ioport("DIAGS")->read(), 4)) // W7 Jumper |
| 422 | | ret &= ~0x80; |
| 423 | | |
| 424 | | return ret; |
| 425 | | } |
| 426 | | |
| 427 | 212 | static const pia6821_interface pia28_intf = |
| 428 | 213 | { |
| 429 | | DEVCB_DRIVER_MEMBER(s11b_state, pia28_w7_r), /* port A in */ |
| 214 | DEVCB_DRIVER_MEMBER(s11_state, pia28_w7_r), /* port A in */ |
| 430 | 215 | DEVCB_NULL, /* port B in */ |
| 431 | 216 | DEVCB_NULL, /* line CA1 in */ |
| 432 | 217 | DEVCB_NULL, /* line CB1 in */ |
| 433 | 218 | DEVCB_NULL, /* line CA2 in */ |
| 434 | 219 | DEVCB_NULL, /* line CB2 in */ |
| 435 | | DEVCB_DRIVER_MEMBER(s11b_state, dig0_w), /* port A out */ |
| 220 | DEVCB_DRIVER_MEMBER(s11a_state, dig0_w), /* port A out */ |
| 436 | 221 | DEVCB_DRIVER_MEMBER(s11b_state, dig1_w), /* port B out */ |
| 437 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia28_ca2_w), /* line CA2 out */ |
| 438 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia28_cb2_w), /* line CB2 out */ |
| 439 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq), /* IRQA */ |
| 440 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq) /* IRQB */ |
| 222 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia28_ca2_w), /* line CA2 out */ |
| 223 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia28_cb2_w), /* line CB2 out */ |
| 224 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq), /* IRQA */ |
| 225 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq) /* IRQB */ |
| 441 | 226 | }; |
| 442 | 227 | |
| 443 | 228 | WRITE8_MEMBER( s11b_state::pia2c_pa_w ) |
| 444 | 229 | { |
| 445 | | m_segment1 |= (data<<8); |
| 446 | | m_segment1 |= 0x10000; |
| 447 | | if ((m_segment1 & 0x70000) == 0x30000) |
| 230 | UINT32 seg = get_segment1(); |
| 231 | seg |= (data<<8); |
| 232 | seg |= 0x10000; |
| 233 | if((seg & 0x70000) == 0x30000) |
| 448 | 234 | { |
| 449 | 235 | if(m_invert) |
| 450 | | output_set_digit_value(m_strobe, BITSWAP16(~m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 236 | output_set_digit_value(get_strobe(), BITSWAP16(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 451 | 237 | else |
| 452 | | output_set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 453 | | m_segment1 |= 0x40000; |
| 238 | output_set_digit_value(get_strobe(), BITSWAP16(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 239 | seg |= 0x40000; |
| 454 | 240 | } |
| 241 | set_segment1(seg); |
| 455 | 242 | } |
| 456 | 243 | |
| 457 | 244 | WRITE8_MEMBER( s11b_state::pia2c_pb_w ) |
| 458 | 245 | { |
| 459 | | m_segment1 |= data; |
| 460 | | m_segment1 |= 0x20000; |
| 461 | | if ((m_segment1 & 0x70000) == 0x30000) |
| 246 | UINT32 seg = get_segment1(); |
| 247 | seg |= data; |
| 248 | seg |= 0x20000; |
| 249 | if((seg & 0x70000) == 0x30000) |
| 462 | 250 | { |
| 463 | 251 | if(m_invert) |
| 464 | | output_set_digit_value(m_strobe, BITSWAP16(~m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 252 | output_set_digit_value(get_strobe(), BITSWAP16(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 465 | 253 | else |
| 466 | | output_set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 467 | | m_segment1 |= 0x40000; |
| 254 | output_set_digit_value(get_strobe(), BITSWAP16(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 255 | seg |= 0x40000; |
| 468 | 256 | } |
| 257 | set_segment1(seg); |
| 469 | 258 | } |
| 470 | 259 | |
| 471 | 260 | static const pia6821_interface pia2c_intf = |
| r20002 | r20003 | |
| 480 | 269 | DEVCB_DRIVER_MEMBER(s11b_state, pia2c_pb_w), /* port B out */ |
| 481 | 270 | DEVCB_NULL, /* line CA2 out */ |
| 482 | 271 | DEVCB_NULL, /* line CB2 out */ |
| 483 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq), /* IRQA */ |
| 484 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq) /* IRQB */ |
| 272 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq), /* IRQA */ |
| 273 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq) /* IRQB */ |
| 485 | 274 | }; |
| 486 | 275 | |
| 487 | | READ8_MEMBER( s11b_state::switch_r ) |
| 488 | | { |
| 489 | | char kbdrow[8]; |
| 490 | | sprintf(kbdrow,"X%X",m_kbdrow); |
| 491 | | return ~ioport(kbdrow)->read(); |
| 492 | | } |
| 493 | | |
| 494 | | WRITE8_MEMBER( s11b_state::switch_w ) |
| 495 | | { |
| 496 | | m_kbdrow = data; |
| 497 | | } |
| 498 | | |
| 499 | 276 | static const pia6821_interface pia30_intf = |
| 500 | 277 | { |
| 501 | | DEVCB_DRIVER_MEMBER(s11b_state, switch_r), /* port A in */ |
| 278 | DEVCB_DRIVER_MEMBER(s11_state, switch_r), /* port A in */ |
| 502 | 279 | DEVCB_NULL, /* port B in */ |
| 503 | 280 | DEVCB_LINE_GND, /* line CA1 in */ |
| 504 | 281 | DEVCB_LINE_GND, /* line CB1 in */ |
| 505 | 282 | DEVCB_LINE_VCC, /* line CA2 in */ |
| 506 | 283 | DEVCB_LINE_VCC, /* line CB2 in */ |
| 507 | 284 | DEVCB_NULL, /* port A out */ |
| 508 | | DEVCB_DRIVER_MEMBER(s11b_state, switch_w), /* port B out */ |
| 285 | DEVCB_DRIVER_MEMBER(s11_state, switch_w), /* port B out */ |
| 509 | 286 | DEVCB_NULL, /* line CA2 out */ |
| 510 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia30_cb2_w), /* line CB2 out */ |
| 511 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq), /* IRQA */ |
| 512 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq) /* IRQB */ |
| 287 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia30_cb2_w), /* line CB2 out */ |
| 288 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq), /* IRQA */ |
| 289 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq) /* IRQB */ |
| 513 | 290 | }; |
| 514 | 291 | |
| 515 | 292 | WRITE8_MEMBER( s11b_state::pia34_pa_w ) |
| 516 | 293 | { |
| 517 | | m_segment2 |= (data<<8); |
| 518 | | m_segment2 |= 0x10000; |
| 519 | | if ((m_segment2 & 0x70000) == 0x30000) |
| 294 | UINT32 seg = get_segment2(); |
| 295 | seg |= (data<<8); |
| 296 | seg |= 0x10000; |
| 297 | if((seg & 0x70000) == 0x30000) |
| 520 | 298 | { |
| 521 | 299 | if(m_invert) |
| 522 | | output_set_digit_value(m_strobe+16, BITSWAP16(~m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 300 | output_set_digit_value(get_strobe()+16, BITSWAP16(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 523 | 301 | else |
| 524 | | output_set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 525 | | m_segment2 |= 0x40000; |
| 302 | output_set_digit_value(get_strobe()+16, BITSWAP16(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); |
| 303 | seg |= 0x40000; |
| 526 | 304 | } |
| 305 | set_segment2(seg); |
| 527 | 306 | } |
| 528 | 307 | |
| 529 | | WRITE8_MEMBER( s11b_state::pia34_pb_w ) |
| 530 | | { |
| 531 | | m_pia40->portb_w(data); // MD1-8 through CPU interface |
| 532 | | } |
| 533 | | |
| 534 | | WRITE_LINE_MEMBER( s11b_state::pia34_cb2_w ) |
| 535 | | { |
| 536 | | m_pia40->cb1_w(state); // MCB2 through CPU interface |
| 537 | | } |
| 538 | | |
| 539 | 308 | static const pia6821_interface pia34_intf = |
| 540 | 309 | { |
| 541 | 310 | DEVCB_NULL, /* port A in */ |
| r20002 | r20003 | |
| 545 | 314 | DEVCB_NULL, /* line CA2 in */ |
| 546 | 315 | DEVCB_NULL, /* line CB2 in */ |
| 547 | 316 | DEVCB_DRIVER_MEMBER(s11b_state, pia34_pa_w), /* port A out */ |
| 548 | | DEVCB_DRIVER_MEMBER(s11b_state, pia34_pb_w), /* port B out */ |
| 317 | DEVCB_DRIVER_MEMBER(s11_state, pia34_pb_w), /* port B out */ |
| 549 | 318 | DEVCB_NULL, /* line CA2 out */ |
| 550 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia34_cb2_w), /* line CB2 out */ |
| 551 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq), /* IRQA */ |
| 552 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq) /* IRQB */ |
| 319 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia34_cb2_w), /* line CB2 out */ |
| 320 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq), /* IRQA */ |
| 321 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq) /* IRQB */ |
| 553 | 322 | }; |
| 554 | 323 | |
| 555 | | WRITE8_MEMBER( s11b_state::bank_w ) |
| 556 | | { |
| 557 | | membank("bank0")->set_entry(BIT(data, 1)); |
| 558 | | membank("bank1")->set_entry(BIT(data, 0)); |
| 559 | | } |
| 560 | | |
| 561 | | WRITE8_MEMBER( s11b_state::bgbank_w ) |
| 562 | | { |
| 563 | | membank("bgbank")->set_entry(data & 0x03); |
| 564 | | } |
| 565 | | |
| 566 | | READ_LINE_MEMBER( s11b_state::pias_ca1_r ) |
| 567 | | { |
| 568 | | return m_ca1; |
| 569 | | } |
| 570 | | |
| 571 | | WRITE_LINE_MEMBER( s11b_state::pias_ca2_w ) |
| 572 | | { |
| 573 | | // speech clock |
| 574 | | if(state == CLEAR_LINE) |
| 575 | | hc55516_clock_w(m_hc55516, 0); |
| 576 | | else |
| 577 | | hc55516_clock_w(m_hc55516, 1); |
| 578 | | } |
| 579 | | |
| 580 | | WRITE_LINE_MEMBER( s11b_state::pias_cb2_w ) |
| 581 | | { |
| 582 | | // speech data |
| 583 | | hc55516_digit_w(m_hc55516, state); |
| 584 | | } |
| 585 | | |
| 586 | | READ8_MEMBER( s11b_state::dac_r ) |
| 587 | | { |
| 588 | | return m_sound_data; |
| 589 | | } |
| 590 | | |
| 591 | | WRITE8_MEMBER( s11b_state::dac_w ) |
| 592 | | { |
| 593 | | m_dac->write_unsigned8(data); |
| 594 | | } |
| 595 | | |
| 596 | 324 | static const pia6821_interface pias_intf = |
| 597 | 325 | { |
| 598 | | DEVCB_DRIVER_MEMBER(s11b_state, dac_r), /* port A in */ |
| 326 | DEVCB_DRIVER_MEMBER(s11_state, dac_r), /* port A in */ |
| 599 | 327 | DEVCB_NULL, /* port B in */ |
| 600 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pias_ca1_r), /* line CA1 in */ |
| 328 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pias_ca1_r), /* line CA1 in */ |
| 601 | 329 | DEVCB_NULL, /* line CB1 in */ |
| 602 | 330 | DEVCB_NULL, /* line CA2 in */ |
| 603 | 331 | DEVCB_NULL, /* line CB2 in */ |
| 604 | | DEVCB_DRIVER_MEMBER(s11b_state, sound_w), /* port A out */ |
| 605 | | DEVCB_DRIVER_MEMBER(s11b_state, dac_w), /* port B out */ |
| 606 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pias_ca2_w), /* line CA2 out */ |
| 607 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pias_cb2_w), /* line CB2 out */ |
| 332 | DEVCB_DRIVER_MEMBER(s11_state, sound_w), /* port A out */ |
| 333 | DEVCB_DRIVER_MEMBER(s11_state, dac_w), /* port B out */ |
| 334 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pias_ca2_w), /* line CA2 out */ |
| 335 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pias_cb2_w), /* line CB2 out */ |
| 608 | 336 | DEVCB_CPU_INPUT_LINE("audiocpu", M6800_IRQ_LINE), /* IRQA */ |
| 609 | 337 | DEVCB_CPU_INPUT_LINE("audiocpu", M6800_IRQ_LINE) /* IRQB */ |
| 610 | 338 | }; |
| 611 | 339 | |
| 612 | | WRITE8_MEMBER( s11b_state::pia40_pa_w ) |
| 613 | | { |
| 614 | | m_dac1->write_unsigned8(data); |
| 615 | | } |
| 616 | | |
| 617 | | WRITE8_MEMBER( s11b_state::pia40_pb_w ) |
| 618 | | { |
| 619 | | m_pia34->portb_w(data); |
| 620 | | } |
| 621 | | |
| 622 | | WRITE_LINE_MEMBER( s11b_state::ym2151_irq_w) |
| 623 | | { |
| 624 | | if(state == CLEAR_LINE) |
| 625 | | m_pia40->ca1_w(1); |
| 626 | | else |
| 627 | | m_pia40->ca1_w(0); |
| 628 | | } |
| 629 | | |
| 630 | 340 | WRITE_LINE_MEMBER( s11b_state::pia40_ca2_w) |
| 631 | 341 | { |
| 632 | 342 | if(state == ASSERT_LINE) |
| 633 | 343 | m_ym->reset(); |
| 634 | 344 | } |
| 635 | 345 | |
| 636 | | WRITE_LINE_MEMBER( s11b_state::pia40_cb2_w) |
| 637 | | { |
| 638 | | m_pia34->cb1_w(state); // To Widget MCB1 through CPU Data interface |
| 639 | | } |
| 640 | | |
| 641 | 346 | static const pia6821_interface pia40_intf = |
| 642 | 347 | { |
| 643 | 348 | DEVCB_NULL, /* port A in */ |
| 644 | 349 | DEVCB_NULL, /* port B in */ |
| 645 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pias_ca1_r), /* line CA1 in */ |
| 350 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pias_ca1_r), /* line CA1 in */ |
| 646 | 351 | DEVCB_NULL, /* line CB1 in */ |
| 647 | 352 | DEVCB_LINE_VCC, /* line CA2 in */ |
| 648 | 353 | DEVCB_NULL, /* line CB2 in */ |
| 649 | | DEVCB_DRIVER_MEMBER(s11b_state, pia40_pa_w), /* port A out */ |
| 650 | | DEVCB_DRIVER_MEMBER(s11b_state, pia40_pb_w), /* port B out */ |
| 354 | DEVCB_DRIVER_MEMBER(s11_state, pia40_pa_w), /* port A out */ |
| 355 | DEVCB_DRIVER_MEMBER(s11_state, pia40_pb_w), /* port B out */ |
| 651 | 356 | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia40_ca2_w), /* line CA2 out */ |
| 652 | | DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia40_cb2_w), /* line CB2 out */ |
| 357 | DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_cb2_w), /* line CB2 out */ |
| 653 | 358 | DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE), /* IRQA */ |
| 654 | 359 | DEVCB_CPU_INPUT_LINE("bgcpu", INPUT_LINE_NMI) /* IRQB */ |
| 655 | 360 | }; |
| 656 | 361 | |
| 657 | 362 | DRIVER_INIT_MEMBER( s11b_state, s11b ) |
| 658 | 363 | { |
| 659 | | UINT8 *ROM = memregion("audiocpu")->base(); |
| 660 | | UINT8 *BGROM = memregion("bgcpu")->base(); |
| 661 | | membank("bank0")->configure_entries(0, 2, &ROM[0x10000], 0x4000); |
| 662 | | membank("bank1")->configure_entries(0, 2, &ROM[0x18000], 0x4000); |
| 663 | | membank("bgbank")->configure_entries(0, 2, &BGROM[0x10000], 0x8000); |
| 664 | | membank("bank0")->set_entry(0); |
| 665 | | membank("bank1")->set_entry(0); |
| 666 | | membank("bgbank")->set_entry(0); |
| 364 | s11a_state::init_s11a(); |
| 667 | 365 | m_invert = false; |
| 668 | | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 669 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 670 | | m_irq_active = false; |
| 671 | 366 | } |
| 672 | 367 | |
| 673 | 368 | DRIVER_INIT_MEMBER( s11b_state, s11b_invert ) |
| 674 | 369 | { |
| 675 | | UINT8 *ROM = memregion("audiocpu")->base(); |
| 676 | | UINT8 *BGROM = memregion("bgcpu")->base(); |
| 677 | | membank("bank0")->configure_entries(0, 2, &ROM[0x10000], 0x4000); |
| 678 | | membank("bank1")->configure_entries(0, 2, &ROM[0x18000], 0x4000); |
| 679 | | membank("bgbank")->configure_entries(0, 2, &BGROM[0x10000], 0x8000); |
| 680 | | membank("bank0")->set_entry(0); |
| 681 | | membank("bank1")->set_entry(0); |
| 682 | | membank("bgbank")->set_entry(0); |
| 370 | s11a_state::init_s11a(); |
| 683 | 371 | m_invert = true; |
| 684 | | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 685 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 686 | | m_irq_active = false; |
| 687 | 372 | } |
| 688 | 373 | |
| 689 | 374 | static MACHINE_CONFIG_START( s11b, s11b_state ) |