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r19983 Tuesday 1st January, 2013 at 09:33:27 UTC by Barry Rodewald
s11a: made driver class be derived from the s11 driver class, to reduce code duplication.
[src/mame/drivers]s11.c s11a.c
[src/mame/includes]s11.h*

trunk/src/mame/includes/s11.h
r0r19983
1/*
2 * s11.h
3 *
4 *  Created on: 1/01/2013
5 */
6
7#ifndef S11_H_
8#define S11_H_
9
10// 6802/8 CPU's input clock is 4MHz
11// but because it has an internal /4 divider, its E clock runs at 1/4 that frequency
12#define E_CLOCK (XTAL_4MHz/4)
13
14// Length of time in cycles between IRQs on the main 6808 CPU
15// This length is determined by the settings of the W14 and W15 jumpers
16// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
17// IRQ length is always 32 cycles
18#define S11_IRQ_CYCLES 0x380
19
20class s11_state : public genpin_class
21{
22public:
23   s11_state(const machine_config &mconfig, device_type type, const char *tag)
24      : genpin_class(mconfig, type, tag),
25   m_maincpu(*this, "maincpu"),
26   m_audiocpu(*this, "audiocpu"),
27   m_bgcpu(*this, "bgcpu"),
28   m_dac(*this, "dac"),
29   m_dac1(*this, "dac1"),
30   m_hc55516(*this, "hc55516"),
31   m_pias(*this, "pias"),
32   m_pia21(*this, "pia21"),
33   m_pia24(*this, "pia24"),
34   m_pia28(*this, "pia28"),
35   m_pia2c(*this, "pia2c"),
36   m_pia30(*this, "pia30"),
37   m_pia34(*this, "pia34"),
38   m_pia40(*this, "pia40"),
39   m_ym(*this, "ym2151")
40   { }
41
42   DECLARE_READ8_MEMBER(dac_r);
43   DECLARE_WRITE8_MEMBER(dac_w);
44   DECLARE_WRITE8_MEMBER(bank_w);
45   DECLARE_WRITE8_MEMBER(dig0_w);
46   DECLARE_WRITE8_MEMBER(dig1_w);
47   DECLARE_WRITE8_MEMBER(lamp0_w);
48   DECLARE_WRITE8_MEMBER(lamp1_w) { };
49   DECLARE_WRITE8_MEMBER(sol2_w) { }; // solenoids 8-15
50   DECLARE_WRITE8_MEMBER(sol3_w); // solenoids 0-7
51   DECLARE_WRITE8_MEMBER(sound_w);
52   DECLARE_WRITE8_MEMBER(pia2c_pa_w);
53   DECLARE_WRITE8_MEMBER(pia2c_pb_w);
54   DECLARE_WRITE8_MEMBER(pia34_pa_w);
55   DECLARE_WRITE8_MEMBER(pia34_pb_w);
56   DECLARE_WRITE_LINE_MEMBER(pia34_cb2_w);
57   DECLARE_WRITE8_MEMBER(pia40_pa_w);
58   DECLARE_WRITE8_MEMBER(pia40_pb_w);
59   DECLARE_WRITE_LINE_MEMBER(pia40_cb2_w);
60   DECLARE_READ8_MEMBER(dips_r);
61   DECLARE_READ8_MEMBER(switch_r);
62   DECLARE_WRITE8_MEMBER(switch_w);
63   DECLARE_READ_LINE_MEMBER(pias_ca1_r);
64   DECLARE_READ_LINE_MEMBER(pia21_ca1_r);
65   DECLARE_READ8_MEMBER(pia28_w7_r);
66   DECLARE_WRITE_LINE_MEMBER(pias_ca2_w);
67   DECLARE_WRITE_LINE_MEMBER(pias_cb2_w);
68   DECLARE_WRITE_LINE_MEMBER(pia21_ca2_w);
69   DECLARE_WRITE_LINE_MEMBER(pia21_cb2_w) { }; // enable solenoids
70   DECLARE_WRITE_LINE_MEMBER(pia24_cb2_w) { }; // dummy to stop error log filling up
71   DECLARE_WRITE_LINE_MEMBER(pia28_ca2_w) { }; // comma3&4
72   DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w) { }; // comma1&2
73   DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w) { }; // dummy to stop error log filling up
74   DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w);
75   DECLARE_WRITE_LINE_MEMBER(pia_irq);
76   DECLARE_INPUT_CHANGED_MEMBER(main_nmi);
77   DECLARE_INPUT_CHANGED_MEMBER(audio_nmi);
78   DECLARE_MACHINE_RESET(s11);
79   DECLARE_DRIVER_INIT(s11);
80protected:
81   // devices
82   required_device<cpu_device> m_maincpu;
83   required_device<cpu_device> m_audiocpu;
84   required_device<cpu_device> m_bgcpu;
85   required_device<dac_device> m_dac;
86   required_device<dac_device> m_dac1;
87   required_device<hc55516_device> m_hc55516;
88   required_device<pia6821_device> m_pias;
89   required_device<pia6821_device> m_pia21;
90   required_device<pia6821_device> m_pia24;
91   required_device<pia6821_device> m_pia28;
92   required_device<pia6821_device> m_pia2c;
93   required_device<pia6821_device> m_pia30;
94   required_device<pia6821_device> m_pia34;
95   required_device<pia6821_device> m_pia40;
96   required_device<ym2151_device> m_ym;
97
98   // getters/setters
99   UINT8 get_strobe() { return m_strobe; }
100   void set_strobe(UINT8 s) { m_strobe = s; }
101   UINT8 get_diag() { return m_diag; }
102   void set_diag(UINT8 d) { m_diag = d; }
103   UINT32 get_segment1() { return m_segment1; }
104   void set_segment1(UINT8 s) { m_segment1 = s; }
105   UINT32 get_segment2() { return m_segment2; }
106   void set_segment2(UINT8 s) { m_segment2 = s; }
107
108   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
109private:
110   UINT8 m_sound_data;
111   UINT8 m_strobe;
112   UINT8 m_kbdrow;
113   UINT8 m_diag;
114   UINT32 m_segment1;
115   UINT32 m_segment2;
116   bool m_ca1;
117   emu_timer* m_irq_timer;
118   bool m_irq_active;
119
120   static const device_timer_id TIMER_IRQ = 0;
121};
122
123class s11a_state : public s11_state
124{
125public:
126   s11a_state(const machine_config &mconfig, device_type type, const char *tag)
127      : s11_state(mconfig, type, tag)
128   { }
129
130   DECLARE_WRITE8_MEMBER(bgbank_w);
131   DECLARE_WRITE8_MEMBER(dig0_w);
132   DECLARE_MACHINE_RESET(s11a);
133   DECLARE_DRIVER_INIT(s11a);
134
135protected:
136
137private:
138
139};
140
141
142#endif /* S11_H_ */
trunk/src/mame/drivers/s11.c
r19982r19983
2323#include "sound/hc55516.h"
2424#include "sound/2151intf.h"
2525#include "sound/dac.h"
26#include "includes/s11.h"
2627#include "s11.lh"
2728
28// 6802/8 CPU's input clock is 4MHz
29// but because it has an internal /4 divider, its E clock runs at 1/4 that frequency
30#define E_CLOCK (XTAL_4MHz/4)
31
32// Length of time in cycles between IRQs on the main 6808 CPU
33// This length is determined by the settings of the W14 and W15 jumpers
34// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
35// IRQ length is always 32 cycles
36#define S11_IRQ_CYCLES 0x380
37
38class s11_state : public genpin_class
39{
40public:
41   s11_state(const machine_config &mconfig, device_type type, const char *tag)
42      : genpin_class(mconfig, type, tag),
43   m_maincpu(*this, "maincpu"),
44   m_audiocpu(*this, "audiocpu"),
45   m_bgcpu(*this, "bgcpu"),
46   m_dac(*this, "dac"),
47   m_dac1(*this, "dac1"),
48   m_hc55516(*this, "hc55516"),
49   m_pias(*this, "pias"),
50   m_pia21(*this, "pia21"),
51   m_pia24(*this, "pia24"),
52   m_pia28(*this, "pia28"),
53   m_pia2c(*this, "pia2c"),
54   m_pia30(*this, "pia30"),
55   m_pia34(*this, "pia34"),
56   m_pia40(*this, "pia40"),
57   m_ym(*this, "ym2151")
58   { }
59
60   DECLARE_READ8_MEMBER(dac_r);
61   DECLARE_WRITE8_MEMBER(dac_w);
62   DECLARE_WRITE8_MEMBER(bank_w);
63   DECLARE_WRITE8_MEMBER(dig0_w);
64   DECLARE_WRITE8_MEMBER(dig1_w);
65   DECLARE_WRITE8_MEMBER(lamp0_w);
66   DECLARE_WRITE8_MEMBER(lamp1_w) { };
67   DECLARE_WRITE8_MEMBER(sol2_w) { }; // solenoids 8-15
68   DECLARE_WRITE8_MEMBER(sol3_w); // solenoids 0-7
69   DECLARE_WRITE8_MEMBER(sound_w);
70   DECLARE_WRITE8_MEMBER(pia2c_pa_w);
71   DECLARE_WRITE8_MEMBER(pia2c_pb_w);
72   DECLARE_WRITE8_MEMBER(pia34_pa_w);
73   DECLARE_WRITE8_MEMBER(pia34_pb_w);
74   DECLARE_WRITE_LINE_MEMBER(pia34_cb2_w);
75   DECLARE_WRITE8_MEMBER(pia40_pa_w);
76   DECLARE_WRITE_LINE_MEMBER(pia40_cb2_w);
77   DECLARE_READ8_MEMBER(dips_r);
78   DECLARE_READ8_MEMBER(switch_r);
79   DECLARE_WRITE8_MEMBER(switch_w);
80   DECLARE_READ_LINE_MEMBER(pias_ca1_r);
81   DECLARE_READ_LINE_MEMBER(pia21_ca1_r);
82   DECLARE_READ8_MEMBER(pia28_w7_r);
83   DECLARE_WRITE_LINE_MEMBER(pias_ca2_w);
84   DECLARE_WRITE_LINE_MEMBER(pias_cb2_w);
85   DECLARE_WRITE_LINE_MEMBER(pia21_ca2_w);
86   DECLARE_WRITE_LINE_MEMBER(pia21_cb2_w) { }; // enable solenoids
87   DECLARE_WRITE_LINE_MEMBER(pia24_cb2_w) { }; // dummy to stop error log filling up
88   DECLARE_WRITE_LINE_MEMBER(pia28_ca2_w) { }; // comma3&4
89   DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w) { }; // comma1&2
90   DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w) { }; // dummy to stop error log filling up
91   DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w);
92   DECLARE_WRITE_LINE_MEMBER(pia_irq);
93   DECLARE_INPUT_CHANGED_MEMBER(main_nmi);
94   DECLARE_INPUT_CHANGED_MEMBER(audio_nmi);
95   DECLARE_MACHINE_RESET(s11);
96   DECLARE_DRIVER_INIT(s11);
97protected:
98   // devices
99   required_device<cpu_device> m_maincpu;
100   required_device<cpu_device> m_audiocpu;
101   required_device<cpu_device> m_bgcpu;
102   required_device<dac_device> m_dac;
103   required_device<dac_device> m_dac1;
104   required_device<hc55516_device> m_hc55516;
105   required_device<pia6821_device> m_pias;
106   required_device<pia6821_device> m_pia21;
107   required_device<pia6821_device> m_pia24;
108   required_device<pia6821_device> m_pia28;
109   required_device<pia6821_device> m_pia2c;
110   required_device<pia6821_device> m_pia30;
111   required_device<pia6821_device> m_pia34;
112   required_device<pia6821_device> m_pia40;
113   required_device<ym2151_device> m_ym;
114
115   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
116private:
117   UINT8 m_sound_data;
118   UINT8 m_strobe;
119   UINT8 m_kbdrow;
120   UINT8 m_diag;
121   UINT32 m_segment1;
122   UINT32 m_segment2;
123   bool m_ca1;
124   emu_timer* m_irq_timer;
125   bool m_irq_active;
126
127   static const device_timer_id TIMER_IRQ = 0;
128};
129
13029static ADDRESS_MAP_START( s11_main_map, AS_PROGRAM, 8, s11_state )
13130   AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram")
13231   AM_RANGE(0x2100, 0x2103) AM_DEVREADWRITE("pia21", pia6821_device, read, write) // sound+solenoids
r19982r19983
574473   m_pia34->cb1_w(state);  // To Widget MCB1 through CPU Data interface
575474}
576475
476WRITE8_MEMBER( s11_state::pia40_pb_w )
477{
478   m_pia34->portb_w(data);
479}
480
577481static const pia6821_interface pia40_intf =
578482{
579483   DEVCB_NULL,      /* port A in */
r19982r19983
583487   DEVCB_LINE_VCC,      /* line CA2 in */
584488   DEVCB_NULL,      /* line CB2 in */
585489   DEVCB_DRIVER_MEMBER(s11_state, pia40_pa_w),      /* port A out */
586   DEVCB_DRIVER_MEMBER(s11_state, dac_w),      /* port B out */
490   DEVCB_DRIVER_MEMBER(s11_state, pia40_pb_w),      /* port B out */
587491   DEVCB_NULL,      /* line CA2 out */
588492   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_cb2_w),      /* line CB2 out */
589493   DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE),      /* IRQA */
trunk/src/mame/drivers/s11a.c
r19982r19983
1313Note: To start a game, certain switches need to be activated.  You must first press and
1414      hold one of the trough switches (usually the left) and the ball shooter switch for
1515      about 1 second.  Then you are able to start a game.
16      Example: For Pinbot, you must hold L and V for a second, then press start.
16      For Pinbot, you must hold L and V for a second, then press start.
17      For Millionaire, you must hold [ and ] for a second, then start.
1718
1819*****************************************************************************************/
1920
r19982r19983
2526#include "sound/hc55516.h"
2627#include "sound/2151intf.h"
2728#include "sound/dac.h"
29#include "includes/s11.h"
2830#include "s11a.lh"
2931
30// 6802/8 CPU's input clock is 4MHz
31// but because it has an internal /4 divider, its E clock runs at 1/4 that frequency
32#define E_CLOCK (XTAL_4MHz/4)
33
34// Length of time in cycles between IRQs on the main 6808 CPU
35// This length is determined by the settings of the W14 and W15 jumpers
36// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
37// IRQ length is always 32 cycles
38#define S11_IRQ_CYCLES 0x380
39
40class s11a_state : public genpin_class
41{
42public:
43   s11a_state(const machine_config &mconfig, device_type type, const char *tag)
44      : genpin_class(mconfig, type, tag),
45   m_maincpu(*this, "maincpu"),
46   m_audiocpu(*this, "audiocpu"),
47   m_bgcpu(*this, "bgcpu"),
48   m_dac(*this, "dac"),
49   m_dac1(*this, "dac1"),
50   m_hc55516(*this, "hc55516"),
51   m_pias(*this, "pias"),
52   m_pia21(*this, "pia21"),
53   m_pia24(*this, "pia24"),
54   m_pia28(*this, "pia28"),
55   m_pia2c(*this, "pia2c"),
56   m_pia30(*this, "pia30"),
57   m_pia34(*this, "pia34"),
58   m_pia40(*this, "pia40"),
59   m_ym(*this, "ym2151")
60   { }
61
62   DECLARE_READ8_MEMBER(dac_r);
63   DECLARE_WRITE8_MEMBER(dac_w);
64   DECLARE_WRITE8_MEMBER(bank_w);
65   DECLARE_WRITE8_MEMBER(bgbank_w);
66   DECLARE_WRITE8_MEMBER(dig0_w);
67   DECLARE_WRITE8_MEMBER(dig1_w);
68   DECLARE_WRITE8_MEMBER(lamp0_w);
69   DECLARE_WRITE8_MEMBER(lamp1_w) { };
70   DECLARE_WRITE8_MEMBER(sol2_w) { }; // solenoids 8-15
71   DECLARE_WRITE8_MEMBER(sol3_w); // solenoids 0-7
72   DECLARE_WRITE8_MEMBER(sound_w);
73   DECLARE_WRITE8_MEMBER(pia2c_pa_w);
74   DECLARE_WRITE8_MEMBER(pia2c_pb_w);
75   DECLARE_WRITE8_MEMBER(pia34_pa_w);
76   DECLARE_WRITE8_MEMBER(pia34_pb_w);
77   DECLARE_WRITE_LINE_MEMBER(pia34_cb2_w);
78   DECLARE_WRITE8_MEMBER(pia40_pa_w);
79   DECLARE_WRITE8_MEMBER(pia40_pb_w);
80   DECLARE_WRITE_LINE_MEMBER(pia40_cb2_w);
81   DECLARE_READ8_MEMBER(dips_r);
82   DECLARE_READ8_MEMBER(switch_r);
83   DECLARE_WRITE8_MEMBER(switch_w);
84   DECLARE_READ_LINE_MEMBER(pias_ca1_r);
85   DECLARE_READ_LINE_MEMBER(pia21_ca1_r);
86   DECLARE_READ8_MEMBER(pia28_w7_r);
87   DECLARE_WRITE_LINE_MEMBER(pias_ca2_w);
88   DECLARE_WRITE_LINE_MEMBER(pias_cb2_w);
89   DECLARE_WRITE_LINE_MEMBER(pia21_ca2_w);
90   DECLARE_WRITE_LINE_MEMBER(pia21_cb2_w) { }; // enable solenoids
91   DECLARE_WRITE_LINE_MEMBER(pia24_cb2_w) { }; // dummy to stop error log filling up
92   DECLARE_WRITE_LINE_MEMBER(pia28_ca2_w) { }; // comma3&4
93   DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w) { }; // comma1&2
94   DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w) { }; // dummy to stop error log filling up
95   DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w);
96   DECLARE_WRITE_LINE_MEMBER(pia_irq);
97   TIMER_DEVICE_CALLBACK_MEMBER(irq);
98   DECLARE_INPUT_CHANGED_MEMBER(main_nmi);
99   DECLARE_INPUT_CHANGED_MEMBER(audio_nmi);
100   DECLARE_MACHINE_RESET(s11a);
101   DECLARE_DRIVER_INIT(s11a);
102protected:
103
104   // devices
105   required_device<cpu_device> m_maincpu;
106   required_device<cpu_device> m_audiocpu;
107   required_device<cpu_device> m_bgcpu;
108   required_device<dac_device> m_dac;
109   required_device<dac_device> m_dac1;
110   required_device<hc55516_device> m_hc55516;
111   required_device<pia6821_device> m_pias;
112   required_device<pia6821_device> m_pia21;
113   required_device<pia6821_device> m_pia24;
114   required_device<pia6821_device> m_pia28;
115   required_device<pia6821_device> m_pia2c;
116   required_device<pia6821_device> m_pia30;
117   required_device<pia6821_device> m_pia34;
118   required_device<pia6821_device> m_pia40;
119   required_device<ym2151_device> m_ym;
120
121   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
122private:
123   UINT8 m_sound_data;
124   UINT8 m_strobe;
125   UINT8 m_kbdrow;
126   UINT8 m_diag;
127   UINT32 m_segment1;
128   UINT32 m_segment2;
129   bool m_ca1;
130   emu_timer* m_irq_timer;
131   bool m_irq_active;
132
133   static const device_timer_id TIMER_IRQ = 0;
134};
135
13632static ADDRESS_MAP_START( s11a_main_map, AS_PROGRAM, 8, s11a_state )
13733   AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("nvram")
13834   AM_RANGE(0x2100, 0x2103) AM_MIRROR(0x00fc) AM_DEVREADWRITE("pia21", pia6821_device, read, write) // sound+solenoids
r19982r19983
241137   PORT_CONFSETTING( 0x10, "English" )
242138INPUT_PORTS_END
243139
244void s11a_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
245{
246   switch(id)
247   {
248   case TIMER_IRQ:
249      if(param == 1)
250      {
251         m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE);
252         m_irq_timer->adjust(attotime::from_ticks(32,E_CLOCK),0);
253         m_pias->cb1_w(0);
254         m_irq_active = true;
255         m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2));  // Advance
256         m_pia28->cb1_w(BIT(ioport("DIAGS")->read(), 3));  // Up/Down
257      }
258      else
259      {
260         m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE);
261         m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
262         m_pias->cb1_w(1);
263         m_irq_active = false;
264         m_pia28->ca1_w(1);
265         m_pia28->cb1_w(1);
266      }
267      break;
268   }
269}
270140
271141MACHINE_RESET_MEMBER( s11a_state, s11a )
272142{
273   membank("bank0")->set_entry(0);
274   membank("bank1")->set_entry(0);
143   MACHINE_RESET_CALL_MEMBER(s11);
275144   membank("bgbank")->set_entry(0);
276145}
277146
278INPUT_CHANGED_MEMBER( s11a_state::main_nmi )
279{
280   // Diagnostic button sends a pulse to NMI pin
281   if (newval==CLEAR_LINE)
282      m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
283}
284
285INPUT_CHANGED_MEMBER( s11a_state::audio_nmi )
286{
287   // Diagnostic button sends a pulse to NMI pin
288   if (newval==CLEAR_LINE)
289      m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
290}
291
292WRITE_LINE_MEMBER( s11a_state::pia_irq )
293{
294   if(state == CLEAR_LINE)
295   {
296      // restart IRQ timer
297      m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
298      m_irq_active = false;
299   }
300   else
301   {
302      // disable IRQ timer while other IRQs are being handled
303      // (counter is reset every 32 cycles while a PIA IRQ is handled)
304      m_irq_timer->adjust(attotime::zero);
305      m_irq_active = true;
306   }
307}
308
309WRITE8_MEMBER( s11a_state::sol3_w )
310{
311
312}
313
314WRITE8_MEMBER( s11a_state::sound_w )
315{
316   m_sound_data = data;
317}
318
319WRITE_LINE_MEMBER( s11a_state::pia21_ca2_w )
320{
321// sound ns
322   m_ca1 = state;
323   m_pias->ca1_w(m_ca1);
324   m_pia40->cb2_w(m_ca1);
325}
326
327147static const pia6821_interface pia21_intf =
328148{
329   DEVCB_DRIVER_MEMBER(s11a_state, dac_r),      /* port A in */
149   DEVCB_DRIVER_MEMBER(s11_state, dac_r),      /* port A in */
330150   DEVCB_NULL,      /* port B in */
331151   DEVCB_NULL,      /* line CA1 in */
332152   DEVCB_LINE_GND,      /* line CB1 in */
333153   DEVCB_NULL,      /* line CA2 in */
334154   DEVCB_NULL,      /* line CB2 in */
335   DEVCB_DRIVER_MEMBER(s11a_state, sound_w),      /* port A out */
336   DEVCB_DRIVER_MEMBER(s11a_state, sol2_w),      /* port B out */
337   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia21_ca2_w),      /* line CA2 out */
338   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia21_cb2_w),      /* line CB2 out */
339   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
340   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
155   DEVCB_DRIVER_MEMBER(s11_state, sound_w),      /* port A out */
156   DEVCB_DRIVER_MEMBER(s11_state, sol2_w),      /* port B out */
157   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia21_ca2_w),      /* line CA2 out */
158   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia21_cb2_w),      /* line CB2 out */
159   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
160   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
341161};
342162
343WRITE8_MEMBER( s11a_state::lamp0_w )
344{
345   m_maincpu->set_input_line(M6800_IRQ_LINE, CLEAR_LINE);
346}
347
348163static const pia6821_interface pia24_intf =
349164{
350165   DEVCB_NULL,      /* port A in */
r19982r19983
353168   DEVCB_LINE_GND,      /* line CB1 in */
354169   DEVCB_LINE_VCC,      /* line CA2 in */
355170   DEVCB_LINE_VCC,      /* line CB2 in */
356   DEVCB_DRIVER_MEMBER(s11a_state, lamp0_w),      /* port A out */
357   DEVCB_DRIVER_MEMBER(s11a_state, lamp1_w),      /* port B out */
171   DEVCB_DRIVER_MEMBER(s11_state, lamp0_w),      /* port A out */
172   DEVCB_DRIVER_MEMBER(s11_state, lamp1_w),      /* port B out */
358173   DEVCB_NULL,      /* line CA2 out */
359   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia24_cb2_w),      /* line CB2 out */
360   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
361   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
174   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia24_cb2_w),      /* line CB2 out */
175   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
176   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
362177};
363178
364179WRITE8_MEMBER( s11a_state::dig0_w )
365180{
366181   data &= 0x7f;
367   m_strobe = data & 15;
368   m_diag = (data & 0x70) >> 4;
369   output_set_digit_value(60, 0);  // not connected to PA5 or PA6?
370   output_set_digit_value(61, m_diag & 0x01);  // connected to PA4
371   output_set_digit_value(62, 0);
372   m_segment1 = 0;
373   m_segment2 = 0;
182   set_strobe(data & 15);
183   set_diag((data & 0x70) >> 4);
184   output_set_digit_value(60, 0);  // +5VDC (always on)
185   output_set_digit_value(61, get_diag() & 0x01);  // connected to PA4
186   output_set_digit_value(62, 0);  // Blanking (pretty much always on)
187   set_segment1(0);
188   set_segment2(0);
374189}
375190
376WRITE8_MEMBER( s11a_state::dig1_w )
377{
378   m_segment2 |= data;
379   m_segment2 |= 0x20000;
380   if ((m_segment2 & 0x70000) == 0x30000)
381   {
382      output_set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0));
383      m_segment2 |= 0x40000;
384   }
385}
386
387READ8_MEMBER( s11a_state::pia28_w7_r)
388{
389   UINT8 ret = 0x80;
390
391   ret |= m_strobe;
392   ret |= m_diag << 4;
393
394   if(BIT(ioport("DIAGS")->read(), 4))  // W7 Jumper
395      ret &= ~0x80;
396
397   return ret;
398}
399
400191static const pia6821_interface pia28_intf =
401192{
402   DEVCB_DRIVER_MEMBER(s11a_state, pia28_w7_r),      /* port A in */
193   DEVCB_DRIVER_MEMBER(s11_state, pia28_w7_r),      /* port A in */
403194   DEVCB_NULL,      /* port B in */
404195   DEVCB_NULL,      /* line CA1 in */
405196   DEVCB_NULL,      /* line CB1 in */
406197   DEVCB_NULL,      /* line CA2 in */
407198   DEVCB_NULL,      /* line CB2 in */
408199   DEVCB_DRIVER_MEMBER(s11a_state, dig0_w),      /* port A out */
409   DEVCB_DRIVER_MEMBER(s11a_state, dig1_w),      /* port B out */
410   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia28_ca2_w),      /* line CA2 out */
411   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia28_cb2_w),      /* line CB2 out */
412   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
413   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
200   DEVCB_DRIVER_MEMBER(s11_state, dig1_w),      /* port B out */
201   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia28_ca2_w),      /* line CA2 out */
202   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia28_cb2_w),      /* line CB2 out */
203   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
204   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
414205};
415206
416WRITE8_MEMBER( s11a_state::pia2c_pa_w )
417{
418   m_segment1 |= (data<<8);
419   m_segment1 |= 0x10000;
420   if ((m_segment1 & 0x70000) == 0x30000)
421   {
422      output_set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0));
423      m_segment1 |= 0x40000;
424   }
425}
426
427WRITE8_MEMBER( s11a_state::pia2c_pb_w )
428{
429   m_segment1 |= data;
430   m_segment1 |= 0x20000;
431   if ((m_segment1 & 0x70000) == 0x30000)
432   {
433      output_set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0));
434      m_segment1 |= 0x40000;
435   }
436}
437
438207static const pia6821_interface pia2c_intf =
439208{
440209   DEVCB_NULL,      /* port A in */
r19982r19983
443212   DEVCB_NULL,      /* line CB1 in */
444213   DEVCB_NULL,      /* line CA2 in */
445214   DEVCB_NULL,      /* line CB2 in */
446   DEVCB_DRIVER_MEMBER(s11a_state, pia2c_pa_w),      /* port A out */
447   DEVCB_DRIVER_MEMBER(s11a_state, pia2c_pb_w),      /* port B out */
215   DEVCB_DRIVER_MEMBER(s11_state, pia2c_pa_w),      /* port A out */
216   DEVCB_DRIVER_MEMBER(s11_state, pia2c_pb_w),      /* port B out */
448217   DEVCB_NULL,      /* line CA2 out */
449218   DEVCB_NULL,      /* line CB2 out */
450   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
451   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
219   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
220   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
452221};
453222
454READ8_MEMBER( s11a_state::switch_r )
455{
456   char kbdrow[8];
457   sprintf(kbdrow,"X%X",m_kbdrow);
458   return ~ioport(kbdrow)->read();
459}
460
461WRITE8_MEMBER( s11a_state::switch_w )
462{
463   m_kbdrow = data;
464}
465
466223static const pia6821_interface pia30_intf =
467224{
468   DEVCB_DRIVER_MEMBER(s11a_state, switch_r),      /* port A in */
225   DEVCB_DRIVER_MEMBER(s11_state, switch_r),      /* port A in */
469226   DEVCB_NULL,      /* port B in */
470227   DEVCB_LINE_GND,      /* line CA1 in */
471228   DEVCB_LINE_GND,      /* line CB1 in */
472229   DEVCB_LINE_VCC,      /* line CA2 in */
473230   DEVCB_LINE_VCC,      /* line CB2 in */
474231   DEVCB_NULL,      /* port A out */
475   DEVCB_DRIVER_MEMBER(s11a_state, switch_w),      /* port B out */
232   DEVCB_DRIVER_MEMBER(s11_state, switch_w),      /* port B out */
476233   DEVCB_NULL,      /* line CA2 out */
477   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia30_cb2_w),      /* line CB2 out */
478   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
479   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
234   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia30_cb2_w),      /* line CB2 out */
235   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
236   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
480237};
481238
482WRITE8_MEMBER( s11a_state::pia34_pa_w )
483{
484   m_segment2 |= (data<<8);
485   m_segment2 |= 0x10000;
486   if ((m_segment2 & 0x70000) == 0x30000)
487   {
488      output_set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0));
489      m_segment2 |= 0x40000;
490   }
491}
492
493WRITE8_MEMBER( s11a_state::pia34_pb_w )
494{
495   m_pia40->portb_w(data);
496}
497
498WRITE_LINE_MEMBER( s11a_state::pia34_cb2_w )
499{
500   m_pia40->cb1_w(state);  // MCB2 through CPU interface
501}
502
503239static const pia6821_interface pia34_intf =
504240{
505241   DEVCB_NULL,      /* port A in */
r19982r19983
508244   DEVCB_NULL,      /* line CB1 in */
509245   DEVCB_NULL,      /* line CA2 in */
510246   DEVCB_NULL,      /* line CB2 in */
511   DEVCB_DRIVER_MEMBER(s11a_state, pia34_pa_w),      /* port A out */
512   DEVCB_DRIVER_MEMBER(s11a_state, pia34_pb_w),      /* port B out */
247   DEVCB_DRIVER_MEMBER(s11_state, pia34_pa_w),      /* port A out */
248   DEVCB_DRIVER_MEMBER(s11_state, pia34_pb_w),      /* port B out */
513249   DEVCB_NULL,      /* line CA2 out */
514   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia34_cb2_w),      /* line CB2 out */
515   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
516   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
250   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia34_cb2_w),      /* line CB2 out */
251   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
252   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
517253};
518254
519WRITE8_MEMBER( s11a_state::bank_w )
520{
521   membank("bank0")->set_entry(BIT(data, 1));
522   membank("bank1")->set_entry(BIT(data, 0));
523}
524
525255WRITE8_MEMBER( s11a_state::bgbank_w )
526256{
527257   membank("bgbank")->set_entry(BIT(data, 0));
528258}
529259
530READ_LINE_MEMBER( s11a_state::pias_ca1_r )
531{
532   return m_ca1;
533}
534
535WRITE_LINE_MEMBER( s11a_state::pias_ca2_w )
536{
537// speech clock
538   hc55516_clock_w(m_hc55516, state);
539}
540
541WRITE_LINE_MEMBER( s11a_state::pias_cb2_w )
542{
543// speech data
544   hc55516_digit_w(m_hc55516, state);
545}
546
547READ8_MEMBER( s11a_state::dac_r )
548{
549   return m_sound_data;
550}
551
552WRITE8_MEMBER( s11a_state::dac_w )
553{
554   m_dac->write_unsigned8(data);
555}
556
557WRITE_LINE_MEMBER( s11a_state::pia40_cb2_w)
558{
559   m_pia34->cb1_w(state);  // To Widget MCB1 through CPU Data interface
560}
561
562260static const pia6821_interface pias_intf =
563261{
564   DEVCB_DRIVER_MEMBER(s11a_state, dac_r),      /* port A in */
262   DEVCB_DRIVER_MEMBER(s11_state, dac_r),      /* port A in */
565263   DEVCB_NULL,      /* port B in */
566   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pias_ca1_r),      /* line CA1 in */
264   DEVCB_DRIVER_LINE_MEMBER(s11_state, pias_ca1_r),      /* line CA1 in */
567265   DEVCB_NULL,      /* line CB1 in */
568266   DEVCB_NULL,      /* line CA2 in */
569267   DEVCB_NULL,      /* line CB2 in */
570   DEVCB_DRIVER_MEMBER(s11a_state, sound_w),      /* port A out */
571   DEVCB_DRIVER_MEMBER(s11a_state, dac_w),      /* port B out */
268   DEVCB_DRIVER_MEMBER(s11_state, sound_w),      /* port A out */
269   DEVCB_DRIVER_MEMBER(s11_state, dac_w),      /* port B out */
572270   DEVCB_NULL,      /* line CA2 out */
573   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia40_cb2_w),      /* line CB2 out */
271   DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_cb2_w),      /* line CB2 out */
574272   DEVCB_CPU_INPUT_LINE("audiocpu", M6800_IRQ_LINE),      /* IRQA */
575273   DEVCB_CPU_INPUT_LINE("audiocpu", M6800_IRQ_LINE)      /* IRQB */
576274};
577275
578WRITE8_MEMBER( s11a_state::pia40_pa_w )
579{
580   m_dac1->write_unsigned8(data);
581}
582
583WRITE8_MEMBER( s11a_state::pia40_pb_w )
584{
585   m_pia34->portb_w(data);
586}
587
588WRITE_LINE_MEMBER( s11a_state::ym2151_irq_w)
589{
590   if(state == CLEAR_LINE)
591      m_pia40->ca1_w(1);
592   else
593      m_pia40->ca1_w(0);
594}
595
596276static const pia6821_interface pia40_intf =
597277{
598278   DEVCB_NULL,      /* port A in */
599279   DEVCB_NULL,      /* port B in */
600   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pias_ca1_r),      /* line CA1 in */
280   DEVCB_DRIVER_LINE_MEMBER(s11_state, pias_ca1_r),      /* line CA1 in */
601281   DEVCB_NULL,      /* line CB1 in */
602282   DEVCB_LINE_VCC,      /* line CA2 in */
603283   DEVCB_NULL,      /* line CB2 in */
604   DEVCB_DRIVER_MEMBER(s11a_state, pia40_pa_w),      /* port A out */
605   DEVCB_DRIVER_MEMBER(s11a_state, pia40_pb_w),      /* port B out */
606   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pias_ca2_w),      /* line CA2 out */
607   DEVCB_DRIVER_LINE_MEMBER(s11a_state, pias_cb2_w),      /* line CB2 out */
284   DEVCB_DRIVER_MEMBER(s11_state, pia40_pa_w),      /* port A out */
285   DEVCB_DRIVER_MEMBER(s11_state, pia40_pb_w),      /* port B out */
286   DEVCB_DRIVER_LINE_MEMBER(s11_state, pias_ca2_w),      /* line CA2 out */
287   DEVCB_DRIVER_LINE_MEMBER(s11_state, pias_cb2_w),      /* line CB2 out */
608288   DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE),      /* IRQA */
609289   DEVCB_CPU_INPUT_LINE("bgcpu", INPUT_LINE_NMI)      /* IRQB */
610290};
611291
612292DRIVER_INIT_MEMBER( s11a_state, s11a )
613293{
614   UINT8 *ROM = memregion("audiocpu")->base();
615294   UINT8 *BGROM = memregion("bgcpu")->base();
616   membank("bank0")->configure_entries(0, 2, &ROM[0x10000], 0x4000);
617   membank("bank1")->configure_entries(0, 2, &ROM[0x18000], 0x4000);
618295   membank("bgbank")->configure_entries(0, 2, &BGROM[0x10000], 0x8000);
619   membank("bank0")->set_entry(0);
620   membank("bank1")->set_entry(0);
621296   membank("bgbank")->set_entry(0);
622   m_irq_timer = timer_alloc(TIMER_IRQ);
623   m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
624   m_irq_active = false;
297   s11_state::init_s11();
625298}
626299
627300static MACHINE_CONFIG_START( s11a, s11a_state )

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