trunk/src/mame/drivers/harddriv.c
| r19943 | r19944 | |
| 164 | 164 | Metal Maniax (prototype) |
| 165 | 165 | - reworked hardware that is similar but not of the same layout |
| 166 | 166 | |
| 167 | TODO: |
| 168 | - Fix serial communications between the two DS III/IV sound ADSPs |
| 169 | (The auxillary DSP is used to process the output of the sound DSP) |
| 170 | |
| 167 | 171 | **************************************************************************** |
| 168 | 172 | |
| 169 | 173 | Race Drivin' Compact |
| r19943 | r19944 | |
| 580 | 584 | AM_RANGE(0x2000, 0x3fff) AM_READWRITE_LEGACY(hdds3_special_r, hdds3_special_w) |
| 581 | 585 | ADDRESS_MAP_END |
| 582 | 586 | |
| 583 | | #if 0 |
| 584 | | static ADDRESS_MAP_START( ds3snd_program_map, AS_PROGRAM, 32, harddriv_state ) |
| 587 | |
| 588 | static ADDRESS_MAP_START( ds3sdsp_program_map, AS_PROGRAM, 32, harddriv_state ) |
| 585 | 589 | ADDRESS_MAP_UNMAP_HIGH |
| 586 | | AM_RANGE(0x0000, 0x3fff) AM_RAM |
| 590 | AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("ds3sdsp_pgm") |
| 587 | 591 | ADDRESS_MAP_END |
| 588 | 592 | |
| 593 | static ADDRESS_MAP_START( ds3sdsp_data_map, AS_DATA, 16, harddriv_state ) |
| 594 | ADDRESS_MAP_UNMAP_HIGH |
| 595 | AM_RANGE(0x3800, 0x39ff) AM_RAM /* internal RAM */ |
| 596 | AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(hdds3_sdsp_control_r, hdds3_sdsp_control_w) |
| 597 | AM_RANGE(0x2000, 0x3fff) AM_READWRITE_LEGACY(hdds3_sdsp_special_r, hdds3_sdsp_special_w) |
| 598 | ADDRESS_MAP_END |
| 589 | 599 | |
| 590 | | static ADDRESS_MAP_START( ds3snd_data_map, AS_DATA, 16, harddriv_state ) |
| 600 | |
| 601 | static ADDRESS_MAP_START( ds3xdsp_program_map, AS_PROGRAM, 32, harddriv_state ) |
| 591 | 602 | ADDRESS_MAP_UNMAP_HIGH |
| 592 | | AM_RANGE(0x0000, 0x1fff) AM_RAM |
| 593 | | AM_RANGE(0x3800, 0x3bff) AM_RAM /* internal RAM */ |
| 594 | | AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(hdds3_control_r, hdds3_control_w) /* adsp control regs */ |
| 595 | | // |
| 596 | | // /SIRQ2 = IRQ2 |
| 597 | | // /SRES -> RESET |
| 598 | | // |
| 599 | | // 2xx0 W = SWR0 (POUT) |
| 600 | | // 2xx1 W = SWR1 (SINT) |
| 601 | | // 2xx2 W = SWR2 (TFLAG) |
| 602 | | // 2xx3 W = SWR3 (INTSRC) |
| 603 | | // 2xx4 W = DACL |
| 604 | | // 2xx5 W = DACR |
| 605 | | // 2xx6 W = SRMADL |
| 606 | | // 2xx7 W = SRMADH |
| 607 | | // |
| 608 | | // 2xx0 R = SRD0 (PIN) |
| 609 | | // 2xx1 R = SRD1 (RSAT) |
| 610 | | // 2xx4 R = SROM |
| 611 | | // 2xx7 R = SFWCLR |
| 612 | | // |
| 613 | | // |
| 614 | | // /XRES -> RESET |
| 615 | | // communicate over serial I/O |
| 603 | AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("ds3xdsp_pgm") |
| 604 | ADDRESS_MAP_END |
| 616 | 605 | |
| 606 | static ADDRESS_MAP_START( ds3xdsp_data_map, AS_DATA, 16, harddriv_state ) |
| 607 | ADDRESS_MAP_UNMAP_HIGH |
| 608 | AM_RANGE(0x0000, 0x1fff) AM_RAM // TODO |
| 609 | AM_RANGE(0x3800, 0x39ff) AM_RAM /* internal RAM */ |
| 610 | AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(hdds3_xdsp_control_r, hdds3_xdsp_control_w) |
| 617 | 611 | ADDRESS_MAP_END |
| 618 | | #endif |
| 619 | 612 | |
| 620 | 613 | |
| 614 | |
| 621 | 615 | /************************************* |
| 622 | 616 | * |
| 623 | 617 | * DSK board memory maps |
| r19943 | r19944 | |
| 1314 | 1308 | |
| 1315 | 1309 | /************************************* |
| 1316 | 1310 | * |
| 1311 | * CPU configuration |
| 1312 | * |
| 1313 | *************************************/ |
| 1314 | |
| 1315 | static const adsp21xx_config ds3sdsp_config = |
| 1316 | { |
| 1317 | hdds3sdsp_serial_rx_callback, /* callback for serial receive */ |
| 1318 | hdds3sdsp_serial_tx_callback, /* callback for serial transmit */ |
| 1319 | hdds3sdsp_timer_enable_callback /* callback for timer fired */ |
| 1320 | }; |
| 1321 | |
| 1322 | static const adsp21xx_config ds3xdsp_config = |
| 1323 | { |
| 1324 | hdds3xdsp_serial_rx_callback, /* callback for serial receive */ |
| 1325 | hdds3xdsp_serial_tx_callback, /* callback for serial transmit */ |
| 1326 | hdds3xdsp_timer_enable_callback /* callback for timer fired */ |
| 1327 | }; |
| 1328 | |
| 1329 | |
| 1330 | |
| 1331 | /************************************* |
| 1332 | * |
| 1317 | 1333 | * Main board pieces |
| 1318 | 1334 | * |
| 1319 | 1335 | *************************************/ |
| r19943 | r19944 | |
| 1417 | 1433 | MACHINE_CONFIG_END |
| 1418 | 1434 | |
| 1419 | 1435 | |
| 1420 | | /* DS III board (used by Steel Talons) */ |
| 1436 | /* DS III/IV board (used by Steel Talons, Street Drivin' and Hard Drivin's Airborne) */ |
| 1421 | 1437 | static MACHINE_CONFIG_FRAGMENT( ds3 ) |
| 1422 | 1438 | |
| 1423 | 1439 | /* basic machine hardware */ |
| 1424 | 1440 | MCFG_CPU_ADD("adsp", ADSP2101, XTAL_12MHz) |
| 1425 | 1441 | MCFG_CPU_PROGRAM_MAP(ds3_program_map) |
| 1426 | 1442 | MCFG_CPU_DATA_MAP(ds3_data_map) |
| 1427 | | |
| 1428 | 1443 | MCFG_QUANTUM_TIME(attotime::from_hz(60000)) |
| 1429 | | MACHINE_CONFIG_END |
| 1430 | 1444 | |
| 1445 | MCFG_CPU_ADD("ds3sdsp", ADSP2105, XTAL_10MHz) |
| 1446 | MCFG_ADSP21XX_CONFIG(ds3sdsp_config) |
| 1447 | MCFG_CPU_PROGRAM_MAP(ds3sdsp_program_map) |
| 1448 | MCFG_CPU_DATA_MAP(ds3sdsp_data_map) |
| 1449 | MCFG_TIMER_ADD("ds3sdsp_timer", ds3sdsp_internal_timer_callback) |
| 1431 | 1450 | |
| 1432 | | /* DS IV board (used by Hard Drivin's Airborne) */ |
| 1433 | | static MACHINE_CONFIG_FRAGMENT( ds4 ) |
| 1451 | MCFG_CPU_ADD("ds3xdsp", ADSP2105, XTAL_10MHz) |
| 1452 | MCFG_ADSP21XX_CONFIG(ds3xdsp_config) |
| 1453 | MCFG_CPU_PROGRAM_MAP(ds3xdsp_program_map) |
| 1454 | MCFG_CPU_DATA_MAP(ds3xdsp_data_map) |
| 1455 | MCFG_TIMER_ADD("ds3xdsp_timer", ds3xdsp_internal_timer_callback) |
| 1434 | 1456 | |
| 1435 | | /* basic machine hardware */ |
| 1436 | | MCFG_CPU_ADD("adsp", ADSP2101, XTAL_12MHz) |
| 1437 | | MCFG_CPU_PROGRAM_MAP(ds3_program_map) |
| 1438 | | MCFG_CPU_DATA_MAP(ds3_data_map) |
| 1439 | | |
| 1440 | | // MCFG_CPU_ADD("ds4cpu1", ADSP2105, 10000000) |
| 1441 | | // MCFG_CPU_PROGRAM_MAP(ds3snd_program_map) |
| 1442 | | |
| 1443 | | // MCFG_CPU_ADD("ds4cpu2", ADSP2105, 10000000) |
| 1444 | | // MCFG_CPU_PROGRAM_MAP(ds3snd_program_map) |
| 1445 | | |
| 1446 | 1457 | MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") |
| 1447 | 1458 | |
| 1448 | | MCFG_DAC_ADD("dac1") |
| 1459 | MCFG_SOUND_ADD("ds3dac1", DAC, 0) |
| 1449 | 1460 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0) |
| 1450 | 1461 | |
| 1451 | | MCFG_DAC_ADD("dac2") |
| 1462 | MCFG_SOUND_ADD("ds3dac2", DAC, 0) |
| 1452 | 1463 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0) |
| 1453 | 1464 | MACHINE_CONFIG_END |
| 1454 | 1465 | |
| r19943 | r19944 | |
| 1529 | 1540 | |
| 1530 | 1541 | static MACHINE_CONFIG_DERIVED( harddrivc, multisync_msp ) |
| 1531 | 1542 | |
| 1532 | | /* basic machine hardware */ /* multisync board with MSP */ |
| 1543 | /* basic machine hardware */ /* multisync board with MSP */ |
| 1533 | 1544 | MCFG_FRAGMENT_ADD( adsp ) /* ADSP board */ |
| 1534 | 1545 | MCFG_FRAGMENT_ADD( driversnd ) /* driver sound board */ |
| 1535 | 1546 | MACHINE_CONFIG_END |
| r19943 | r19944 | |
| 1537 | 1548 | |
| 1538 | 1549 | static MACHINE_CONFIG_DERIVED( racedriv, driver_nomsp ) |
| 1539 | 1550 | |
| 1540 | | /* basic machine hardware */ /* original driver board without MSP */ |
| 1551 | /* basic machine hardware */ /* original driver board without MSP */ |
| 1541 | 1552 | MCFG_FRAGMENT_ADD( adsp ) /* ADSP board */ |
| 1542 | | MCFG_FRAGMENT_ADD( dsk ) /* DSK board */ |
| 1553 | MCFG_FRAGMENT_ADD( dsk ) /* DSK board */ |
| 1543 | 1554 | MCFG_FRAGMENT_ADD( driversnd ) /* driver sound board */ |
| 1544 | 1555 | MACHINE_CONFIG_END |
| 1545 | 1556 | |
| 1546 | 1557 | |
| 1547 | 1558 | static MACHINE_CONFIG_DERIVED( racedrivc, multisync_nomsp ) |
| 1548 | 1559 | |
| 1549 | | /* basic machine hardware */ /* multisync board without MSP */ |
| 1560 | /* basic machine hardware */ /* multisync board without MSP */ |
| 1550 | 1561 | MCFG_FRAGMENT_ADD( adsp ) /* ADSP board */ |
| 1551 | | MCFG_FRAGMENT_ADD( dsk ) /* DSK board */ |
| 1562 | MCFG_FRAGMENT_ADD( dsk ) /* DSK board */ |
| 1552 | 1563 | MCFG_FRAGMENT_ADD( driversnd ) /* driver sound board */ |
| 1553 | 1564 | MACHINE_CONFIG_END |
| 1554 | 1565 | |
| 1555 | 1566 | |
| 1556 | 1567 | static MACHINE_CONFIG_DERIVED( stunrun, multisync_nomsp ) |
| 1557 | 1568 | |
| 1558 | | /* basic machine hardware */ /* multisync board without MSP */ |
| 1569 | /* basic machine hardware */ /* multisync board without MSP */ |
| 1559 | 1570 | MCFG_CPU_MODIFY("gsp") |
| 1560 | 1571 | MCFG_CPU_CONFIG(gsp_config_multisync_stunrun) |
| 1561 | 1572 | MCFG_FRAGMENT_ADD( adsp ) /* ADSP board */ |
| 1562 | | MCFG_FRAGMENT_ADD( jsa_ii_mono ) /* JSA II sound board */ |
| 1573 | MCFG_FRAGMENT_ADD( jsa_ii_mono ) /* JSA II sound board */ |
| 1563 | 1574 | |
| 1564 | 1575 | /* video hardware */ |
| 1565 | 1576 | MCFG_SCREEN_MODIFY("screen") |
| r19943 | r19944 | |
| 1567 | 1578 | MACHINE_CONFIG_END |
| 1568 | 1579 | |
| 1569 | 1580 | |
| 1570 | | static MACHINE_CONFIG_DERIVED( strtdriv, multisync_nomsp ) |
| 1581 | static MACHINE_CONFIG_DERIVED( steeltal, multisync_msp ) |
| 1571 | 1582 | |
| 1572 | | /* basic machine hardware */ /* multisync board */ |
| 1573 | | MCFG_FRAGMENT_ADD( ds3 ) /* DS III board */ |
| 1574 | | MCFG_FRAGMENT_ADD( dsk ) /* DSK board */ |
| 1583 | /* basic machine hardware */ /* multisync board with MSP */ |
| 1584 | MCFG_FRAGMENT_ADD( ds3 ) /* DS III board */ |
| 1585 | MCFG_DEVICE_REMOVE("ds3sdsp") /* DS III sound components are not present */ |
| 1586 | MCFG_DEVICE_REMOVE("ds3xdsp") |
| 1587 | MCFG_DEVICE_REMOVE("ds3dac1") |
| 1588 | MCFG_DEVICE_REMOVE("ds3dac2") |
| 1589 | MCFG_DEVICE_REMOVE("lspeaker") |
| 1590 | MCFG_DEVICE_REMOVE("rspeaker") |
| 1591 | |
| 1592 | MCFG_FRAGMENT_ADD( jsa_iii_mono ) /* JSA III sound board */ |
| 1593 | MCFG_FRAGMENT_ADD( asic65 ) /* ASIC65 on DSPCOM board */ |
| 1575 | 1594 | MACHINE_CONFIG_END |
| 1576 | 1595 | |
| 1577 | 1596 | |
| 1578 | | static MACHINE_CONFIG_DERIVED( steeltal, multisync_msp ) |
| 1597 | static MACHINE_CONFIG_DERIVED( strtdriv, multisync_nomsp ) |
| 1579 | 1598 | |
| 1580 | | /* basic machine hardware */ /* multisync board with MSP */ |
| 1581 | | MCFG_FRAGMENT_ADD( ds3 ) /* DS III board */ |
| 1582 | | MCFG_FRAGMENT_ADD( jsa_iii_mono ) /* JSA III sound board */ |
| 1583 | | MCFG_FRAGMENT_ADD( asic65 ) /* ASIC65 on DSPCOM board */ |
| 1599 | /* basic machine hardware */ /* multisync board */ |
| 1600 | MCFG_FRAGMENT_ADD( ds3 ) /* DS III board */ |
| 1601 | MCFG_CPU_MODIFY("ds3xdsp") /* DS III auxiliary sound DSP has no code */ |
| 1602 | MCFG_DEVICE_DISABLE() |
| 1603 | |
| 1604 | MCFG_FRAGMENT_ADD( dsk ) /* DSK board */ |
| 1584 | 1605 | MACHINE_CONFIG_END |
| 1585 | 1606 | |
| 1586 | 1607 | |
| 1587 | 1608 | static MACHINE_CONFIG_DERIVED( hdrivair, multisync2 ) |
| 1588 | 1609 | |
| 1589 | 1610 | /* basic machine hardware */ /* multisync II board */ |
| 1590 | | MCFG_FRAGMENT_ADD( ds4 ) /* DS IV board */ |
| 1611 | MCFG_FRAGMENT_ADD( ds3 ) /* DS IV board */ |
| 1591 | 1612 | MCFG_FRAGMENT_ADD( dsk2 ) /* DSK II board */ |
| 1592 | 1613 | MACHINE_CONFIG_END |
| 1593 | 1614 | |
| r19943 | r19944 | |
| 3847 | 3868 | ROM_LOAD16_BYTE( "136091-0026.30e", 0x000000, 0x020000, CRC(47705109) SHA1(fa40275b71b74be8591282d2fba4215b98fc29c9) ) |
| 3848 | 3869 | ROM_LOAD16_BYTE( "136091-0025.10e", 0x000001, 0x020000, CRC(ead9254e) SHA1(92152d3ca77b542b3bb3398ccf414df28c95abfd) ) |
| 3849 | 3870 | |
| 3850 | | ROM_REGION16_BE( 0x100000, "user5", 0 ) |
| 3851 | | /* DS III sound section (2 x ADSP2105)*/ |
| 3871 | ROM_REGION16_BE( 0x100000, "ds3sdsp", 0 ) /* DS III sound ADSP-2105 */ |
| 3852 | 3872 | ROM_LOAD( "136091-0033.10j", 0x000000, 0x010000, CRC(57504ab6) SHA1(ec8361b7da964c07ca0da48a87537badc3986fe0) ) |
| 3853 | | ROM_LOAD( "136052-1123.12lm", 0x000000, 0x010000, CRC(a88411dc) SHA1(1fd53c7eadffa163d5423df2f8338757e58d5f2e) ) |
| 3854 | | ROM_LOAD( "136052-1124.12k", 0x000000, 0x010000, CRC(071a4309) SHA1(c623bd51d6a4a56503fbf138138854d6a30b11d6) ) |
| 3855 | | ROM_LOAD( "136052-3125.12j", 0x000000, 0x010000, CRC(856548ff) SHA1(e8a17b274185c5e4ecf5f9f1c211e18b3ef2456d) ) |
| 3856 | | ROM_LOAD( "136052-1126.12h", 0x000000, 0x010000, CRC(f46ef09c) SHA1(ba62f73ee3b33d8f26b430ffa468f8792dca23de) ) |
| 3857 | | ROM_LOAD( "136077-1017.12t", 0x000000, 0x010000, CRC(e93129a3) SHA1(1221b08c8efbfd8cf6bfbfd956545f10bef48663) ) |
| 3858 | 3873 | |
| 3874 | ROM_REGION16_BE( 0x100000, "ds3xdsp", 0 ) /* DS III auxillary ADSP-2105 (unused) */ |
| 3875 | ROM_FILL( 0x000000, 0x010000, 0x00) |
| 3876 | |
| 3877 | ROM_REGION( 0x80000, "ds3sdsp_data", 0 ) |
| 3878 | ROM_LOAD16_BYTE( "136052-1123.12lm",0x00000, 0x10000, CRC(a88411dc) SHA1(1fd53c7eadffa163d5423df2f8338757e58d5f2e) ) |
| 3879 | ROM_LOAD16_BYTE( "136077-1017.12t", 0x00001, 0x10000, CRC(e93129a3) SHA1(1221b08c8efbfd8cf6bfbfd956545f10bef48663) ) |
| 3880 | |
| 3881 | ROM_FILL( 0x20000, 0x20000, 0xff) /* 12R */ |
| 3882 | ROM_LOAD16_BYTE( "136052-1124.12k", 0x20000, 0x10000, CRC(071a4309) SHA1(c623bd51d6a4a56503fbf138138854d6a30b11d6) ) |
| 3883 | |
| 3884 | ROM_FILL( 0x40000, 0x20000, 0xff) /* 12P */ |
| 3885 | ROM_LOAD16_BYTE( "136052-3125.12j", 0x40000, 0x10000, CRC(856548ff) SHA1(e8a17b274185c5e4ecf5f9f1c211e18b3ef2456d) ) |
| 3886 | |
| 3887 | ROM_FILL( 0x60000, 0x20000, 0xff) /* 12N */ |
| 3888 | ROM_LOAD16_BYTE( "136052-1126.12h", 0x60000, 0x10000, CRC(f46ef09c) SHA1(ba62f73ee3b33d8f26b430ffa468f8792dca23de) ) |
| 3889 | |
| 3859 | 3890 | ROM_REGION( 0x1000, "eeprom", 0 ) |
| 3860 | 3891 | ROM_LOAD( "strtdriv-eeprom.bin", 0x0000, 0x1000, CRC(c71c0011) SHA1(1ceaf73df40e531df3bfb26b4fb7cd95fb7bff1d) ) |
| 3861 | 3892 | ROM_END |
| r19943 | r19944 | |
| 3875 | 3906 | ROM_LOAD16_BYTE( "coprochi.bin",0x1c0000, 0x20000, CRC(5d2ca109) SHA1(e1a94d3fbfd5d542732555bf60268e73d66b3a06) ) |
| 3876 | 3907 | ROM_LOAD16_BYTE( "coproclo.bin",0x1c0001, 0x20000, CRC(5f98b04d) SHA1(9c4fa4092fd85f1d67be44f2ff91a907a87db51a) ) |
| 3877 | 3908 | |
| 3878 | | ROM_REGION( 0x10000 + 0x10000, "dsp32", 0 ) /* dummy region for ADSP 2105 */ |
| 3879 | | ROM_LOAD( "sboot.bin", 0x10000 + 0x00000, 0x10000, CRC(cde4d010) SHA1(853f4b813ff70fe74cd87e92131c46fca045610d) ) |
| 3880 | | |
| 3881 | 3909 | ROM_REGION( 0x10000 + 0x10000, "asic65", 0 ) /* dummy region for ADSP 2105 */ |
| 3882 | | ROM_LOAD( "xboot.bin", 0x10000 + 0x00000, 0x10000, CRC(054b46a0) SHA1(038eec17e678f2755239d6795acfda621796802e) ) |
| 3910 | ROM_LOAD( "sboot.bin", 0x000000, 0x010000, CRC(cde4d010) SHA1(853f4b813ff70fe74cd87e92131c46fca045610d) ) |
| 3883 | 3911 | |
| 3884 | 3912 | ROM_REGION( 0xc0000, "user1", 0 ) /* 768k for object ROM */ |
| 3885 | 3913 | ROM_LOAD16_BYTE( "obj0l.bin", 0x00000, 0x20000, CRC(1f835f2e) SHA1(9d3419f2c1aa65ddfe9ace4e70ca1212d634afbf) ) |
| r19943 | r19944 | |
| 3899 | 3927 | ROM_LOAD32_BYTE( "roads2.bin", 0x000002, 0x80000, CRC(527923fe) SHA1(839de8486bb7489f059b5a629ab229ad96de7eac) ) |
| 3900 | 3928 | ROM_LOAD32_BYTE( "roads3.bin", 0x000003, 0x80000, CRC(2f2023b2) SHA1(d474892443db2f0710c2be0d6b90735a2fbee12a) ) |
| 3901 | 3929 | |
| 3902 | | ROM_REGION16_BE( 0x100000, "user5", 0 ) |
| 3903 | | /* DS IV sound section (2 x ADSP2105)*/ |
| 3904 | | ROM_LOAD16_BYTE( "ds3rom0.bin", 0x00001, 0x80000, CRC(90b8dbb6) SHA1(fff693cb81e88bc00e048bb71406295fe7be5122) ) |
| 3905 | | ROM_LOAD16_BYTE( "ds3rom1.bin", 0x00000, 0x80000, CRC(58173812) SHA1(b7e9f724011a362e1fc17aa7a7a95841e01d5430) ) |
| 3906 | | ROM_LOAD16_BYTE( "ds3rom2.bin", 0x00001, 0x80000, CRC(5a4b18fa) SHA1(1e9193c1daf14fc0aeca6fab762f5753ec73435f) ) |
| 3907 | | ROM_LOAD16_BYTE( "ds3rom3.bin", 0x00000, 0x80000, CRC(63965868) SHA1(d61d9d6709a3a3c37c2652602e97fdee52e0e7cb) ) |
| 3908 | | ROM_LOAD16_BYTE( "ds3rom4.bin", 0x00001, 0x80000, CRC(15ffb19a) SHA1(030dc90b7cabcd7fc5f231b09d2aa2eaf6e60b98) ) |
| 3909 | | ROM_LOAD16_BYTE( "ds3rom5.bin", 0x00000, 0x80000, CRC(8d0e9b27) SHA1(76556f48bdf14475260c268ebdb16ecb494b2f36) ) |
| 3910 | | ROM_LOAD16_BYTE( "ds3rom6.bin", 0x00001, 0x80000, CRC(ce7edbae) SHA1(58e9d8379157bb69e323eb79332d644a32c70a6f) ) |
| 3911 | | ROM_LOAD16_BYTE( "ds3rom7.bin", 0x00000, 0x80000, CRC(323eff0b) SHA1(5d4945d77191ee44b4fbf125bc0816217321829e) ) |
| 3930 | ROM_REGION16_BE( 0x10000, "ds3sdsp", 0 ) /* DS IV sound ADSP-2105 */ |
| 3931 | ROM_LOAD( "sboot.bin", 0x00000, 0x10000, CRC(cde4d010) SHA1(853f4b813ff70fe74cd87e92131c46fca045610d) ) |
| 3912 | 3932 | |
| 3933 | ROM_REGION16_BE( 0x10000, "ds3xdsp", 0 ) /* DS IV auxillary ADSP-2105 */ |
| 3934 | ROM_LOAD( "xboot.bin", 0x00000, 0x10000, CRC(054b46a0) SHA1(038eec17e678f2755239d6795acfda621796802e) ) |
| 3935 | |
| 3936 | ROM_REGION16_BE( 0x400000, "ds3sdsp_data", 0 ) /* DS IV sound data */ |
| 3937 | ROM_LOAD16_BYTE( "ds3rom4.bin", 0x000000, 0x80000, CRC(15ffb19a) SHA1(030dc90b7cabcd7fc5f231b09d2aa2eaf6e60b98) ) |
| 3938 | ROM_LOAD16_BYTE( "ds3rom0.bin", 0x000001, 0x80000, CRC(90b8dbb6) SHA1(fff693cb81e88bc00e048bb71406295fe7be5122) ) |
| 3939 | ROM_LOAD16_BYTE( "ds3rom5.bin", 0x100000, 0x80000, CRC(8d0e9b27) SHA1(76556f48bdf14475260c268ebdb16ecb494b2f36) ) |
| 3940 | ROM_LOAD16_BYTE( "ds3rom1.bin", 0x100001, 0x80000, CRC(58173812) SHA1(b7e9f724011a362e1fc17aa7a7a95841e01d5430) ) |
| 3941 | ROM_LOAD16_BYTE( "ds3rom6.bin", 0x200000, 0x80000, CRC(ce7edbae) SHA1(58e9d8379157bb69e323eb79332d644a32c70a6f) ) |
| 3942 | ROM_LOAD16_BYTE( "ds3rom2.bin", 0x200001, 0x80000, CRC(5a4b18fa) SHA1(1e9193c1daf14fc0aeca6fab762f5753ec73435f) ) |
| 3943 | ROM_LOAD16_BYTE( "ds3rom7.bin", 0x300000, 0x80000, CRC(323eff0b) SHA1(5d4945d77191ee44b4fbf125bc0816217321829e) ) |
| 3944 | ROM_LOAD16_BYTE( "ds3rom3.bin", 0x300001, 0x80000, CRC(63965868) SHA1(d61d9d6709a3a3c37c2652602e97fdee52e0e7cb) ) |
| 3945 | |
| 3913 | 3946 | ROM_REGION( 0x1000, "eeprom", 0 ) |
| 3914 | 3947 | ROM_LOAD( "hdrivair-eeprom.bin", 0x0000, 0x1000, CRC(7828df8f) SHA1(4b62ceb1d3f4b8026d77a59118a9002aa006e98e) ) |
| 3915 | 3948 | ROM_END |
| r19943 | r19944 | |
| 3954 | 3987 | ROM_LOAD16_BYTE( "roads.2", 0x000002, 0x80000, CRC(ba57f415) SHA1(1daf5a014e9bef15466b282bcca2395fec2b0628) ) |
| 3955 | 3988 | ROM_LOAD16_BYTE( "roads.3", 0x000003, 0x80000, CRC(1e6a4ca0) SHA1(2cf06d6c73be11cf10515246fca2baa05ce5091b) ) |
| 3956 | 3989 | |
| 3957 | | ROM_REGION16_BE( 0x100000, "user5", 0 ) |
| 3958 | | /* DS IV sound section (2 x ADSP2105)*/ |
| 3959 | | ROM_LOAD16_BYTE( "ds3rom.0", 0x00001, 0x80000, CRC(90b8dbb6) SHA1(fff693cb81e88bc00e048bb71406295fe7be5122) ) |
| 3960 | | ROM_LOAD16_BYTE( "ds3rom.1", 0x00000, 0x80000, CRC(03673d8d) SHA1(13596f7acb58fba78d6e4f2ac7bb21d9d2589668) ) |
| 3961 | | ROM_LOAD16_BYTE( "ds3rom.2", 0x00001, 0x80000, CRC(f67754e9) SHA1(3548412ccdfa9b482942c78778f05d67eb7835ea) ) |
| 3962 | | ROM_LOAD16_BYTE( "ds3rom.3", 0x00000, 0x80000, CRC(008d3578) SHA1(c9ff50b931c25fe86bde3eb0aae2350c29766438) ) |
| 3963 | | ROM_LOAD16_BYTE( "ds3rom.4", 0x00001, 0x80000, CRC(6281efee) SHA1(47d0f3ff973166d818877996c45dccf1d3a85fe1) ) |
| 3964 | | ROM_LOAD16_BYTE( "ds3rom.5", 0x00000, 0x80000, CRC(6ef9ed90) SHA1(8bd927a56fe99f7db96d203c1daeb8c8c83f2c17) ) |
| 3965 | | ROM_LOAD16_BYTE( "ds3rom.6", 0x00001, 0x80000, CRC(cd4cd6bc) SHA1(95689ab7cb18af54ff09aebf223f6346f13dfd7b) ) |
| 3966 | | ROM_LOAD16_BYTE( "ds3rom.7", 0x00000, 0x80000, CRC(3d695e1f) SHA1(4e5dd009ed11d299c546451141920dc1dc74a529) ) |
| 3990 | ROM_REGION( 0x10000, "ds3sdsp", 0 ) /* DS IV sound ADSP-2105 */ |
| 3991 | ROM_LOAD( "sboota.bin", 0x00000, 0x10000, CRC(3ef819cd) SHA1(c547b869a3a37a82fb46584fe0ef0cfe21a4f882) ) |
| 3967 | 3992 | |
| 3993 | ROM_REGION( 0x10000, "ds3xdsp", 0 ) /* DS IV auxillary ADSP-2105 */ |
| 3994 | ROM_LOAD( "xboota.bin", 0x00000, 0x10000, CRC(d9c49901) SHA1(9f90ae3a47eb1ef00c3ec3661f60402c2eae2108) ) |
| 3995 | |
| 3996 | ROM_REGION16_BE( 0x400000, "ds3sdsp_data", 0 ) |
| 3997 | ROM_LOAD16_BYTE( "ds3rom.5", 0x000000, 0x80000, CRC(6ef9ed90) SHA1(8bd927a56fe99f7db96d203c1daeb8c8c83f2c17) ) |
| 3998 | ROM_LOAD16_BYTE( "ds3rom.1", 0x000001, 0x80000, CRC(03673d8d) SHA1(13596f7acb58fba78d6e4f2ac7bb21d9d2589668) ) |
| 3999 | ROM_LOAD16_BYTE( "ds3rom.6", 0x100000, 0x80000, CRC(cd4cd6bc) SHA1(95689ab7cb18af54ff09aebf223f6346f13dfd7b) ) |
| 4000 | ROM_LOAD16_BYTE( "ds3rom.2", 0x100001, 0x80000, CRC(f67754e9) SHA1(3548412ccdfa9b482942c78778f05d67eb7835ea) ) |
| 4001 | ROM_LOAD16_BYTE( "ds3rom.7", 0x200000, 0x80000, CRC(3d695e1f) SHA1(4e5dd009ed11d299c546451141920dc1dc74a529) ) |
| 4002 | ROM_LOAD16_BYTE( "ds3rom.3", 0x200001, 0x80000, CRC(008d3578) SHA1(c9ff50b931c25fe86bde3eb0aae2350c29766438) ) |
| 4003 | ROM_LOAD16_BYTE( "ds3rom.0", 0x300000, 0x80000, CRC(90b8dbb6) SHA1(fff693cb81e88bc00e048bb71406295fe7be5122) ) |
| 4004 | ROM_LOAD16_BYTE( "ds3rom.4", 0x300001, 0x80000, CRC(6281efee) SHA1(47d0f3ff973166d818877996c45dccf1d3a85fe1) ) |
| 4005 | |
| 3968 | 4006 | ROM_REGION( 0x1000, "eeprom", 0 ) |
| 3969 | 4007 | ROM_LOAD( "hdrivair-eeprom.bin", 0x0000, 0x1000, CRC(7828df8f) SHA1(4b62ceb1d3f4b8026d77a59118a9002aa006e98e) ) |
| 3970 | 4008 | ROM_END |
| r19943 | r19944 | |
| 4043 | 4081 | state->m_maincpu->space(AS_PROGRAM).install_legacy_read_handler(0x820800, 0x820fff, FUNC(hd68k_ds3_girq_state_r)); |
| 4044 | 4082 | state->m_maincpu->space(AS_PROGRAM).install_legacy_write_handler(0x820000, 0x8207ff, FUNC(hd68k_ds3_gdata_w)); |
| 4045 | 4083 | state->m_maincpu->space(AS_PROGRAM).install_legacy_write_handler(0x821000, 0x8217ff, FUNC(hd68k_adsp_irq_clear_w)); |
| 4084 | |
| 4046 | 4085 | state->m_maincpu->space(AS_PROGRAM).install_legacy_read_handler(0x822000, 0x8227ff, FUNC(hd68k_ds3_sdata_r)); |
| 4047 | 4086 | state->m_maincpu->space(AS_PROGRAM).install_legacy_read_handler(0x822800, 0x822fff, FUNC(hd68k_ds3_sirq_state_r)); |
| 4048 | 4087 | state->m_maincpu->space(AS_PROGRAM).install_legacy_write_handler(0x822000, 0x8227ff, FUNC(hd68k_ds3_sdata_w)); |
| 4088 | state->m_maincpu->space(AS_PROGRAM).install_legacy_write_handler(0x823000, 0x8237ff, FUNC(hd68k_ds3_sirq_clear_w)); |
| 4049 | 4089 | state->m_maincpu->space(AS_PROGRAM).install_legacy_write_handler(0x823800, 0x823fff, FUNC(hd68k_ds3_control_w)); |
| 4050 | 4090 | |
| 4051 | | /* if we have a sound DSP, boot it */ |
| 4052 | | if (state->m_ds4cpu1 != NULL) |
| 4053 | | state->m_ds4cpu1->load_boot_data(state->m_soundcpu->region()->base() + 0x10000, &state->m_soundcpu->region()->u32()); |
| 4091 | /* predetermine memory regions */ |
| 4092 | state->m_ds3_sdata_memory = (UINT16 *)state->memregion("ds3sdsp_data")->base(); |
| 4093 | state->m_ds3_sdata_memory_size = state->memregion("ds3sdsp_data")->bytes() / 2; |
| 4054 | 4094 | |
| 4055 | | if (state->m_ds4cpu2 != NULL) |
| 4056 | | state->m_ds4cpu2->load_boot_data(state->m_sounddsp->region()->base() + 0x10000, &state->m_sounddsp->region()->u32()); |
| 4057 | | |
| 4058 | 4095 | /* |
| 4059 | 4096 | |
| 4060 | 4097 | |
| r19943 | r19944 | |
| 4561 | 4598 | GAME( 1991, steeltal1, steeltal, steeltal, steeltal, harddriv_state, steeltal1,ROT0, "Atari Games", "Steel Talons (rev 1)", 0 ) |
| 4562 | 4599 | GAME( 1991, steeltalp, steeltal, steeltal, steeltal, harddriv_state, steeltalp,ROT0, "Atari Games", "Steel Talons (prototype)", GAME_NOT_WORKING ) |
| 4563 | 4600 | |
| 4564 | | GAME( 1993, strtdriv, 0, strtdriv, strtdriv, harddriv_state, strtdriv, ROT0, "Atari Games", "Street Drivin' (prototype)", GAME_NO_SOUND ) |
| 4601 | GAME( 1993, strtdriv, 0, strtdriv, strtdriv, harddriv_state, strtdriv, ROT0, "Atari Games", "Street Drivin' (prototype)", 0 ) |
| 4565 | 4602 | |
| 4566 | | GAME( 1993, hdrivair, 0, hdrivair, hdrivair, harddriv_state, hdrivair, ROT0, "Atari Games", "Hard Drivin's Airborne (prototype)", GAME_NO_SOUND ) |
| 4567 | | GAME( 1993, hdrivairp, hdrivair, hdrivair, hdrivair, harddriv_state, hdrivairp,ROT0, "Atari Games", "Hard Drivin's Airborne (prototype, early rev)", GAME_NOT_WORKING | GAME_NO_SOUND ) |
| 4603 | GAME( 1993, hdrivair, 0, hdrivair, hdrivair, harddriv_state, hdrivair, ROT0, "Atari Games", "Hard Drivin's Airborne (prototype)", GAME_IMPERFECT_SOUND ) |
| 4604 | GAME( 1993, hdrivairp, hdrivair, hdrivair, hdrivair, harddriv_state, hdrivairp,ROT0, "Atari Games", "Hard Drivin's Airborne (prototype, early rev)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) |
trunk/src/mame/machine/harddriv.c
| r19943 | r19944 | |
| 9 | 9 | #include "cpu/adsp2100/adsp2100.h" |
| 10 | 10 | #include "cpu/m68000/m68000.h" |
| 11 | 11 | #include "cpu/dsp32/dsp32.h" |
| 12 | #include "sound/dac.h" |
| 12 | 13 | #include "machine/atarigen.h" |
| 13 | 14 | #include "machine/asic65.h" |
| 14 | 15 | #include "audio/atarijsa.h" |
| r19943 | r19944 | |
| 23 | 24 | *************************************/ |
| 24 | 25 | |
| 25 | 26 | #define DS3_TRIGGER 7777 |
| 27 | #define DS3_STRIGGER 5555 |
| 26 | 28 | |
| 27 | 29 | /* debugging tools */ |
| 28 | 30 | #define LOG_COMMANDS 0 |
| r19943 | r19944 | |
| 35 | 37 | * |
| 36 | 38 | *************************************/ |
| 37 | 39 | |
| 40 | static void hdds3sdsp_reset_timer(running_machine &machine); |
| 41 | static void hdds3xdsp_reset_timer(running_machine &machine); |
| 38 | 42 | |
| 39 | 43 | #if 0 |
| 40 | 44 | #pragma mark * DRIVER/MULTISYNC BOARD |
| r19943 | r19944 | |
| 84 | 88 | m_adsp_halt = 1; |
| 85 | 89 | m_adsp_br = 0; |
| 86 | 90 | m_adsp_xflag = 0; |
| 91 | |
| 92 | if (m_ds3sdsp != NULL) |
| 93 | { |
| 94 | m_ds3sdsp->load_boot_data(m_ds3sdsp->region()->base(), m_ds3sdsp_pgm_memory); |
| 95 | m_ds3sdsp_timer_en = 0; |
| 96 | m_ds3sdsp_internal_timer->adjust(attotime::never); |
| 97 | } |
| 98 | |
| 99 | if (m_ds3xdsp != NULL) |
| 100 | { |
| 101 | m_ds3xdsp->load_boot_data(m_ds3xdsp->region()->base(), m_ds3xdsp_pgm_memory); |
| 102 | m_ds3xdsp_timer_en = 0; |
| 103 | m_ds3xdsp_internal_timer->adjust(attotime::never); |
| 104 | } |
| 87 | 105 | } |
| 88 | 106 | |
| 89 | 107 | |
| r19943 | r19944 | |
| 859 | 877 | } |
| 860 | 878 | |
| 861 | 879 | |
| 880 | static void update_ds3_sirq(harddriv_state *state) |
| 881 | { |
| 882 | /* update the IRQ2 signal to the ADSP2105 */ |
| 883 | if (!(!state->m_ds3_s68flag && state->m_ds3_s68irqs) && !(state->m_ds3_sflag && state->m_ds3_sfirqs)) |
| 884 | state->m_ds3sdsp->set_input_line(ADSP2105_IRQ2, ASSERT_LINE); |
| 885 | else |
| 886 | state->m_ds3sdsp->set_input_line(ADSP2105_IRQ2, CLEAR_LINE); |
| 887 | } |
| 888 | |
| 889 | |
| 862 | 890 | WRITE16_HANDLER( hd68k_ds3_control_w ) |
| 863 | 891 | { |
| 864 | 892 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| r19943 | r19944 | |
| 868 | 896 | { |
| 869 | 897 | case 0: |
| 870 | 898 | /* SRES - reset sound CPU */ |
| 899 | if (state->m_ds3sdsp) |
| 900 | { |
| 901 | state->m_ds3sdsp->set_input_line(INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE); |
| 902 | state->m_ds3sdsp->load_boot_data(state->m_ds3sdsp->region()->base(), state->m_ds3sdsp_pgm_memory); |
| 903 | |
| 904 | if (val && !state->m_ds3_sreset) |
| 905 | { |
| 906 | state->m_ds3_sflag = 0; |
| 907 | state->m_ds3_scmd = 0; |
| 908 | state->m_ds3_sfirqs = 0; |
| 909 | state->m_ds3_s68irqs = !state->m_ds3_sfirqs; |
| 910 | update_ds3_sirq(state); |
| 911 | } |
| 912 | state->m_ds3_sreset = val; |
| 913 | space.device().execute().yield(); |
| 914 | } |
| 871 | 915 | break; |
| 872 | 916 | |
| 873 | 917 | case 1: |
| 874 | 918 | /* XRES - reset sound helper CPU */ |
| 919 | if (state->m_ds3xdsp) |
| 920 | { |
| 921 | state->m_ds3xdsp->set_input_line(INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE); |
| 922 | state->m_ds3xdsp->load_boot_data(state->m_ds3xdsp->region()->base(), state->m_ds3xdsp_pgm_memory); |
| 923 | } |
| 875 | 924 | break; |
| 876 | 925 | |
| 877 | 926 | case 2: |
| r19943 | r19944 | |
| 1005 | 1054 | * |
| 1006 | 1055 | *************************************/ |
| 1007 | 1056 | |
| 1057 | WRITE16_HANDLER( hd68k_ds3_sirq_clear_w ) |
| 1058 | { |
| 1059 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1060 | logerror("%06X:68k clears ADSP interrupt\n", space.device().safe_pcbase()); |
| 1061 | state->m_sound_int_state = 0; |
| 1062 | state->update_interrupts(); |
| 1063 | } |
| 1064 | |
| 1065 | |
| 1008 | 1066 | READ16_HANDLER( hd68k_ds3_sirq_state_r ) |
| 1009 | 1067 | { |
| 1010 | | return 0x4000; |
| 1068 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1069 | int result = 0x0fff; |
| 1070 | if (state->m_ds3_s68flag) result ^= 0x8000; |
| 1071 | if (state->m_ds3_sflag) result ^= 0x4000; |
| 1072 | if (state->m_ds3_s68irqs) result ^= 0x2000; |
| 1073 | if (!state->m_sound_int_state) result ^= 0x1000; |
| 1074 | return result; |
| 1011 | 1075 | } |
| 1012 | 1076 | |
| 1013 | 1077 | |
| 1014 | 1078 | READ16_HANDLER( hd68k_ds3_sdata_r ) |
| 1015 | 1079 | { |
| 1016 | | return 0; |
| 1080 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1081 | |
| 1082 | state->m_ds3_sflag = 0; |
| 1083 | update_ds3_sirq(state); |
| 1084 | |
| 1085 | /* if we just cleared the IRQ, we are going to do some VERY timing critical reads */ |
| 1086 | /* it is important that all the CPUs be in sync before we continue, so spin a little */ |
| 1087 | /* while to let everyone else catch up */ |
| 1088 | space.device().execute().spin_until_trigger(DS3_STRIGGER); |
| 1089 | space.machine().scheduler().trigger(DS3_STRIGGER, attotime::from_usec(5)); |
| 1090 | |
| 1091 | return state->m_ds3_sdata; |
| 1017 | 1092 | } |
| 1018 | 1093 | |
| 1019 | 1094 | |
| 1020 | 1095 | WRITE16_HANDLER( hd68k_ds3_sdata_w ) |
| 1021 | 1096 | { |
| 1097 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1098 | |
| 1099 | COMBINE_DATA(&state->m_ds3_s68data); |
| 1100 | state->m_ds3_s68flag = 1; |
| 1101 | state->m_ds3_scmd = offset & 1; |
| 1102 | state->m_ds3sdsp->signal_interrupt_trigger(); |
| 1103 | |
| 1104 | update_ds3_sirq(state); |
| 1022 | 1105 | } |
| 1023 | 1106 | |
| 1024 | 1107 | |
| 1108 | READ16_HANDLER( hdds3_sdsp_special_r ) |
| 1109 | { |
| 1110 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1111 | int result; |
| 1112 | |
| 1113 | switch (offset & 7) |
| 1114 | { |
| 1115 | case 0: |
| 1116 | state->m_ds3_s68flag = 0; |
| 1117 | update_ds3_sirq(state); |
| 1118 | return state->m_ds3_s68data; |
| 1119 | |
| 1120 | case 1: |
| 1121 | result = 0x0fff; |
| 1122 | if (state->m_ds3_scmd) result ^= 0x8000; |
| 1123 | if (state->m_ds3_s68flag) result ^= 0x4000; |
| 1124 | if (state->m_ds3_sflag) result ^= 0x2000; |
| 1125 | return result; |
| 1126 | |
| 1127 | case 4: |
| 1128 | if (state->m_ds3_sdata_address < state->m_ds3_sdata_memory_size) |
| 1129 | return state->m_ds3_sdata_memory[state->m_ds3_sdata_address]; |
| 1130 | else |
| 1131 | return 0xff; |
| 1132 | |
| 1133 | case 5: /* DS IV: sound ROM configuration */ |
| 1134 | return 1; |
| 1135 | |
| 1136 | case 7: /* SFWCLR */ |
| 1137 | break; |
| 1138 | |
| 1139 | default: |
| 1140 | return 0xff; |
| 1141 | } |
| 1142 | |
| 1143 | return 0; |
| 1144 | } |
| 1145 | |
| 1146 | |
| 1147 | WRITE16_HANDLER( hdds3_sdsp_special_w ) |
| 1148 | { |
| 1149 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1150 | |
| 1151 | /* Note: DS IV is slightly different */ |
| 1152 | switch (offset & 7) |
| 1153 | { |
| 1154 | case 0: |
| 1155 | state->m_ds3_sdata = data; |
| 1156 | state->m_ds3_sflag = 1; |
| 1157 | update_ds3_sirq(state); |
| 1158 | |
| 1159 | /* once we've written data, trigger the main CPU to wake up again */ |
| 1160 | space.machine().scheduler().trigger(DS3_STRIGGER); |
| 1161 | break; |
| 1162 | |
| 1163 | case 1: |
| 1164 | state->m_sound_int_state = (data >> 1) & 1; |
| 1165 | state->update_interrupts(); |
| 1166 | break; |
| 1167 | |
| 1168 | case 2: /* bit 0 = T1 (unused) */ |
| 1169 | break; |
| 1170 | |
| 1171 | case 3: |
| 1172 | state->m_ds3_sfirqs = (data >> 1) & 1; |
| 1173 | state->m_ds3_s68irqs = !state->m_ds3_sfirqs; |
| 1174 | update_ds3_sirq(state); |
| 1175 | break; |
| 1176 | |
| 1177 | case 4: |
| 1178 | state->m_ds3dac1->write_signed16(data); |
| 1179 | break; |
| 1180 | |
| 1181 | case 5: |
| 1182 | state->m_ds3dac2->write_signed16(data); |
| 1183 | break; |
| 1184 | |
| 1185 | case 6: |
| 1186 | state->m_ds3_sdata_address = (state->m_ds3_sdata_address & 0xffff0000) | (data & 0xffff); |
| 1187 | break; |
| 1188 | |
| 1189 | case 7: |
| 1190 | state->m_ds3_sdata_address = (state->m_ds3_sdata_address & 0x0000ffff) | (data << 16); |
| 1191 | break; |
| 1192 | } |
| 1193 | } |
| 1194 | |
| 1195 | READ16_HANDLER( hdds3_sdsp_control_r ) |
| 1196 | { |
| 1197 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1198 | |
| 1199 | switch (offset) |
| 1200 | { |
| 1201 | default: |
| 1202 | return state->m_ds3sdsp_regs[offset]; |
| 1203 | } |
| 1204 | |
| 1205 | return 0xff; |
| 1206 | } |
| 1207 | |
| 1208 | |
| 1209 | WRITE16_HANDLER( hdds3_sdsp_control_w ) |
| 1210 | { |
| 1211 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1212 | |
| 1213 | switch (offset) |
| 1214 | { |
| 1215 | case 0x1b: |
| 1216 | // Scale |
| 1217 | data &= 0xff; |
| 1218 | |
| 1219 | if (state->m_ds3sdsp_regs[0x1b] != data) |
| 1220 | { |
| 1221 | state->m_ds3sdsp_regs[0x1b] = data; |
| 1222 | hdds3sdsp_reset_timer(space.machine()); |
| 1223 | } |
| 1224 | break; |
| 1225 | |
| 1226 | case 0x1c: |
| 1227 | // Count |
| 1228 | if (state->m_ds3sdsp_regs[0x1c] != data) |
| 1229 | { |
| 1230 | state->m_ds3sdsp_regs[0x1c] = data; |
| 1231 | hdds3sdsp_reset_timer(space.machine()); |
| 1232 | } |
| 1233 | break; |
| 1234 | |
| 1235 | case 0x1d: |
| 1236 | // Period |
| 1237 | state->m_ds3sdsp_regs[0x1d] = data; |
| 1238 | break; |
| 1239 | |
| 1240 | case 0x1e: |
| 1241 | state->m_ds3sdsp_regs[0x1e] = data; |
| 1242 | break; |
| 1243 | |
| 1244 | case 0x1f: |
| 1245 | /* are we asserting BFORCE? */ |
| 1246 | if (data & 0x200) |
| 1247 | { |
| 1248 | UINT32 page = (data >> 6) & 7; |
| 1249 | state->m_ds3sdsp->load_boot_data(state->m_ds3sdsp->region()->base() + (0x2000 * page), state->m_ds3sdsp_pgm_memory); |
| 1250 | state->m_ds3sdsp->set_input_line(INPUT_LINE_RESET, PULSE_LINE); |
| 1251 | data &= ~0x200; |
| 1252 | } |
| 1253 | |
| 1254 | state->m_ds3sdsp_regs[0x1f] = data; |
| 1255 | break; |
| 1256 | |
| 1257 | default: |
| 1258 | state->m_ds3sdsp_regs[offset] = data; |
| 1259 | break; |
| 1260 | } |
| 1261 | } |
| 1262 | |
| 1263 | |
| 1264 | READ16_HANDLER( hdds3_xdsp_control_r ) |
| 1265 | { |
| 1266 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1267 | |
| 1268 | switch (offset) |
| 1269 | { |
| 1270 | default: |
| 1271 | return state->m_ds3xdsp_regs[offset]; |
| 1272 | } |
| 1273 | |
| 1274 | return 0xff; |
| 1275 | } |
| 1276 | |
| 1277 | |
| 1278 | WRITE16_HANDLER( hdds3_xdsp_control_w ) |
| 1279 | { |
| 1280 | harddriv_state *state = space.machine().driver_data<harddriv_state>(); |
| 1281 | |
| 1282 | switch (offset) |
| 1283 | { |
| 1284 | default: |
| 1285 | state->m_ds3xdsp_regs[offset] = data; |
| 1286 | break; |
| 1287 | } |
| 1288 | } |
| 1289 | |
| 1290 | TIMER_DEVICE_CALLBACK( ds3sdsp_internal_timer_callback ) |
| 1291 | { |
| 1292 | harddriv_state *state = timer.machine().driver_data<harddriv_state>(); |
| 1293 | |
| 1294 | UINT16 period = state->m_ds3sdsp_regs[0x1d]; |
| 1295 | UINT16 scale = state->m_ds3sdsp_regs[0x1b] + 1; |
| 1296 | |
| 1297 | state->m_ds3sdsp_internal_timer->adjust(state->m_ds3sdsp->cycles_to_attotime(period * scale)); |
| 1298 | |
| 1299 | /* the IRQ line is edge triggered */ |
| 1300 | state->m_ds3sdsp->set_input_line(ADSP2105_TIMER, ASSERT_LINE); |
| 1301 | state->m_ds3sdsp->set_input_line(ADSP2105_TIMER, CLEAR_LINE); |
| 1302 | } |
| 1303 | |
| 1304 | |
| 1305 | static void hdds3sdsp_reset_timer(running_machine &machine) |
| 1306 | { |
| 1307 | harddriv_state *state = machine.driver_data<harddriv_state>(); |
| 1308 | |
| 1309 | if (!state->m_ds3sdsp_timer_en) |
| 1310 | return; |
| 1311 | |
| 1312 | UINT16 count = state->m_ds3sdsp_regs[0x1c]; |
| 1313 | UINT16 scale = state->m_ds3sdsp_regs[0x1b] + 1; |
| 1314 | |
| 1315 | state->m_ds3sdsp_internal_timer->adjust(state->m_ds3sdsp->cycles_to_attotime(count * scale)); |
| 1316 | } |
| 1317 | |
| 1318 | void hdds3sdsp_timer_enable_callback(adsp21xx_device &device, int enable) |
| 1319 | { |
| 1320 | harddriv_state *state = device.machine().driver_data<harddriv_state>(); |
| 1321 | |
| 1322 | state->m_ds3sdsp_timer_en = enable; |
| 1323 | |
| 1324 | if (enable) |
| 1325 | hdds3sdsp_reset_timer(device.machine()); |
| 1326 | else |
| 1327 | state->m_ds3sdsp_internal_timer->adjust(attotime::never); |
| 1328 | } |
| 1329 | |
| 1330 | |
| 1331 | TIMER_DEVICE_CALLBACK( ds3xdsp_internal_timer_callback ) |
| 1332 | { |
| 1333 | harddriv_state *state = timer.machine().driver_data<harddriv_state>(); |
| 1334 | |
| 1335 | UINT16 period = state->m_ds3xdsp_regs[0x1d]; |
| 1336 | UINT16 scale = state->m_ds3xdsp_regs[0x1b] + 1; |
| 1337 | |
| 1338 | state->m_ds3xdsp_internal_timer->adjust(state->m_ds3xdsp->cycles_to_attotime(period * scale)); |
| 1339 | |
| 1340 | /* the IRQ line is edge triggered */ |
| 1341 | state->m_ds3xdsp->set_input_line(ADSP2105_TIMER, ASSERT_LINE); |
| 1342 | state->m_ds3xdsp->set_input_line(ADSP2105_TIMER, CLEAR_LINE); |
| 1343 | } |
| 1344 | |
| 1345 | |
| 1346 | static void hdds3xdsp_reset_timer(running_machine &machine) |
| 1347 | { |
| 1348 | harddriv_state *state = machine.driver_data<harddriv_state>(); |
| 1349 | |
| 1350 | if (!state->m_ds3xdsp_timer_en) |
| 1351 | return; |
| 1352 | |
| 1353 | UINT16 count = state->m_ds3xdsp_regs[0x1c]; |
| 1354 | UINT16 scale = state->m_ds3xdsp_regs[0x1b] + 1; |
| 1355 | |
| 1356 | state->m_ds3xdsp_internal_timer->adjust(state->m_ds3xdsp->cycles_to_attotime(count * scale)); |
| 1357 | } |
| 1358 | |
| 1359 | |
| 1360 | void hdds3xdsp_timer_enable_callback(adsp21xx_device &device, int enable) |
| 1361 | { |
| 1362 | harddriv_state *state = device.machine().driver_data<harddriv_state>(); |
| 1363 | |
| 1364 | state->m_ds3xdsp_timer_en = enable; |
| 1365 | |
| 1366 | if (enable) |
| 1367 | hdds3xdsp_reset_timer(device.machine()); |
| 1368 | else |
| 1369 | state->m_ds3xdsp_internal_timer->adjust(attotime::never); |
| 1370 | } |
| 1371 | |
| 1372 | |
| 1373 | /* |
| 1374 | TODO: The following does not work correctly |
| 1375 | */ |
| 1376 | static TIMER_CALLBACK( xsdp_sport1_irq_off_callback ) |
| 1377 | { |
| 1378 | harddriv_state *state = machine.driver_data<harddriv_state>(); |
| 1379 | state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, CLEAR_LINE); |
| 1380 | } |
| 1381 | |
| 1382 | |
| 1383 | void hdds3sdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data) |
| 1384 | { |
| 1385 | harddriv_state *state = device.machine().driver_data<harddriv_state>(); |
| 1386 | |
| 1387 | if ((state->m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00) |
| 1388 | return; |
| 1389 | |
| 1390 | state->m_ds3sdsp_sdata = data; |
| 1391 | |
| 1392 | state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE); |
| 1393 | device.machine().scheduler().timer_set(attotime::from_nsec(200), FUNC(xsdp_sport1_irq_off_callback)); |
| 1394 | } |
| 1395 | |
| 1396 | |
| 1397 | INT32 hdds3sdsp_serial_rx_callback(adsp21xx_device &device, int port) |
| 1398 | { |
| 1399 | harddriv_state *state = device.machine().driver_data<harddriv_state>(); |
| 1400 | |
| 1401 | if ((state->m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00) |
| 1402 | return 0xff; |
| 1403 | |
| 1404 | return state->m_ds3xdsp_sdata; |
| 1405 | } |
| 1406 | |
| 1407 | |
| 1408 | void hdds3xdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data) |
| 1409 | { |
| 1410 | harddriv_state *state = device.machine().driver_data<harddriv_state>(); |
| 1411 | |
| 1412 | if ((state->m_ds3xdsp_regs[0x1f] & 0xc00) != 0xc00) |
| 1413 | return; |
| 1414 | |
| 1415 | state->m_ds3xdsp_sdata = data; |
| 1416 | } |
| 1417 | |
| 1418 | |
| 1419 | INT32 hdds3xdsp_serial_rx_callback(adsp21xx_device &device, int port) |
| 1420 | { |
| 1421 | harddriv_state *state = device.machine().driver_data<harddriv_state>(); |
| 1422 | |
| 1423 | state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE); |
| 1424 | state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, CLEAR_LINE); |
| 1425 | state->m_ds3xdsp->signal_interrupt_trigger(); |
| 1426 | return state->m_ds3sdsp_sdata; |
| 1427 | } |
| 1428 | |
| 1429 | |
| 1430 | |
| 1025 | 1431 | /************************************* |
| 1026 | 1432 | * |
| 1027 | 1433 | * DS III internal I/O |
trunk/src/mame/includes/harddriv.h
| r19943 | r19944 | |
| 9 | 9 | #include "cpu/tms32010/tms32010.h" |
| 10 | 10 | #include "cpu/adsp2100/adsp2100.h" |
| 11 | 11 | #include "cpu/dsp32/dsp32.h" |
| 12 | #include "sound/dac.h" |
| 12 | 13 | #include "machine/atarigen.h" |
| 13 | 14 | |
| 14 | 15 | #define HARDDRIV_MASTER_CLOCK XTAL_32MHz |
| r19943 | r19944 | |
| 27 | 28 | m_sounddsp(*this, "sounddsp"), |
| 28 | 29 | m_jsacpu(*this, "jsacpu"), |
| 29 | 30 | m_dsp32(*this, "dsp32"), |
| 30 | | m_ds4cpu1(*this, "ds4cpu1"), |
| 31 | | m_ds4cpu2(*this, "ds4cpu2"), |
| 31 | m_ds3sdsp(*this, "ds3sdsp"), |
| 32 | m_ds3xdsp(*this, "ds3xdsp"), |
| 33 | m_ds3dac1(*this, "ds3dac1"), |
| 34 | m_ds3dac2(*this, "ds3dac2"), |
| 32 | 35 | m_msp_ram(*this, "msp_ram"), |
| 33 | 36 | m_adsp_data_memory(*this, "adsp_data"), |
| 34 | 37 | m_adsp_pgm_memory(*this, "adsp_pgm_memory"), |
| 38 | m_ds3sdsp_data_memory(*this, "ds3sdsp_data"), |
| 39 | m_ds3sdsp_pgm_memory(*this, "ds3sdsp_pgm"), |
| 40 | m_ds3xdsp_pgm_memory(*this, "ds3xdsp_pgm"), |
| 35 | 41 | m_sounddsp_ram(*this, "sounddsp_ram"), |
| 36 | 42 | m_gsp_vram(*this, "gsp_vram", 16), |
| 37 | 43 | m_gsp_control_lo(*this, "gsp_control_lo"), |
| 38 | 44 | m_gsp_control_hi(*this, "gsp_control_hi"), |
| 39 | 45 | m_gsp_paletteram_lo(*this, "gsp_palram_lo"), |
| 40 | | m_gsp_paletteram_hi(*this, "gsp_palram_hi") { } |
| 46 | m_gsp_paletteram_hi(*this, "gsp_palram_hi"), |
| 47 | m_ds3sdsp_internal_timer(*this, "ds3sdsp_timer"), |
| 48 | m_ds3xdsp_internal_timer(*this, "ds3xdsp_timer") { } |
| 41 | 49 | |
| 42 | 50 | required_device<cpu_device> m_maincpu; |
| 43 | 51 | required_device<tms34010_device> m_gsp; |
| r19943 | r19944 | |
| 47 | 55 | optional_device<cpu_device> m_sounddsp; |
| 48 | 56 | optional_device<cpu_device> m_jsacpu; |
| 49 | 57 | optional_device<dsp32c_device> m_dsp32; |
| 50 | | optional_device<adsp2105_device> m_ds4cpu1; |
| 51 | | optional_device<adsp2105_device> m_ds4cpu2; |
| 58 | optional_device<adsp2105_device> m_ds3sdsp; |
| 59 | optional_device<adsp2105_device> m_ds3xdsp; |
| 60 | optional_device<dac_device> m_ds3dac1; |
| 61 | optional_device<dac_device> m_ds3dac2; |
| 52 | 62 | |
| 53 | 63 | UINT8 m_hd34010_host_access; |
| 54 | 64 | UINT8 m_dsk_pio_access; |
| r19943 | r19944 | |
| 63 | 73 | optional_shared_ptr<UINT16> m_adsp_data_memory; |
| 64 | 74 | optional_shared_ptr<UINT32> m_adsp_pgm_memory; |
| 65 | 75 | |
| 76 | optional_shared_ptr<UINT16> m_ds3sdsp_data_memory; |
| 77 | optional_shared_ptr<UINT32> m_ds3sdsp_pgm_memory; |
| 78 | optional_shared_ptr<UINT32> m_ds3xdsp_pgm_memory; |
| 79 | |
| 66 | 80 | UINT16 * m_gsp_protection; |
| 67 | 81 | |
| 68 | 82 | UINT16 * m_gsp_speedup_addr[2]; |
| r19943 | r19944 | |
| 95 | 109 | UINT8 m_gsp_irq_state; |
| 96 | 110 | UINT8 m_msp_irq_state; |
| 97 | 111 | UINT8 m_adsp_irq_state; |
| 112 | UINT8 m_ds3sdsp_irq_state; |
| 98 | 113 | UINT8 m_duart_irq_state; |
| 99 | 114 | |
| 100 | 115 | UINT8 m_last_gsp_shiftreg; |
| r19943 | r19944 | |
| 114 | 129 | UINT32 m_sim_memory_size; |
| 115 | 130 | UINT16 m_som_memory[0x8000/2]; |
| 116 | 131 | UINT16 * m_adsp_pgm_memory_word; |
| 132 | |
| 133 | UINT16 * m_ds3_sdata_memory; |
| 134 | UINT32 m_ds3_sdata_memory_size; |
| 117 | 135 | |
| 118 | 136 | UINT8 m_ds3_gcmd; |
| 119 | 137 | UINT8 m_ds3_gflag; |
| r19943 | r19944 | |
| 125 | 143 | UINT16 m_ds3_gdata; |
| 126 | 144 | UINT16 m_ds3_g68data; |
| 127 | 145 | UINT32 m_ds3_sim_address; |
| 146 | |
| 147 | UINT8 m_ds3_scmd; |
| 148 | UINT8 m_ds3_sflag; |
| 149 | UINT8 m_ds3_s68irqs; |
| 150 | UINT8 m_ds3_sfirqs; |
| 151 | UINT8 m_ds3_s68flag; |
| 152 | UINT8 m_ds3_sreset; |
| 153 | UINT16 m_ds3_sdata; |
| 154 | UINT16 m_ds3_s68data; |
| 155 | UINT32 m_ds3_sdata_address; |
| 156 | UINT16 m_ds3sdsp_regs[32]; |
| 157 | UINT16 m_ds3sdsp_timer_en; |
| 158 | UINT16 m_ds3sdsp_sdata; |
| 159 | optional_device<timer_device> m_ds3sdsp_internal_timer; |
| 128 | 160 | |
| 161 | UINT16 m_ds3xdsp_regs[32]; |
| 162 | UINT16 m_ds3xdsp_timer_en; |
| 163 | UINT16 m_ds3xdsp_sdata; |
| 164 | optional_device<timer_device> m_ds3xdsp_internal_timer; |
| 165 | |
| 129 | 166 | UINT16 m_adc_control; |
| 130 | 167 | UINT8 m_adc8_select; |
| 131 | 168 | UINT8 m_adc8_data; |
| r19943 | r19944 | |
| 281 | 318 | DECLARE_READ16_HANDLER( hdadsp_special_r ); |
| 282 | 319 | DECLARE_WRITE16_HANDLER( hdadsp_special_w ); |
| 283 | 320 | |
| 284 | | /* DS III board */ |
| 285 | | DECLARE_WRITE16_HANDLER( hd68k_ds3_control_w ); |
| 286 | | DECLARE_READ16_HANDLER( hd68k_ds3_girq_state_r ); |
| 287 | | DECLARE_READ16_HANDLER( hd68k_ds3_sirq_state_r ); |
| 288 | | DECLARE_READ16_HANDLER( hd68k_ds3_gdata_r ); |
| 289 | | DECLARE_WRITE16_HANDLER( hd68k_ds3_gdata_w ); |
| 290 | | DECLARE_READ16_HANDLER( hd68k_ds3_sdata_r ); |
| 291 | | DECLARE_WRITE16_HANDLER( hd68k_ds3_sdata_w ); |
| 321 | /* DS III/IV board */ |
| 322 | TIMER_DEVICE_CALLBACK( ds3sdsp_internal_timer_callback ); |
| 323 | void hdds3sdsp_timer_enable_callback(adsp21xx_device &device, int enable); |
| 292 | 324 | |
| 293 | | DECLARE_READ16_HANDLER( hdds3_special_r ); |
| 294 | | DECLARE_WRITE16_HANDLER( hdds3_special_w ); |
| 295 | | DECLARE_READ16_HANDLER( hdds3_control_r ); |
| 296 | | DECLARE_WRITE16_HANDLER( hdds3_control_w ); |
| 325 | void hdds3sdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data); |
| 326 | INT32 hdds3sdsp_serial_rx_callback(adsp21xx_device &device, int port); |
| 297 | 327 | |
| 298 | | DECLARE_READ16_HANDLER( hd68k_ds3_program_r ); |
| 299 | | DECLARE_WRITE16_HANDLER( hd68k_ds3_program_w ); |
| 328 | TIMER_DEVICE_CALLBACK( ds3xdsp_internal_timer_callback ); |
| 329 | void hdds3xdsp_timer_enable_callback(adsp21xx_device &device, int enable); |
| 300 | 330 | |
| 331 | void hdds3xdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data); |
| 332 | INT32 hdds3xdsp_serial_rx_callback(adsp21xx_device &device, int port); |
| 333 | |
| 334 | WRITE16_HANDLER( hd68k_ds3_control_w ); |
| 335 | READ16_HANDLER( hd68k_ds3_girq_state_r ); |
| 336 | |
| 337 | READ16_HANDLER( hd68k_ds3_gdata_r ); |
| 338 | WRITE16_HANDLER( hd68k_ds3_gdata_w ); |
| 339 | |
| 340 | READ16_HANDLER( hdds3_special_r ); |
| 341 | WRITE16_HANDLER( hdds3_special_w ); |
| 342 | READ16_HANDLER( hdds3_control_r ); |
| 343 | WRITE16_HANDLER( hdds3_control_w ); |
| 344 | |
| 345 | READ16_HANDLER( hd68k_ds3_program_r ); |
| 346 | WRITE16_HANDLER( hd68k_ds3_program_w ); |
| 347 | |
| 348 | |
| 349 | READ16_HANDLER( hd68k_ds3_sdata_r ); |
| 350 | WRITE16_HANDLER( hd68k_ds3_sdata_w ); |
| 351 | WRITE16_HANDLER( hd68k_ds3_sirq_clear_w ); |
| 352 | READ16_HANDLER( hd68k_ds3_sirq_state_r ); |
| 353 | |
| 354 | READ16_HANDLER( hdds3_sdsp_special_r ); |
| 355 | WRITE16_HANDLER( hdds3_sdsp_special_w ); |
| 356 | |
| 357 | READ16_HANDLER( hdds3_sdsp_control_r ); |
| 358 | WRITE16_HANDLER( hdds3_sdsp_control_w ); |
| 359 | READ16_HANDLER( hdds3_xdsp_control_r ); |
| 360 | WRITE16_HANDLER( hdds3_xdsp_control_w ); |
| 361 | |
| 362 | |
| 301 | 363 | /* DSK board */ |
| 302 | 364 | void hddsk_update_pif(dsp32c_device &device, UINT32 pins); |
| 303 | 365 | DECLARE_WRITE16_HANDLER( hd68k_dsk_control_w ); |