trunk/src/mame/drivers/s11b.c
| r19892 | r19893 | |
| 17 | 17 | #include "sound/dac.h" |
| 18 | 18 | #include "s11b.lh" |
| 19 | 19 | |
| 20 | // 6802/8 CPU's input clock is 4MHz |
| 21 | // but because it has an internal /4 divider, its E clock runs at 1/4 that frequency |
| 22 | #define E_CLOCK (XTAL_4MHz/4) |
| 23 | |
| 20 | 24 | // Length of time in cycles between IRQs on the main 6808 CPU |
| 21 | 25 | // This length is determined by the settings of the W14 and W15 jumpers |
| 22 | 26 | // It can be 0x300, 0x380, 0x700 or 0x780 cycles long. |
| r19892 | r19893 | |
| 243 | 247 | if(param == 1) |
| 244 | 248 | { |
| 245 | 249 | m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE); |
| 246 | | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0); |
| 250 | m_irq_timer->adjust(attotime::from_ticks(32,E_CLOCK),0); |
| 247 | 251 | m_pias->cb1_w(0); |
| 248 | 252 | m_irq_active = true; |
| 249 | 253 | m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance |
| r19892 | r19893 | |
| 252 | 256 | else |
| 253 | 257 | { |
| 254 | 258 | m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE); |
| 255 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 259 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 256 | 260 | m_pias->cb1_w(1); |
| 257 | 261 | m_irq_active = false; |
| 258 | 262 | m_pia28->ca1_w(1); |
| r19892 | r19893 | |
| 291 | 295 | if(state == CLEAR_LINE) |
| 292 | 296 | { |
| 293 | 297 | // restart IRQ timer |
| 294 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 298 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 295 | 299 | m_irq_active = false; |
| 296 | 300 | } |
| 297 | 301 | else |
| r19892 | r19893 | |
| 651 | 655 | membank("bgbank")->set_entry(0); |
| 652 | 656 | m_invert = false; |
| 653 | 657 | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 654 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 658 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 655 | 659 | m_irq_active = false; |
| 656 | 660 | } |
| 657 | 661 | |
| r19892 | r19893 | |
| 667 | 671 | membank("bgbank")->set_entry(0); |
| 668 | 672 | m_invert = true; |
| 669 | 673 | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 670 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 674 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 671 | 675 | m_irq_active = false; |
| 672 | 676 | } |
| 673 | 677 | |
trunk/src/mame/drivers/s11a.c
| r19892 | r19893 | |
| 27 | 27 | #include "sound/dac.h" |
| 28 | 28 | #include "s11a.lh" |
| 29 | 29 | |
| 30 | // 6802/8 CPU's input clock is 4MHz |
| 31 | // but because it has an internal /4 divider, its E clock runs at 1/4 that frequency |
| 32 | #define E_CLOCK (XTAL_4MHz/4) |
| 33 | |
| 30 | 34 | // Length of time in cycles between IRQs on the main 6808 CPU |
| 31 | 35 | // This length is determined by the settings of the W14 and W15 jumpers |
| 32 | 36 | // It can be 0x300, 0x380, 0x700 or 0x780 cycles long. |
| 33 | 37 | // IRQ length is always 32 cycles |
| 34 | | #define S11_IRQ_CYCLES 0x700 |
| 38 | #define S11_IRQ_CYCLES 0x380 |
| 35 | 39 | |
| 36 | 40 | class s11a_state : public genpin_class |
| 37 | 41 | { |
| r19892 | r19893 | |
| 245 | 249 | if(param == 1) |
| 246 | 250 | { |
| 247 | 251 | m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE); |
| 248 | | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0); |
| 252 | m_irq_timer->adjust(attotime::from_ticks(32,E_CLOCK),0); |
| 249 | 253 | m_pias->cb1_w(0); |
| 250 | 254 | m_irq_active = true; |
| 251 | 255 | m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance |
| r19892 | r19893 | |
| 254 | 258 | else |
| 255 | 259 | { |
| 256 | 260 | m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE); |
| 257 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 261 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 258 | 262 | m_pias->cb1_w(1); |
| 259 | 263 | m_irq_active = false; |
| 260 | 264 | m_pia28->ca1_w(1); |
| r19892 | r19893 | |
| 290 | 294 | if(state == CLEAR_LINE) |
| 291 | 295 | { |
| 292 | 296 | // restart IRQ timer |
| 293 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 297 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 294 | 298 | m_irq_active = false; |
| 295 | 299 | } |
| 296 | 300 | else |
| r19892 | r19893 | |
| 616 | 620 | membank("bank1")->set_entry(0); |
| 617 | 621 | membank("bgbank")->set_entry(0); |
| 618 | 622 | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 619 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 623 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 620 | 624 | m_irq_active = false; |
| 621 | 625 | } |
| 622 | 626 | |
trunk/src/mame/drivers/s11.c
| r19892 | r19893 | |
| 22 | 22 | #include "sound/dac.h" |
| 23 | 23 | #include "s11.lh" |
| 24 | 24 | |
| 25 | // 6802/8 CPU's input clock is 4MHz |
| 26 | // but because it has an internal /4 divider, its E clock runs at 1/4 that frequency |
| 27 | #define E_CLOCK (XTAL_4MHz/4) |
| 28 | |
| 25 | 29 | // Length of time in cycles between IRQs on the main 6808 CPU |
| 26 | 30 | // This length is determined by the settings of the W14 and W15 jumpers |
| 27 | 31 | // It can be 0x300, 0x380, 0x700 or 0x780 cycles long. |
| r19892 | r19893 | |
| 235 | 239 | if(param == 1) |
| 236 | 240 | { |
| 237 | 241 | m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE); |
| 238 | | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0); |
| 242 | m_irq_timer->adjust(attotime::from_ticks(32,E_CLOCK),0); |
| 239 | 243 | m_pias->cb1_w(0); |
| 240 | 244 | m_irq_active = true; |
| 241 | 245 | m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance |
| r19892 | r19893 | |
| 244 | 248 | else |
| 245 | 249 | { |
| 246 | 250 | m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE); |
| 247 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 251 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 248 | 252 | m_pias->cb1_w(1); |
| 249 | 253 | m_irq_active = false; |
| 250 | 254 | m_pia28->ca1_w(1); |
| r19892 | r19893 | |
| 279 | 283 | if(state == CLEAR_LINE) |
| 280 | 284 | { |
| 281 | 285 | // restart IRQ timer |
| 282 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 286 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 283 | 287 | m_irq_active = false; |
| 284 | 288 | } |
| 285 | 289 | else |
| r19892 | r19893 | |
| 591 | 595 | membank("bank0")->set_entry(0); |
| 592 | 596 | membank("bank1")->set_entry(0); |
| 593 | 597 | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 594 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 598 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); |
| 595 | 599 | m_irq_active = false; |
| 596 | 600 | } |
| 597 | 601 | |