trunk/src/mame/drivers/s11b.c
| r19884 | r19885 | |
| 21 | 21 | // This length is determined by the settings of the W14 and W15 jumpers |
| 22 | 22 | // It can be 0x300, 0x380, 0x700 or 0x780 cycles long. |
| 23 | 23 | // IRQ length is always 32 cycles |
| 24 | | #define S11_IRQ_CYCLES 0x700 |
| 24 | #define S11_IRQ_CYCLES 0x380 |
| 25 | 25 | |
| 26 | 26 | class s11b_state : public genpin_class |
| 27 | 27 | { |
| r19884 | r19885 | |
| 243 | 243 | if(param == 1) |
| 244 | 244 | { |
| 245 | 245 | m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE); |
| 246 | | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz/2),0); |
| 246 | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0); |
| 247 | 247 | m_pias->cb1_w(0); |
| 248 | 248 | m_irq_active = true; |
| 249 | 249 | m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance |
| r19884 | r19885 | |
| 252 | 252 | else |
| 253 | 253 | { |
| 254 | 254 | m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE); |
| 255 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 255 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 256 | 256 | m_pias->cb1_w(1); |
| 257 | 257 | m_irq_active = false; |
| 258 | 258 | m_pia28->ca1_w(1); |
| r19884 | r19885 | |
| 291 | 291 | if(state == CLEAR_LINE) |
| 292 | 292 | { |
| 293 | 293 | // restart IRQ timer |
| 294 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 294 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 295 | 295 | m_irq_active = false; |
| 296 | 296 | } |
| 297 | 297 | else |
| r19884 | r19885 | |
| 651 | 651 | membank("bgbank")->set_entry(0); |
| 652 | 652 | m_invert = false; |
| 653 | 653 | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 654 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 654 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 655 | 655 | m_irq_active = false; |
| 656 | 656 | } |
| 657 | 657 | |
| r19884 | r19885 | |
| 667 | 667 | membank("bgbank")->set_entry(0); |
| 668 | 668 | m_invert = true; |
| 669 | 669 | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 670 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 670 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 671 | 671 | m_irq_active = false; |
| 672 | 672 | } |
| 673 | 673 | |
trunk/src/mame/drivers/s11.c
| r19884 | r19885 | |
| 26 | 26 | // This length is determined by the settings of the W14 and W15 jumpers |
| 27 | 27 | // It can be 0x300, 0x380, 0x700 or 0x780 cycles long. |
| 28 | 28 | // IRQ length is always 32 cycles |
| 29 | | #define S11_IRQ_CYCLES 0x700 |
| 29 | #define S11_IRQ_CYCLES 0x380 |
| 30 | 30 | |
| 31 | 31 | class s11_state : public genpin_class |
| 32 | 32 | { |
| r19884 | r19885 | |
| 235 | 235 | if(param == 1) |
| 236 | 236 | { |
| 237 | 237 | m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE); |
| 238 | | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz/2),0); |
| 238 | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0); |
| 239 | 239 | m_pias->cb1_w(0); |
| 240 | 240 | m_irq_active = true; |
| 241 | 241 | m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance |
| r19884 | r19885 | |
| 244 | 244 | else |
| 245 | 245 | { |
| 246 | 246 | m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE); |
| 247 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 247 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 248 | 248 | m_pias->cb1_w(1); |
| 249 | 249 | m_irq_active = false; |
| 250 | 250 | m_pia28->ca1_w(1); |
| r19884 | r19885 | |
| 279 | 279 | if(state == CLEAR_LINE) |
| 280 | 280 | { |
| 281 | 281 | // restart IRQ timer |
| 282 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 282 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 283 | 283 | m_irq_active = false; |
| 284 | 284 | } |
| 285 | 285 | else |
| r19884 | r19885 | |
| 591 | 591 | membank("bank0")->set_entry(0); |
| 592 | 592 | membank("bank1")->set_entry(0); |
| 593 | 593 | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 594 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 594 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 595 | 595 | m_irq_active = false; |
| 596 | 596 | } |
| 597 | 597 | |
trunk/src/mame/drivers/s11a.c
| r19884 | r19885 | |
| 245 | 245 | if(param == 1) |
| 246 | 246 | { |
| 247 | 247 | m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE); |
| 248 | | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz/2),0); |
| 248 | m_irq_timer->adjust(attotime::from_ticks(32,XTAL_4MHz),0); |
| 249 | 249 | m_pias->cb1_w(0); |
| 250 | 250 | m_irq_active = true; |
| 251 | 251 | m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2)); // Advance |
| r19884 | r19885 | |
| 254 | 254 | else |
| 255 | 255 | { |
| 256 | 256 | m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE); |
| 257 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 257 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 258 | 258 | m_pias->cb1_w(1); |
| 259 | 259 | m_irq_active = false; |
| 260 | 260 | m_pia28->ca1_w(1); |
| r19884 | r19885 | |
| 290 | 290 | if(state == CLEAR_LINE) |
| 291 | 291 | { |
| 292 | 292 | // restart IRQ timer |
| 293 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 293 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 294 | 294 | m_irq_active = false; |
| 295 | 295 | } |
| 296 | 296 | else |
| r19884 | r19885 | |
| 616 | 616 | membank("bank1")->set_entry(0); |
| 617 | 617 | membank("bgbank")->set_entry(0); |
| 618 | 618 | m_irq_timer = timer_alloc(TIMER_IRQ); |
| 619 | | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz/2),1); |
| 619 | m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,XTAL_4MHz),1); |
| 620 | 620 | m_irq_active = false; |
| 621 | 621 | } |
| 622 | 622 | |