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r19879 Friday 28th December, 2012 at 05:23:42 UTC by Barry Rodewald
s11, s11a, s11b: Changed main IRQ timing based on schematics.     Removed YM2151 reset from s11 and s11a, as this is not     hooked up on background music boards used on these systems.     Made background board communications two-way.     Added HC55516 to s11b background music hardware. [Barry Rodewald]

[src/mame/drivers]

s11.c s11a.c s11b.c

trunk/src/mame/drivers/s11.c

r19878	r19879
23	23	#include "sound/dac.h"
24	24	#include "s11.lh"
25	25
	26	// Length of time in cycles between IRQs on the main 6808 CPU
	27	// This length is determined by the settings of the W14 and W15 jumpers
	28	// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
	29	// IRQ length is always 32 cycles
	30	#define S11_IRQ_CYCLES 0x700
26	31
27	32	class s11_state : public genpin_class
28	33	{
r19878	r19879
62	67	DECLARE_WRITE8_MEMBER(pia34_pb_w);
63	68	DECLARE_WRITE_LINE_MEMBER(pia34_cb2_w);
64	69	DECLARE_WRITE8_MEMBER(pia40_pa_w);
65		DECLARE_WRITE_LINE_MEMBER(pia40_ca2_w);
66	70	DECLARE_WRITE_LINE_MEMBER(pia40_cb2_w);
67	71	DECLARE_READ8_MEMBER(dips_r);
68	72	DECLARE_READ8_MEMBER(switch_r);
r19878	r19879
70	74	DECLARE_READ_LINE_MEMBER(pias_ca1_r);
71	75	DECLARE_READ_LINE_MEMBER(pia21_ca1_r);
72	76	DECLARE_READ8_MEMBER(pia28_w7_r);
73		DECLARE_READ_LINE_MEMBER(pia28_ca1_r);
74		DECLARE_READ_LINE_MEMBER(pia28_cb1_r);
75	77	DECLARE_WRITE_LINE_MEMBER(pias_ca2_w);
76	78	DECLARE_WRITE_LINE_MEMBER(pias_cb2_w);
77	79	DECLARE_WRITE_LINE_MEMBER(pia21_ca2_w);
r19878	r19879
81	83	DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w) { }; // comma1&2
82	84	DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w) { }; // dummy to stop error log filling up
83	85	DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w);
84		TIMER_DEVICE_CALLBACK_MEMBER(irq);
	86	DECLARE_WRITE_LINE_MEMBER(pia_irq);
85	87	DECLARE_INPUT_CHANGED_MEMBER(main_nmi);
86	88	DECLARE_INPUT_CHANGED_MEMBER(audio_nmi);
87	89	DECLARE_MACHINE_RESET(s11);
88	90	DECLARE_DRIVER_INIT(s11);
89	91	protected:
90
91	92	// devices
92	93	required_device<cpu_device> m_maincpu;
93	94	required_device<cpu_device> m_audiocpu;
r19878	r19879
104	105	required_device<pia6821_device> m_pia34;
105	106	required_device<pia6821_device> m_pia40;
106	107	required_device<ym2151_device> m_ym;
	108
	109	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
107	110	private:
108	111	UINT8 m_sound_data;
109	112	UINT8 m_strobe;
r19878	r19879
112	115	UINT32 m_segment1;
113	116	UINT32 m_segment2;
114	117	bool m_ca1;
	118	emu_timer* m_irq_timer;
	119	bool m_irq_active;
	120
	121	static const device_timer_id TIMER_IRQ = 0;
115	122	};
116	123
117	124	static ADDRESS_MAP_START( s11_main_map, AS_PROGRAM, 8, s11_state )
r19878	r19879
221	228	PORT_CONFSETTING( 0x10, "English" )
222	229	INPUT_PORTS_END
223	230
	231	void s11_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
	232	{
	233	switch(id)
	234	{
	235	case TIMER_IRQ:
	236	if(param == 1)
	237	{
	238	m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE);
	239	m_irq_timer->adjust(attotime::from_ticks(32,4000000/2),0);
	240	m_pias->cb1_w(0);
	241	m_irq_active = true;
	242	m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2));  // Advance
	243	m_pia28->cb1_w(BIT(ioport("DIAGS")->read(), 3));  // Up/Down
	244	}
	245	else
	246	{
	247	m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE);
	248	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	249	m_pias->cb1_w(1);
	250	m_irq_active = false;
	251	m_pia28->ca1_w(1);
	252	m_pia28->cb1_w(1);
	253	}
	254	break;
	255	}
	256	}
	257
224	258	MACHINE_RESET_MEMBER( s11_state, s11 )
225	259	{
226	260	membank("bank0")->set_entry(0);
r19878	r19879
241	275	m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
242	276	}
243	277
	278	WRITE_LINE_MEMBER( s11_state::pia_irq )
	279	{
	280	if(state == CLEAR_LINE)
	281	{
	282	// restart IRQ timer
	283	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	284	m_irq_active = false;
	285	}
	286	else
	287	{
	288	// disable IRQ timer while other IRQs are being handled
	289	// (counter is reset every 32 cycles while a PIA IRQ is handled)
	290	m_irq_timer->adjust(attotime::zero);
	291	m_irq_active = true;
	292	}
	293	}
	294
244	295	WRITE8_MEMBER( s11_state::sol3_w )
245	296	{
246	297
r19878	r19879
271	322	DEVCB_DRIVER_MEMBER(s11_state, sol2_w),      /* port B out */
272	323	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia21_ca2_w),      /* line CA2 out */
273	324	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia21_cb2_w),      /* line CB2 out */
274		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
275		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	325	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
	326	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
276	327	};
277	328
278	329	WRITE8_MEMBER( s11_state::lamp0_w )
r19878	r19879
292	343	DEVCB_DRIVER_MEMBER(s11_state, lamp1_w),      /* port B out */
293	344	DEVCB_NULL,      /* line CA2 out */
294	345	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia24_cb2_w),      /* line CB2 out */
295		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
296		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	346	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
	347	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
297	348	};
298	349
299		READ_LINE_MEMBER( s11_state::pia28_ca1_r )
300		{
301		return BIT(ioport("DIAGS")->read(), 2) ? 1 : 0; // advance button
302		}
303
304		READ_LINE_MEMBER( s11_state::pia28_cb1_r )
305		{
306		return BIT(ioport("DIAGS")->read(), 3) ? 1 : 0; // up/down switch
307		}
308
309	350	WRITE8_MEMBER( s11_state::dig0_w )
310	351	{
311	352	static const UINT8 patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0x58, 0x4c, 0x62, 0x69, 0x78, 0 }; // 7447
r19878	r19879
345	386	{
346	387	DEVCB_DRIVER_MEMBER(s11_state, pia28_w7_r),      /* port A in */
347	388	DEVCB_NULL,      /* port B in */
348		DEVCB_DRIVER_LINE_MEMBER(s11_state, pia28_ca1_r),      /* line CA1 in */
349		DEVCB_DRIVER_LINE_MEMBER(s11_state, pia28_cb1_r),      /* line CB1 in */
	389	DEVCB_NULL,      /* line CA1 in */
	390	DEVCB_NULL,      /* line CB1 in */
350	391	DEVCB_NULL,      /* line CA2 in */
351	392	DEVCB_NULL,      /* line CB2 in */
352	393	DEVCB_DRIVER_MEMBER(s11_state, dig0_w),      /* port A out */
353	394	DEVCB_DRIVER_MEMBER(s11_state, dig1_w),      /* port B out */
354	395	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia28_ca2_w),      /* line CA2 out */
355	396	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia28_cb2_w),      /* line CB2 out */
356		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
357		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	397	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
	398	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
358	399	};
359	400
360	401	WRITE8_MEMBER( s11_state::pia2c_pa_w )
r19878	r19879
391	432	DEVCB_DRIVER_MEMBER(s11_state, pia2c_pb_w),      /* port B out */
392	433	DEVCB_NULL,      /* line CA2 out */
393	434	DEVCB_NULL,      /* line CB2 out */
394		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
395		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	435	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
	436	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
396	437	};
397	438
398	439	READ8_MEMBER( s11_state::switch_r )
r19878	r19879
419	460	DEVCB_DRIVER_MEMBER(s11_state, switch_w),      /* port B out */
420	461	DEVCB_NULL,      /* line CA2 out */
421	462	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia30_cb2_w),      /* line CB2 out */
422		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
423		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	463	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
	464	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
424	465	};
425	466
426	467	WRITE8_MEMBER( s11_state::pia34_pa_w )
r19878	r19879
456	497	DEVCB_DRIVER_MEMBER(s11_state, pia34_pb_w),      /* port B out */
457	498	DEVCB_NULL,      /* line CA2 out */
458	499	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia34_cb2_w),      /* line CB2 out */
459		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
460		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	500	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq),      /* IRQA */
	501	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia_irq)      /* IRQB */
461	502	};
462	503
463	504	WRITE8_MEMBER( s11_state::bank_w )
r19878	r19879
522	563	m_pia40->ca1_w(0);
523	564	}
524	565
525		WRITE_LINE_MEMBER( s11_state::pia40_ca2_w)
526		{
527		if(state == ASSERT_LINE)
528		m_ym->reset();
529		}
530
531	566	WRITE_LINE_MEMBER( s11_state::pia40_cb2_w)
532	567	{
533	568	m_pia34->cb1_w(state);  // To Widget MCB1 through CPU Data interface
r19878	r19879
543	578	DEVCB_NULL,      /* line CB2 in */
544	579	DEVCB_DRIVER_MEMBER(s11_state, pia40_pa_w),      /* port A out */
545	580	DEVCB_DRIVER_MEMBER(s11_state, dac_w),      /* port B out */
546		DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_ca2_w),      /* line CA2 out */
	581	DEVCB_NULL,      /* line CA2 out */
547	582	DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_cb2_w),      /* line CB2 out */
548	583	DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE),      /* IRQA */
549	584	DEVCB_CPU_INPUT_LINE("bgcpu", INPUT_LINE_NMI)      /* IRQB */
r19878	r19879
556	591	membank("bank1")->configure_entries(0, 2, &ROM[0x18000], 0x4000);
557	592	membank("bank0")->set_entry(0);
558	593	membank("bank1")->set_entry(0);
	594	m_irq_timer = timer_alloc(TIMER_IRQ);
	595	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	596	m_irq_active = false;
559	597	}
560	598
561		TIMER_DEVICE_CALLBACK_MEMBER( s11_state::irq)
562		{
563		m_maincpu->set_input_line(M6800_IRQ_LINE, HOLD_LINE);
564		m_pias->cb1_w(0);
565		}
566
567	599	static MACHINE_CONFIG_START( s11, s11_state )
568	600	/* basic machine hardware */
569	601	MCFG_CPU_ADD("maincpu", M6802, 4000000)
570	602	MCFG_CPU_PROGRAM_MAP(s11_main_map)
571		MCFG_TIMER_DRIVER_ADD_PERIODIC("irq", s11_state, irq, attotime::from_hz(1000))
572	603	MCFG_MACHINE_RESET_OVERRIDE(s11_state, s11)
573	604
574	605	/* Video */

trunk/src/mame/drivers/s11a.c

r19878	r19879
9	9	ToDo:
10	10	- Doesn't react to the Advance button very well
11	11	- Some LEDs flicker
12		- Diagnostic LED blinks constantly
13	12
14	13	Note: To start a game, certain switches need to be activated.  You must first press and
15	14	hold one of the trough switches (usually the left) and the ball shooter switch for
r19878	r19879
28	27	#include "sound/dac.h"
29	28	#include "s11a.lh"
30	29
	30	// Length of time in cycles between IRQs on the main 6808 CPU
	31	// This length is determined by the settings of the W14 and W15 jumpers
	32	// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
	33	// IRQ length is always 32 cycles
	34	#define S11_IRQ_CYCLES 0x700
31	35
32	36	class s11a_state : public genpin_class
33	37	{
r19878	r19879
68	72	DECLARE_WRITE8_MEMBER(pia34_pb_w);
69	73	DECLARE_WRITE_LINE_MEMBER(pia34_cb2_w);
70	74	DECLARE_WRITE8_MEMBER(pia40_pa_w);
71		DECLARE_WRITE_LINE_MEMBER(pia40_ca2_w);
	75	DECLARE_WRITE8_MEMBER(pia40_pb_w);
72	76	DECLARE_WRITE_LINE_MEMBER(pia40_cb2_w);
73	77	DECLARE_READ8_MEMBER(dips_r);
74	78	DECLARE_READ8_MEMBER(switch_r);
75	79	DECLARE_WRITE8_MEMBER(switch_w);
76	80	DECLARE_READ_LINE_MEMBER(pias_ca1_r);
77	81	DECLARE_READ_LINE_MEMBER(pia21_ca1_r);
78		DECLARE_READ_LINE_MEMBER(pia28_ca1_r);
79		DECLARE_READ_LINE_MEMBER(pia28_cb1_r);
80	82	DECLARE_READ8_MEMBER(pia28_w7_r);
81	83	DECLARE_WRITE_LINE_MEMBER(pias_ca2_w);
82	84	DECLARE_WRITE_LINE_MEMBER(pias_cb2_w);
r19878	r19879
87	89	DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w) { }; // comma1&2
88	90	DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w) { }; // dummy to stop error log filling up
89	91	DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w);
	92	DECLARE_WRITE_LINE_MEMBER(pia_irq);
90	93	TIMER_DEVICE_CALLBACK_MEMBER(irq);
91	94	DECLARE_INPUT_CHANGED_MEMBER(main_nmi);
92	95	DECLARE_INPUT_CHANGED_MEMBER(audio_nmi);
r19878	r19879
110	113	required_device<pia6821_device> m_pia34;
111	114	required_device<pia6821_device> m_pia40;
112	115	required_device<ym2151_device> m_ym;
	116
	117	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
113	118	private:
114	119	UINT8 m_sound_data;
115	120	UINT8 m_strobe;
r19878	r19879
118	123	UINT32 m_segment1;
119	124	UINT32 m_segment2;
120	125	bool m_ca1;
	126	emu_timer* m_irq_timer;
	127	bool m_irq_active;
	128
	129	static const device_timer_id TIMER_IRQ = 0;
121	130	};
122	131
123	132	static ADDRESS_MAP_START( s11a_main_map, AS_PROGRAM, 8, s11a_state )
r19878	r19879
222	231	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Audio Diag") PORT_CODE(KEYCODE_F1) PORT_CHANGED_MEMBER(DEVICE_SELF, s11a_state, audio_nmi, 1)
223	232	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Main Diag") PORT_CODE(KEYCODE_F2) PORT_CHANGED_MEMBER(DEVICE_SELF, s11a_state, main_nmi, 1)
224	233	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Advance") PORT_CODE(KEYCODE_0)
225		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Up/Down") PORT_CODE(KEYCODE_9)
	234	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Up/Down") PORT_CODE(KEYCODE_9) PORT_TOGGLE
226	235	PORT_CONFNAME( 0x10, 0x10, "Language" )
227	236	PORT_CONFSETTING( 0x00, "German" )
228	237	PORT_CONFSETTING( 0x10, "English" )
229	238	INPUT_PORTS_END
230	239
	240	void s11a_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
	241	{
	242	switch(id)
	243	{
	244	case TIMER_IRQ:
	245	if(param == 1)
	246	{
	247	m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE);
	248	m_irq_timer->adjust(attotime::from_ticks(32,4000000/2),0);
	249	m_pias->cb1_w(0);
	250	m_irq_active = true;
	251	m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2));  // Advance
	252	m_pia28->cb1_w(BIT(ioport("DIAGS")->read(), 3));  // Up/Down
	253	}
	254	else
	255	{
	256	m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE);
	257	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	258	m_pias->cb1_w(1);
	259	m_irq_active = false;
	260	m_pia28->ca1_w(1);
	261	m_pia28->cb1_w(1);
	262	}
	263	break;
	264	}
	265	}
	266
231	267	MACHINE_RESET_MEMBER( s11a_state, s11a )
232	268	{
233	269	membank("bank0")->set_entry(0);
r19878	r19879
249	285	m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
250	286	}
251	287
	288	WRITE_LINE_MEMBER( s11a_state::pia_irq )
	289	{
	290	if(state == CLEAR_LINE)
	291	{
	292	// restart IRQ timer
	293	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	294	m_irq_active = false;
	295	}
	296	else
	297	{
	298	// disable IRQ timer while other IRQs are being handled
	299	// (counter is reset every 32 cycles while a PIA IRQ is handled)
	300	m_irq_timer->adjust(attotime::zero);
	301	m_irq_active = true;
	302	}
	303	}
	304
252	305	WRITE8_MEMBER( s11a_state::sol3_w )
253	306	{
254	307
r19878	r19879
279	332	DEVCB_DRIVER_MEMBER(s11a_state, sol2_w),      /* port B out */
280	333	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia21_ca2_w),      /* line CA2 out */
281	334	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia21_cb2_w),      /* line CB2 out */
282		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
283		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	335	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
	336	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
284	337	};
285	338
286	339	WRITE8_MEMBER( s11a_state::lamp0_w )
r19878	r19879
300	353	DEVCB_DRIVER_MEMBER(s11a_state, lamp1_w),      /* port B out */
301	354	DEVCB_NULL,      /* line CA2 out */
302	355	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia24_cb2_w),      /* line CB2 out */
303		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
304		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	356	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
	357	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
305	358	};
306	359
307		READ_LINE_MEMBER( s11a_state::pia28_ca1_r )
308		{
309		return BIT(ioport("DIAGS")->read(), 2) ? 1 : 0; // advance button
310		}
311
312		READ_LINE_MEMBER( s11a_state::pia28_cb1_r )
313		{
314		return BIT(ioport("DIAGS")->read(), 3) ? 1 : 0; // up/down switch
315		}
316
317	360	WRITE8_MEMBER( s11a_state::dig0_w )
318	361	{
319	362	data &= 0x7f;
r19878	r19879
354	397	{
355	398	DEVCB_DRIVER_MEMBER(s11a_state, pia28_w7_r),      /* port A in */
356	399	DEVCB_NULL,      /* port B in */
357		DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia28_ca1_r),      /* line CA1 in */
358		DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia28_cb1_r),      /* line CB1 in */
	400	DEVCB_NULL,      /* line CA1 in */
	401	DEVCB_NULL,      /* line CB1 in */
359	402	DEVCB_NULL,      /* line CA2 in */
360	403	DEVCB_NULL,      /* line CB2 in */
361	404	DEVCB_DRIVER_MEMBER(s11a_state, dig0_w),      /* port A out */
362	405	DEVCB_DRIVER_MEMBER(s11a_state, dig1_w),      /* port B out */
363	406	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia28_ca2_w),      /* line CA2 out */
364	407	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia28_cb2_w),      /* line CB2 out */
365		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
366		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	408	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
	409	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
367	410	};
368	411
369	412	WRITE8_MEMBER( s11a_state::pia2c_pa_w )
r19878	r19879
400	443	DEVCB_DRIVER_MEMBER(s11a_state, pia2c_pb_w),      /* port B out */
401	444	DEVCB_NULL,      /* line CA2 out */
402	445	DEVCB_NULL,      /* line CB2 out */
403		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
404		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	446	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
	447	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
405	448	};
406	449
407	450	READ8_MEMBER( s11a_state::switch_r )
r19878	r19879
428	471	DEVCB_DRIVER_MEMBER(s11a_state, switch_w),      /* port B out */
429	472	DEVCB_NULL,      /* line CA2 out */
430	473	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia30_cb2_w),      /* line CB2 out */
431		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
432		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	474	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
	475	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
433	476	};
434	477
435	478	WRITE8_MEMBER( s11a_state::pia34_pa_w )
r19878	r19879
465	508	DEVCB_DRIVER_MEMBER(s11a_state, pia34_pb_w),      /* port B out */
466	509	DEVCB_NULL,      /* line CA2 out */
467	510	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia34_cb2_w),      /* line CB2 out */
468		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
469		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	511	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq),      /* IRQA */
	512	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia_irq)      /* IRQB */
470	513	};
471	514
472	515	WRITE8_MEMBER( s11a_state::bank_w )
r19878	r19879
507	550	m_dac->write_unsigned8(data);
508	551	}
509	552
510		WRITE_LINE_MEMBER( s11a_state::pia40_ca2_w)
511		{
512		if(state == ASSERT_LINE)
513		m_ym->reset();
514		}
515
516	553	WRITE_LINE_MEMBER( s11a_state::pia40_cb2_w)
517	554	{
518	555	m_pia34->cb1_w(state);  // To Widget MCB1 through CPU Data interface
r19878	r19879
528	565	DEVCB_NULL,      /* line CB2 in */
529	566	DEVCB_DRIVER_MEMBER(s11a_state, sound_w),      /* port A out */
530	567	DEVCB_DRIVER_MEMBER(s11a_state, dac_w),      /* port B out */
531		DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia40_ca2_w),      /* line CA2 out */
	568	DEVCB_NULL,      /* line CA2 out */
532	569	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pia40_cb2_w),      /* line CB2 out */
533	570	DEVCB_CPU_INPUT_LINE("audiocpu", M6800_IRQ_LINE),      /* IRQA */
534	571	DEVCB_CPU_INPUT_LINE("audiocpu", M6800_IRQ_LINE)      /* IRQB */
r19878	r19879
539	576	m_dac1->write_unsigned8(data);
540	577	}
541	578
	579	WRITE8_MEMBER( s11a_state::pia40_pb_w )
	580	{
	581	m_pia34->portb_w(data);
	582	}
	583
542	584	WRITE_LINE_MEMBER( s11a_state::ym2151_irq_w)
543	585	{
544	586	if(state == CLEAR_LINE)
r19878	r19879
556	598	DEVCB_LINE_VCC,      /* line CA2 in */
557	599	DEVCB_NULL,      /* line CB2 in */
558	600	DEVCB_DRIVER_MEMBER(s11a_state, pia40_pa_w),      /* port A out */
559		DEVCB_DRIVER_MEMBER(s11a_state, dac_w),      /* port B out */
	601	DEVCB_DRIVER_MEMBER(s11a_state, pia40_pb_w),      /* port B out */
560	602	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pias_ca2_w),      /* line CA2 out */
561	603	DEVCB_DRIVER_LINE_MEMBER(s11a_state, pias_cb2_w),      /* line CB2 out */
562	604	DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE),      /* IRQA */
r19878	r19879
573	615	membank("bank0")->set_entry(0);
574	616	membank("bank1")->set_entry(0);
575	617	membank("bgbank")->set_entry(0);
	618	m_irq_timer = timer_alloc(TIMER_IRQ);
	619	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	620	m_irq_active = false;
576	621	}
577	622
578		TIMER_DEVICE_CALLBACK_MEMBER( s11a_state::irq)
579		{
580		m_maincpu->set_input_line(M6800_IRQ_LINE, HOLD_LINE);
581		m_pias->cb1_w(0);
582		}
583
584	623	static MACHINE_CONFIG_START( s11a, s11a_state )
585	624	/* basic machine hardware */
586		MCFG_CPU_ADD("maincpu", M6802, 4000000)
	625	MCFG_CPU_ADD("maincpu", M6808, 4000000)
587	626	MCFG_CPU_PROGRAM_MAP(s11a_main_map)
588		MCFG_TIMER_DRIVER_ADD_PERIODIC("irq", s11a_state, irq, attotime::from_hz(1000))
589	627	MCFG_MACHINE_RESET_OVERRIDE(s11a_state, s11a)
590	628
591	629	/* Video */
r19878	r19879
604	642	MCFG_NVRAM_ADD_1FILL("nvram")
605	643
606	644	/* Add the soundcard */
607		MCFG_CPU_ADD("audiocpu", M6808, 3580000)
	645	MCFG_CPU_ADD("audiocpu", M6802, 3580000)
608	646	MCFG_CPU_PROGRAM_MAP(s11a_audio_map)
609	647
610	648	MCFG_SPEAKER_STANDARD_MONO("mono")

trunk/src/mame/drivers/s11b.c

r19878	r19879
17	17	#include "sound/dac.h"
18	18	#include "s11b.lh"
19	19
	20	// Length of time in cycles between IRQs on the main 6808 CPU
	21	// This length is determined by the settings of the W14 and W15 jumpers
	22	// It can be 0x300, 0x380, 0x700 or 0x780 cycles long.
	23	// IRQ length is always 32 cycles
	24	#define S11_IRQ_CYCLES 0x700
20	25
21	26	class s11b_state : public genpin_class
22	27	{
r19878	r19879
29	34	m_dac(*this, "dac"),
30	35	m_dac1(*this, "dac1"),
31	36	m_hc55516(*this, "hc55516"),
	37	m_bg_hc55516(*this, "hc55516_bg"),
32	38	m_pias(*this, "pias"),
33	39	m_pia21(*this, "pia21"),
34	40	m_pia24(*this, "pia24"),
r19878	r19879
51	57	DECLARE_WRITE8_MEMBER(sol2_w) { }; // solenoids 8-15
52	58	DECLARE_WRITE8_MEMBER(sol3_w); // solenoids 0-7
53	59	DECLARE_WRITE8_MEMBER(sound_w);
	60	DECLARE_WRITE8_MEMBER(bg_speech_clock_w);
	61	DECLARE_WRITE8_MEMBER(bg_speech_digit_w);
54	62	DECLARE_WRITE8_MEMBER(pia2c_pa_w);
55	63	DECLARE_WRITE8_MEMBER(pia2c_pb_w);
56	64	DECLARE_WRITE8_MEMBER(pia34_pa_w);
57	65	DECLARE_WRITE8_MEMBER(pia34_pb_w);
58	66	DECLARE_WRITE_LINE_MEMBER(pia34_cb2_w);
59	67	DECLARE_WRITE8_MEMBER(pia40_pa_w);
	68	DECLARE_WRITE8_MEMBER(pia40_pb_w);
60	69	DECLARE_WRITE_LINE_MEMBER(pia40_ca2_w);
61	70	DECLARE_WRITE_LINE_MEMBER(pia40_cb2_w);
62	71	DECLARE_READ8_MEMBER(dips_r);
r19878	r19879
64	73	DECLARE_WRITE8_MEMBER(switch_w);
65	74	DECLARE_READ_LINE_MEMBER(pias_ca1_r);
66	75	DECLARE_READ_LINE_MEMBER(pia21_ca1_r);
67		DECLARE_READ_LINE_MEMBER(pia28_ca1_r);
68		DECLARE_READ_LINE_MEMBER(pia28_cb1_r);
69	76	DECLARE_READ8_MEMBER(pia28_w7_r);
70	77	DECLARE_WRITE_LINE_MEMBER(pias_ca2_w);
71	78	DECLARE_WRITE_LINE_MEMBER(pias_cb2_w);
r19878	r19879
76	83	DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w) { }; // comma1&2
77	84	DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w) { }; // dummy to stop error log filling up
78	85	DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w);
79		TIMER_DEVICE_CALLBACK_MEMBER(irq);
	86	DECLARE_WRITE_LINE_MEMBER(pia_irq);
80	87	DECLARE_INPUT_CHANGED_MEMBER(main_nmi);
81	88	DECLARE_INPUT_CHANGED_MEMBER(audio_nmi);
82	89	DECLARE_MACHINE_RESET(s11b);
r19878	r19879
91	98	required_device<dac_device> m_dac;
92	99	required_device<dac_device> m_dac1;
93	100	required_device<hc55516_device> m_hc55516;
	101	required_device<hc55516_device> m_bg_hc55516;
94	102	required_device<pia6821_device> m_pias;
95	103	required_device<pia6821_device> m_pia21;
96	104	required_device<pia6821_device> m_pia24;
r19878	r19879
100	108	required_device<pia6821_device> m_pia34;
101	109	required_device<pia6821_device> m_pia40;
102	110	required_device<ym2151_device> m_ym;
	111
	112	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
103	113	private:
104	114	UINT8 m_sound_data;
105	115	UINT8 m_strobe;
r19878	r19879
109	119	UINT32 m_segment2;
110	120	bool m_ca1;
111	121	bool m_invert;  // later System 11B games start expecting inverted data to the display LED segments.
	122	emu_timer* m_irq_timer;
	123	bool m_irq_active;
	124
	125	static const device_timer_id TIMER_IRQ = 0;
112	126	};
113	127
114	128	static ADDRESS_MAP_START( s11b_main_map, AS_PROGRAM, 8, s11b_state )
r19878	r19879
132	146	ADDRESS_MAP_END
133	147
134	148	static ADDRESS_MAP_START( s11b_bg_map, AS_PROGRAM, 8, s11b_state )
135		AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_RAM
	149	AM_RANGE(0x0000, 0x07ff) AM_RAM
136	150	AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x1ffe) AM_DEVREADWRITE("ym2151", ym2151_device, read, write)
137	151	AM_RANGE(0x4000, 0x4003) AM_MIRROR(0x1ffc) AM_DEVREADWRITE("pia40", pia6821_device, read, write)
	152	AM_RANGE(0x6000, 0x67ff) AM_WRITE(bg_speech_digit_w)
	153	AM_RANGE(0x6800, 0x6fff) AM_WRITE(bg_speech_clock_w)
138	154	AM_RANGE(0x7800, 0x7fff) AM_WRITE(bgbank_w)
139	155	AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bgbank")
140	156	ADDRESS_MAP_END
r19878	r19879
213	229	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Audio Diag") PORT_CODE(KEYCODE_F1) PORT_CHANGED_MEMBER(DEVICE_SELF, s11b_state, audio_nmi, 1)
214	230	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Main Diag") PORT_CODE(KEYCODE_F2) PORT_CHANGED_MEMBER(DEVICE_SELF, s11b_state, main_nmi, 1)
215	231	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Advance") PORT_CODE(KEYCODE_0)
216		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Up/Down") PORT_CODE(KEYCODE_9)
	232	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Up/Down") PORT_CODE(KEYCODE_9) PORT_TOGGLE
217	233	PORT_CONFNAME( 0x10, 0x10, "Language" )
218	234	PORT_CONFSETTING( 0x00, "German" )
219	235	PORT_CONFSETTING( 0x10, "English" )
220	236	INPUT_PORTS_END
221	237
	238	void s11b_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
	239	{
	240	switch(id)
	241	{
	242	case TIMER_IRQ:
	243	if(param == 1)
	244	{
	245	m_maincpu->set_input_line(M6800_IRQ_LINE,ASSERT_LINE);
	246	m_irq_timer->adjust(attotime::from_ticks(32,4000000/2),0);
	247	m_pias->cb1_w(0);
	248	m_irq_active = true;
	249	m_pia28->ca1_w(BIT(ioport("DIAGS")->read(), 2));  // Advance
	250	m_pia28->cb1_w(BIT(ioport("DIAGS")->read(), 3));  // Up/Down
	251	}
	252	else
	253	{
	254	m_maincpu->set_input_line(M6800_IRQ_LINE,CLEAR_LINE);
	255	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	256	m_pias->cb1_w(1);
	257	m_irq_active = false;
	258	m_pia28->ca1_w(1);
	259	m_pia28->cb1_w(1);
	260	}
	261	break;
	262	}
	263	}
	264
222	265	MACHINE_RESET_MEMBER( s11b_state, s11b )
223	266	{
224	267	membank("bank0")->set_entry(0);
r19878	r19879
243	286	m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
244	287	}
245	288
	289	WRITE_LINE_MEMBER( s11b_state::pia_irq )
	290	{
	291	if(state == CLEAR_LINE)
	292	{
	293	// restart IRQ timer
	294	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	295	m_irq_active = false;
	296	}
	297	else
	298	{
	299	// disable IRQ timer while other IRQs are being handled
	300	// (counter is reset every 32 cycles while a PIA IRQ is handled)
	301	m_irq_timer->adjust(attotime::zero);
	302	m_irq_active = true;
	303	}
	304	}
	305
246	306	WRITE8_MEMBER( s11b_state::sol3_w )
247	307	{
248	308
r19878	r19879
253	313	m_sound_data = data;
254	314	}
255	315
	316	WRITE8_MEMBER( s11b_state::bg_speech_clock_w )
	317	{
	318	hc55516_clock_w(m_bg_hc55516, data);
	319	popmessage("BG HC55516 Clock write %02x",data);
	320	}
	321
	322	WRITE8_MEMBER( s11b_state::bg_speech_digit_w )
	323	{
	324	hc55516_digit_w(m_bg_hc55516, data);
	325	popmessage("BG HC55516 Digit write %02x",data);
	326	}
	327
256	328	WRITE_LINE_MEMBER( s11b_state::pia21_ca2_w )
257	329	{
258	330	// sound ns
r19878	r19879
273	345	DEVCB_DRIVER_MEMBER(s11b_state, sol2_w),      /* port B out */
274	346	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia21_ca2_w),      /* line CA2 out */
275	347	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia21_cb2_w),      /* line CB2 out */
276		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
277		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	348	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq),      /* IRQA */
	349	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq)      /* IRQB */
278	350	};
279	351
280	352	WRITE8_MEMBER( s11b_state::lamp0_w )
r19878	r19879
294	366	DEVCB_DRIVER_MEMBER(s11b_state, lamp1_w),      /* port B out */
295	367	DEVCB_NULL,      /* line CA2 out */
296	368	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia24_cb2_w),      /* line CB2 out */
297		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
298		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	369	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq),      /* IRQA */
	370	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq)      /* IRQB */
299	371	};
300	372
301		READ_LINE_MEMBER( s11b_state::pia28_ca1_r )
302		{
303		return BIT(ioport("DIAGS")->read(), 2) ? 1 : 0; // advance button
304		}
305
306		READ_LINE_MEMBER( s11b_state::pia28_cb1_r )
307		{
308		return BIT(ioport("DIAGS")->read(), 3) ? 1 : 0; // up/down switch
309		}
310
311	373	WRITE8_MEMBER( s11b_state::dig0_w )
312	374	{
313	375	data &= 0x7f;
314	376	m_strobe = data & 15;
315	377	m_diag = (data & 0x70) >> 4;
316	378	output_set_digit_value(60, 0);  // not connected to PA5 or PA6?
317		output_set_digit_value(61, m_diag & 0x01);  // connected to PA4
	379	output_set_digit_value(61, m_diag & 0x01);  // connected to PA4, normal behaviour is to be continually blinking
318	380	output_set_digit_value(62, 0);
319	381	m_segment1 = 0;
320	382	m_segment2 = 0;
r19878	r19879
351	413	{
352	414	DEVCB_DRIVER_MEMBER(s11b_state, pia28_w7_r),      /* port A in */
353	415	DEVCB_NULL,      /* port B in */
354		DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia28_ca1_r),      /* line CA1 in */
355		DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia28_cb1_r),      /* line CB1 in */
	416	DEVCB_NULL,      /* line CA1 in */
	417	DEVCB_NULL,      /* line CB1 in */
356	418	DEVCB_NULL,      /* line CA2 in */
357	419	DEVCB_NULL,      /* line CB2 in */
358	420	DEVCB_DRIVER_MEMBER(s11b_state, dig0_w),      /* port A out */
359	421	DEVCB_DRIVER_MEMBER(s11b_state, dig1_w),      /* port B out */
360	422	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia28_ca2_w),      /* line CA2 out */
361	423	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia28_cb2_w),      /* line CB2 out */
362		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),      /* IRQA */
363		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	424	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq),      /* IRQA */
	425	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq)      /* IRQB */
364	426	};
365	427
366	428	WRITE8_MEMBER( s11b_state::pia2c_pa_w )
r19878	r19879
403	465	DEVCB_DRIVER_MEMBER(s11b_state, pia2c_pb_w),      /* port B out */
404	466	DEVCB_NULL,      /* line CA2 out */
405	467	DEVCB_NULL,      /* line CB2 out */
406		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
407		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	468	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq),   /* IRQA */
	469	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq)      /* IRQB */
408	470	};
409	471
410	472	READ8_MEMBER( s11b_state::switch_r )
r19878	r19879
431	493	DEVCB_DRIVER_MEMBER(s11b_state, switch_w),      /* port B out */
432	494	DEVCB_NULL,      /* line CA2 out */
433	495	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia30_cb2_w),      /* line CB2 out */
434		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
435		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	496	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq),   /* IRQA */
	497	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq)      /* IRQB */
436	498	};
437	499
438	500	WRITE8_MEMBER( s11b_state::pia34_pa_w )
r19878	r19879
471	533	DEVCB_DRIVER_MEMBER(s11b_state, pia34_pb_w),      /* port B out */
472	534	DEVCB_NULL,      /* line CA2 out */
473	535	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia34_cb2_w),      /* line CB2 out */
474		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),   /* IRQA */
475		DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)      /* IRQB */
	536	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq),   /* IRQA */
	537	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia_irq)      /* IRQB */
476	538	};
477	539
478	540	WRITE8_MEMBER( s11b_state::bank_w )
r19878	r19879
494	556	WRITE_LINE_MEMBER( s11b_state::pias_ca2_w )
495	557	{
496	558	// speech clock
497		hc55516_clock_w(m_hc55516, state);
	559	if(state == CLEAR_LINE)
	560	hc55516_clock_w(m_hc55516, 0);
	561	else
	562	hc55516_clock_w(m_hc55516, 1);
498	563	}
499	564
500	565	WRITE_LINE_MEMBER( s11b_state::pias_cb2_w )
r19878	r19879
534	599	m_dac1->write_unsigned8(data);
535	600	}
536	601
	602	WRITE8_MEMBER( s11b_state::pia40_pb_w )
	603	{
	604	m_pia34->portb_w(data);
	605	}
	606
537	607	WRITE_LINE_MEMBER( s11b_state::ym2151_irq_w)
538	608	{
539	609	if(state == CLEAR_LINE)
r19878	r19879
562	632	DEVCB_LINE_VCC,      /* line CA2 in */
563	633	DEVCB_NULL,      /* line CB2 in */
564	634	DEVCB_DRIVER_MEMBER(s11b_state, pia40_pa_w),      /* port A out */
565		DEVCB_DRIVER_MEMBER(s11b_state, dac_w),      /* port B out */
	635	DEVCB_DRIVER_MEMBER(s11b_state, pia40_pb_w),      /* port B out */
566	636	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia40_ca2_w),      /* line CA2 out */
567	637	DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia40_cb2_w),      /* line CB2 out */
568	638	DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE),      /* IRQA */
r19878	r19879
580	650	membank("bank1")->set_entry(0);
581	651	membank("bgbank")->set_entry(0);
582	652	m_invert = false;
	653	m_irq_timer = timer_alloc(TIMER_IRQ);
	654	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	655	m_irq_active = false;
583	656	}
584	657
585	658	DRIVER_INIT_MEMBER( s11b_state, s11b_invert )
r19878	r19879
593	666	membank("bank1")->set_entry(0);
594	667	membank("bgbank")->set_entry(0);
595	668	m_invert = true;
	669	m_irq_timer = timer_alloc(TIMER_IRQ);
	670	m_irq_timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,4000000/2),1);
	671	m_irq_active = false;
596	672	}
597	673
598		TIMER_DEVICE_CALLBACK_MEMBER( s11b_state::irq)
599		{
600		m_maincpu->set_input_line(M6800_IRQ_LINE, HOLD_LINE);
601		m_pias->cb1_w(0);
602		}
603
604	674	static MACHINE_CONFIG_START( s11b, s11b_state )
605	675	/* basic machine hardware */
606	676	MCFG_CPU_ADD("maincpu", M6808, 4000000)
607	677	MCFG_CPU_PROGRAM_MAP(s11b_main_map)
608		MCFG_TIMER_DRIVER_ADD_PERIODIC("irq", s11b_state, irq, attotime::from_hz(1000))
609	678	MCFG_MACHINE_RESET_OVERRIDE(s11b_state, s11b)
610	679
611	680	/* Video */
r19878	r19879
645	714	MCFG_SPEAKER_STANDARD_MONO("bg")
646	715	MCFG_YM2151_ADD("ym2151", 3580000)
647	716	MCFG_YM2151_IRQ_HANDLER(WRITELINE(s11b_state, ym2151_irq_w))
648		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50)
	717	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.25)
649	718
650	719	MCFG_DAC_ADD("dac1")
651	720	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50)
652	721
	722	MCFG_SOUND_ADD("hc55516_bg", HC55516, 0)
	723	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speech", 0.50)
	724
653	725	MCFG_PIA6821_ADD("pia40", pia40_intf)
654	726	MACHINE_CONFIG_END
655	727

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