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r19872 Thursday 27th December, 2012 at 22:54:24 UTC by Ryan Holtz
- e132xs.c: Reverting modernization. (nw)
[src/emu/cpu/e132xs]e132xs.c e132xs.h e132xsop.c

trunk/src/emu/cpu/e132xs/e132xsop.c
r19871r19872
1818   decode->same_srcf_dst = 0; \
1919
2020
21void hyperstone_device::op00()
21static void hyperstone_op00(hyperstone_state *cpustate)
2222{
2323   LOCAL_DECODE_INIT;
2424   RRdecode(decode, 0, 0);
25   hyperstone_chk(decode);
25   hyperstone_chk(cpustate, decode);
2626}
2727
28void hyperstone_device::op01()
28static void hyperstone_op01(hyperstone_state *cpustate)
2929{
3030   LOCAL_DECODE_INIT;
3131   RRdecode(decode, 0, 1);
32   hyperstone_chk(decode);
32   hyperstone_chk(cpustate, decode);
3333}
3434
35void hyperstone_device::op02()
35static void hyperstone_op02(hyperstone_state *cpustate)
3636{
3737   LOCAL_DECODE_INIT;
3838   RRdecode(decode, 1, 0);
39   hyperstone_chk(decode);
39   hyperstone_chk(cpustate, decode);
4040}
4141
42void hyperstone_device::op03()
42static void hyperstone_op03(hyperstone_state *cpustate)
4343{
4444   LOCAL_DECODE_INIT;
4545   RRdecode(decode, 1, 1);
46   hyperstone_chk(decode);
46   hyperstone_chk(cpustate, decode);
4747}
4848
49void hyperstone_device::op04()
49static void hyperstone_op04(hyperstone_state *cpustate)
5050{
5151   LOCAL_DECODE_INIT;
5252   RRdecode(decode, 0, 0);
53   hyperstone_movd(decode);
53   hyperstone_movd(cpustate, decode);
5454}
5555
56void hyperstone_device::op05()
56static void hyperstone_op05(hyperstone_state *cpustate)
5757{
5858   LOCAL_DECODE_INIT;
5959   RRdecode(decode, 0, 1);
60   hyperstone_movd(decode);
60   hyperstone_movd(cpustate, decode);
6161}
6262
63void hyperstone_device::op06()
63static void hyperstone_op06(hyperstone_state *cpustate)
6464{
6565   LOCAL_DECODE_INIT;
6666   RRdecode(decode, 1, 0);
67   hyperstone_movd(decode);
67   hyperstone_movd(cpustate, decode);
6868}
6969
70void hyperstone_device::op07()
70static void hyperstone_op07(hyperstone_state *cpustate)
7171{
7272   LOCAL_DECODE_INIT;
7373   RRdecode(decode, 1, 1);
74   hyperstone_movd(decode);
74   hyperstone_movd(cpustate, decode);
7575}
7676
77void hyperstone_device::op08()
77static void hyperstone_op08(hyperstone_state *cpustate)
7878{
7979   LOCAL_DECODE_INIT;
8080   RRdecode(decode, 0, 0);
81   hyperstone_divu(decode);
81   hyperstone_divu(cpustate, decode);
8282}
8383
84void hyperstone_device::op09()
84static void hyperstone_op09(hyperstone_state *cpustate)
8585{
8686   LOCAL_DECODE_INIT;
8787   RRdecode(decode, 0, 1);
88   hyperstone_divu(decode);
88   hyperstone_divu(cpustate, decode);
8989}
9090
91void hyperstone_device::op0a()
91static void hyperstone_op0a(hyperstone_state *cpustate)
9292{
9393   LOCAL_DECODE_INIT;
9494   RRdecode(decode, 1, 0);
95   hyperstone_divu(decode);
95   hyperstone_divu(cpustate, decode);
9696}
9797
98void hyperstone_device::op0b()
98static void hyperstone_op0b(hyperstone_state *cpustate)
9999{
100100   LOCAL_DECODE_INIT;
101101   RRdecode(decode, 1, 1);
102   hyperstone_divu(decode);
102   hyperstone_divu(cpustate, decode);
103103}
104104
105void hyperstone_device::op0c()
105static void hyperstone_op0c(hyperstone_state *cpustate)
106106{
107107   LOCAL_DECODE_INIT;
108108   RRdecode(decode, 0, 0);
109   hyperstone_divs(decode);
109   hyperstone_divs(cpustate, decode);
110110}
111111
112void hyperstone_device::op0d()
112static void hyperstone_op0d(hyperstone_state *cpustate)
113113{
114114   LOCAL_DECODE_INIT;
115115   RRdecode(decode, 0, 1);
116   hyperstone_divs(decode);
116   hyperstone_divs(cpustate, decode);
117117}
118118
119void hyperstone_device::op0e()
119static void hyperstone_op0e(hyperstone_state *cpustate)
120120{
121121   LOCAL_DECODE_INIT;
122122   RRdecode(decode, 1, 0);
123   hyperstone_divs(decode);
123   hyperstone_divs(cpustate, decode);
124124}
125125
126void hyperstone_device::op0f()
126static void hyperstone_op0f(hyperstone_state *cpustate)
127127{
128128   LOCAL_DECODE_INIT;
129129   RRdecode(decode, 1, 1);
130   hyperstone_divs(decode);
130   hyperstone_divs(cpustate, decode);
131131}
132132
133133
134134
135void hyperstone_device::op10()
135static void hyperstone_op10(hyperstone_state *cpustate)
136136{
137137   LOCAL_DECODE_INIT;
138138   RRlimdecode(decode, 0, 0);
139   hyperstone_xm(decode);
139   hyperstone_xm(cpustate, decode);
140140}
141141
142void hyperstone_device::op11()
142static void hyperstone_op11(hyperstone_state *cpustate)
143143{
144144   LOCAL_DECODE_INIT;
145145   RRlimdecode(decode, 0, 1);
146   hyperstone_xm(decode);
146   hyperstone_xm(cpustate, decode);
147147}
148148
149void hyperstone_device::op12()
149static void hyperstone_op12(hyperstone_state *cpustate)
150150{
151151   LOCAL_DECODE_INIT;
152152   RRlimdecode(decode, 1, 0);
153   hyperstone_xm(decode);
153   hyperstone_xm(cpustate, decode);
154154}
155155
156void hyperstone_device::op13()
156static void hyperstone_op13(hyperstone_state *cpustate)
157157{
158158   LOCAL_DECODE_INIT;
159159   RRlimdecode(decode, 1, 1);
160   hyperstone_xm(decode);
160   hyperstone_xm(cpustate, decode);
161161}
162162
163void hyperstone_device::op14()
163static void hyperstone_op14(hyperstone_state *cpustate)
164164{
165165   LOCAL_DECODE_INIT;
166166   RRconstdecode(decode, 0, 0);
167   hyperstone_mask(decode);
167   hyperstone_mask(cpustate, decode);
168168}
169169
170void hyperstone_device::op15()
170static void hyperstone_op15(hyperstone_state *cpustate)
171171{
172172   LOCAL_DECODE_INIT;
173173   RRconstdecode(decode, 0, 1);
174   hyperstone_mask(decode);
174   hyperstone_mask(cpustate, decode);
175175}
176176
177void hyperstone_device::op16()
177static void hyperstone_op16(hyperstone_state *cpustate)
178178{
179179   LOCAL_DECODE_INIT;
180180   RRconstdecode(decode, 1, 0);
181   hyperstone_mask(decode);
181   hyperstone_mask(cpustate, decode);
182182}
183183
184void hyperstone_device::op17()
184static void hyperstone_op17(hyperstone_state *cpustate)
185185{
186186   LOCAL_DECODE_INIT;
187187   RRconstdecode(decode, 1, 1);
188   hyperstone_mask(decode);
188   hyperstone_mask(cpustate, decode);
189189}
190190
191void hyperstone_device::op18()
191static void hyperstone_op18(hyperstone_state *cpustate)
192192{
193193   LOCAL_DECODE_INIT;
194194   RRconstdecode(decode, 0, 0);
195   hyperstone_sum(decode);
195   hyperstone_sum(cpustate, decode);
196196}
197197
198void hyperstone_device::op19()
198static void hyperstone_op19(hyperstone_state *cpustate)
199199{
200200   LOCAL_DECODE_INIT;
201201   RRconstdecode(decode, 0, 1);
202   hyperstone_sum(decode);
202   hyperstone_sum(cpustate, decode);
203203}
204204
205void hyperstone_device::op1a()
205static void hyperstone_op1a(hyperstone_state *cpustate)
206206{
207207   LOCAL_DECODE_INIT;
208208   RRconstdecode(decode, 1, 0);
209   hyperstone_sum(decode);
209   hyperstone_sum(cpustate, decode);
210210}
211211
212void hyperstone_device::op1b()
212static void hyperstone_op1b(hyperstone_state *cpustate)
213213{
214214   LOCAL_DECODE_INIT;
215215   RRconstdecode(decode, 1, 1);
216   hyperstone_sum(decode);
216   hyperstone_sum(cpustate, decode);
217217}
218218
219void hyperstone_device::op1c()
219static void hyperstone_op1c(hyperstone_state *cpustate)
220220{
221221   LOCAL_DECODE_INIT;
222222   RRconstdecode(decode, 0, 0);
223   hyperstone_sums(decode);
223   hyperstone_sums(cpustate, decode);
224224}
225225
226void hyperstone_device::op1d()
226static void hyperstone_op1d(hyperstone_state *cpustate)
227227{
228228   LOCAL_DECODE_INIT;
229229   RRconstdecode(decode, 0, 1);
230   hyperstone_sums(decode);
230   hyperstone_sums(cpustate, decode);
231231}
232232
233void hyperstone_device::op1e()
233static void hyperstone_op1e(hyperstone_state *cpustate)
234234{
235235   LOCAL_DECODE_INIT;
236236   RRconstdecode(decode, 1, 0);
237   hyperstone_sums(decode);
237   hyperstone_sums(cpustate, decode);
238238}
239239
240void hyperstone_device::op1f()
240static void hyperstone_op1f(hyperstone_state *cpustate)
241241{
242242   LOCAL_DECODE_INIT;
243243   RRconstdecode(decode, 1, 1);
244   hyperstone_sums(decode);
244   hyperstone_sums(cpustate, decode);
245245}
246246
247247
248248
249void hyperstone_device::op20()
249static void hyperstone_op20(hyperstone_state *cpustate)
250250{
251251   LOCAL_DECODE_INIT;
252252   RRdecode(decode, 0, 0);
253   hyperstone_cmp(decode);
253   hyperstone_cmp(cpustate, decode);
254254}
255255
256void hyperstone_device::op21()
256static void hyperstone_op21(hyperstone_state *cpustate)
257257{
258258   LOCAL_DECODE_INIT;
259259   RRdecode(decode, 0, 1);
260   hyperstone_cmp(decode);
260   hyperstone_cmp(cpustate, decode);
261261}
262262
263void hyperstone_device::op22()
263static void hyperstone_op22(hyperstone_state *cpustate)
264264{
265265   LOCAL_DECODE_INIT;
266266   RRdecode(decode, 1, 0);
267   hyperstone_cmp(decode);
267   hyperstone_cmp(cpustate, decode);
268268}
269269
270void hyperstone_device::op23()
270static void hyperstone_op23(hyperstone_state *cpustate)
271271{
272272   LOCAL_DECODE_INIT;
273273   RRdecode(decode, 1, 1);
274   hyperstone_cmp(decode);
274   hyperstone_cmp(cpustate, decode);
275275}
276276
277void hyperstone_device::op24()
277static void hyperstone_op24(hyperstone_state *cpustate)
278278{
279279   LOCAL_DECODE_INIT;
280280   RRdecodewithHflag(decode, 0, 0);
281   hyperstone_mov(decode);
281   hyperstone_mov(cpustate, decode);
282282}
283283
284void hyperstone_device::op25()
284static void hyperstone_op25(hyperstone_state *cpustate)
285285{
286286   LOCAL_DECODE_INIT;
287287   RRdecodewithHflag(decode, 0, 1);
288   hyperstone_mov(decode);
288   hyperstone_mov(cpustate, decode);
289289}
290290
291void hyperstone_device::op26()
291static void hyperstone_op26(hyperstone_state *cpustate)
292292{
293293   LOCAL_DECODE_INIT;
294294   RRdecodewithHflag(decode, 1, 0);
295   hyperstone_mov(decode);
295   hyperstone_mov(cpustate, decode);
296296}
297297
298void hyperstone_device::op27()
298static void hyperstone_op27(hyperstone_state *cpustate)
299299{
300300   LOCAL_DECODE_INIT;
301301   RRdecodewithHflag(decode, 1, 1);
302   hyperstone_mov(decode);
302   hyperstone_mov(cpustate, decode);
303303}
304304
305void hyperstone_device::op28()
305static void hyperstone_op28(hyperstone_state *cpustate)
306306{
307307   LOCAL_DECODE_INIT;
308308   RRdecode(decode, 0, 0);
309   hyperstone_add(decode);
309   hyperstone_add(cpustate, decode);
310310}
311311
312void hyperstone_device::op29()
312static void hyperstone_op29(hyperstone_state *cpustate)
313313{
314314   LOCAL_DECODE_INIT;
315315   RRdecode(decode, 0, 1);
316   hyperstone_add(decode);
316   hyperstone_add(cpustate, decode);
317317}
318318
319void hyperstone_device::op2a()
319static void hyperstone_op2a(hyperstone_state *cpustate)
320320{
321321   LOCAL_DECODE_INIT;
322322   RRdecode(decode, 1, 0);
323   hyperstone_add(decode);
323   hyperstone_add(cpustate, decode);
324324}
325325
326void hyperstone_device::op2b()
326static void hyperstone_op2b(hyperstone_state *cpustate)
327327{
328328   LOCAL_DECODE_INIT;
329329   RRdecode(decode, 1, 1);
330   hyperstone_add(decode);
330   hyperstone_add(cpustate, decode);
331331}
332332
333void hyperstone_device::op2c()
333static void hyperstone_op2c(hyperstone_state *cpustate)
334334{
335335   LOCAL_DECODE_INIT;
336336   RRdecode(decode, 0, 0);
337   hyperstone_adds(decode);
337   hyperstone_adds(cpustate, decode);
338338}
339339
340void hyperstone_device::op2d()
340static void hyperstone_op2d(hyperstone_state *cpustate)
341341{
342342   LOCAL_DECODE_INIT;
343343   RRdecode(decode, 0, 1);
344   hyperstone_adds(decode);
344   hyperstone_adds(cpustate, decode);
345345}
346346
347void hyperstone_device::op2e()
347static void hyperstone_op2e(hyperstone_state *cpustate)
348348{
349349   LOCAL_DECODE_INIT;
350350   RRdecode(decode, 1, 0);
351   hyperstone_adds(decode);
351   hyperstone_adds(cpustate, decode);
352352}
353353
354void hyperstone_device::op2f()
354static void hyperstone_op2f(hyperstone_state *cpustate)
355355{
356356   LOCAL_DECODE_INIT;
357357   RRdecode(decode, 1, 1);
358   hyperstone_adds(decode);
358   hyperstone_adds(cpustate, decode);
359359}
360360
361361
362362
363void hyperstone_device::op30()
363static void hyperstone_op30(hyperstone_state *cpustate)
364364{
365365   LOCAL_DECODE_INIT;
366366   RRdecode(decode, 0, 0);
367   hyperstone_cmpb(decode);
367   hyperstone_cmpb(cpustate, decode);
368368}
369369
370void hyperstone_device::op31()
370static void hyperstone_op31(hyperstone_state *cpustate)
371371{
372372   LOCAL_DECODE_INIT;
373373   RRdecode(decode, 0, 1);
374   hyperstone_cmpb(decode);
374   hyperstone_cmpb(cpustate, decode);
375375}
376376
377void hyperstone_device::op32()
377static void hyperstone_op32(hyperstone_state *cpustate)
378378{
379379   LOCAL_DECODE_INIT;
380380   RRdecode(decode, 1, 0);
381   hyperstone_cmpb(decode);
381   hyperstone_cmpb(cpustate, decode);
382382}
383383
384void hyperstone_device::op33()
384static void hyperstone_op33(hyperstone_state *cpustate)
385385{
386386   LOCAL_DECODE_INIT;
387387   RRdecode(decode, 1, 1);
388   hyperstone_cmpb(decode);
388   hyperstone_cmpb(cpustate, decode);
389389}
390390
391void hyperstone_device::op34()
391static void hyperstone_op34(hyperstone_state *cpustate)
392392{
393393   LOCAL_DECODE_INIT;
394394   RRdecode(decode, 0, 0);
395   hyperstone_andn(decode);
395   hyperstone_andn(cpustate, decode);
396396}
397397
398void hyperstone_device::op35()
398static void hyperstone_op35(hyperstone_state *cpustate)
399399{
400400   LOCAL_DECODE_INIT;
401401   RRdecode(decode, 0, 1);
402   hyperstone_andn(decode);
402   hyperstone_andn(cpustate, decode);
403403}
404404
405void hyperstone_device::op36()
405static void hyperstone_op36(hyperstone_state *cpustate)
406406{
407407   LOCAL_DECODE_INIT;
408408   RRdecode(decode, 1, 0);
409   hyperstone_andn(decode);
409   hyperstone_andn(cpustate, decode);
410410}
411411
412void hyperstone_device::op37()
412static void hyperstone_op37(hyperstone_state *cpustate)
413413{
414414   LOCAL_DECODE_INIT;
415415   RRdecode(decode, 1, 1);
416   hyperstone_andn(decode);
416   hyperstone_andn(cpustate, decode);
417417}
418418
419void hyperstone_device::op38()
419static void hyperstone_op38(hyperstone_state *cpustate)
420420{
421421   LOCAL_DECODE_INIT;
422422   RRdecode(decode, 0, 0);
423   hyperstone_or(decode);
423   hyperstone_or(cpustate, decode);
424424}
425425
426void hyperstone_device::op39()
426static void hyperstone_op39(hyperstone_state *cpustate)
427427{
428428   LOCAL_DECODE_INIT;
429429   RRdecode(decode, 0, 1);
430   hyperstone_or(decode);
430   hyperstone_or(cpustate, decode);
431431}
432432
433void hyperstone_device::op3a()
433static void hyperstone_op3a(hyperstone_state *cpustate)
434434{
435435   LOCAL_DECODE_INIT;
436436   RRdecode(decode, 1, 0);
437   hyperstone_or(decode);
437   hyperstone_or(cpustate, decode);
438438}
439439
440void hyperstone_device::op3b()
440static void hyperstone_op3b(hyperstone_state *cpustate)
441441{
442442   LOCAL_DECODE_INIT;
443443   RRdecode(decode, 1, 1);
444   hyperstone_or(decode);
444   hyperstone_or(cpustate, decode);
445445}
446446
447void hyperstone_device::op3c()
447static void hyperstone_op3c(hyperstone_state *cpustate)
448448{
449449   LOCAL_DECODE_INIT;
450450   RRdecode(decode, 0, 0);
451   hyperstone_xor(decode);
451   hyperstone_xor(cpustate, decode);
452452}
453453
454void hyperstone_device::op3d()
454static void hyperstone_op3d(hyperstone_state *cpustate)
455455{
456456   LOCAL_DECODE_INIT;
457457   RRdecode(decode, 0, 1);
458   hyperstone_xor(decode);
458   hyperstone_xor(cpustate, decode);
459459}
460460
461void hyperstone_device::op3e()
461static void hyperstone_op3e(hyperstone_state *cpustate)
462462{
463463   LOCAL_DECODE_INIT;
464464   RRdecode(decode, 1, 0);
465   hyperstone_xor(decode);
465   hyperstone_xor(cpustate, decode);
466466}
467467
468void hyperstone_device::op3f()
468static void hyperstone_op3f(hyperstone_state *cpustate)
469469{
470470   LOCAL_DECODE_INIT;
471471   RRdecode(decode, 1, 1);
472   hyperstone_xor(decode);
472   hyperstone_xor(cpustate, decode);
473473}
474474
475475
476476
477void hyperstone_device::op40()
477static void hyperstone_op40(hyperstone_state *cpustate)
478478{
479479   LOCAL_DECODE_INIT;
480480   RRdecode(decode, 0, 0);
481   hyperstone_subc(decode);
481   hyperstone_subc(cpustate, decode);
482482}
483483
484void hyperstone_device::op41()
484static void hyperstone_op41(hyperstone_state *cpustate)
485485{
486486   LOCAL_DECODE_INIT;
487487   RRdecode(decode, 0, 1);
488   hyperstone_subc(decode);
488   hyperstone_subc(cpustate, decode);
489489}
490490
491void hyperstone_device::op42()
491static void hyperstone_op42(hyperstone_state *cpustate)
492492{
493493   LOCAL_DECODE_INIT;
494494   RRdecode(decode, 1, 0);
495   hyperstone_subc(decode);
495   hyperstone_subc(cpustate, decode);
496496}
497497
498void hyperstone_device::op43()
498static void hyperstone_op43(hyperstone_state *cpustate)
499499{
500500   LOCAL_DECODE_INIT;
501501   RRdecode(decode, 1, 1);
502   hyperstone_subc(decode);
502   hyperstone_subc(cpustate, decode);
503503}
504504
505void hyperstone_device::op44()
505static void hyperstone_op44(hyperstone_state *cpustate)
506506{
507507   LOCAL_DECODE_INIT;
508508   RRdecode(decode, 0, 0);
509   hyperstone_not(decode);
509   hyperstone_not(cpustate, decode);
510510}
511511
512void hyperstone_device::op45()
512static void hyperstone_op45(hyperstone_state *cpustate)
513513{
514514   LOCAL_DECODE_INIT;
515515   RRdecode(decode, 0, 1);
516   hyperstone_not(decode);
516   hyperstone_not(cpustate, decode);
517517}
518518
519void hyperstone_device::op46()
519static void hyperstone_op46(hyperstone_state *cpustate)
520520{
521521   LOCAL_DECODE_INIT;
522522   RRdecode(decode, 1, 0);
523   hyperstone_not(decode);
523   hyperstone_not(cpustate, decode);
524524}
525525
526void hyperstone_device::op47()
526static void hyperstone_op47(hyperstone_state *cpustate)
527527{
528528   LOCAL_DECODE_INIT;
529529   RRdecode(decode, 1, 1);
530   hyperstone_not(decode);
530   hyperstone_not(cpustate, decode);
531531}
532532
533void hyperstone_device::op48()
533static void hyperstone_op48(hyperstone_state *cpustate)
534534{
535535   LOCAL_DECODE_INIT;
536536   RRdecode(decode, 0, 0);
537   hyperstone_sub(decode);
537   hyperstone_sub(cpustate, decode);
538538}
539539
540void hyperstone_device::op49()
540static void hyperstone_op49(hyperstone_state *cpustate)
541541{
542542   LOCAL_DECODE_INIT;
543543   RRdecode(decode, 0, 1);
544   hyperstone_sub(decode);
544   hyperstone_sub(cpustate, decode);
545545}
546546
547void hyperstone_device::op4a()
547static void hyperstone_op4a(hyperstone_state *cpustate)
548548{
549549   LOCAL_DECODE_INIT;
550550   RRdecode(decode, 1, 0);
551   hyperstone_sub(decode);
551   hyperstone_sub(cpustate, decode);
552552}
553553
554void hyperstone_device::op4b()
554static void hyperstone_op4b(hyperstone_state *cpustate)
555555{
556556   LOCAL_DECODE_INIT;
557557   RRdecode(decode, 1, 1);
558   hyperstone_sub(decode);
558   hyperstone_sub(cpustate, decode);
559559}
560560
561void hyperstone_device::op4c()
561static void hyperstone_op4c(hyperstone_state *cpustate)
562562{
563563   LOCAL_DECODE_INIT;
564564   RRdecode(decode, 0, 0);
565   hyperstone_subs(decode);
565   hyperstone_subs(cpustate, decode);
566566}
567567
568void hyperstone_device::op4d()
568static void hyperstone_op4d(hyperstone_state *cpustate)
569569{
570570   LOCAL_DECODE_INIT;
571571   RRdecode(decode, 0, 1);
572   hyperstone_subs(decode);
572   hyperstone_subs(cpustate, decode);
573573}
574574
575void hyperstone_device::op4e()
575static void hyperstone_op4e(hyperstone_state *cpustate)
576576{
577577   LOCAL_DECODE_INIT;
578578   RRdecode(decode, 1, 0);
579   hyperstone_subs(decode);
579   hyperstone_subs(cpustate, decode);
580580}
581581
582void hyperstone_device::op4f()
582static void hyperstone_op4f(hyperstone_state *cpustate)
583583{
584584   LOCAL_DECODE_INIT;
585585   RRdecode(decode, 1, 1);
586   hyperstone_subs(decode);
586   hyperstone_subs(cpustate, decode);
587587}
588588
589589
590590
591void hyperstone_device::op50()
591static void hyperstone_op50(hyperstone_state *cpustate)
592592{
593593   LOCAL_DECODE_INIT;
594594   RRdecode(decode, 0, 0);
595   hyperstone_addc(decode);
595   hyperstone_addc(cpustate, decode);
596596}
597597
598void hyperstone_device::op51()
598static void hyperstone_op51(hyperstone_state *cpustate)
599599{
600600   LOCAL_DECODE_INIT;
601601   RRdecode(decode, 0, 1);
602   hyperstone_addc(decode);
602   hyperstone_addc(cpustate, decode);
603603}
604604
605void hyperstone_device::op52()
605static void hyperstone_op52(hyperstone_state *cpustate)
606606{
607607   LOCAL_DECODE_INIT;
608608   RRdecode(decode, 1, 0);
609   hyperstone_addc(decode);
609   hyperstone_addc(cpustate, decode);
610610}
611611
612void hyperstone_device::op53()
612static void hyperstone_op53(hyperstone_state *cpustate)
613613{
614614   LOCAL_DECODE_INIT;
615615   RRdecode(decode, 1, 1);
616   hyperstone_addc(decode);
616   hyperstone_addc(cpustate, decode);
617617}
618618
619void hyperstone_device::op54()
619static void hyperstone_op54(hyperstone_state *cpustate)
620620{
621621   LOCAL_DECODE_INIT;
622622   RRdecode(decode, 0, 0);
623   hyperstone_and(decode);
623   hyperstone_and(cpustate, decode);
624624}
625625
626void hyperstone_device::op55()
626static void hyperstone_op55(hyperstone_state *cpustate)
627627{
628628   LOCAL_DECODE_INIT;
629629   RRdecode(decode, 0, 1);
630   hyperstone_and(decode);
630   hyperstone_and(cpustate, decode);
631631}
632632
633void hyperstone_device::op56()
633static void hyperstone_op56(hyperstone_state *cpustate)
634634{
635635   LOCAL_DECODE_INIT;
636636   RRdecode(decode, 1, 0);
637   hyperstone_and(decode);
637   hyperstone_and(cpustate, decode);
638638}
639639
640void hyperstone_device::op57()
640static void hyperstone_op57(hyperstone_state *cpustate)
641641{
642642   LOCAL_DECODE_INIT;
643643   RRdecode(decode, 1, 1);
644   hyperstone_and(decode);
644   hyperstone_and(cpustate, decode);
645645}
646646
647void hyperstone_device::op58()
647static void hyperstone_op58(hyperstone_state *cpustate)
648648{
649649   LOCAL_DECODE_INIT;
650650   RRdecode(decode, 0, 0);
651   hyperstone_neg(decode);
651   hyperstone_neg(cpustate, decode);
652652}
653653
654void hyperstone_device::op59()
654static void hyperstone_op59(hyperstone_state *cpustate)
655655{
656656   LOCAL_DECODE_INIT;
657657   RRdecode(decode, 0, 1);
658   hyperstone_neg(decode);
658   hyperstone_neg(cpustate, decode);
659659}
660660
661void hyperstone_device::op5a()
661static void hyperstone_op5a(hyperstone_state *cpustate)
662662{
663663   LOCAL_DECODE_INIT;
664664   RRdecode(decode, 1, 0);
665   hyperstone_neg(decode);
665   hyperstone_neg(cpustate, decode);
666666}
667667
668void hyperstone_device::op5b()
668static void hyperstone_op5b(hyperstone_state *cpustate)
669669{
670670   LOCAL_DECODE_INIT;
671671   RRdecode(decode, 1, 1);
672   hyperstone_neg(decode);
672   hyperstone_neg(cpustate, decode);
673673}
674674
675void hyperstone_device::op5c()
675static void hyperstone_op5c(hyperstone_state *cpustate)
676676{
677677   LOCAL_DECODE_INIT;
678678   RRdecode(decode, 0, 0);
679   hyperstone_negs(decode);
679   hyperstone_negs(cpustate, decode);
680680}
681681
682void hyperstone_device::op5d()
682static void hyperstone_op5d(hyperstone_state *cpustate)
683683{
684684   LOCAL_DECODE_INIT;
685685   RRdecode(decode, 0, 1);
686   hyperstone_negs(decode);
686   hyperstone_negs(cpustate, decode);
687687}
688688
689void hyperstone_device::op5e()
689static void hyperstone_op5e(hyperstone_state *cpustate)
690690{
691691   LOCAL_DECODE_INIT;
692692   RRdecode(decode, 1, 0);
693   hyperstone_negs(decode);
693   hyperstone_negs(cpustate, decode);
694694}
695695
696void hyperstone_device::op5f()
696static void hyperstone_op5f(hyperstone_state *cpustate)
697697{
698698   LOCAL_DECODE_INIT;
699699   RRdecode(decode, 1, 1);
700   hyperstone_negs(decode);
700   hyperstone_negs(cpustate, decode);
701701}
702702
703703
704704
705void hyperstone_device::op60()
705static void hyperstone_op60(hyperstone_state *cpustate)
706706{
707707   LOCAL_DECODE_INIT;
708708   Rimmdecode(decode, 0, 0);
709   hyperstone_cmpi(decode);
709   hyperstone_cmpi(cpustate, decode);
710710}
711711
712void hyperstone_device::op61()
712static void hyperstone_op61(hyperstone_state *cpustate)
713713{
714714   LOCAL_DECODE_INIT;
715715   Rimmdecode(decode, 0, 1);
716   hyperstone_cmpi(decode);
716   hyperstone_cmpi(cpustate, decode);
717717}
718718
719void hyperstone_device::op62()
719static void hyperstone_op62(hyperstone_state *cpustate)
720720{
721721   LOCAL_DECODE_INIT;
722722   Rimmdecode(decode, 1, 0);
723   hyperstone_cmpi(decode);
723   hyperstone_cmpi(cpustate, decode);
724724}
725725
726void hyperstone_device::op63()
726static void hyperstone_op63(hyperstone_state *cpustate)
727727{
728728   LOCAL_DECODE_INIT;
729729   Rimmdecode(decode, 1, 1);
730   hyperstone_cmpi(decode);
730   hyperstone_cmpi(cpustate, decode);
731731}
732732
733void hyperstone_device::op64()
733static void hyperstone_op64(hyperstone_state *cpustate)
734734{
735735   LOCAL_DECODE_INIT;
736736   RimmdecodewithHflag(decode, 0, 0);
737   hyperstone_movi(decode);
737   hyperstone_movi(cpustate, decode);
738738}
739739
740void hyperstone_device::op65()
740static void hyperstone_op65(hyperstone_state *cpustate)
741741{
742742   LOCAL_DECODE_INIT;
743743   RimmdecodewithHflag(decode, 0, 1);
744   hyperstone_movi(decode);
744   hyperstone_movi(cpustate, decode);
745745}
746746
747void hyperstone_device::op66()
747static void hyperstone_op66(hyperstone_state *cpustate)
748748{
749749   LOCAL_DECODE_INIT;
750750   RimmdecodewithHflag(decode, 1, 0);
751   hyperstone_movi(decode);
751   hyperstone_movi(cpustate, decode);
752752}
753753
754void hyperstone_device::op67()
754static void hyperstone_op67(hyperstone_state *cpustate)
755755{
756756   LOCAL_DECODE_INIT;
757757   RimmdecodewithHflag(decode, 1, 1);
758   hyperstone_movi(decode);
758   hyperstone_movi(cpustate, decode);
759759}
760760
761void hyperstone_device::op68()
761static void hyperstone_op68(hyperstone_state *cpustate)
762762{
763763   LOCAL_DECODE_INIT;
764764   Rimmdecode(decode, 0, 0);
765   hyperstone_addi(decode);
765   hyperstone_addi(cpustate, decode);
766766}
767767
768void hyperstone_device::op69()
768static void hyperstone_op69(hyperstone_state *cpustate)
769769{
770770   LOCAL_DECODE_INIT;
771771   Rimmdecode(decode, 0, 1);
772   hyperstone_addi(decode);
772   hyperstone_addi(cpustate, decode);
773773}
774774
775void hyperstone_device::op6a()
775static void hyperstone_op6a(hyperstone_state *cpustate)
776776{
777777   LOCAL_DECODE_INIT;
778778   Rimmdecode(decode, 1, 0);
779   hyperstone_addi(decode);
779   hyperstone_addi(cpustate, decode);
780780}
781781
782void hyperstone_device::op6b()
782static void hyperstone_op6b(hyperstone_state *cpustate)
783783{
784784   LOCAL_DECODE_INIT;
785785   Rimmdecode(decode, 1, 1);
786   hyperstone_addi(decode);
786   hyperstone_addi(cpustate, decode);
787787}
788788
789void hyperstone_device::op6c()
789static void hyperstone_op6c(hyperstone_state *cpustate)
790790{
791791   LOCAL_DECODE_INIT;
792792   Rimmdecode(decode, 0, 0);
793   hyperstone_addsi(decode);
793   hyperstone_addsi(cpustate, decode);
794794}
795795
796void hyperstone_device::op6d()
796static void hyperstone_op6d(hyperstone_state *cpustate)
797797{
798798   LOCAL_DECODE_INIT;
799799   Rimmdecode(decode, 0, 1);
800   hyperstone_addsi(decode);
800   hyperstone_addsi(cpustate, decode);
801801}
802802
803void hyperstone_device::op6e()
803static void hyperstone_op6e(hyperstone_state *cpustate)
804804{
805805   LOCAL_DECODE_INIT;
806806   Rimmdecode(decode, 1, 0);
807   hyperstone_addsi(decode);
807   hyperstone_addsi(cpustate, decode);
808808}
809809
810void hyperstone_device::op6f()
810static void hyperstone_op6f(hyperstone_state *cpustate)
811811{
812812   LOCAL_DECODE_INIT;
813813   Rimmdecode(decode, 1, 1);
814   hyperstone_addsi(decode);
814   hyperstone_addsi(cpustate, decode);
815815}
816816
817817
818818
819void hyperstone_device::op70()
819static void hyperstone_op70(hyperstone_state *cpustate)
820820{
821821   LOCAL_DECODE_INIT;
822822   Rimmdecode(decode, 0, 0);
823   hyperstone_cmpbi(decode);
823   hyperstone_cmpbi(cpustate, decode);
824824}
825825
826void hyperstone_device::op71()
826static void hyperstone_op71(hyperstone_state *cpustate)
827827{
828828   LOCAL_DECODE_INIT;
829829   Rimmdecode(decode, 0, 1);
830   hyperstone_cmpbi(decode);
830   hyperstone_cmpbi(cpustate, decode);
831831}
832832
833void hyperstone_device::op72()
833static void hyperstone_op72(hyperstone_state *cpustate)
834834{
835835   LOCAL_DECODE_INIT;
836836   Rimmdecode(decode, 1, 0);
837   hyperstone_cmpbi(decode);
837   hyperstone_cmpbi(cpustate, decode);
838838}
839839
840void hyperstone_device::op73()
840static void hyperstone_op73(hyperstone_state *cpustate)
841841{
842842   LOCAL_DECODE_INIT;
843843   Rimmdecode(decode, 1, 1);
844   hyperstone_cmpbi(decode);
844   hyperstone_cmpbi(cpustate, decode);
845845}
846846
847void hyperstone_device::op74()
847static void hyperstone_op74(hyperstone_state *cpustate)
848848{
849849   LOCAL_DECODE_INIT;
850850   Rimmdecode(decode, 0, 0);
851   hyperstone_andni(decode);
851   hyperstone_andni(cpustate, decode);
852852}
853853
854void hyperstone_device::op75()
854static void hyperstone_op75(hyperstone_state *cpustate)
855855{
856856   LOCAL_DECODE_INIT;
857857   Rimmdecode(decode, 0, 1);
858   hyperstone_andni(decode);
858   hyperstone_andni(cpustate, decode);
859859}
860860
861void hyperstone_device::op76()
861static void hyperstone_op76(hyperstone_state *cpustate)
862862{
863863   LOCAL_DECODE_INIT;
864864   Rimmdecode(decode, 1, 0);
865   hyperstone_andni(decode);
865   hyperstone_andni(cpustate, decode);
866866}
867867
868void hyperstone_device::op77()
868static void hyperstone_op77(hyperstone_state *cpustate)
869869{
870870   LOCAL_DECODE_INIT;
871871   Rimmdecode(decode, 1, 1);
872   hyperstone_andni(decode);
872   hyperstone_andni(cpustate, decode);
873873}
874874
875void hyperstone_device::op78()
875static void hyperstone_op78(hyperstone_state *cpustate)
876876{
877877   LOCAL_DECODE_INIT;
878878   Rimmdecode(decode, 0, 0);
879   hyperstone_ori(decode);
879   hyperstone_ori(cpustate, decode);
880880}
881881
882void hyperstone_device::op79()
882static void hyperstone_op79(hyperstone_state *cpustate)
883883{
884884   LOCAL_DECODE_INIT;
885885   Rimmdecode(decode, 0, 1);
886   hyperstone_ori(decode);
886   hyperstone_ori(cpustate, decode);
887887}
888888
889void hyperstone_device::op7a()
889static void hyperstone_op7a(hyperstone_state *cpustate)
890890{
891891   LOCAL_DECODE_INIT;
892892   Rimmdecode(decode, 1, 0);
893   hyperstone_ori(decode);
893   hyperstone_ori(cpustate, decode);
894894}
895895
896void hyperstone_device::op7b()
896static void hyperstone_op7b(hyperstone_state *cpustate)
897897{
898898   LOCAL_DECODE_INIT;
899899   Rimmdecode(decode, 1, 1);
900   hyperstone_ori(decode);
900   hyperstone_ori(cpustate, decode);
901901}
902902
903void hyperstone_device::op7c()
903static void hyperstone_op7c(hyperstone_state *cpustate)
904904{
905905   LOCAL_DECODE_INIT;
906906   Rimmdecode(decode, 0, 0);
907   hyperstone_xori(decode);
907   hyperstone_xori(cpustate, decode);
908908}
909909
910void hyperstone_device::op7d()
910static void hyperstone_op7d(hyperstone_state *cpustate)
911911{
912912   LOCAL_DECODE_INIT;
913913   Rimmdecode(decode, 0, 1);
914   hyperstone_xori(decode);
914   hyperstone_xori(cpustate, decode);
915915}
916916
917void hyperstone_device::op7e()
917static void hyperstone_op7e(hyperstone_state *cpustate)
918918{
919919   LOCAL_DECODE_INIT;
920920   Rimmdecode(decode, 1, 0);
921   hyperstone_xori(decode);
921   hyperstone_xori(cpustate, decode);
922922}
923923
924void hyperstone_device::op7f()
924static void hyperstone_op7f(hyperstone_state *cpustate)
925925{
926926   LOCAL_DECODE_INIT;
927927   Rimmdecode(decode, 1, 1);
928   hyperstone_xori(decode);
928   hyperstone_xori(cpustate, decode);
929929}
930930
931931
932932
933void hyperstone_device::op80()
933static void hyperstone_op80(hyperstone_state *cpustate)
934934{
935935   LOCAL_DECODE_INIT;
936936   Lndecode(decode);
937   hyperstone_shrdi(decode);
937   hyperstone_shrdi(cpustate, decode);
938938}
939939
940void hyperstone_device::op81()
940static void hyperstone_op81(hyperstone_state *cpustate)
941941{
942942   LOCAL_DECODE_INIT;
943943   Lndecode(decode);
944   hyperstone_shrdi(decode);
944   hyperstone_shrdi(cpustate, decode);
945945}
946946
947void hyperstone_device::op82()
947static void hyperstone_op82(hyperstone_state *cpustate)
948948{
949949   LOCAL_DECODE_INIT;
950950   LLdecode(decode);
951   hyperstone_shrd(decode);
951   hyperstone_shrd(cpustate, decode);
952952}
953953
954void hyperstone_device::op83()
954static void hyperstone_op83(hyperstone_state *cpustate)
955955{
956956   LOCAL_DECODE_INIT;
957957   LLdecode(decode);
958   hyperstone_shr(decode);
958   hyperstone_shr(cpustate, decode);
959959}
960960
961void hyperstone_device::op84()
961static void hyperstone_op84(hyperstone_state *cpustate)
962962{
963963   LOCAL_DECODE_INIT;
964964   Lndecode(decode);
965   hyperstone_sardi(decode);
965   hyperstone_sardi(cpustate, decode);
966966}
967967
968void hyperstone_device::op85()
968static void hyperstone_op85(hyperstone_state *cpustate)
969969{
970970   LOCAL_DECODE_INIT;
971971   Lndecode(decode);
972   hyperstone_sardi(decode);
972   hyperstone_sardi(cpustate, decode);
973973}
974974
975void hyperstone_device::op86()
975static void hyperstone_op86(hyperstone_state *cpustate)
976976{
977977   LOCAL_DECODE_INIT;
978978   LLdecode(decode);
979   hyperstone_sard(decode);
979   hyperstone_sard(cpustate, decode);
980980}
981981
982void hyperstone_device::op87()
982static void hyperstone_op87(hyperstone_state *cpustate)
983983{
984984   LOCAL_DECODE_INIT;
985985   LLdecode(decode);
986   hyperstone_sar(decode);
986   hyperstone_sar(cpustate, decode);
987987}
988988
989void hyperstone_device::op88()
989static void hyperstone_op88(hyperstone_state *cpustate)
990990{
991991   LOCAL_DECODE_INIT;
992992   Lndecode(decode);
993   hyperstone_shldi(decode);
993   hyperstone_shldi(cpustate, decode);
994994}
995995
996void hyperstone_device::op89()
996static void hyperstone_op89(hyperstone_state *cpustate)
997997{
998998   LOCAL_DECODE_INIT;
999999   Lndecode(decode);
1000   hyperstone_shldi(decode);
1000   hyperstone_shldi(cpustate, decode);
10011001}
10021002
1003void hyperstone_device::op8a()
1003static void hyperstone_op8a(hyperstone_state *cpustate)
10041004{
10051005   LOCAL_DECODE_INIT;
10061006   LLdecode(decode);
1007   hyperstone_shld(decode);
1007   hyperstone_shld(cpustate, decode);
10081008}
10091009
1010void hyperstone_device::op8b()
1010static void hyperstone_op8b(hyperstone_state *cpustate)
10111011{
10121012   LOCAL_DECODE_INIT;
10131013   LLdecode(decode);
1014   hyperstone_shl(decode);
1014   hyperstone_shl(cpustate, decode);
10151015}
10161016
1017void hyperstone_device::op8c()
1017static void hyperstone_op8c(hyperstone_state *cpustate)
10181018{
10191019   LOCAL_DECODE_INIT;
10201020   no_decode(decode);
1021   reserved(decode);
1021   reserved(cpustate, decode);
10221022}
10231023
1024void hyperstone_device::op8d()
1024static void hyperstone_op8d(hyperstone_state *cpustate)
10251025{
10261026   LOCAL_DECODE_INIT;
10271027   no_decode(decode);
1028   reserved(decode);
1028   reserved(cpustate, decode);
10291029}
10301030
1031void hyperstone_device::op8e()
1031static void hyperstone_op8e(hyperstone_state *cpustate)
10321032{
10331033   LOCAL_DECODE_INIT;
10341034   LLdecode(decode);
1035   hyperstone_testlz(decode);
1035   hyperstone_testlz(cpustate, decode);
10361036}
10371037
1038void hyperstone_device::op8f()
1038static void hyperstone_op8f(hyperstone_state *cpustate)
10391039{
10401040   LOCAL_DECODE_INIT;
10411041   LLdecode(decode);
1042   hyperstone_rol(decode);
1042   hyperstone_rol(cpustate, decode);
10431043}
10441044
10451045
10461046
1047void hyperstone_device::op90()
1047static void hyperstone_op90(hyperstone_state *cpustate)
10481048{
10491049   LOCAL_DECODE_INIT;
10501050   RRdisdecode(decode, 0, 0);
1051   hyperstone_ldxx1(decode);
1051   hyperstone_ldxx1(cpustate, decode);
10521052}
10531053
1054void hyperstone_device::op91()
1054static void hyperstone_op91(hyperstone_state *cpustate)
10551055{
10561056   LOCAL_DECODE_INIT;
10571057   RRdisdecode(decode, 0, 1);
1058   hyperstone_ldxx1(decode);
1058   hyperstone_ldxx1(cpustate, decode);
10591059}
10601060
1061void hyperstone_device::op92()
1061static void hyperstone_op92(hyperstone_state *cpustate)
10621062{
10631063   LOCAL_DECODE_INIT;
10641064   RRdisdecode(decode, 1, 0);
1065   hyperstone_ldxx1(decode);
1065   hyperstone_ldxx1(cpustate, decode);
10661066}
10671067
1068void hyperstone_device::op93()
1068static void hyperstone_op93(hyperstone_state *cpustate)
10691069{
10701070   LOCAL_DECODE_INIT;
10711071   RRdisdecode(decode, 1, 1);
1072   hyperstone_ldxx1(decode);
1072   hyperstone_ldxx1(cpustate, decode);
10731073}
10741074
1075void hyperstone_device::op94()
1075static void hyperstone_op94(hyperstone_state *cpustate)
10761076{
10771077   LOCAL_DECODE_INIT;
10781078   RRdisdecode(decode, 0, 0);
1079   hyperstone_ldxx2(decode);
1079   hyperstone_ldxx2(cpustate, decode);
10801080}
10811081
1082void hyperstone_device::op95()
1082static void hyperstone_op95(hyperstone_state *cpustate)
10831083{
10841084   LOCAL_DECODE_INIT;
10851085   RRdisdecode(decode, 0, 1);
1086   hyperstone_ldxx2(decode);
1086   hyperstone_ldxx2(cpustate, decode);
10871087}
10881088
1089void hyperstone_device::op96()
1089static void hyperstone_op96(hyperstone_state *cpustate)
10901090{
10911091   LOCAL_DECODE_INIT;
10921092   RRdisdecode(decode, 1, 0);
1093   hyperstone_ldxx2(decode);
1093   hyperstone_ldxx2(cpustate, decode);
10941094}
10951095
1096void hyperstone_device::op97()
1096static void hyperstone_op97(hyperstone_state *cpustate)
10971097{
10981098   LOCAL_DECODE_INIT;
10991099   RRdisdecode(decode, 1, 1);
1100   hyperstone_ldxx2(decode);
1100   hyperstone_ldxx2(cpustate, decode);
11011101}
11021102
1103void hyperstone_device::op98()
1103static void hyperstone_op98(hyperstone_state *cpustate)
11041104{
11051105   LOCAL_DECODE_INIT;
11061106   RRdisdecode(decode, 0, 0);
1107   hyperstone_stxx1(decode);
1107   hyperstone_stxx1(cpustate, decode);
11081108}
11091109
1110void hyperstone_device::op99()
1110static void hyperstone_op99(hyperstone_state *cpustate)
11111111{
11121112   LOCAL_DECODE_INIT;
11131113   RRdisdecode(decode, 0, 1);
1114   hyperstone_stxx1(decode);
1114   hyperstone_stxx1(cpustate, decode);
11151115}
11161116
1117void hyperstone_device::op9a()
1117static void hyperstone_op9a(hyperstone_state *cpustate)
11181118{
11191119   LOCAL_DECODE_INIT;
11201120   RRdisdecode(decode, 1, 0);
1121   hyperstone_stxx1(decode);
1121   hyperstone_stxx1(cpustate, decode);
11221122}
11231123
1124void hyperstone_device::op9b()
1124static void hyperstone_op9b(hyperstone_state *cpustate)
11251125{
11261126   LOCAL_DECODE_INIT;
11271127   RRdisdecode(decode, 1, 1);
1128   hyperstone_stxx1(decode);
1128   hyperstone_stxx1(cpustate, decode);
11291129}
11301130
1131void hyperstone_device::op9c()
1131static void hyperstone_op9c(hyperstone_state *cpustate)
11321132{
11331133   LOCAL_DECODE_INIT;
11341134   RRdisdecode(decode, 0, 0);
1135   hyperstone_stxx2(decode);
1135   hyperstone_stxx2(cpustate, decode);
11361136}
11371137
1138void hyperstone_device::op9d()
1138static void hyperstone_op9d(hyperstone_state *cpustate)
11391139{
11401140   LOCAL_DECODE_INIT;
11411141   RRdisdecode(decode, 0, 1);
1142   hyperstone_stxx2(decode);
1142   hyperstone_stxx2(cpustate, decode);
11431143}
11441144
1145void hyperstone_device::op9e()
1145static void hyperstone_op9e(hyperstone_state *cpustate)
11461146{
11471147   LOCAL_DECODE_INIT;
11481148   RRdisdecode(decode, 1, 0);
1149   hyperstone_stxx2(decode);
1149   hyperstone_stxx2(cpustate, decode);
11501150}
11511151
1152void hyperstone_device::op9f()
1152static void hyperstone_op9f(hyperstone_state *cpustate)
11531153{
11541154   LOCAL_DECODE_INIT;
11551155   RRdisdecode(decode, 1, 1);
1156   hyperstone_stxx2(decode);
1156   hyperstone_stxx2(cpustate, decode);
11571157}
11581158
11591159
11601160
1161void hyperstone_device::opa0()
1161static void hyperstone_opa0(hyperstone_state *cpustate)
11621162{
11631163   LOCAL_DECODE_INIT;
11641164   Rndecode(decode, 0);
1165   hyperstone_shri(decode);
1165   hyperstone_shri(cpustate, decode);
11661166}
11671167
1168void hyperstone_device::opa1()
1168static void hyperstone_opa1(hyperstone_state *cpustate)
11691169{
11701170   LOCAL_DECODE_INIT;
11711171   Rndecode(decode, 0);
1172   hyperstone_shri(decode);
1172   hyperstone_shri(cpustate, decode);
11731173}
11741174
1175void hyperstone_device::opa2()
1175static void hyperstone_opa2(hyperstone_state *cpustate)
11761176{
11771177   LOCAL_DECODE_INIT;
11781178   Rndecode(decode, 1);
1179   hyperstone_shri(decode);
1179   hyperstone_shri(cpustate, decode);
11801180}
11811181
1182void hyperstone_device::opa3()
1182static void hyperstone_opa3(hyperstone_state *cpustate)
11831183{
11841184   LOCAL_DECODE_INIT;
11851185   Rndecode(decode, 1);
1186   hyperstone_shri(decode);
1186   hyperstone_shri(cpustate, decode);
11871187}
11881188
1189void hyperstone_device::opa4()
1189static void hyperstone_opa4(hyperstone_state *cpustate)
11901190{
11911191   LOCAL_DECODE_INIT;
11921192   Rndecode(decode, 0);
1193   hyperstone_sari(decode);
1193   hyperstone_sari(cpustate, decode);
11941194}
11951195
1196void hyperstone_device::opa5()
1196static void hyperstone_opa5(hyperstone_state *cpustate)
11971197{
11981198   LOCAL_DECODE_INIT;
11991199   Rndecode(decode, 0);
1200   hyperstone_sari(decode);
1200   hyperstone_sari(cpustate, decode);
12011201}
12021202
1203void hyperstone_device::opa6()
1203static void hyperstone_opa6(hyperstone_state *cpustate)
12041204{
12051205   LOCAL_DECODE_INIT;
12061206   Rndecode(decode, 1);
1207   hyperstone_sari(decode);
1207   hyperstone_sari(cpustate, decode);
12081208}
12091209
1210void hyperstone_device::opa7()
1210static void hyperstone_opa7(hyperstone_state *cpustate)
12111211{
12121212   LOCAL_DECODE_INIT;
12131213   Rndecode(decode, 1);
1214   hyperstone_sari(decode);
1214   hyperstone_sari(cpustate, decode);
12151215}
12161216
1217void hyperstone_device::opa8()
1217static void hyperstone_opa8(hyperstone_state *cpustate)
12181218{
12191219   LOCAL_DECODE_INIT;
12201220   Rndecode(decode, 0);
1221   hyperstone_shli(decode);
1221   hyperstone_shli(cpustate, decode);
12221222}
12231223
1224void hyperstone_device::opa9()
1224static void hyperstone_opa9(hyperstone_state *cpustate)
12251225{
12261226   LOCAL_DECODE_INIT;
12271227   Rndecode(decode, 0);
1228   hyperstone_shli(decode);
1228   hyperstone_shli(cpustate, decode);
12291229}
12301230
1231void hyperstone_device::opaa()
1231static void hyperstone_opaa(hyperstone_state *cpustate)
12321232{
12331233   LOCAL_DECODE_INIT;
12341234   Rndecode(decode, 1);
1235   hyperstone_shli(decode);
1235   hyperstone_shli(cpustate, decode);
12361236}
12371237
1238void hyperstone_device::opab()
1238static void hyperstone_opab(hyperstone_state *cpustate)
12391239{
12401240   LOCAL_DECODE_INIT;
12411241   Rndecode(decode, 1);
1242   hyperstone_shli(decode);
1242   hyperstone_shli(cpustate, decode);
12431243}
12441244
1245void hyperstone_device::opac()
1245static void hyperstone_opac(hyperstone_state *cpustate)
12461246{
12471247   LOCAL_DECODE_INIT;
12481248   no_decode(decode);
1249   reserved(decode);
1249   reserved(cpustate, decode);
12501250}
12511251
1252void hyperstone_device::opad()
1252static void hyperstone_opad(hyperstone_state *cpustate)
12531253{
12541254   LOCAL_DECODE_INIT;
12551255   no_decode(decode);
1256   reserved(decode);
1256   reserved(cpustate, decode);
12571257}
12581258
1259void hyperstone_device::opae()
1259static void hyperstone_opae(hyperstone_state *cpustate)
12601260{
12611261   LOCAL_DECODE_INIT;
12621262   no_decode(decode);
1263   reserved(decode);
1263   reserved(cpustate, decode);
12641264}
12651265
1266void hyperstone_device::opaf()
1266static void hyperstone_opaf(hyperstone_state *cpustate)
12671267{
12681268   LOCAL_DECODE_INIT;
12691269   no_decode(decode);
1270   reserved(decode);
1270   reserved(cpustate, decode);
12711271}
12721272
12731273
12741274
1275void hyperstone_device::opb0()
1275static void hyperstone_opb0(hyperstone_state *cpustate)
12761276{
12771277   LOCAL_DECODE_INIT;
12781278   RRdecode(decode, 0, 0);
1279   hyperstone_mulu(decode);
1279   hyperstone_mulu(cpustate, decode);
12801280}
12811281
1282void hyperstone_device::opb1()
1282static void hyperstone_opb1(hyperstone_state *cpustate)
12831283{
12841284   LOCAL_DECODE_INIT;
12851285   RRdecode(decode, 0, 1);
1286   hyperstone_mulu(decode);
1286   hyperstone_mulu(cpustate, decode);
12871287}
12881288
1289void hyperstone_device::opb2()
1289static void hyperstone_opb2(hyperstone_state *cpustate)
12901290{
12911291   LOCAL_DECODE_INIT;
12921292   RRdecode(decode, 1, 0);
1293   hyperstone_mulu(decode);
1293   hyperstone_mulu(cpustate, decode);
12941294}
12951295
1296void hyperstone_device::opb3()
1296static void hyperstone_opb3(hyperstone_state *cpustate)
12971297{
12981298   LOCAL_DECODE_INIT;
12991299   RRdecode(decode, 1, 1);
1300   hyperstone_mulu(decode);
1300   hyperstone_mulu(cpustate, decode);
13011301}
13021302
1303void hyperstone_device::opb4()
1303static void hyperstone_opb4(hyperstone_state *cpustate)
13041304{
13051305   LOCAL_DECODE_INIT;
13061306   RRdecode(decode, 0, 0);
1307   hyperstone_muls(decode);
1307   hyperstone_muls(cpustate, decode);
13081308}
13091309
1310void hyperstone_device::opb5()
1310static void hyperstone_opb5(hyperstone_state *cpustate)
13111311{
13121312   LOCAL_DECODE_INIT;
13131313   RRdecode(decode, 0, 1);
1314   hyperstone_muls(decode);
1314   hyperstone_muls(cpustate, decode);
13151315}
13161316
1317void hyperstone_device::opb6()
1317static void hyperstone_opb6(hyperstone_state *cpustate)
13181318{
13191319   LOCAL_DECODE_INIT;
13201320   RRdecode(decode, 1, 0);
1321   hyperstone_muls(decode);
1321   hyperstone_muls(cpustate, decode);
13221322}
13231323
1324void hyperstone_device::opb7()
1324static void hyperstone_opb7(hyperstone_state *cpustate)
13251325{
13261326   LOCAL_DECODE_INIT;
13271327   RRdecode(decode, 1, 1);
1328   hyperstone_muls(decode);
1328   hyperstone_muls(cpustate, decode);
13291329}
13301330
1331void hyperstone_device::opb8()
1331static void hyperstone_opb8(hyperstone_state *cpustate)
13321332{
13331333   LOCAL_DECODE_INIT;
13341334   Rndecode(decode, 0);
1335   hyperstone_set(decode);
1335   hyperstone_set(cpustate, decode);
13361336}
13371337
1338void hyperstone_device::opb9()
1338static void hyperstone_opb9(hyperstone_state *cpustate)
13391339{
13401340   LOCAL_DECODE_INIT;
13411341   Rndecode(decode, 0);
1342   hyperstone_set(decode);
1342   hyperstone_set(cpustate, decode);
13431343}
13441344
1345void hyperstone_device::opba()
1345static void hyperstone_opba(hyperstone_state *cpustate)
13461346{
13471347   LOCAL_DECODE_INIT;
13481348   Rndecode(decode, 1);
1349   hyperstone_set(decode);
1349   hyperstone_set(cpustate, decode);
13501350}
13511351
1352void hyperstone_device::opbb()
1352static void hyperstone_opbb(hyperstone_state *cpustate)
13531353{
13541354   LOCAL_DECODE_INIT;
13551355   Rndecode(decode, 1);
1356   hyperstone_set(decode);
1356   hyperstone_set(cpustate, decode);
13571357}
13581358
1359void hyperstone_device::opbc()
1359static void hyperstone_opbc(hyperstone_state *cpustate)
13601360{
13611361   LOCAL_DECODE_INIT;
13621362   RRdecode(decode, 0, 0);
1363   hyperstone_mul(decode);
1363   hyperstone_mul(cpustate, decode);
13641364}
13651365
1366void hyperstone_device::opbd()
1366static void hyperstone_opbd(hyperstone_state *cpustate)
13671367{
13681368   LOCAL_DECODE_INIT;
13691369   RRdecode(decode, 0, 1);
1370   hyperstone_mul(decode);
1370   hyperstone_mul(cpustate, decode);
13711371}
13721372
1373void hyperstone_device::opbe()
1373static void hyperstone_opbe(hyperstone_state *cpustate)
13741374{
13751375   LOCAL_DECODE_INIT;
13761376   RRdecode(decode, 1, 0);
1377   hyperstone_mul(decode);
1377   hyperstone_mul(cpustate, decode);
13781378}
13791379
1380void hyperstone_device::opbf()
1380static void hyperstone_opbf(hyperstone_state *cpustate)
13811381{
13821382   LOCAL_DECODE_INIT;
13831383   RRdecode(decode, 1, 1);
1384   hyperstone_mul(decode);
1384   hyperstone_mul(cpustate, decode);
13851385}
13861386
13871387
13881388
1389void hyperstone_device::opc0()
1389static void hyperstone_opc0(hyperstone_state *cpustate)
13901390{
13911391   LOCAL_DECODE_INIT;
13921392   LLdecode(decode);
1393   hyperstone_fadd(decode);
1393   hyperstone_fadd(cpustate, decode);
13941394}
13951395
1396void hyperstone_device::opc1()
1396static void hyperstone_opc1(hyperstone_state *cpustate)
13971397{
13981398   LOCAL_DECODE_INIT;
13991399   LLdecode(decode);
1400   hyperstone_faddd(decode);
1400   hyperstone_faddd(cpustate, decode);
14011401}
14021402
1403void hyperstone_device::opc2()
1403static void hyperstone_opc2(hyperstone_state *cpustate)
14041404{
14051405   LOCAL_DECODE_INIT;
14061406   LLdecode(decode);
1407   hyperstone_fsub(decode);
1407   hyperstone_fsub(cpustate, decode);
14081408}
14091409
1410void hyperstone_device::opc3()
1410static void hyperstone_opc3(hyperstone_state *cpustate)
14111411{
14121412   LOCAL_DECODE_INIT;
14131413   LLdecode(decode);
1414   hyperstone_fsubd(decode);
1414   hyperstone_fsubd(cpustate, decode);
14151415}
14161416
1417void hyperstone_device::opc4()
1417static void hyperstone_opc4(hyperstone_state *cpustate)
14181418{
14191419   LOCAL_DECODE_INIT;
14201420   LLdecode(decode);
1421   hyperstone_fmul(decode);
1421   hyperstone_fmul(cpustate, decode);
14221422}
14231423
1424void hyperstone_device::opc5()
1424static void hyperstone_opc5(hyperstone_state *cpustate)
14251425{
14261426   LOCAL_DECODE_INIT;
14271427   LLdecode(decode);
1428   hyperstone_fmuld(decode);
1428   hyperstone_fmuld(cpustate, decode);
14291429}
14301430
1431void hyperstone_device::opc6()
1431static void hyperstone_opc6(hyperstone_state *cpustate)
14321432{
14331433   LOCAL_DECODE_INIT;
14341434   LLdecode(decode);
1435   hyperstone_fdiv(decode);
1435   hyperstone_fdiv(cpustate, decode);
14361436}
14371437
1438void hyperstone_device::opc7()
1438static void hyperstone_opc7(hyperstone_state *cpustate)
14391439{
14401440   LOCAL_DECODE_INIT;
14411441   LLdecode(decode);
1442   hyperstone_fdivd(decode);
1442   hyperstone_fdivd(cpustate, decode);
14431443}
14441444
1445void hyperstone_device::opc8()
1445static void hyperstone_opc8(hyperstone_state *cpustate)
14461446{
14471447   LOCAL_DECODE_INIT;
14481448   LLdecode(decode);
1449   hyperstone_fcmp(decode);
1449   hyperstone_fcmp(cpustate, decode);
14501450}
14511451
1452void hyperstone_device::opc9()
1452static void hyperstone_opc9(hyperstone_state *cpustate)
14531453{
14541454   LOCAL_DECODE_INIT;
14551455   LLdecode(decode);
1456   hyperstone_fcmpd(decode);
1456   hyperstone_fcmpd(cpustate, decode);
14571457}
14581458
1459void hyperstone_device::opca()
1459static void hyperstone_opca(hyperstone_state *cpustate)
14601460{
14611461   LOCAL_DECODE_INIT;
14621462   LLdecode(decode);
1463   hyperstone_fcmpu(decode);
1463   hyperstone_fcmpu(cpustate, decode);
14641464}
14651465
1466void hyperstone_device::opcb()
1466static void hyperstone_opcb(hyperstone_state *cpustate)
14671467{
14681468   LOCAL_DECODE_INIT;
14691469   LLdecode(decode);
1470   hyperstone_fcmpud(decode);
1470   hyperstone_fcmpud(cpustate, decode);
14711471}
14721472
1473void hyperstone_device::opcc()
1473static void hyperstone_opcc(hyperstone_state *cpustate)
14741474{
14751475   LOCAL_DECODE_INIT;
14761476   LLdecode(decode);
1477   hyperstone_fcvt(decode);
1477   hyperstone_fcvt(cpustate, decode);
14781478}
14791479
1480void hyperstone_device::opcd()
1480static void hyperstone_opcd(hyperstone_state *cpustate)
14811481{
14821482   LOCAL_DECODE_INIT;
14831483   LLdecode(decode);
1484   hyperstone_fcvtd(decode);
1484   hyperstone_fcvtd(cpustate, decode);
14851485}
14861486
1487void hyperstone_device::opce()
1487static void hyperstone_opce(hyperstone_state *cpustate)
14881488{
14891489   LOCAL_DECODE_INIT;
14901490   LLextdecode(decode);
1491   hyperstone_extend(decode);
1491   hyperstone_extend(cpustate, decode);
14921492}
14931493
1494void hyperstone_device::opcf()
1494static void hyperstone_opcf(hyperstone_state *cpustate)
14951495{
14961496   LOCAL_DECODE_INIT;
14971497   LLdecode(decode);
1498   hyperstone_do(decode);
1498   hyperstone_do(cpustate, decode);
14991499}
15001500
15011501
15021502
1503void hyperstone_device::opd0()
1503static void hyperstone_opd0(hyperstone_state *cpustate)
15041504{
15051505   LOCAL_DECODE_INIT;
15061506   LRdecode(decode, 0);
1507   hyperstone_ldwr(decode);
1507   hyperstone_ldwr(cpustate, decode);
15081508}
15091509
1510void hyperstone_device::opd1()
1510static void hyperstone_opd1(hyperstone_state *cpustate)
15111511{
15121512   LOCAL_DECODE_INIT;
15131513   LRdecode(decode, 1);
1514   hyperstone_ldwr(decode);
1514   hyperstone_ldwr(cpustate, decode);
15151515}
15161516
1517void hyperstone_device::opd2()
1517static void hyperstone_opd2(hyperstone_state *cpustate)
15181518{
15191519   LOCAL_DECODE_INIT;
15201520   LRdecode(decode, 0);
1521   hyperstone_lddr(decode);
1521   hyperstone_lddr(cpustate, decode);
15221522}
15231523
1524void hyperstone_device::opd3()
1524static void hyperstone_opd3(hyperstone_state *cpustate)
15251525{
15261526   LOCAL_DECODE_INIT;
15271527   LRdecode(decode, 1);
1528   hyperstone_lddr(decode);
1528   hyperstone_lddr(cpustate, decode);
15291529}
15301530
1531void hyperstone_device::opd4()
1531static void hyperstone_opd4(hyperstone_state *cpustate)
15321532{
15331533   LOCAL_DECODE_INIT;
15341534   LRdecode(decode, 0);
1535   hyperstone_ldwp(decode);
1535   hyperstone_ldwp(cpustate, decode);
15361536}
15371537
1538void hyperstone_device::opd5()
1538static void hyperstone_opd5(hyperstone_state *cpustate)
15391539{
15401540   LOCAL_DECODE_INIT;
15411541   LRdecode(decode, 1);
1542   hyperstone_ldwp(decode);
1542   hyperstone_ldwp(cpustate, decode);
15431543}
15441544
1545void hyperstone_device::opd6()
1545static void hyperstone_opd6(hyperstone_state *cpustate)
15461546{
15471547   LOCAL_DECODE_INIT;
15481548   LRdecode(decode, 0);
1549   hyperstone_lddp(decode);
1549   hyperstone_lddp(cpustate, decode);
15501550}
15511551
1552void hyperstone_device::opd7()
1552static void hyperstone_opd7(hyperstone_state *cpustate)
15531553{
15541554   LOCAL_DECODE_INIT;
15551555   LRdecode(decode, 1);
1556   hyperstone_lddp(decode);
1556   hyperstone_lddp(cpustate, decode);
15571557}
15581558
1559void hyperstone_device::opd8()
1559static void hyperstone_opd8(hyperstone_state *cpustate)
15601560{
15611561   LOCAL_DECODE_INIT;
15621562   LRdecode(decode, 0);
1563   hyperstone_stwr(decode);
1563   hyperstone_stwr(cpustate, decode);
15641564}
15651565
1566void hyperstone_device::opd9()
1566static void hyperstone_opd9(hyperstone_state *cpustate)
15671567{
15681568   LOCAL_DECODE_INIT;
15691569   LRdecode(decode, 1);
1570   hyperstone_stwr(decode);
1570   hyperstone_stwr(cpustate, decode);
15711571}
15721572
1573void hyperstone_device::opda()
1573static void hyperstone_opda(hyperstone_state *cpustate)
15741574{
15751575   LOCAL_DECODE_INIT;
15761576   LRdecode(decode, 0);
1577   hyperstone_stdr(decode);
1577   hyperstone_stdr(cpustate, decode);
15781578}
15791579
1580void hyperstone_device::opdb()
1580static void hyperstone_opdb(hyperstone_state *cpustate)
15811581{
15821582   LOCAL_DECODE_INIT;
15831583   LRdecode(decode, 1);
1584   hyperstone_stdr(decode);
1584   hyperstone_stdr(cpustate, decode);
15851585}
15861586
1587void hyperstone_device::opdc()
1587static void hyperstone_opdc(hyperstone_state *cpustate)
15881588{
15891589   LOCAL_DECODE_INIT;
15901590   LRdecode(decode, 0);
1591   hyperstone_stwp(decode);
1591   hyperstone_stwp(cpustate, decode);
15921592}
15931593
1594void hyperstone_device::opdd()
1594static void hyperstone_opdd(hyperstone_state *cpustate)
15951595{
15961596   LOCAL_DECODE_INIT;
15971597   LRdecode(decode, 1);
1598   hyperstone_stwp(decode);
1598   hyperstone_stwp(cpustate, decode);
15991599}
16001600
1601void hyperstone_device::opde()
1601static void hyperstone_opde(hyperstone_state *cpustate)
16021602{
16031603   LOCAL_DECODE_INIT;
16041604   LRdecode(decode, 0);
1605   hyperstone_stdp(decode);
1605   hyperstone_stdp(cpustate, decode);
16061606}
16071607
1608void hyperstone_device::opdf()
1608static void hyperstone_opdf(hyperstone_state *cpustate)
16091609{
16101610   LOCAL_DECODE_INIT;
16111611   LRdecode(decode, 1);
1612   hyperstone_stdp(decode);
1612   hyperstone_stdp(cpustate, decode);
16131613}
16141614
16151615
16161616
1617void hyperstone_device::ope0()
1617static void hyperstone_ope0(hyperstone_state *cpustate)
16181618{
16191619   LOCAL_DECODE_INIT;
16201620   PCreldecode(decode);
1621   hyperstone_dbv(decode);
1621   hyperstone_dbv(cpustate, decode);
16221622}
16231623
1624void hyperstone_device::ope1()
1624static void hyperstone_ope1(hyperstone_state *cpustate)
16251625{
16261626   LOCAL_DECODE_INIT;
16271627   PCreldecode(decode);
1628   hyperstone_dbnv(decode);
1628   hyperstone_dbnv(cpustate, decode);
16291629}
16301630
1631void hyperstone_device::ope2()
1631static void hyperstone_ope2(hyperstone_state *cpustate)
16321632{
16331633   LOCAL_DECODE_INIT;
16341634   PCreldecode(decode);
1635   hyperstone_dbe(decode);
1635   hyperstone_dbe(cpustate, decode);
16361636}
16371637
1638void hyperstone_device::ope3()
1638static void hyperstone_ope3(hyperstone_state *cpustate)
16391639{
16401640   LOCAL_DECODE_INIT;
16411641   PCreldecode(decode);
1642   hyperstone_dbne(decode);
1642   hyperstone_dbne(cpustate, decode);
16431643}
16441644
1645void hyperstone_device::ope4()
1645static void hyperstone_ope4(hyperstone_state *cpustate)
16461646{
16471647   LOCAL_DECODE_INIT;
16481648   PCreldecode(decode);
1649   hyperstone_dbc(decode);
1649   hyperstone_dbc(cpustate, decode);
16501650}
16511651
1652void hyperstone_device::ope5()
1652static void hyperstone_ope5(hyperstone_state *cpustate)
16531653{
16541654   LOCAL_DECODE_INIT;
16551655   PCreldecode(decode);
1656   hyperstone_dbnc(decode);
1656   hyperstone_dbnc(cpustate, decode);
16571657}
16581658
1659void hyperstone_device::ope6()
1659static void hyperstone_ope6(hyperstone_state *cpustate)
16601660{
16611661   LOCAL_DECODE_INIT;
16621662   PCreldecode(decode);
1663   hyperstone_dbse(decode);
1663   hyperstone_dbse(cpustate, decode);
16641664}
16651665
1666void hyperstone_device::ope7()
1666static void hyperstone_ope7(hyperstone_state *cpustate)
16671667{
16681668   LOCAL_DECODE_INIT;
16691669   PCreldecode(decode);
1670   hyperstone_dbht(decode);
1670   hyperstone_dbht(cpustate, decode);
16711671}
16721672
1673void hyperstone_device::ope8()
1673static void hyperstone_ope8(hyperstone_state *cpustate)
16741674{
16751675   LOCAL_DECODE_INIT;
16761676   PCreldecode(decode);
1677   hyperstone_dbn(decode);
1677   hyperstone_dbn(cpustate, decode);
16781678}
16791679
1680void hyperstone_device::ope9()
1680static void hyperstone_ope9(hyperstone_state *cpustate)
16811681{
16821682   LOCAL_DECODE_INIT;
16831683   PCreldecode(decode);
1684   hyperstone_dbnn(decode);
1684   hyperstone_dbnn(cpustate, decode);
16851685}
16861686
1687void hyperstone_device::opea()
1687static void hyperstone_opea(hyperstone_state *cpustate)
16881688{
16891689   LOCAL_DECODE_INIT;
16901690   PCreldecode(decode);
1691   hyperstone_dble(decode);
1691   hyperstone_dble(cpustate, decode);
16921692}
16931693
1694void hyperstone_device::opeb()
1694static void hyperstone_opeb(hyperstone_state *cpustate)
16951695{
16961696   LOCAL_DECODE_INIT;
16971697   PCreldecode(decode);
1698   hyperstone_dbgt(decode);
1698   hyperstone_dbgt(cpustate, decode);
16991699}
17001700
1701void hyperstone_device::opec()
1701static void hyperstone_opec(hyperstone_state *cpustate)
17021702{
17031703   LOCAL_DECODE_INIT;
17041704   PCreldecode(decode);
1705   hyperstone_dbr(decode);
1705   hyperstone_dbr(cpustate, decode);
17061706}
17071707
1708void hyperstone_device::oped()
1708static void hyperstone_oped(hyperstone_state *cpustate)
17091709{
17101710   LOCAL_DECODE_INIT;
17111711   LLdecode(decode);
1712   hyperstone_frame(decode);
1712   hyperstone_frame(cpustate, decode);
17131713}
17141714
1715void hyperstone_device::opee()
1715static void hyperstone_opee(hyperstone_state *cpustate)
17161716{
17171717   LOCAL_DECODE_INIT;
17181718   LRconstdecode(decode, 0);
1719   hyperstone_call(decode);
1719   hyperstone_call(cpustate, decode);
17201720}
17211721
1722void hyperstone_device::opef()
1722static void hyperstone_opef(hyperstone_state *cpustate)
17231723{
17241724   LOCAL_DECODE_INIT;
17251725   LRconstdecode(decode, 1);
1726   hyperstone_call(decode);
1726   hyperstone_call(cpustate, decode);
17271727}
17281728
17291729
17301730
1731void hyperstone_device::opf0()
1731static void hyperstone_opf0(hyperstone_state *cpustate)
17321732{
17331733   LOCAL_DECODE_INIT;
17341734   PCreldecode(decode);
1735   hyperstone_bv(decode);
1735   hyperstone_bv(cpustate, decode);
17361736}
17371737
1738void hyperstone_device::opf1()
1738static void hyperstone_opf1(hyperstone_state *cpustate)
17391739{
17401740   LOCAL_DECODE_INIT;
17411741   PCreldecode(decode);
1742   hyperstone_bnv(decode);
1742   hyperstone_bnv(cpustate, decode);
17431743}
17441744
1745void hyperstone_device::opf2()
1745static void hyperstone_opf2(hyperstone_state *cpustate)
17461746{
17471747   LOCAL_DECODE_INIT;
17481748   PCreldecode(decode);
1749   hyperstone_be(decode);
1749   hyperstone_be(cpustate, decode);
17501750}
17511751
1752void hyperstone_device::opf3()
1752static void hyperstone_opf3(hyperstone_state *cpustate)
17531753{
17541754   LOCAL_DECODE_INIT;
17551755   PCreldecode(decode);
1756   hyperstone_bne(decode);
1756   hyperstone_bne(cpustate, decode);
17571757}
17581758
1759void hyperstone_device::opf4()
1759static void hyperstone_opf4(hyperstone_state *cpustate)
17601760{
17611761   LOCAL_DECODE_INIT;
17621762   PCreldecode(decode);
1763   hyperstone_bc(decode);
1763   hyperstone_bc(cpustate, decode);
17641764}
17651765
1766void hyperstone_device::opf5()
1766static void hyperstone_opf5(hyperstone_state *cpustate)
17671767{
17681768   LOCAL_DECODE_INIT;
17691769   PCreldecode(decode);
1770   hyperstone_bnc(decode);
1770   hyperstone_bnc(cpustate, decode);
17711771}
17721772
1773void hyperstone_device::opf6()
1773static void hyperstone_opf6(hyperstone_state *cpustate)
17741774{
17751775   LOCAL_DECODE_INIT;
17761776   PCreldecode(decode);
1777   hyperstone_bse(decode);
1777   hyperstone_bse(cpustate, decode);
17781778}
17791779
1780void hyperstone_device::opf7()
1780static void hyperstone_opf7(hyperstone_state *cpustate)
17811781{
17821782   LOCAL_DECODE_INIT;
17831783   PCreldecode(decode);
1784   hyperstone_bht(decode);
1784   hyperstone_bht(cpustate, decode);
17851785}
17861786
1787void hyperstone_device::opf8()
1787static void hyperstone_opf8(hyperstone_state *cpustate)
17881788{
17891789   LOCAL_DECODE_INIT;
17901790   PCreldecode(decode);
1791   hyperstone_bn(decode);
1791   hyperstone_bn(cpustate, decode);
17921792}
17931793
1794void hyperstone_device::opf9()
1794static void hyperstone_opf9(hyperstone_state *cpustate)
17951795{
17961796   LOCAL_DECODE_INIT;
17971797   PCreldecode(decode);
1798   hyperstone_bnn(decode);
1798   hyperstone_bnn(cpustate, decode);
17991799}
18001800
1801void hyperstone_device::opfa()
1801static void hyperstone_opfa(hyperstone_state *cpustate)
18021802{
18031803   LOCAL_DECODE_INIT;
18041804   PCreldecode(decode);
1805   hyperstone_ble(decode);
1805   hyperstone_ble(cpustate, decode);
18061806}
18071807
1808void hyperstone_device::opfb()
1808static void hyperstone_opfb(hyperstone_state *cpustate)
18091809{
18101810   LOCAL_DECODE_INIT;
18111811   PCreldecode(decode);
1812   hyperstone_bgt(decode);
1812   hyperstone_bgt(cpustate, decode);
18131813}
18141814
1815void hyperstone_device::opfc()
1815static void hyperstone_opfc(hyperstone_state *cpustate)
18161816{
18171817   LOCAL_DECODE_INIT;
18181818   PCreldecode(decode);
1819   hyperstone_br(decode);
1819   hyperstone_br(cpustate, decode);
18201820}
18211821
1822void hyperstone_device::opfd()
1822static void hyperstone_opfd(hyperstone_state *cpustate)
18231823{
18241824   LOCAL_DECODE_INIT;
18251825   PCadrdecode(decode);
1826   hyperstone_trap(decode);
1826   hyperstone_trap(cpustate, decode);
18271827}
18281828
1829void hyperstone_device::opfe()
1829static void hyperstone_opfe(hyperstone_state *cpustate)
18301830{
18311831   LOCAL_DECODE_INIT;
18321832   PCadrdecode(decode);
1833   hyperstone_trap(decode);
1833   hyperstone_trap(cpustate, decode);
18341834}
18351835
1836void hyperstone_device::opff()
1836static void hyperstone_opff(hyperstone_state *cpustate)
18371837{
18381838   LOCAL_DECODE_INIT;
18391839   PCadrdecode(decode);
1840   hyperstone_trap(decode);
1840   hyperstone_trap(cpustate, decode);
18411841}
18421842
1843const hyperstone_device::ophandler hyperstone_device::s_opcodetable[256] =
1843
1844static void (*const hyperstone_op[0x100])(hyperstone_state *cpustate) =
18441845{
1845   &hyperstone_device::op00, &hyperstone_device::op01, &hyperstone_device::op02, &hyperstone_device::op03,
1846   &hyperstone_device::op04, &hyperstone_device::op05, &hyperstone_device::op06, &hyperstone_device::op07,
1847   &hyperstone_device::op08, &hyperstone_device::op09, &hyperstone_device::op0a, &hyperstone_device::op0b,
1848   &hyperstone_device::op0c, &hyperstone_device::op0d, &hyperstone_device::op0e, &hyperstone_device::op0f,
1846   hyperstone_op00, hyperstone_op01, hyperstone_op02, hyperstone_op03,
1847   hyperstone_op04, hyperstone_op05, hyperstone_op06, hyperstone_op07,
1848   hyperstone_op08, hyperstone_op09, hyperstone_op0a, hyperstone_op0b,
1849   hyperstone_op0c, hyperstone_op0d, hyperstone_op0e, hyperstone_op0f,
18491850
1850   &hyperstone_device::op10, &hyperstone_device::op11, &hyperstone_device::op12, &hyperstone_device::op13,
1851   &hyperstone_device::op14, &hyperstone_device::op15, &hyperstone_device::op16, &hyperstone_device::op17,
1852   &hyperstone_device::op18, &hyperstone_device::op19, &hyperstone_device::op1a, &hyperstone_device::op1b,
1853   &hyperstone_device::op1c, &hyperstone_device::op1d, &hyperstone_device::op1e, &hyperstone_device::op1f,
1851   hyperstone_op10, hyperstone_op11, hyperstone_op12, hyperstone_op13,
1852   hyperstone_op14, hyperstone_op15, hyperstone_op16, hyperstone_op17,
1853   hyperstone_op18, hyperstone_op19, hyperstone_op1a, hyperstone_op1b,
1854   hyperstone_op1c, hyperstone_op1d, hyperstone_op1e, hyperstone_op1f,
18541855
1855   &hyperstone_device::op20, &hyperstone_device::op21, &hyperstone_device::op22, &hyperstone_device::op23,
1856   &hyperstone_device::op24, &hyperstone_device::op25, &hyperstone_device::op26, &hyperstone_device::op27,
1857   &hyperstone_device::op28, &hyperstone_device::op29, &hyperstone_device::op2a, &hyperstone_device::op2b,
1858   &hyperstone_device::op2c, &hyperstone_device::op2d, &hyperstone_device::op2e, &hyperstone_device::op2f,
1856   hyperstone_op20, hyperstone_op21, hyperstone_op22, hyperstone_op23,
1857   hyperstone_op24, hyperstone_op25, hyperstone_op26, hyperstone_op27,
1858   hyperstone_op28, hyperstone_op29, hyperstone_op2a, hyperstone_op2b,
1859   hyperstone_op2c, hyperstone_op2d, hyperstone_op2e, hyperstone_op2f,
18591860
1860   &hyperstone_device::op30, &hyperstone_device::op31, &hyperstone_device::op32, &hyperstone_device::op33,
1861   &hyperstone_device::op34, &hyperstone_device::op35, &hyperstone_device::op36, &hyperstone_device::op37,
1862   &hyperstone_device::op38, &hyperstone_device::op39, &hyperstone_device::op3a, &hyperstone_device::op3b,
1863   &hyperstone_device::op3c, &hyperstone_device::op3d, &hyperstone_device::op3e, &hyperstone_device::op3f,
1861   hyperstone_op30, hyperstone_op31, hyperstone_op32, hyperstone_op33,
1862   hyperstone_op34, hyperstone_op35, hyperstone_op36, hyperstone_op37,
1863   hyperstone_op38, hyperstone_op39, hyperstone_op3a, hyperstone_op3b,
1864   hyperstone_op3c, hyperstone_op3d, hyperstone_op3e, hyperstone_op3f,
18641865
1865   &hyperstone_device::op40, &hyperstone_device::op41, &hyperstone_device::op42, &hyperstone_device::op43,
1866   &hyperstone_device::op44, &hyperstone_device::op45, &hyperstone_device::op46, &hyperstone_device::op47,
1867   &hyperstone_device::op48, &hyperstone_device::op49, &hyperstone_device::op4a, &hyperstone_device::op4b,
1868   &hyperstone_device::op4c, &hyperstone_device::op4d, &hyperstone_device::op4e, &hyperstone_device::op4f,
1866   hyperstone_op40, hyperstone_op41, hyperstone_op42, hyperstone_op43,
1867   hyperstone_op44, hyperstone_op45, hyperstone_op46, hyperstone_op47,
1868   hyperstone_op48, hyperstone_op49, hyperstone_op4a, hyperstone_op4b,
1869   hyperstone_op4c, hyperstone_op4d, hyperstone_op4e, hyperstone_op4f,
18691870
1870   &hyperstone_device::op50, &hyperstone_device::op51, &hyperstone_device::op52, &hyperstone_device::op53,
1871   &hyperstone_device::op54, &hyperstone_device::op55, &hyperstone_device::op56, &hyperstone_device::op57,
1872   &hyperstone_device::op58, &hyperstone_device::op59, &hyperstone_device::op5a, &hyperstone_device::op5b,
1873   &hyperstone_device::op5c, &hyperstone_device::op5d, &hyperstone_device::op5e, &hyperstone_device::op5f,
1871   hyperstone_op50, hyperstone_op51, hyperstone_op52, hyperstone_op53,
1872   hyperstone_op54, hyperstone_op55, hyperstone_op56, hyperstone_op57,
1873   hyperstone_op58, hyperstone_op59, hyperstone_op5a, hyperstone_op5b,
1874   hyperstone_op5c, hyperstone_op5d, hyperstone_op5e, hyperstone_op5f,
18741875
1875   &hyperstone_device::op60, &hyperstone_device::op61, &hyperstone_device::op62, &hyperstone_device::op63,
1876   &hyperstone_device::op64, &hyperstone_device::op65, &hyperstone_device::op66, &hyperstone_device::op67,
1877   &hyperstone_device::op68, &hyperstone_device::op69, &hyperstone_device::op6a, &hyperstone_device::op6b,
1878   &hyperstone_device::op6c, &hyperstone_device::op6d, &hyperstone_device::op6e, &hyperstone_device::op6f,
1876   hyperstone_op60, hyperstone_op61, hyperstone_op62, hyperstone_op63,
1877   hyperstone_op64, hyperstone_op65, hyperstone_op66, hyperstone_op67,
1878   hyperstone_op68, hyperstone_op69, hyperstone_op6a, hyperstone_op6b,
1879   hyperstone_op6c, hyperstone_op6d, hyperstone_op6e, hyperstone_op6f,
18791880
1880   &hyperstone_device::op70, &hyperstone_device::op71, &hyperstone_device::op72, &hyperstone_device::op73,
1881   &hyperstone_device::op74, &hyperstone_device::op75, &hyperstone_device::op76, &hyperstone_device::op77,
1882   &hyperstone_device::op78, &hyperstone_device::op79, &hyperstone_device::op7a, &hyperstone_device::op7b,
1883   &hyperstone_device::op7c, &hyperstone_device::op7d, &hyperstone_device::op7e, &hyperstone_device::op7f,
1881   hyperstone_op70, hyperstone_op71, hyperstone_op72, hyperstone_op73,
1882   hyperstone_op74, hyperstone_op75, hyperstone_op76, hyperstone_op77,
1883   hyperstone_op78, hyperstone_op79, hyperstone_op7a, hyperstone_op7b,
1884   hyperstone_op7c, hyperstone_op7d, hyperstone_op7e, hyperstone_op7f,
18841885
1885   &hyperstone_device::op80, &hyperstone_device::op81, &hyperstone_device::op82, &hyperstone_device::op83,
1886   &hyperstone_device::op84, &hyperstone_device::op85, &hyperstone_device::op86, &hyperstone_device::op87,
1887   &hyperstone_device::op88, &hyperstone_device::op89, &hyperstone_device::op8a, &hyperstone_device::op8b,
1888   &hyperstone_device::op8c, &hyperstone_device::op8d, &hyperstone_device::op8e, &hyperstone_device::op8f,
1886   hyperstone_op80, hyperstone_op81, hyperstone_op82, hyperstone_op83,
1887   hyperstone_op84, hyperstone_op85, hyperstone_op86, hyperstone_op87,
1888   hyperstone_op88, hyperstone_op89, hyperstone_op8a, hyperstone_op8b,
1889   hyperstone_op8c, hyperstone_op8d, hyperstone_op8e, hyperstone_op8f,
18891890
1890   &hyperstone_device::op90, &hyperstone_device::op91, &hyperstone_device::op92, &hyperstone_device::op93,
1891   &hyperstone_device::op94, &hyperstone_device::op95, &hyperstone_device::op96, &hyperstone_device::op97,
1892   &hyperstone_device::op98, &hyperstone_device::op99, &hyperstone_device::op9a, &hyperstone_device::op9b,
1893   &hyperstone_device::op9c, &hyperstone_device::op9d, &hyperstone_device::op9e, &hyperstone_device::op9f,
1891   hyperstone_op90, hyperstone_op91, hyperstone_op92, hyperstone_op93,
1892   hyperstone_op94, hyperstone_op95, hyperstone_op96, hyperstone_op97,
1893   hyperstone_op98, hyperstone_op99, hyperstone_op9a, hyperstone_op9b,
1894   hyperstone_op9c, hyperstone_op9d, hyperstone_op9e, hyperstone_op9f,
18941895
1895   &hyperstone_device::opa0, &hyperstone_device::opa1, &hyperstone_device::opa2, &hyperstone_device::opa3,
1896   &hyperstone_device::opa4, &hyperstone_device::opa5, &hyperstone_device::opa6, &hyperstone_device::opa7,
1897   &hyperstone_device::opa8, &hyperstone_device::opa9, &hyperstone_device::opaa, &hyperstone_device::opab,
1898   &hyperstone_device::opac, &hyperstone_device::opad, &hyperstone_device::opae, &hyperstone_device::opaf,
1896   hyperstone_opa0, hyperstone_opa1, hyperstone_opa2, hyperstone_opa3,
1897   hyperstone_opa4, hyperstone_opa5, hyperstone_opa6, hyperstone_opa7,
1898   hyperstone_opa8, hyperstone_opa9, hyperstone_opaa, hyperstone_opab,
1899   hyperstone_opac, hyperstone_opad, hyperstone_opae, hyperstone_opaf,
18991900
1900   &hyperstone_device::opb0, &hyperstone_device::opb1, &hyperstone_device::opb2, &hyperstone_device::opb3,
1901   &hyperstone_device::opb4, &hyperstone_device::opb5, &hyperstone_device::opb6, &hyperstone_device::opb7,
1902   &hyperstone_device::opb8, &hyperstone_device::opb9, &hyperstone_device::opba, &hyperstone_device::opbb,
1903   &hyperstone_device::opbc, &hyperstone_device::opbd, &hyperstone_device::opbe, &hyperstone_device::opbf,
1901   hyperstone_opb0, hyperstone_opb1, hyperstone_opb2, hyperstone_opb3,
1902   hyperstone_opb4, hyperstone_opb5, hyperstone_opb6, hyperstone_opb7,
1903   hyperstone_opb8, hyperstone_opb9, hyperstone_opba, hyperstone_opbb,
1904   hyperstone_opbc, hyperstone_opbd, hyperstone_opbe, hyperstone_opbf,
19041905
1905   &hyperstone_device::opc0, &hyperstone_device::opc1, &hyperstone_device::opc2, &hyperstone_device::opc3,
1906   &hyperstone_device::opc4, &hyperstone_device::opc5, &hyperstone_device::opc6, &hyperstone_device::opc7,
1907   &hyperstone_device::opc8, &hyperstone_device::opc9, &hyperstone_device::opca, &hyperstone_device::opcb,
1908   &hyperstone_device::opcc, &hyperstone_device::opcd, &hyperstone_device::opce, &hyperstone_device::opcf,
1906   hyperstone_opc0, hyperstone_opc1, hyperstone_opc2, hyperstone_opc3,
1907   hyperstone_opc4, hyperstone_opc5, hyperstone_opc6, hyperstone_opc7,
1908   hyperstone_opc8, hyperstone_opc9, hyperstone_opca, hyperstone_opcb,
1909   hyperstone_opcc, hyperstone_opcd, hyperstone_opce, hyperstone_opcf,
19091910
1910   &hyperstone_device::opd0, &hyperstone_device::opd1, &hyperstone_device::opd2, &hyperstone_device::opd3,
1911   &hyperstone_device::opd4, &hyperstone_device::opd5, &hyperstone_device::opd6, &hyperstone_device::opd7,
1912   &hyperstone_device::opd8, &hyperstone_device::opd9, &hyperstone_device::opda, &hyperstone_device::opdb,
1913   &hyperstone_device::opdc, &hyperstone_device::opdd, &hyperstone_device::opde, &hyperstone_device::opdf,
1911   hyperstone_opd0, hyperstone_opd1, hyperstone_opd2, hyperstone_opd3,
1912   hyperstone_opd4, hyperstone_opd5, hyperstone_opd6, hyperstone_opd7,
1913   hyperstone_opd8, hyperstone_opd9, hyperstone_opda, hyperstone_opdb,
1914   hyperstone_opdc, hyperstone_opdd, hyperstone_opde, hyperstone_opdf,
19141915
1915   &hyperstone_device::ope0, &hyperstone_device::ope1, &hyperstone_device::ope2, &hyperstone_device::ope3,
1916   &hyperstone_device::ope4, &hyperstone_device::ope5, &hyperstone_device::ope6, &hyperstone_device::ope7,
1917   &hyperstone_device::ope8, &hyperstone_device::ope9, &hyperstone_device::opea, &hyperstone_device::opeb,
1918   &hyperstone_device::opec, &hyperstone_device::oped, &hyperstone_device::opee, &hyperstone_device::opef,
1916   hyperstone_ope0, hyperstone_ope1, hyperstone_ope2, hyperstone_ope3,
1917   hyperstone_ope4, hyperstone_ope5, hyperstone_ope6, hyperstone_ope7,
1918   hyperstone_ope8, hyperstone_ope9, hyperstone_opea, hyperstone_opeb,
1919   hyperstone_opec, hyperstone_oped, hyperstone_opee, hyperstone_opef,
19191920
1920   &hyperstone_device::opf0, &hyperstone_device::opf1, &hyperstone_device::opf2, &hyperstone_device::opf3,
1921   &hyperstone_device::opf4, &hyperstone_device::opf5, &hyperstone_device::opf6, &hyperstone_device::opf7,
1922   &hyperstone_device::opf8, &hyperstone_device::opf9, &hyperstone_device::opfa, &hyperstone_device::opfb,
1923   &hyperstone_device::opfc, &hyperstone_device::opfd, &hyperstone_device::opfe, &hyperstone_device::opff
1921   hyperstone_opf0, hyperstone_opf1, hyperstone_opf2, hyperstone_opf3,
1922   hyperstone_opf4, hyperstone_opf5, hyperstone_opf6, hyperstone_opf7,
1923   hyperstone_opf8, hyperstone_opf9, hyperstone_opfa, hyperstone_opfb,
1924   hyperstone_opfc, hyperstone_opfd, hyperstone_opfe, hyperstone_opff
19241925};
trunk/src/emu/cpu/e132xs/e132xs.c
r19871r19872
227227
228228/* Registers */
229229
230enum
231{
232   E132XS_PC = 1,
233   E132XS_SR,
234   E132XS_FER,
235   E132XS_G3,
236   E132XS_G4,
237   E132XS_G5,
238   E132XS_G6,
239   E132XS_G7,
240   E132XS_G8,
241   E132XS_G9,
242   E132XS_G10,
243   E132XS_G11,
244   E132XS_G12,
245   E132XS_G13,
246   E132XS_G14,
247   E132XS_G15,
248   E132XS_G16,
249   E132XS_G17,
250   E132XS_SP,
251   E132XS_UB,
252   E132XS_BCR,
253   E132XS_TPR,
254   E132XS_TCR,
255   E132XS_TR,
256   E132XS_WCR,
257   E132XS_ISR,
258   E132XS_FCR,
259   E132XS_MCR,
260   E132XS_G28,
261   E132XS_G29,
262   E132XS_G30,
263   E132XS_G31,
264   E132XS_CL0, E132XS_CL1, E132XS_CL2, E132XS_CL3,
265   E132XS_CL4, E132XS_CL5, E132XS_CL6, E132XS_CL7,
266   E132XS_CL8, E132XS_CL9, E132XS_CL10,E132XS_CL11,
267   E132XS_CL12,E132XS_CL13,E132XS_CL14,E132XS_CL15,
268   E132XS_L0,  E132XS_L1,  E132XS_L2,  E132XS_L3,
269   E132XS_L4,  E132XS_L5,  E132XS_L6,  E132XS_L7,
270   E132XS_L8,  E132XS_L9,  E132XS_L10, E132XS_L11,
271   E132XS_L12, E132XS_L13, E132XS_L14, E132XS_L15,
272   E132XS_L16, E132XS_L17, E132XS_L18, E132XS_L19,
273   E132XS_L20, E132XS_L21, E132XS_L22, E132XS_L23,
274   E132XS_L24, E132XS_L25, E132XS_L26, E132XS_L27,
275   E132XS_L28, E132XS_L29, E132XS_L30, E132XS_L31,
276   E132XS_L32, E132XS_L33, E132XS_L34, E132XS_L35,
277   E132XS_L36, E132XS_L37, E132XS_L38, E132XS_L39,
278   E132XS_L40, E132XS_L41, E132XS_L42, E132XS_L43,
279   E132XS_L44, E132XS_L45, E132XS_L46, E132XS_L47,
280   E132XS_L48, E132XS_L49, E132XS_L50, E132XS_L51,
281   E132XS_L52, E132XS_L53, E132XS_L54, E132XS_L55,
282   E132XS_L56, E132XS_L57, E132XS_L58, E132XS_L59,
283   E132XS_L60, E132XS_L61, E132XS_L62, E132XS_L63
284};
285
286
287/* Delay information */
288struct delay_info
289{
290   INT32   delay_cmd;
291   UINT32   delay_pc;
292};
293
230294/* Internal registers */
295struct hyperstone_state
296{
297   UINT32   global_regs[32];
298   UINT32   local_regs[64];
231299
300   /* internal stuff */
301   UINT32   ppc;   // previous pc
302   UINT16   op;      // opcode
303   UINT32   trap_entry; // entry point to get trap address
304
305   UINT8   clock_scale_mask;
306   UINT8   clock_scale;
307   UINT8   clock_cycles_1;
308   UINT8   clock_cycles_2;
309   UINT8   clock_cycles_4;
310   UINT8   clock_cycles_6;
311
312   UINT64   tr_base_cycles;
313   UINT32   tr_base_value;
314   UINT32   tr_clocks_per_tick;
315   UINT8   timer_int_pending;
316   emu_timer *timer;
317
318   delay_info delay;
319
320   device_irq_acknowledge_callback irq_callback;
321   legacy_cpu_device *device;
322   address_space *program;
323   direct_read_data *direct;
324   address_space *io;
325   UINT32 opcodexor;
326
327   INT32 instruction_length;
328   INT32 intblock;
329
330   int icount;
331};
332
333struct regs_decode
334{
335   UINT8   src, dst;       // destination and source register code
336   UINT32   src_value;      // current source register value
337   UINT32   next_src_value; // current next source register value
338   UINT32   dst_value;      // current destination register value
339   UINT32   next_dst_value; // current next destination register value
340   UINT8   sub_type;      // sub type opcode (for DD and X_CODE bits)
341   union
342   {
343      UINT32 u;
344      INT32  s;
345   } extra;            // extra value such as immediate value, const, pcrel, ...
346   UINT8   src_is_local;
347   UINT8   dst_is_local;
348   UINT8   same_src_dst;
349   UINT8   same_src_dstf;
350   UINT8   same_srcf_dst;
351};
352
353static void check_interrupts(hyperstone_state *cpustate);
354
232355#define SREG  (decode)->src_value
233356#define SREGF (decode)->next_src_value
234357#define DREG  (decode)->dst_value
r19871r19872
236359#define EXTRA_U (decode)->extra.u
237360#define EXTRA_S (decode)->extra.s
238361
239#define SET_SREG( _data_ )  ((decode)->src_is_local ? set_local_register((decode)->src, (UINT32)_data_) : set_global_register((decode)->src, (UINT32)_data_))
240#define SET_SREGF( _data_ ) ((decode)->src_is_local ? set_local_register((decode)->src + 1, (UINT32)_data_) : set_global_register((decode)->src + 1, (UINT32)_data_))
241#define SET_DREG( _data_ )  ((decode)->dst_is_local ? set_local_register((decode)->dst, (UINT32)_data_) : set_global_register((decode)->dst, (UINT32)_data_))
242#define SET_DREGF( _data_ ) ((decode)->dst_is_local ? set_local_register((decode)->dst + 1, (UINT32)_data_) : set_global_register((decode)->dst + 1, (UINT32)_data_))
362#define SET_SREG( _data_ )  ((decode)->src_is_local ? set_local_register(cpustate, (decode)->src, (UINT32)_data_) : set_global_register(cpustate, (decode)->src, (UINT32)_data_))
363#define SET_SREGF( _data_ ) ((decode)->src_is_local ? set_local_register(cpustate, (decode)->src + 1, (UINT32)_data_) : set_global_register(cpustate, (decode)->src + 1, (UINT32)_data_))
364#define SET_DREG( _data_ )  ((decode)->dst_is_local ? set_local_register(cpustate, (decode)->dst, (UINT32)_data_) : set_global_register(cpustate, (decode)->dst, (UINT32)_data_))
365#define SET_DREGF( _data_ ) ((decode)->dst_is_local ? set_local_register(cpustate, (decode)->dst + 1, (UINT32)_data_) : set_global_register(cpustate, (decode)->dst + 1, (UINT32)_data_))
243366
244367#define SRC_IS_PC      (!(decode)->src_is_local && (decode)->src == PC_REGISTER)
245368#define DST_IS_PC      (!(decode)->dst_is_local && (decode)->dst == PC_REGISTER)
r19871r19872
249372#define SAME_SRC_DSTF  (decode)->same_src_dstf
250373#define SAME_SRCF_DST  (decode)->same_srcf_dst
251374
252//**************************************************************************
253//  INTERNAL ADDRESS MAP
254//**************************************************************************
255
256375// 4Kb IRAM (On-Chip Memory)
257376
258static ADDRESS_MAP_START( e116_4k_iram_map, AS_PROGRAM, 16, hyperstone_device )
377static ADDRESS_MAP_START( e116_4k_iram_map, AS_PROGRAM, 16, legacy_cpu_device )
259378   AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM AM_MIRROR(0x1ffff000)
260379ADDRESS_MAP_END
261380
262static ADDRESS_MAP_START( e132_4k_iram_map, AS_PROGRAM, 32, hyperstone_device )
381
382
383static ADDRESS_MAP_START( e132_4k_iram_map, AS_PROGRAM, 32, legacy_cpu_device )
263384   AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM AM_MIRROR(0x1ffff000)
264385ADDRESS_MAP_END
265386
266387
267388// 8Kb IRAM (On-Chip Memory)
268389
269static ADDRESS_MAP_START( e116_8k_iram_map, AS_PROGRAM, 16, hyperstone_device )
390static ADDRESS_MAP_START( e116_8k_iram_map, AS_PROGRAM, 16, legacy_cpu_device )
391
270392   AM_RANGE(0xc0000000, 0xc0001fff) AM_RAM AM_MIRROR(0x1fffe000)
271393ADDRESS_MAP_END
272394
273static ADDRESS_MAP_START( e132_8k_iram_map, AS_PROGRAM, 32, hyperstone_device )
395
396
397static ADDRESS_MAP_START( e132_8k_iram_map, AS_PROGRAM, 32, legacy_cpu_device )
274398   AM_RANGE(0xc0000000, 0xc0001fff) AM_RAM AM_MIRROR(0x1fffe000)
275399ADDRESS_MAP_END
276400
277401
278402// 16Kb IRAM (On-Chip Memory)
279403
280static ADDRESS_MAP_START( e116_16k_iram_map, AS_PROGRAM, 16, hyperstone_device )
281   AM_RANGE(0xc0000000, 0xc0003fff) AM_RAM AM_MIRROR(0x1fffc000)
282ADDRESS_MAP_END
283404
284static ADDRESS_MAP_START( e132_16k_iram_map, AS_PROGRAM, 32, hyperstone_device )
405static ADDRESS_MAP_START( e116_16k_iram_map, AS_PROGRAM, 16, legacy_cpu_device )
285406   AM_RANGE(0xc0000000, 0xc0003fff) AM_RAM AM_MIRROR(0x1fffc000)
286407ADDRESS_MAP_END
287408
288409
289//-------------------------------------------------
290//  hyperstone_device - constructor
291//-------------------------------------------------
292410
293hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
294                            const device_type type, UINT32 prg_data_width, UINT32 io_data_width, address_map_constructor internal_map)
295   : cpu_device(mconfig, type, name, tag, owner, clock),
296     m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32),
297     m_io_config("io", ENDIANNESS_BIG, io_data_width, 15),
298      m_icount(0)
299{
300   // build the opcode table
301   for (int op = 0; op < 256; op++)
302      m_opcode[op] = s_opcodetable[op];
303}
411static ADDRESS_MAP_START( e132_16k_iram_map, AS_PROGRAM, 32, legacy_cpu_device )
412   AM_RANGE(0xc0000000, 0xc0003fff) AM_RAM AM_MIRROR(0x1fffc000)
413ADDRESS_MAP_END
304414
305415
306//-------------------------------------------------
307//  e116t_device - constructor
308//-------------------------------------------------
309
310e116t_device::e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
311   : hyperstone_device(mconfig, "E1-16T", tag, owner, clock, E116T, 16, 16, ADDRESS_MAP_NAME(e116_4k_iram_map))
416INLINE hyperstone_state *get_safe_token(device_t *device)
312417{
418   assert(device != NULL);
419   assert(device->type() == E116T ||
420         device->type() == E116XT ||
421         device->type() == E116XS ||
422         device->type() == E116XSR ||
423         device->type() == E132N ||
424         device->type() == E132T ||
425         device->type() == E132XN ||
426         device->type() == E132XT ||
427         device->type() == E132XS ||
428         device->type() == E132XSR ||
429         device->type() == GMS30C2116 ||
430         device->type() == GMS30C2132 ||
431         device->type() == GMS30C2216 ||
432         device->type() == GMS30C2232);
433   return (hyperstone_state *)downcast<legacy_cpu_device *>(device)->token();
313434}
314435
315
316//-------------------------------------------------
317//  e116xt_device - constructor
318//-------------------------------------------------
319
320e116xt_device::e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
321   : hyperstone_device(mconfig, "E1-16XT", tag, owner, clock, E116XT, 16, 16, ADDRESS_MAP_NAME(e116_8k_iram_map))
322{
323}
324
325
326//-------------------------------------------------
327//  e116xs_device - constructor
328//-------------------------------------------------
329
330e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
331   : hyperstone_device(mconfig, "E1-16XS", tag, owner, clock, E116XS, 16, 16, ADDRESS_MAP_NAME(e116_16k_iram_map))
332{
333}
334
335
336//-------------------------------------------------
337//  e116xsr_device - constructor
338//-------------------------------------------------
339
340e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
341   : hyperstone_device(mconfig, "E1-16XSR", tag, owner, clock, E116XT, 16, 16, ADDRESS_MAP_NAME(e116_16k_iram_map))
342{
343}
344
345
346//-------------------------------------------------
347//  e132n_device - constructor
348//-------------------------------------------------
349
350e132n_device::e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
351   : hyperstone_device(mconfig, "E1-32N", tag, owner, clock, E132N, 32, 32, ADDRESS_MAP_NAME(e132_4k_iram_map))
352{
353}
354
355
356//-------------------------------------------------
357//  e132t_device - constructor
358//-------------------------------------------------
359
360e132t_device::e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
361   : hyperstone_device(mconfig, "E1-32T", tag, owner, clock, E132T, 32, 32, ADDRESS_MAP_NAME(e132_4k_iram_map))
362{
363}
364
365
366//-------------------------------------------------
367//  e132xn_device - constructor
368//-------------------------------------------------
369
370e132xn_device::e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
371   : hyperstone_device(mconfig, "E1-32XN", tag, owner, clock, E132XN, 32, 32, ADDRESS_MAP_NAME(e132_8k_iram_map))
372{
373}
374
375
376//-------------------------------------------------
377//  e132xt_device - constructor
378//-------------------------------------------------
379
380e132xt_device::e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
381   : hyperstone_device(mconfig, "E1-32XT", tag, owner, clock, E132XT, 32, 32, ADDRESS_MAP_NAME(e132_8k_iram_map))
382{
383}
384
385
386//-------------------------------------------------
387//  e132xs_device - constructor
388//-------------------------------------------------
389
390e132xs_device::e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
391   : hyperstone_device(mconfig, "E1-32XS", tag, owner, clock, E132XS, 32, 32, ADDRESS_MAP_NAME(e132_16k_iram_map))
392{
393}
394
395
396//-------------------------------------------------
397//  e132xsr_device - constructor
398//-------------------------------------------------
399
400e132xsr_device::e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
401   : hyperstone_device(mconfig, "E1-32XSR", tag, owner, clock, E132XSR, 32, 32, ADDRESS_MAP_NAME(e132_16k_iram_map))
402{
403}
404
405
406//-------------------------------------------------
407//  gms30c2116_device - constructor
408//-------------------------------------------------
409
410gms30c2116_device::gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
411   : hyperstone_device(mconfig, "GMS30C2116", tag, owner, clock, GMS30C2116, 16, 16, ADDRESS_MAP_NAME(e116_4k_iram_map))
412{
413}
414
415
416//-------------------------------------------------
417//  gms30c2132_device - constructor
418//-------------------------------------------------
419
420gms30c2132_device::gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
421   : hyperstone_device(mconfig, "GMS30C2132", tag, owner, clock, GMS30C2132, 32, 32, ADDRESS_MAP_NAME(e132_4k_iram_map))
422{
423}
424
425
426//-------------------------------------------------
427//  gms30c2216_device - constructor
428//-------------------------------------------------
429
430gms30c2216_device::gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
431   : hyperstone_device(mconfig, "GMS30C2216", tag, owner, clock, GMS30C2216, 16, 16, ADDRESS_MAP_NAME(e116_8k_iram_map))
432{
433}
434
435
436//-------------------------------------------------
437//  gms30c2232_device - constructor
438//-------------------------------------------------
439
440gms30c2232_device::gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
441   : hyperstone_device(mconfig, "GMS30C2232", tag, owner, clock, GMS30C2232, 32, 32, ADDRESS_MAP_NAME(e132_8k_iram_map))
442{
443}
444
445436/* Return the entry point for a determinated trap */
446UINT32 hyperstone_device::get_trap_addr(UINT8 trapno)
437static UINT32 get_trap_addr(hyperstone_state *cpustate, UINT8 trapno)
447438{
448439   UINT32 addr;
449   if( m_trap_entry == 0xffffff00 ) /* @ MEM3 */
440   if( cpustate->trap_entry == 0xffffff00 ) /* @ MEM3 */
450441   {
451442      addr = trapno * 4;
452443   }
r19871r19872
454445   {
455446      addr = (63 - trapno) * 4;
456447   }
457   addr |= m_trap_entry;
448   addr |= cpustate->trap_entry;
458449
459450   return addr;
460451}
461452
462453/* Return the entry point for a determinated emulated code (the one for "extend" opcode is reserved) */
463UINT32 hyperstone_device::get_emu_code_addr(UINT8 num) /* num is OP */
454static UINT32 get_emu_code_addr(hyperstone_state *cpustate, UINT8 num) /* num is OP */
464455{
465456   UINT32 addr;
466   if( m_trap_entry == 0xffffff00 ) /* @ MEM3 */
457   if( cpustate->trap_entry == 0xffffff00 ) /* @ MEM3 */
467458   {
468      addr = (m_trap_entry - 0x100) | ((num & 0xf) << 4);
459      addr = (cpustate->trap_entry - 0x100) | ((num & 0xf) << 4);
469460   }
470461   else
471462   {
472      addr = m_trap_entry | (0x10c | ((0xcf - num) << 4));
463      addr = cpustate->trap_entry | (0x10c | ((0xcf - num) << 4));
473464   }
474465   return addr;
475466}
476467
477void hyperstone_device::hyperstone_set_trap_entry(int which)
468static void hyperstone_set_trap_entry(hyperstone_state *cpustate, int which)
478469{
479470   switch( which )
480471   {
481472      case E132XS_ENTRY_MEM0:
482         m_trap_entry = 0x00000000;
473         cpustate->trap_entry = 0x00000000;
483474         break;
484475
485476      case E132XS_ENTRY_MEM1:
486         m_trap_entry = 0x40000000;
477         cpustate->trap_entry = 0x40000000;
487478         break;
488479
489480      case E132XS_ENTRY_MEM2:
490         m_trap_entry = 0x80000000;
481         cpustate->trap_entry = 0x80000000;
491482         break;
492483
493484      case E132XS_ENTRY_MEM3:
494         m_trap_entry = 0xffffff00;
485         cpustate->trap_entry = 0xffffff00;
495486         break;
496487
497488      case E132XS_ENTRY_IRAM:
498         m_trap_entry = 0xc0000000;
489         cpustate->trap_entry = 0xc0000000;
499490         break;
500491
501492      default:
r19871r19872
504495   }
505496}
506497
507#define OP           m_op
508#define PPC            m_ppc //previous pc
509#define PC            m_global_regs[0] //Program Counter
510#define SR            m_global_regs[1] //Status Register
511#define FER            m_global_regs[2] //Floating-Point Exception Register
498#define OP           cpustate->op
499#define PPC            cpustate->ppc //previous pc
500#define PC            cpustate->global_regs[0] //Program Counter
501#define SR            cpustate->global_regs[1] //Status Register
502#define FER            cpustate->global_regs[2] //Floating-Point Exception Register
512503// 03 - 15  General Purpose Registers
513504// 16 - 17  Reserved
514#define SP            m_global_regs[18] //Stack Pointer
515#define UB            m_global_regs[19] //Upper Stack Bound
516#define BCR            m_global_regs[20] //Bus Control Register
517#define TPR            m_global_regs[21] //Timer Prescaler Register
518#define TCR            m_global_regs[22] //Timer Compare Register
519#define TR            compute_tr() //Timer Register
520#define WCR            m_global_regs[24] //Watchdog Compare Register
521#define ISR            m_global_regs[25] //Input Status Register
522#define FCR            m_global_regs[26] //Function Control Register
523#define MCR            m_global_regs[27] //Memory Control Register
505#define SP            cpustate->global_regs[18] //Stack Pointer
506#define UB            cpustate->global_regs[19] //Upper Stack Bound
507#define BCR            cpustate->global_regs[20] //Bus Control Register
508#define TPR            cpustate->global_regs[21] //Timer Prescaler Register
509#define TCR            cpustate->global_regs[22] //Timer Compare Register
510#define TR            compute_tr(cpustate) //Timer Register
511#define WCR            cpustate->global_regs[24] //Watchdog Compare Register
512#define ISR            cpustate->global_regs[25] //Input Status Register
513#define FCR            cpustate->global_regs[26] //Function Control Register
514#define MCR            cpustate->global_regs[27] //Memory Control Register
524515// 28 - 31  Reserved
525516
526517/* SR flags */
r19871r19872
580571//the user program can only changes the above 2 flags
581572
582573
583UINT32 hyperstone_device::compute_tr()
574
575
576static UINT32 compute_tr(hyperstone_state *cpustate)
584577{
585   UINT64 cycles_since_base = total_cycles() - m_tr_base_cycles;
586   UINT64 clocks_since_base = cycles_since_base >> m_clock_scale;
587   return m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
578   UINT64 cycles_since_base = cpustate->device->total_cycles() - cpustate->tr_base_cycles;
579   UINT64 clocks_since_base = cycles_since_base >> cpustate->clock_scale;
580   return cpustate->tr_base_value + (clocks_since_base / cpustate->tr_clocks_per_tick);
588581}
589582
590void hyperstone_device::update_timer_prescale()
583static void update_timer_prescale(hyperstone_state *cpustate)
591584{
592   UINT32 prevtr = compute_tr();
585   UINT32 prevtr = compute_tr(cpustate);
593586   TPR &= ~0x80000000;
594   m_clock_scale = (TPR >> 26) & m_clock_scale_mask;
595   m_clock_cycles_1 = 1 << m_clock_scale;
596   m_clock_cycles_2 = 2 << m_clock_scale;
597   m_clock_cycles_4 = 4 << m_clock_scale;
598   m_clock_cycles_6 = 6 << m_clock_scale;
599   m_tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2;
600   m_tr_base_value = prevtr;
601   m_tr_base_cycles = total_cycles();
587   cpustate->clock_scale = (TPR >> 26) & cpustate->clock_scale_mask;
588   cpustate->clock_cycles_1 = 1 << cpustate->clock_scale;
589   cpustate->clock_cycles_2 = 2 << cpustate->clock_scale;
590   cpustate->clock_cycles_4 = 4 << cpustate->clock_scale;
591   cpustate->clock_cycles_6 = 6 << cpustate->clock_scale;
592   cpustate->tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2;
593   cpustate->tr_base_value = prevtr;
594   cpustate->tr_base_cycles = cpustate->device->total_cycles();
602595}
603596
604void hyperstone_device::adjust_timer_interrupt()
597static void adjust_timer_interrupt(hyperstone_state *cpustate)
605598{
606   UINT64 cycles_since_base = total_cycles() - m_tr_base_cycles;
607   UINT64 clocks_since_base = cycles_since_base >> m_clock_scale;
608   UINT64 cycles_until_next_clock = cycles_since_base - (clocks_since_base << m_clock_scale);
599   UINT64 cycles_since_base = cpustate->device->total_cycles() - cpustate->tr_base_cycles;
600   UINT64 clocks_since_base = cycles_since_base >> cpustate->clock_scale;
601   UINT64 cycles_until_next_clock = cycles_since_base - (clocks_since_base << cpustate->clock_scale);
609602
610603   if (cycles_until_next_clock == 0)
611      cycles_until_next_clock = (UINT64)(1 << m_clock_scale);
604      cycles_until_next_clock = (UINT64)(1 << cpustate->clock_scale);
612605
613606   /* special case: if we have a change pending, set a timer to fire then */
614607   if (TPR & 0x80000000)
615608   {
616      UINT64 clocks_until_int = m_tr_clocks_per_tick - (clocks_since_base % m_tr_clocks_per_tick);
617      UINT64 cycles_until_int = (clocks_until_int << m_clock_scale) + cycles_until_next_clock;
618      m_timer->adjust(cycles_to_attotime(cycles_until_int + 1), 1);
609      UINT64 clocks_until_int = cpustate->tr_clocks_per_tick - (clocks_since_base % cpustate->tr_clocks_per_tick);
610      UINT64 cycles_until_int = (clocks_until_int << cpustate->clock_scale) + cycles_until_next_clock;
611      cpustate->timer->adjust(cpustate->device->cycles_to_attotime(cycles_until_int + 1), 1);
619612   }
620613
621614   /* else if the timer interrupt is enabled, configure it to fire at the appropriate time */
622615   else if (!(FCR & 0x00800000))
623616   {
624      UINT32 curtr = m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
617      UINT32 curtr = cpustate->tr_base_value + (clocks_since_base / cpustate->tr_clocks_per_tick);
625618      UINT32 delta = TCR - curtr;
626619      if (delta > 0x80000000)
627620      {
628         if (!m_timer_int_pending)
629            m_timer->adjust(attotime::zero);
621         if (!cpustate->timer_int_pending)
622            cpustate->timer->adjust(attotime::zero);
630623      }
631624      else
632625      {
633         UINT64 clocks_until_int = mulu_32x32(delta, m_tr_clocks_per_tick);
634         UINT64 cycles_until_int = (clocks_until_int << m_clock_scale) + cycles_until_next_clock;
635         m_timer->adjust(cycles_to_attotime(cycles_until_int));
626         UINT64 clocks_until_int = mulu_32x32(delta, cpustate->tr_clocks_per_tick);
627         UINT64 cycles_until_int = (clocks_until_int << cpustate->clock_scale) + cycles_until_next_clock;
628         cpustate->timer->adjust(cpustate->device->cycles_to_attotime(cycles_until_int));
636629      }
637630   }
638631
639632   /* otherwise, disable the timer */
640633   else
641      m_timer->adjust(attotime::never);
634      cpustate->timer->adjust(attotime::never);
642635}
643636
644TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback )
637static TIMER_CALLBACK( e132xs_timer_callback )
645638{
639   legacy_cpu_device *device = (legacy_cpu_device *)ptr;
640   hyperstone_state *cpustate = get_safe_token(device);
646641   int update = param;
647642
648643   /* update the values if necessary */
649644   if (update)
650      update_timer_prescale();
645      update_timer_prescale(cpustate);
651646
652647   /* see if the timer is right for firing */
653   if (!((compute_tr() - TCR) & 0x80000000))
654      m_timer_int_pending = 1;
648   if (!((compute_tr(cpustate) - TCR) & 0x80000000))
649      cpustate->timer_int_pending = 1;
655650
656651   /* adjust ourselves for the next time */
657652   else
658      adjust_timer_interrupt();
653      adjust_timer_interrupt(cpustate);
659654}
660655
661656
662657
663658
664UINT32 hyperstone_device::get_global_register(UINT8 code)
659static UINT32 get_global_register(hyperstone_state *cpustate, UINT8 code)
665660{
666661/*
667662    if( code >= 16 )
r19871r19872
698693   if (code == TR_REGISTER)
699694   {
700695      /* it is common to poll this in a loop */
701      if (m_icount > m_tr_clocks_per_tick / 2)
702         m_icount -= m_tr_clocks_per_tick / 2;
703      return compute_tr();
696      if (cpustate->icount > cpustate->tr_clocks_per_tick / 2)
697         cpustate->icount -= cpustate->tr_clocks_per_tick / 2;
698      return compute_tr(cpustate);
704699   }
705   return m_global_regs[code];
700   return cpustate->global_regs[code];
706701}
707702
708void hyperstone_device::set_local_register(UINT8 code, UINT32 val)
703INLINE void set_global_register(hyperstone_state *cpustate, UINT8 code, UINT32 val)
709704{
710   UINT8 new_code = (code + GET_FP) % 64;
711
712   m_local_regs[new_code] = val;
713}
714
715void hyperstone_device::set_global_register(UINT8 code, UINT32 val)
716{
717705   //TODO: add correct FER set instruction
718706
719707   if( code == PC_REGISTER )
r19871r19872
724712   {
725713      SET_LOW_SR(val); // only a RET instruction can change the full content of SR
726714      SR &= ~0x40; //reserved bit 6 always zero
727      if (m_intblock < 1)
728         m_intblock = 1;
715      if (cpustate->intblock < 1)
716         cpustate->intblock = 1;
729717   }
730718   else
731719   {
732      UINT32 oldval = m_global_regs[code];
720      UINT32 oldval = cpustate->global_regs[code];
733721      if( code != ISR_REGISTER )
734         m_global_regs[code] = val;
722         cpustate->global_regs[code] = val;
735723      else
736724         DEBUG_PRINTF(("Written to ISR register. PC = %08X\n", PC));
737725
r19871r19872
777765                break;
778766*/
779767         case TR_REGISTER:
780            m_tr_base_value = val;
781            m_tr_base_cycles = total_cycles();
782            adjust_timer_interrupt();
768            cpustate->tr_base_value = val;
769            cpustate->tr_base_cycles = cpustate->device->total_cycles();
770            adjust_timer_interrupt(cpustate);
783771            break;
784772
785773         case TPR_REGISTER:
786774            if (!(val & 0x80000000)) /* change immediately */
787               update_timer_prescale();
788            adjust_timer_interrupt();
775               update_timer_prescale(cpustate);
776            adjust_timer_interrupt(cpustate);
789777            break;
790778
791779            case TCR_REGISTER:
792780               if (oldval != val)
793781               {
794               adjust_timer_interrupt();
795               if (m_intblock < 1)
796                  m_intblock = 1;
782               adjust_timer_interrupt(cpustate);
783               if (cpustate->intblock < 1)
784                  cpustate->intblock = 1;
797785            }
798786                break;
799787
800788            case FCR_REGISTER:
801789               if ((oldval ^ val) & 0x00800000)
802               adjust_timer_interrupt();
803            if (m_intblock < 1)
804               m_intblock = 1;
790               adjust_timer_interrupt(cpustate);
791            if (cpustate->intblock < 1)
792               cpustate->intblock = 1;
805793                break;
806794
807795         case MCR_REGISTER:
808796            // bits 14..12 EntryTableMap
809            hyperstone_set_trap_entry((val & 0x7000) >> 12);
797            hyperstone_set_trap_entry(cpustate, (val & 0x7000) >> 12);
810798            break;
811799         }
812800      }
813801   }
814802}
815803
816#define GET_ABS_L_REG(code)         m_local_regs[code]
817#define SET_L_REG(code, val)       set_local_register(code, val)
818#define SET_ABS_L_REG(code, val)   m_local_regs[code] = val
819#define GET_G_REG(code)            get_global_register(code)
820#define SET_G_REG(code, val)       set_global_register(code, val)
804INLINE void set_local_register(hyperstone_state *cpustate, UINT8 code, UINT32 val)
805{
806   UINT8 new_code = (code + GET_FP) % 64;
821807
808   cpustate->local_regs[new_code] = val;
809}
810
811#define GET_ABS_L_REG(code)         cpustate->local_regs[code]
812#define SET_L_REG(code, val)       set_local_register(cpustate, code, val)
813#define SET_ABS_L_REG(code, val)   cpustate->local_regs[code] = val
814#define GET_G_REG(code)            get_global_register(cpustate, code)
815#define SET_G_REG(code, val)       set_global_register(cpustate, code, val)
816
822817#define S_BIT               ((OP & 0x100) >> 8)
823818#define N_BIT               S_BIT
824819#define D_BIT               ((OP & 0x200) >> 9)
r19871r19872
847842      UINT8 code = (decode)->src;                                       \
848843      (decode)->src_is_local = 1;                                       \
849844      code = ((decode)->src + GET_FP) % 64; /* registers offset by frame pointer  */\
850      SREG = m_local_regs[code];                                       \
845      SREG = cpustate->local_regs[code];                                 \
851846      code = ((decode)->src + 1 + GET_FP) % 64;                           \
852      SREGF = m_local_regs[code];                                       \
847      SREGF = cpustate->local_regs[code];                              \
853848   }                                                            \
854849   else                                                         \
855850   {                                                            \
r19871r19872
857852                                                               \
858853      if (!hflag)                                                   \
859854      {                                                         \
860         SREG = get_global_register((decode)->src);                        \
855         SREG = get_global_register(cpustate, (decode)->src);                        \
861856                                                               \
862857         /* bound safe */                                          \
863858         if ((decode)->src != 15)                                    \
864            SREGF = get_global_register((decode)->src + 1);                  \
859            SREGF = get_global_register(cpustate, (decode)->src + 1);                  \
865860      }                                                         \
866861      else                                                      \
867862      {                                                         \
868863         (decode)->src += 16;                                       \
869864                                                               \
870         SREG = get_global_register((decode)->src);                        \
865         SREG = get_global_register(cpustate, (decode)->src);                        \
871866         if ((WRITE_ONLY_REGMASK >> (decode)->src) & 1)                     \
872867            SREG = 0; /* write-only registers */                        \
873868         else if ((decode)->src == ISR_REGISTER)                           \
r19871r19872
875870                                                               \
876871         /* bound safe */                                          \
877872         if ((decode)->src != 31)                                    \
878            SREGF = get_global_register((decode)->src + 1);                  \
873            SREGF = get_global_register(cpustate, (decode)->src + 1);                  \
879874      }                                                         \
880875   }                                                            \
881876} while (0)
r19871r19872
888883      UINT8 code = (decode)->dst;                                       \
889884      (decode)->dst_is_local = 1;                                       \
890885      code = ((decode)->dst + GET_FP) % 64; /* registers offset by frame pointer */\
891      DREG = m_local_regs[code];                                       \
886      DREG = cpustate->local_regs[code];                                 \
892887      code = ((decode)->dst + 1 + GET_FP) % 64;                           \
893      DREGF = m_local_regs[code];                                       \
888      DREGF = cpustate->local_regs[code];                              \
894889   }                                                            \
895890   else                                                         \
896891   {                                                            \
r19871r19872
898893                                                               \
899894      if (!hflag)                                                   \
900895      {                                                         \
901         DREG = get_global_register((decode)->dst);                        \
896         DREG = get_global_register(cpustate, (decode)->dst);                        \
902897                                                               \
903898         /* bound safe */                                          \
904899         if ((decode)->dst != 15)                                    \
905            DREGF = get_global_register((decode)->dst + 1);                  \
900            DREGF = get_global_register(cpustate, (decode)->dst + 1);                  \
906901      }                                                         \
907902      else                                                      \
908903      {                                                         \
909904         (decode)->dst += 16;                                       \
910905                                                               \
911         DREG = get_global_register((decode)->dst);                        \
906         DREG = get_global_register(cpustate, (decode)->dst);                        \
912907         if( (decode)->dst == ISR_REGISTER )                              \
913908            DEBUG_PRINTF(("read dst ISR. PC = %08X\n",PPC));               \
914909                                                               \
915910         /* bound safe */                                          \
916911         if ((decode)->dst != 31)                                    \
917            DREGF = get_global_register((decode)->dst + 1);                  \
912            DREGF = get_global_register(cpustate, (decode)->dst + 1);                  \
918913      }                                                         \
919914   }                                                            \
920915} while (0)
r19871r19872
979974do                                                               \
980975{                                                               \
981976   /* if PC is used in a delay instruction, the delayed PC should be used */      \
982   if( m_delay.delay_cmd == DELAY_EXECUTE )                              \
977   if( cpustate->delay.delay_cmd == DELAY_EXECUTE )                        \
983978   {                                                            \
984      PC = m_delay.delay_pc;                                          \
985      m_delay.delay_cmd = NO_DELAY;                                    \
979      PC = cpustate->delay.delay_pc;                                    \
980      cpustate->delay.delay_cmd = NO_DELAY;                              \
986981   }                                                            \
987982} while (0)
988983
r19871r19872
999994            break;                                                \
1000995                                                               \
1001996         case 1:                                                   \
1002            m_instruction_length = 3;                                 \
1003            EXTRA_U = (READ_OP(PC) << 16) | READ_OP(PC + 2);               \
997            cpustate->instruction_length = 3;                           \
998            EXTRA_U = (READ_OP(cpustate, PC) << 16) | READ_OP(cpustate, PC + 2);\
1004999            PC += 4;                                             \
10051000            break;                                                \
10061001                                                               \
10071002         case 2:                                                   \
1008            m_instruction_length = 2;                                 \
1009            EXTRA_U = READ_OP(PC);                                    \
1003            cpustate->instruction_length = 2;                           \
1004            EXTRA_U = READ_OP(cpustate, PC);                           \
10101005            PC += 2;                                             \
10111006            break;                                                \
10121007                                                               \
10131008         case 3:                                                   \
1014            m_instruction_length = 2;                                 \
1015            EXTRA_U = 0xffff0000 | READ_OP(PC);                           \
1009            cpustate->instruction_length = 2;                           \
1010            EXTRA_U = 0xffff0000 | READ_OP(cpustate, PC);                  \
10161011            PC += 2;                                             \
10171012            break;                                                \
10181013      }                                                         \
r19871r19872
10211016#define decode_const(decode)                                          \
10221017do                                                               \
10231018{                                                               \
1024   UINT16 imm_1 = READ_OP(PC);                                          \
1019   UINT16 imm_1 = READ_OP(cpustate, PC);                                 \
10251020                                                               \
10261021   PC += 2;                                                      \
1027   m_instruction_length = 2;                                          \
1022   cpustate->instruction_length = 2;                                    \
10281023                                                               \
10291024   if( E_BIT(imm_1) )                                                \
10301025   {                                                            \
1031      UINT16 imm_2 = READ_OP(PC);                                       \
1026      UINT16 imm_2 = READ_OP(cpustate, PC);                              \
10321027                                                               \
10331028      PC += 2;                                                   \
1034      m_instruction_length = 3;                                       \
1029      cpustate->instruction_length = 3;                                 \
10351030                                                               \
10361031      EXTRA_S = imm_2;                                             \
10371032      EXTRA_S |= ((imm_1 & 0x3fff) << 16);                              \
r19871r19872
10571052{                                                               \
10581053   if( OP & 0x80 )                                                   \
10591054   {                                                            \
1060      UINT16 next = READ_OP(PC);                                       \
1055      UINT16 next = READ_OP(cpustate, PC);                              \
10611056                                                               \
10621057      PC += 2;                                                   \
1063      m_instruction_length = 2;                                       \
1058      cpustate->instruction_length = 2;                                 \
10641059                                                               \
10651060      EXTRA_S = (OP & 0x7f) << 16;                                    \
10661061      EXTRA_S |= (next & 0xfffe);                                       \
r19871r19872
10801075#define decode_dis(decode)                                             \
10811076do                                                               \
10821077{                                                               \
1083   UINT16 next_1 = READ_OP(PC);                                       \
1078   UINT16 next_1 = READ_OP(cpustate, PC);                                 \
10841079                                                               \
10851080   PC += 2;                                                      \
1086   m_instruction_length = 2;                                          \
1081   cpustate->instruction_length = 2;                                    \
10871082                                                               \
10881083   (decode)->sub_type = DD(next_1);                                    \
10891084                                                               \
10901085   if( E_BIT(next_1) )                                                \
10911086   {                                                            \
1092      UINT16 next_2 = READ_OP(PC);                                    \
1087      UINT16 next_2 = READ_OP(cpustate, PC);                              \
10931088                                                               \
10941089      PC += 2;                                                   \
1095      m_instruction_length = 3;                                       \
1090      cpustate->instruction_length = 3;                                 \
10961091                                                               \
10971092      EXTRA_S = next_2;                                             \
10981093      EXTRA_S |= ((next_1 & 0xfff) << 16);                              \
r19871r19872
11161111#define decode_lim(decode)                                             \
11171112do                                                               \
11181113{                                                               \
1119   UINT32 next = READ_OP(PC);                                          \
1114   UINT32 next = READ_OP(cpustate, PC);                                 \
11201115   PC += 2;                                                      \
1121   m_instruction_length = 2;                                          \
1116   cpustate->instruction_length = 2;                                    \
11221117                                                               \
11231118   (decode)->sub_type = X_CODE(next);                                    \
11241119                                                               \
11251120   if( E_BIT(next) )                                                \
11261121   {                                                            \
1127      EXTRA_U = ((next & 0xfff) << 16) | READ_OP(PC);                        \
1122      EXTRA_U = ((next & 0xfff) << 16) | READ_OP(cpustate, PC);               \
11281123      PC += 2;                                                   \
1129      m_instruction_length = 3;                                       \
1124      cpustate->instruction_length = 3;                                 \
11301125   }                                                            \
11311126   else                                                         \
11321127   {                                                            \
r19871r19872
12231218#define LLextdecode(decode)                                             \
12241219do                                                               \
12251220{                                                               \
1226   m_instruction_length = 2;                                          \
1227   EXTRA_U = READ_OP(PC);                                             \
1221   cpustate->instruction_length = 2;                                    \
1222   EXTRA_U = READ_OP(cpustate, PC);                                    \
12281223   PC += 2;                                                      \
12291224   check_delay_PC();                                                \
12301225   decode_LL(decode);                                                \
r19871r19872
12641259} while (0)
12651260
12661261
1267void hyperstone_device::execute_br(struct hyperstone_device::regs_decode *decode)
1262INLINE void execute_br(hyperstone_state *cpustate, struct regs_decode *decode)
12681263{
12691264   PPC = PC;
12701265   PC += EXTRA_S;
12711266   SET_M(0);
12721267
1273   m_icount -= m_clock_cycles_2;
1268   cpustate->icount -= cpustate->clock_cycles_2;
12741269}
12751270
1276void hyperstone_device::execute_dbr(struct hyperstone_device::regs_decode *decode)
1271INLINE void execute_dbr(hyperstone_state *cpustate, struct regs_decode *decode)
12771272{
1278   m_delay.delay_cmd = DELAY_EXECUTE;
1279   m_delay.delay_pc  = PC + EXTRA_S;
1273   cpustate->delay.delay_cmd = DELAY_EXECUTE;
1274   cpustate->delay.delay_pc  = PC + EXTRA_S;
12801275
1281   m_intblock = 3;
1276   cpustate->intblock = 3;
12821277}
12831278
12841279
1285void hyperstone_device::execute_trap(UINT32 addr)
1280static void execute_trap(hyperstone_state *cpustate, UINT32 addr)
12861281{
12871282   UINT8 reg;
12881283   UINT32 oldSR;
12891284   reg = GET_FP + GET_FL;
12901285
1291   SET_ILC(m_instruction_length & 3);
1286   SET_ILC(cpustate->instruction_length & 3);
12921287
12931288   oldSR = SR;
12941289
r19871r19872
13061301   PPC = PC;
13071302   PC = addr;
13081303
1309   m_icount -= m_clock_cycles_2;
1304   cpustate->icount -= cpustate->clock_cycles_2;
13101305}
13111306
13121307
1313void hyperstone_device::execute_int(UINT32 addr)
1308static void execute_int(hyperstone_state *cpustate, UINT32 addr)
13141309{
13151310   UINT8 reg;
13161311   UINT32 oldSR;
13171312   reg = GET_FP + GET_FL;
13181313
1319   SET_ILC(m_instruction_length & 3);
1314   SET_ILC(cpustate->instruction_length & 3);
13201315
13211316   oldSR = SR;
13221317
r19871r19872
13351330   PPC = PC;
13361331   PC = addr;
13371332
1338   m_icount -= m_clock_cycles_2;
1333   cpustate->icount -= cpustate->clock_cycles_2;
13391334}
13401335
13411336/* TODO: mask Parity Error and Extended Overflow exceptions */
1342void hyperstone_device::execute_exception(UINT32 addr)
1337static void execute_exception(hyperstone_state *cpustate, UINT32 addr)
13431338{
13441339   UINT8 reg;
13451340   UINT32 oldSR;
13461341   reg = GET_FP + GET_FL;
13471342
1348   SET_ILC(m_instruction_length & 3);
1343   SET_ILC(cpustate->instruction_length & 3);
13491344
13501345   oldSR = SR;
13511346
r19871r19872
13641359   PC = addr;
13651360
13661361   DEBUG_PRINTF(("EXCEPTION! PPC = %08X PC = %08X\n",PPC-2,PC-2));
1367   m_icount -= m_clock_cycles_2;
1362   cpustate->icount -= cpustate->clock_cycles_2;
13681363}
13691364
1370void hyperstone_device::execute_software(struct hyperstone_device::regs_decode *decode)
1365static void execute_software(hyperstone_state *cpustate, struct regs_decode *decode)
13711366{
13721367   UINT8 reg;
13731368   UINT32 oldSR;
r19871r19872
13761371
13771372   SET_ILC(1);
13781373
1379   addr = get_emu_code_addr((OP & 0xff00) >> 8);
1374   addr = get_emu_code_addr(cpustate, (OP & 0xff00) >> 8);
13801375   reg = GET_FP + GET_FL;
13811376
13821377   //since it's sure the register is in the register part of the stack,
r19871r19872
14241419#define IO2_LINE_STATE      ((ISR >> 5) & 1)
14251420#define IO3_LINE_STATE      ((ISR >> 6) & 1)
14261421
1427void hyperstone_device::check_interrupts()
1422static void check_interrupts(hyperstone_state *cpustate)
14281423{
14291424   /* Interrupt-Lock flag isn't set */
1430   if (GET_L || m_intblock > 0)
1425   if (GET_L || cpustate->intblock > 0)
14311426      return;
14321427
14331428   /* quick exit if nothing */
1434   if (!m_timer_int_pending && (ISR & 0x7f) == 0)
1429   if (!cpustate->timer_int_pending && (ISR & 0x7f) == 0)
14351430      return;
14361431
14371432   /* IO3 is priority 5; state is in bit 6 of ISR; FCR bit 10 enables input and FCR bit 8 inhibits interrupt */
14381433   if (IO3_LINE_STATE && (FCR & 0x00000500) == 0x00000400)
14391434   {
1440      execute_int(get_trap_addr(TRAPNO_IO3));
1441      standard_irq_callback(IRQ_IO3);
1435      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_IO3));
1436      (*cpustate->irq_callback)(cpustate->device, IRQ_IO3);
14421437      return;
14431438   }
14441439
14451440   /* timer int might be priority 6 if FCR bits 20-21 == 3; FCR bit 23 inhibits interrupt */
1446   if (m_timer_int_pending && (FCR & 0x00b00000) == 0x00300000)
1441   if (cpustate->timer_int_pending && (FCR & 0x00b00000) == 0x00300000)
14471442   {
1448      m_timer_int_pending = 0;
1449      execute_int(get_trap_addr(TRAPNO_TIMER));
1443      cpustate->timer_int_pending = 0;
1444      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_TIMER));
14501445      return;
14511446   }
14521447
14531448   /* INT1 is priority 7; state is in bit 0 of ISR; FCR bit 28 inhibits interrupt */
14541449   if (INT1_LINE_STATE && (FCR & 0x10000000) == 0x00000000)
14551450   {
1456      execute_int(get_trap_addr(TRAPNO_INT1));
1457      standard_irq_callback(IRQ_INT1);
1451      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_INT1));
1452      (*cpustate->irq_callback)(cpustate->device, IRQ_INT1);
14581453      return;
14591454   }
14601455
14611456   /* timer int might be priority 8 if FCR bits 20-21 == 2; FCR bit 23 inhibits interrupt */
1462   if (m_timer_int_pending && (FCR & 0x00b00000) == 0x00200000)
1457   if (cpustate->timer_int_pending && (FCR & 0x00b00000) == 0x00200000)
14631458   {
1464      m_timer_int_pending = 0;
1465      execute_int(get_trap_addr(TRAPNO_TIMER));
1459      cpustate->timer_int_pending = 0;
1460      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_TIMER));
14661461      return;
14671462   }
14681463
14691464   /* INT2 is priority 9; state is in bit 1 of ISR; FCR bit 29 inhibits interrupt */
14701465   if (INT2_LINE_STATE && (FCR & 0x20000000) == 0x00000000)
14711466   {
1472      execute_int(get_trap_addr(TRAPNO_INT2));
1473      standard_irq_callback(IRQ_INT2);
1467      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_INT2));
1468      (*cpustate->irq_callback)(cpustate->device, IRQ_INT2);
14741469      return;
14751470   }
14761471
14771472   /* timer int might be priority 10 if FCR bits 20-21 == 1; FCR bit 23 inhibits interrupt */
1478   if (m_timer_int_pending && (FCR & 0x00b00000) == 0x00100000)
1473   if (cpustate->timer_int_pending && (FCR & 0x00b00000) == 0x00100000)
14791474   {
1480      m_timer_int_pending = 0;
1481      execute_int(get_trap_addr(TRAPNO_TIMER));
1475      cpustate->timer_int_pending = 0;
1476      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_TIMER));
14821477      return;
14831478   }
14841479
14851480   /* INT3 is priority 11; state is in bit 2 of ISR; FCR bit 30 inhibits interrupt */
14861481   if (INT3_LINE_STATE && (FCR & 0x40000000) == 0x00000000)
14871482   {
1488      execute_int(get_trap_addr(TRAPNO_INT3));
1489      standard_irq_callback(IRQ_INT3);
1483      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_INT3));
1484      (*cpustate->irq_callback)(cpustate->device, IRQ_INT3);
14901485      return;
14911486   }
14921487
14931488   /* timer int might be priority 12 if FCR bits 20-21 == 0; FCR bit 23 inhibits interrupt */
1494   if (m_timer_int_pending && (FCR & 0x00b00000) == 0x00000000)
1489   if (cpustate->timer_int_pending && (FCR & 0x00b00000) == 0x00000000)
14951490   {
1496      m_timer_int_pending = 0;
1497      execute_int(get_trap_addr(TRAPNO_TIMER));
1491      cpustate->timer_int_pending = 0;
1492      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_TIMER));
14981493      return;
14991494   }
15001495
15011496   /* INT4 is priority 13; state is in bit 3 of ISR; FCR bit 31 inhibits interrupt */
15021497   if (INT4_LINE_STATE && (FCR & 0x80000000) == 0x00000000)
15031498   {
1504      execute_int(get_trap_addr(TRAPNO_INT4));
1505      standard_irq_callback(IRQ_INT4);
1499      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_INT4));
1500      (*cpustate->irq_callback)(cpustate->device, IRQ_INT4);
15061501      return;
15071502   }
15081503
15091504   /* IO1 is priority 14; state is in bit 4 of ISR; FCR bit 2 enables input and FCR bit 0 inhibits interrupt */
15101505   if (IO1_LINE_STATE && (FCR & 0x00000005) == 0x00000004)
15111506   {
1512      execute_int(get_trap_addr(TRAPNO_IO1));
1513      standard_irq_callback(IRQ_IO1);
1507      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_IO1));
1508      (*cpustate->irq_callback)(cpustate->device, IRQ_IO1);
15141509      return;
15151510   }
15161511
15171512   /* IO2 is priority 15; state is in bit 5 of ISR; FCR bit 6 enables input and FCR bit 4 inhibits interrupt */
15181513   if (IO2_LINE_STATE && (FCR & 0x00000050) == 0x00000040)
15191514   {
1520      execute_int(get_trap_addr(TRAPNO_IO2));
1521      standard_irq_callback(IRQ_IO2);
1515      execute_int(cpustate, get_trap_addr(cpustate, TRAPNO_IO2));
1516      (*cpustate->irq_callback)(cpustate->device, IRQ_IO2);
15221517      return;
15231518   }
15241519}
15251520
1526void hyperstone_device::device_start()
1521static void set_irq_line(hyperstone_state *cpustate, int irqline, int state)
15271522{
1528   // Handled entirely by init() and derived classes
1523   if (state)
1524      ISR |= 1 << irqline;
1525   else
1526      ISR &= ~(1 << irqline);
15291527}
15301528
1531void hyperstone_device::init(int scale_mask)
1529static void hyperstone_init(legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback, int scale_mask)
15321530{
1533   m_program = &space(AS_PROGRAM);
1534   m_direct = &m_program->direct();
1535   m_io = &space(AS_IO);
1531   hyperstone_state *cpustate = get_safe_token(device);
15361532
1537   m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hyperstone_device::timer_callback), this));
1538   m_clock_scale_mask = scale_mask;
1533   device->save_item(NAME(cpustate->global_regs));
1534   device->save_item(NAME(cpustate->local_regs));
1535   device->save_item(NAME(cpustate->ppc));
1536   device->save_item(NAME(cpustate->trap_entry));
1537   device->save_item(NAME(cpustate->delay.delay_pc));
1538   device->save_item(NAME(cpustate->instruction_length));
1539   device->save_item(NAME(cpustate->intblock));
1540   device->save_item(NAME(cpustate->delay.delay_cmd));
1541   device->save_item(NAME(cpustate->tr_clocks_per_tick));
15391542
1540   // register our state for the debugger
1541   astring tempstr;
1542   state_add(STATE_GENPC,     "GENPC",     m_global_regs[0]).noshow();
1543   state_add(STATE_GENFLAGS,  "GENFLAGS",  m_global_regs[1]).callimport().callexport().formatstr("%40s").noshow();
1544   state_add(E132XS_PC,       "PC  :%08X", m_global_regs[0]).mask(0xffffffff);
1545   state_add(E132XS_SR,       "SR  :%08X", m_global_regs[1]).mask(0xffffffff);
1546   state_add(E132XS_FER,      "FER :%08X", m_global_regs[2]).mask(0xffffffff);
1547   state_add(E132XS_G3,       "G3  :%08X", m_global_regs[3]).mask(0xffffffff);
1548   state_add(E132XS_G4,       "G4  :%08X", m_global_regs[4]).mask(0xffffffff);
1549   state_add(E132XS_G5,       "G5  :%08X", m_global_regs[5]).mask(0xffffffff);
1550   state_add(E132XS_G6,       "G6  :%08X", m_global_regs[6]).mask(0xffffffff);
1551   state_add(E132XS_G7,       "G7  :%08X", m_global_regs[7]).mask(0xffffffff);
1552   state_add(E132XS_G8,       "G8  :%08X", m_global_regs[8]).mask(0xffffffff);
1553   state_add(E132XS_G9,       "G9  :%08X", m_global_regs[9]).mask(0xffffffff);
1554   state_add(E132XS_G10,      "G10 :%08X", m_global_regs[10]).mask(0xffffffff);
1555   state_add(E132XS_G11,      "G11 :%08X", m_global_regs[11]).mask(0xffffffff);
1556   state_add(E132XS_G12,      "G12 :%08X", m_global_regs[12]).mask(0xffffffff);
1557   state_add(E132XS_G13,      "G13 :%08X", m_global_regs[13]).mask(0xffffffff);
1558   state_add(E132XS_G14,      "G14 :%08X", m_global_regs[14]).mask(0xffffffff);
1559   state_add(E132XS_G15,      "G15 :%08X", m_global_regs[15]).mask(0xffffffff);
1560   state_add(E132XS_G16,      "G16 :%08X", m_global_regs[16]).mask(0xffffffff);
1561   state_add(E132XS_G17,      "G17 :%08X", m_global_regs[17]).mask(0xffffffff);
1562   state_add(E132XS_SP,       "SP  :%08X", m_global_regs[18]).mask(0xffffffff);
1563   state_add(E132XS_UB,       "UB  :%08X", m_global_regs[19]).mask(0xffffffff);
1564   state_add(E132XS_BCR,      "BCR :%08X", m_global_regs[20]).mask(0xffffffff);
1565   state_add(E132XS_TPR,      "TPR :%08X", m_global_regs[21]).mask(0xffffffff);
1566   state_add(E132XS_TCR,      "TCR :%08X", m_global_regs[22]).mask(0xffffffff);
1567   state_add(E132XS_TR,       "TR  :%08X", m_global_regs[23]).mask(0xffffffff);
1568   state_add(E132XS_WCR,      "WCR :%08X", m_global_regs[24]).mask(0xffffffff);
1569   state_add(E132XS_ISR,      "ISR :%08X", m_global_regs[25]).mask(0xffffffff);
1570   state_add(E132XS_FCR,      "FCR :%08X", m_global_regs[26]).mask(0xffffffff);
1571   state_add(E132XS_MCR,      "MCR :%08X", m_global_regs[27]).mask(0xffffffff);
1572   state_add(E132XS_G28,      "G28 :%08X", m_global_regs[28]).mask(0xffffffff);
1573   state_add(E132XS_G29,      "G29 :%08X", m_global_regs[29]).mask(0xffffffff);
1574   state_add(E132XS_G30,      "G30 :%08X", m_global_regs[30]).mask(0xffffffff);
1575   state_add(E132XS_G31,      "G31 :%08X", m_global_regs[31]).mask(0xffffffff);
1576   state_add(E132XS_CL0,      "CL0 :%08X", m_local_regs[(0 + GET_FP) % 64]).mask(0xffffffff);
1577   state_add(E132XS_CL1,      "CL1 :%08X", m_local_regs[(1 + GET_FP) % 64]).mask(0xffffffff);
1578   state_add(E132XS_CL2,      "CL2 :%08X", m_local_regs[(2 + GET_FP) % 64]).mask(0xffffffff);
1579   state_add(E132XS_CL3,      "CL3 :%08X", m_local_regs[(3 + GET_FP) % 64]).mask(0xffffffff);
1580   state_add(E132XS_CL4,      "CL4 :%08X", m_local_regs[(4 + GET_FP) % 64]).mask(0xffffffff);
1581   state_add(E132XS_CL5,      "CL5 :%08X", m_local_regs[(5 + GET_FP) % 64]).mask(0xffffffff);
1582   state_add(E132XS_CL6,      "CL6 :%08X", m_local_regs[(6 + GET_FP) % 64]).mask(0xffffffff);
1583   state_add(E132XS_CL7,      "CL7 :%08X", m_local_regs[(7 + GET_FP) % 64]).mask(0xffffffff);
1584   state_add(E132XS_CL8,      "CL8 :%08X", m_local_regs[(8 + GET_FP) % 64]).mask(0xffffffff);
1585   state_add(E132XS_CL9,      "CL9 :%08X", m_local_regs[(9 + GET_FP) % 64]).mask(0xffffffff);
1586   state_add(E132XS_CL10,      "CL10:%08X", m_local_regs[(10 + GET_FP) % 64]).mask(0xffffffff);
1587   state_add(E132XS_CL11,      "CL11:%08X", m_local_regs[(11 + GET_FP) % 64]).mask(0xffffffff);
1588   state_add(E132XS_CL12,      "CL12:%08X", m_local_regs[(12 + GET_FP) % 64]).mask(0xffffffff);
1589   state_add(E132XS_CL13,      "CL13:%08X", m_local_regs[(13 + GET_FP) % 64]).mask(0xffffffff);
1590   state_add(E132XS_CL14,      "CL14:%08X", m_local_regs[(14 + GET_FP) % 64]).mask(0xffffffff);
1591   state_add(E132XS_CL15,      "CL15:%08X", m_local_regs[(15 + GET_FP) % 64]).mask(0xffffffff);
1592   state_add(E132XS_L0,       "L0  :%08X", m_local_regs[0]).mask(0xffffffff);
1593   state_add(E132XS_L1,       "L1  :%08X", m_local_regs[1]).mask(0xffffffff);
1594   state_add(E132XS_L2,       "L2  :%08X", m_local_regs[2]).mask(0xffffffff);
1595   state_add(E132XS_L3,       "L3  :%08X", m_local_regs[3]).mask(0xffffffff);
1596   state_add(E132XS_L4,       "L4  :%08X", m_local_regs[4]).mask(0xffffffff);
1597   state_add(E132XS_L5,       "L5  :%08X", m_local_regs[5]).mask(0xffffffff);
1598   state_add(E132XS_L6,       "L6  :%08X", m_local_regs[6]).mask(0xffffffff);
1599   state_add(E132XS_L7,       "L7  :%08X", m_local_regs[7]).mask(0xffffffff);
1600   state_add(E132XS_L8,       "L8  :%08X", m_local_regs[8]).mask(0xffffffff);
1601   state_add(E132XS_L9,       "L9  :%08X", m_local_regs[9]).mask(0xffffffff);
1602   state_add(E132XS_L10,      "L10 :%08X", m_local_regs[10]).mask(0xffffffff);
1603   state_add(E132XS_L11,      "L11 :%08X", m_local_regs[11]).mask(0xffffffff);
1604   state_add(E132XS_L12,      "L12 :%08X", m_local_regs[12]).mask(0xffffffff);
1605   state_add(E132XS_L13,      "L13 :%08X", m_local_regs[13]).mask(0xffffffff);
1606   state_add(E132XS_L14,      "L14 :%08X", m_local_regs[14]).mask(0xffffffff);
1607   state_add(E132XS_L15,      "L15 :%08X", m_local_regs[15]).mask(0xffffffff);
1608   state_add(E132XS_L16,      "L16 :%08X", m_local_regs[16]).mask(0xffffffff);
1609   state_add(E132XS_L17,      "L17 :%08X", m_local_regs[17]).mask(0xffffffff);
1610   state_add(E132XS_L18,      "L18 :%08X", m_local_regs[18]).mask(0xffffffff);
1611   state_add(E132XS_L19,      "L19 :%08X", m_local_regs[19]).mask(0xffffffff);
1612   state_add(E132XS_L20,      "L20 :%08X", m_local_regs[20]).mask(0xffffffff);
1613   state_add(E132XS_L21,      "L21 :%08X", m_local_regs[21]).mask(0xffffffff);
1614   state_add(E132XS_L22,      "L22 :%08X", m_local_regs[22]).mask(0xffffffff);
1615   state_add(E132XS_L23,      "L23 :%08X", m_local_regs[23]).mask(0xffffffff);
1616   state_add(E132XS_L24,      "L24 :%08X", m_local_regs[24]).mask(0xffffffff);
1617   state_add(E132XS_L25,      "L25 :%08X", m_local_regs[25]).mask(0xffffffff);
1618   state_add(E132XS_L26,      "L26 :%08X", m_local_regs[26]).mask(0xffffffff);
1619   state_add(E132XS_L27,      "L27 :%08X", m_local_regs[27]).mask(0xffffffff);
1620   state_add(E132XS_L28,      "L28 :%08X", m_local_regs[28]).mask(0xffffffff);
1621   state_add(E132XS_L29,      "L29 :%08X", m_local_regs[29]).mask(0xffffffff);
1622   state_add(E132XS_L30,      "L30 :%08X", m_local_regs[30]).mask(0xffffffff);
1623   state_add(E132XS_L31,      "L31 :%08X", m_local_regs[31]).mask(0xffffffff);
1624   state_add(E132XS_L32,      "L32 :%08X", m_local_regs[32]).mask(0xffffffff);
1625   state_add(E132XS_L33,      "L33 :%08X", m_local_regs[33]).mask(0xffffffff);
1626   state_add(E132XS_L34,      "L34 :%08X", m_local_regs[34]).mask(0xffffffff);
1627   state_add(E132XS_L35,      "L35 :%08X", m_local_regs[35]).mask(0xffffffff);
1628   state_add(E132XS_L36,      "L36 :%08X", m_local_regs[36]).mask(0xffffffff);
1629   state_add(E132XS_L37,      "L37 :%08X", m_local_regs[37]).mask(0xffffffff);
1630   state_add(E132XS_L38,      "L38 :%08X", m_local_regs[38]).mask(0xffffffff);
1631   state_add(E132XS_L39,      "L39 :%08X", m_local_regs[39]).mask(0xffffffff);
1632   state_add(E132XS_L40,      "L40 :%08X", m_local_regs[40]).mask(0xffffffff);
1633   state_add(E132XS_L41,      "L41 :%08X", m_local_regs[41]).mask(0xffffffff);
1634   state_add(E132XS_L42,      "L42 :%08X", m_local_regs[42]).mask(0xffffffff);
1635   state_add(E132XS_L43,      "L43 :%08X", m_local_regs[43]).mask(0xffffffff);
1636   state_add(E132XS_L44,      "L44 :%08X", m_local_regs[44]).mask(0xffffffff);
1637   state_add(E132XS_L45,      "L45 :%08X", m_local_regs[45]).mask(0xffffffff);
1638   state_add(E132XS_L46,      "L46 :%08X", m_local_regs[46]).mask(0xffffffff);
1639   state_add(E132XS_L47,      "L47 :%08X", m_local_regs[47]).mask(0xffffffff);
1640   state_add(E132XS_L48,      "L48 :%08X", m_local_regs[48]).mask(0xffffffff);
1641   state_add(E132XS_L49,      "L49 :%08X", m_local_regs[49]).mask(0xffffffff);
1642   state_add(E132XS_L50,      "L50 :%08X", m_local_regs[50]).mask(0xffffffff);
1643   state_add(E132XS_L51,      "L51 :%08X", m_local_regs[51]).mask(0xffffffff);
1644   state_add(E132XS_L52,      "L52 :%08X", m_local_regs[52]).mask(0xffffffff);
1645   state_add(E132XS_L53,      "L53 :%08X", m_local_regs[53]).mask(0xffffffff);
1646   state_add(E132XS_L54,      "L54 :%08X", m_local_regs[54]).mask(0xffffffff);
1647   state_add(E132XS_L55,      "L55 :%08X", m_local_regs[55]).mask(0xffffffff);
1648   state_add(E132XS_L56,      "L56 :%08X", m_local_regs[56]).mask(0xffffffff);
1649   state_add(E132XS_L57,      "L57 :%08X", m_local_regs[57]).mask(0xffffffff);
1650   state_add(E132XS_L58,      "L58 :%08X", m_local_regs[58]).mask(0xffffffff);
1651   state_add(E132XS_L59,      "L59 :%08X", m_local_regs[59]).mask(0xffffffff);
1652   state_add(E132XS_L60,      "L60 :%08X", m_local_regs[60]).mask(0xffffffff);
1653   state_add(E132XS_L61,      "L61 :%08X", m_local_regs[61]).mask(0xffffffff);
1654   state_add(E132XS_L62,      "L62 :%08X", m_local_regs[62]).mask(0xffffffff);
1655   state_add(E132XS_L63,      "L63 :%08X", m_local_regs[63]).mask(0xffffffff);
1543   cpustate->irq_callback = irqcallback;
1544   cpustate->device = device;
1545   cpustate->program = &device->space(AS_PROGRAM);
1546   cpustate->direct = &cpustate->program->direct();
1547   cpustate->io = &device->space(AS_IO);
1548   cpustate->timer = device->machine().scheduler().timer_alloc(FUNC(e132xs_timer_callback), (void *)device);
1549   cpustate->clock_scale_mask = scale_mask;
1550}
16561551
1657   save_item(NAME(m_global_regs));
1658   save_item(NAME(m_local_regs));
1659   save_item(NAME(m_ppc));
1660   save_item(NAME(m_trap_entry));
1661   save_item(NAME(m_delay.delay_pc));
1662   save_item(NAME(m_instruction_length));
1663   save_item(NAME(m_intblock));
1664   save_item(NAME(m_delay.delay_cmd));
1665   save_item(NAME(m_tr_clocks_per_tick));
1552static void e116_init(legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback, int scale_mask)
1553{
1554   hyperstone_state *cpustate = get_safe_token(device);
1555   hyperstone_init(device, irqcallback, scale_mask);
1556   cpustate->opcodexor = 0;
1557}
16661558
1667   // set our instruction counter
1668   m_icountptr = &m_icount;
1559static CPU_INIT( e116t )
1560{
1561   e116_init(device, irqcallback, 0);
16691562}
16701563
1671void e116t_device::device_start()
1564static CPU_INIT( e116xt )
16721565{
1673   init(0);
1674   m_opcodexor = 0;
1566   e116_init(device, irqcallback, 3);
16751567}
16761568
1677void e116xt_device::device_start()
1569static CPU_INIT( e116xs )
16781570{
1679   init(3);
1680   m_opcodexor = 0;
1571   e116_init(device, irqcallback, 7);
16811572}
16821573
1683void e116xs_device::device_start()
1574static CPU_INIT( e116xsr )
16841575{
1685   init(7);
1686   m_opcodexor = 0;
1576   e116_init(device, irqcallback, 7);
16871577}
16881578
1689void e116xsr_device::device_start()
1579static CPU_INIT( gms30c2116 )
16901580{
1691   init(7);
1692   m_opcodexor = 0;
1581   e116_init(device, irqcallback, 0);
16931582}
16941583
1695void gms30c2116_device::device_start()
1584static CPU_INIT( gms30c2216 )
16961585{
1697   init(0);
1698   m_opcodexor = 0;
1586   e116_init(device, irqcallback, 0);
16991587}
17001588
1701void gms30c2216_device::device_start()
1589static void e132_init(legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback, int scale_mask)
17021590{
1703   init(0);
1704   m_opcodexor = 0;
1591   hyperstone_state *cpustate = get_safe_token(device);
1592   hyperstone_init(device, irqcallback, scale_mask);
1593   cpustate->opcodexor = WORD_XOR_BE(0);
17051594}
17061595
1707void e132n_device::device_start()
1596static CPU_INIT( e132n )
17081597{
1709   init(0);
1710   m_opcodexor = WORD_XOR_BE(0);
1598   e132_init(device, irqcallback, 0);
17111599}
17121600
1713void e132t_device::device_start()
1601static CPU_INIT( e132t )
17141602{
1715   init(0);
1716   m_opcodexor = WORD_XOR_BE(0);
1603   e132_init(device, irqcallback, 0);
17171604}
17181605
1719void e132xn_device::device_start()
1606static CPU_INIT( e132xn )
17201607{
1721   init(3);
1722   m_opcodexor = WORD_XOR_BE(0);
1608   e132_init(device, irqcallback, 3);
17231609}
17241610
1725void e132xt_device::device_start()
1611static CPU_INIT( e132xt )
17261612{
1727   init(3);
1728   m_opcodexor = WORD_XOR_BE(0);
1613   e132_init(device, irqcallback, 3);
17291614}
17301615
1731void e132xs_device::device_start()
1616static CPU_INIT( e132xs )
17321617{
1733   init(7);
1734   m_opcodexor = WORD_XOR_BE(0);
1618   e132_init(device, irqcallback, 7);
17351619}
17361620
1737void e132xsr_device::device_start()
1621static CPU_INIT( e132xsr )
17381622{
1739   init(7);
1740   m_opcodexor = WORD_XOR_BE(0);
1623   e132_init(device, irqcallback, 7);
17411624}
17421625
1743void gms30c2132_device::device_start()
1626static CPU_INIT( gms30c2132 )
17441627{
1745   init(0);
1746   m_opcodexor = WORD_XOR_BE(0);
1628   e132_init(device, irqcallback, 0);
17471629}
17481630
1749void gms30c2232_device::device_start()
1631static CPU_INIT( gms30c2232 )
17501632{
1751   init(0);
1752   m_opcodexor = WORD_XOR_BE(0);
1633   e132_init(device, irqcallback, 0);
17531634}
17541635
1755void hyperstone_device::device_reset()
1636static CPU_RESET( hyperstone )
17561637{
1638   hyperstone_state *cpustate = get_safe_token(device);
1639
17571640   //TODO: Add different reset initializations for BCR, MCR, FCR, TPR
17581641
1759   m_program = &space(AS_PROGRAM);
1760   m_direct = &m_program->direct();
1761   m_io = &space(AS_IO);
1642   emu_timer *save_timer;
1643   device_irq_acknowledge_callback save_irqcallback;
1644   UINT32 save_opcodexor;
17621645
1763   m_tr_clocks_per_tick = 2;
1646   save_timer = cpustate->timer;
1647   save_irqcallback = cpustate->irq_callback;
1648   save_opcodexor = cpustate->opcodexor;
1649   memset(cpustate, 0, sizeof(*cpustate));
1650   cpustate->irq_callback = save_irqcallback;
1651   cpustate->opcodexor = save_opcodexor;
1652   cpustate->device = device;
1653   cpustate->program = &device->space(AS_PROGRAM);
1654   cpustate->direct = &cpustate->program->direct();
1655   cpustate->io = &device->space(AS_IO);
1656   cpustate->timer = save_timer;
17641657
1765   hyperstone_set_trap_entry(E132XS_ENTRY_MEM3); /* default entry point @ MEM3 */
1658   cpustate->tr_clocks_per_tick = 2;
17661659
1767   set_global_register(BCR_REGISTER, ~0);
1768   set_global_register(MCR_REGISTER, ~0);
1769   set_global_register(FCR_REGISTER, ~0);
1770   set_global_register(TPR_REGISTER, 0xc000000);
1660   hyperstone_set_trap_entry(cpustate, E132XS_ENTRY_MEM3); /* default entry point @ MEM3 */
17711661
1772   PC = get_trap_addr(TRAPNO_RESET);
1662   set_global_register(cpustate, BCR_REGISTER, ~0);
1663   set_global_register(cpustate, MCR_REGISTER, ~0);
1664   set_global_register(cpustate, FCR_REGISTER, ~0);
1665   set_global_register(cpustate, TPR_REGISTER, 0xc000000);
17731666
1667   PC = get_trap_addr(cpustate, TRAPNO_RESET);
1668
17741669   SET_FP(0);
17751670   SET_FL(2);
17761671
r19871r19872
17821677   SET_L_REG(0, (PC & 0xfffffffe) | GET_S);
17831678   SET_L_REG(1, SR);
17841679
1785   m_icount -= m_clock_cycles_2;
1680   cpustate->icount -= cpustate->clock_cycles_2;
17861681}
17871682
1788void hyperstone_device::device_stop()
1683static CPU_EXIT( hyperstone )
17891684{
17901685   // nothing to do
17911686}
17921687
1793
1794//-------------------------------------------------
1795//  memory_space_config - return the configuration
1796//  of the specified address space, or NULL if
1797//  the space doesn't exist
1798//-------------------------------------------------
1799
1800const address_space_config *hyperstone_device::memory_space_config(address_spacenum spacenum) const
1688static CPU_DISASSEMBLE( hyperstone )
18011689{
1802   if (spacenum == AS_PROGRAM)
1803   {
1804      return &m_program_config;
1805   }
1806   else if (spacenum == AS_IO)
1807   {
1808      return &m_io_config;
1809   }
1810   return NULL;
1811}
1812
1813
1814//-------------------------------------------------
1815//  state_string_export - export state as a string
1816//  for the debugger
1817//-------------------------------------------------
1818
1819void hyperstone_device::state_string_export(const device_state_entry &entry, astring &string)
1820{
1821   switch (entry.index())
1822   {
1823      case STATE_GENFLAGS:
1824         string.printf("%c%c%c%c%c%c%c%c%c%c%c%c FTE:%X FRM:%X ILC:%d FL:%d FP:%d",
1825            GET_S ? 'S':'.',
1826            GET_P ? 'P':'.',
1827            GET_T ? 'T':'.',
1828            GET_L ? 'L':'.',
1829            GET_I ? 'I':'.',
1830            m_global_regs[1] & 0x00040 ? '?':'.',
1831            GET_H ? 'H':'.',
1832            GET_M ? 'M':'.',
1833            GET_V ? 'V':'.',
1834            GET_N ? 'N':'.',
1835            GET_Z ? 'Z':'.',
1836            GET_C ? 'C':'.',
1837            GET_FTE,
1838            GET_FRM,
1839            GET_ILC,
1840            GET_FL,
1841            GET_FP);
1842         break;
1843   }
1844}
1845
1846
1847//-------------------------------------------------
1848//  disasm_min_opcode_bytes - return the length
1849//  of the shortest instruction, in bytes
1850//-------------------------------------------------
1851
1852UINT32 hyperstone_device::disasm_min_opcode_bytes() const
1853{
1854   return 2;
1855}
1856
1857
1858//-------------------------------------------------
1859//  disasm_max_opcode_bytes - return the length
1860//  of the longest instruction, in bytes
1861//-------------------------------------------------
1862
1863UINT32 hyperstone_device::disasm_max_opcode_bytes() const
1864{
1865   return 6;
1866}
1867
1868
1869//-------------------------------------------------
1870//  disasm_disassemble - call the disassembly
1871//  helper function
1872//-------------------------------------------------
1873
1874offs_t hyperstone_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
1875{
1876   extern CPU_DISASSEMBLE( hyperstone );
1690   hyperstone_state *cpustate = get_safe_token(device);
18771691   return dasm_hyperstone( buffer, pc, oprom, GET_H, GET_FP );
18781692}
18791693
18801694/* Opcodes */
18811695
1882void hyperstone_device::hyperstone_chk(struct hyperstone_device::regs_decode *decode)
1696INLINE void hyperstone_chk(hyperstone_state *cpustate, struct regs_decode *decode)
18831697{
1884   UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
1698   UINT32 addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
18851699
18861700   if( SRC_IS_SR )
18871701   {
18881702      if( DREG == 0 )
1889         execute_exception(addr);
1703         execute_exception(cpustate, addr);
18901704   }
18911705   else
18921706   {
18931707      if( SRC_IS_PC )
18941708      {
18951709         if( DREG >= SREG )
1896            execute_exception(addr);
1710            execute_exception(cpustate, addr);
18971711      }
18981712      else
18991713      {
19001714         if( DREG > SREG )
1901            execute_exception(addr);
1715            execute_exception(cpustate, addr);
19021716      }
19031717   }
19041718
1905   m_icount -= m_clock_cycles_1;
1719   cpustate->icount -= cpustate->clock_cycles_1;
19061720}
19071721
1908void hyperstone_device::hyperstone_movd(struct hyperstone_device::regs_decode *decode)
1722INLINE void hyperstone_movd(hyperstone_state *cpustate, struct regs_decode *decode)
19091723{
19101724   if( DST_IS_PC ) // Rd denotes PC
19111725   {
r19871r19872
19261740
19271741         SET_PC(SREG);
19281742         SR = (SREGF & 0xffe00000) | ((SREG & 0x01) << 18 ) | (SREGF & 0x3ffff);
1929         if (m_intblock < 1)
1930            m_intblock = 1;
1743         if (cpustate->intblock < 1)
1744            cpustate->intblock = 1;
19311745
1932         m_instruction_length = 0; // undefined
1746         cpustate->instruction_length = 0; // undefined
19331747
19341748         if( (!old_s && GET_S) || (!GET_S && !old_l && GET_L))
19351749         {
1936            UINT32 addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
1937            execute_exception(addr);
1750            UINT32 addr = get_trap_addr(cpustate, TRAPNO_PRIVILEGE_ERROR);
1751            execute_exception(cpustate, addr);
19381752         }
19391753
19401754         difference = GET_FP - ((SP & 0x1fc) >> 2);
r19871r19872
19501764            do
19511765            {
19521766               SP -= 4;
1953               SET_ABS_L_REG(((SP & 0xfc) >> 2), READ_W(SP));
1767               SET_ABS_L_REG(((SP & 0xfc) >> 2), READ_W(cpustate, SP));
19541768               difference++;
19551769
19561770            } while(difference != 0);
r19871r19872
19581772      }
19591773
19601774      //TODO: no 1!
1961      m_icount -= m_clock_cycles_1;
1775      cpustate->icount -= cpustate->clock_cycles_1;
19621776   }
19631777   else if( SRC_IS_SR ) // Rd doesn't denote PC and Rs denotes SR
19641778   {
r19871r19872
19671781      SET_Z(1);
19681782      SET_N(0);
19691783
1970      m_icount -= m_clock_cycles_2;
1784      cpustate->icount -= cpustate->clock_cycles_2;
19711785   }
19721786   else // Rd doesn't denote PC and Rs doesn't denote SR
19731787   {
r19871r19872
19801794      SET_Z( tmp == 0 ? 1 : 0 );
19811795      SET_N( SIGN_BIT(SREG) );
19821796
1983      m_icount -= m_clock_cycles_2;
1797      cpustate->icount -= cpustate->clock_cycles_2;
19841798   }
19851799}
19861800
1987void hyperstone_device::hyperstone_divu(struct hyperstone_device::regs_decode *decode)
1801INLINE void hyperstone_divu(hyperstone_state *cpustate, struct regs_decode *decode)
19881802{
19891803   if( SAME_SRC_DST || SAME_SRC_DSTF )
19901804   {
r19871r19872
20091823            //N -> undefined
20101824            UINT32 addr;
20111825            SET_V(1);
2012            addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2013            execute_exception(addr);
1826            addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
1827            execute_exception(cpustate, addr);
20141828         }
20151829         else
20161830         {
r19871r19872
20301844      }
20311845   }
20321846
2033   m_icount -= 36 << m_clock_scale;
1847   cpustate->icount -= 36 << cpustate->clock_scale;
20341848}
20351849
2036void hyperstone_device::hyperstone_divs(struct hyperstone_device::regs_decode *decode)
1850INLINE void hyperstone_divs(hyperstone_state *cpustate, struct regs_decode *decode)
20371851{
20381852   if( SAME_SRC_DST || SAME_SRC_DSTF )
20391853   {
r19871r19872
20581872            //N -> undefined
20591873            UINT32 addr;
20601874            SET_V(1);
2061            addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2062            execute_exception(addr);
1875            addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
1876            execute_exception(cpustate, addr);
20631877         }
20641878         else
20651879         {
r19871r19872
20791893      }
20801894   }
20811895
2082   m_icount -= 36 << m_clock_scale;
1896   cpustate->icount -= 36 << cpustate->clock_scale;
20831897}
20841898
2085void hyperstone_device::hyperstone_xm(struct hyperstone_device::regs_decode *decode)
1899INLINE void hyperstone_xm(hyperstone_state *cpustate, struct regs_decode *decode)
20861900{
20871901   if( SRC_IS_SR || DST_IS_SR || DST_IS_PC )
20881902   {
r19871r19872
20981912         case 3:
20991913            if( !SRC_IS_PC && (SREG > EXTRA_U) )
21001914            {
2101               UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2102               execute_exception(addr);
1915               UINT32 addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
1916               execute_exception(cpustate, addr);
21031917            }
21041918            else if( SRC_IS_PC && (SREG >= EXTRA_U) )
21051919            {
2106               UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2107               execute_exception(addr);
1920               UINT32 addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
1921               execute_exception(cpustate, addr);
21081922            }
21091923            else
21101924            {
r19871r19872
21261940      SET_DREG(SREG);
21271941   }
21281942
2129   m_icount -= m_clock_cycles_1;
1943   cpustate->icount -= cpustate->clock_cycles_1;
21301944}
21311945
2132void hyperstone_device::hyperstone_mask(struct hyperstone_device::regs_decode *decode)
1946INLINE void hyperstone_mask(hyperstone_state *cpustate, struct regs_decode *decode)
21331947{
21341948   DREG = SREG & EXTRA_U;
21351949
21361950   SET_DREG(DREG);
21371951   SET_Z( DREG == 0 ? 1 : 0 );
21381952
2139   m_icount -= m_clock_cycles_1;
1953   cpustate->icount -= cpustate->clock_cycles_1;
21401954}
21411955
2142void hyperstone_device::hyperstone_sum(struct hyperstone_device::regs_decode *decode)
1956INLINE void hyperstone_sum(hyperstone_state *cpustate, struct regs_decode *decode)
21431957{
21441958   UINT64 tmp;
21451959
r19871r19872
21601974   SET_Z( DREG == 0 ? 1 : 0 );
21611975   SET_N( SIGN_BIT(DREG) );
21621976
2163   m_icount -= m_clock_cycles_1;
1977   cpustate->icount -= cpustate->clock_cycles_1;
21641978}
21651979
2166void hyperstone_device::hyperstone_sums(struct hyperstone_device::regs_decode *decode)
1980INLINE void hyperstone_sums(hyperstone_state *cpustate, struct regs_decode *decode)
21671981{
21681982   INT32 res;
21691983   INT64 tmp;
r19871r19872
21851999   SET_Z( res == 0 ? 1 : 0 );
21862000   SET_N( SIGN_BIT(res) );
21872001
2188   m_icount -= m_clock_cycles_1;
2002   cpustate->icount -= cpustate->clock_cycles_1;
21892003
21902004   if( GET_V && !SRC_IS_SR )
21912005   {
2192      UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2193      execute_exception(addr);
2006      UINT32 addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
2007      execute_exception(cpustate, addr);
21942008   }
21952009}
21962010
2197void hyperstone_device::hyperstone_cmp(struct hyperstone_device::regs_decode *decode)
2011INLINE void hyperstone_cmp(hyperstone_state *cpustate, struct regs_decode *decode)
21982012{
21992013   UINT64 tmp;
22002014
r19871r19872
22192033   else
22202034      SET_C(0);
22212035
2222   m_icount -= m_clock_cycles_1;
2036   cpustate->icount -= cpustate->clock_cycles_1;
22232037}
22242038
2225void hyperstone_device::hyperstone_mov(struct hyperstone_device::regs_decode *decode)
2039INLINE void hyperstone_mov(hyperstone_state *cpustate, struct regs_decode *decode)
22262040{
22272041   if( !GET_S && decode->dst >= 16 )
22282042   {
2229      UINT32 addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
2230      execute_exception(addr);
2043      UINT32 addr = get_trap_addr(cpustate, TRAPNO_PRIVILEGE_ERROR);
2044      execute_exception(cpustate, addr);
22312045   }
22322046
22332047   SET_DREG(SREG);
r19871r19872
22382052   SET_Z( SREG == 0 ? 1 : 0 );
22392053   SET_N( SIGN_BIT(SREG) );
22402054
2241   m_icount -= m_clock_cycles_1;
2055   cpustate->icount -= cpustate->clock_cycles_1;
22422056}
22432057
22442058
2245void hyperstone_device::hyperstone_add(struct hyperstone_device::regs_decode *decode)
2059INLINE void hyperstone_add(hyperstone_state *cpustate, struct regs_decode *decode)
22462060{
22472061   UINT64 tmp;
22482062
r19871r19872
22622076   SET_Z( DREG == 0 ? 1 : 0 );
22632077   SET_N( SIGN_BIT(DREG) );
22642078
2265   m_icount -= m_clock_cycles_1;
2079   cpustate->icount -= cpustate->clock_cycles_1;
22662080}
22672081
2268void hyperstone_device::hyperstone_adds(struct hyperstone_device::regs_decode *decode)
2082INLINE void hyperstone_adds(hyperstone_state *cpustate, struct regs_decode *decode)
22692083{
22702084   INT32 res;
22712085   INT64 tmp;
r19871r19872
22872101   SET_Z( res == 0 ? 1 : 0 );
22882102   SET_N( SIGN_BIT(res) );
22892103
2290   m_icount -= m_clock_cycles_1;
2104   cpustate->icount -= cpustate->clock_cycles_1;
22912105
22922106   if( GET_V )
22932107   {
2294      UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2295      execute_exception(addr);
2108      UINT32 addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
2109      execute_exception(cpustate, addr);
22962110   }
22972111}
22982112
2299void hyperstone_device::hyperstone_cmpb(struct hyperstone_device::regs_decode *decode)
2113INLINE void hyperstone_cmpb(hyperstone_state *cpustate, struct regs_decode *decode)
23002114{
23012115   SET_Z( (DREG & SREG) == 0 ? 1 : 0 );
23022116
2303   m_icount -= m_clock_cycles_1;
2117   cpustate->icount -= cpustate->clock_cycles_1;
23042118}
23052119
2306void hyperstone_device::hyperstone_andn(struct hyperstone_device::regs_decode *decode)
2120INLINE void hyperstone_andn(hyperstone_state *cpustate, struct regs_decode *decode)
23072121{
23082122   DREG = DREG & ~SREG;
23092123
23102124   SET_DREG(DREG);
23112125   SET_Z( DREG == 0 ? 1 : 0 );
23122126
2313   m_icount -= m_clock_cycles_1;
2127   cpustate->icount -= cpustate->clock_cycles_1;
23142128}
23152129
2316void hyperstone_device::hyperstone_or(struct hyperstone_device::regs_decode *decode)
2130INLINE void hyperstone_or(hyperstone_state *cpustate, struct regs_decode *decode)
23172131{
23182132   DREG = DREG | SREG;
23192133
23202134   SET_DREG(DREG);
23212135   SET_Z( DREG == 0 ? 1 : 0 );
23222136
2323   m_icount -= m_clock_cycles_1;
2137   cpustate->icount -= cpustate->clock_cycles_1;
23242138}
23252139
2326void hyperstone_device::hyperstone_xor(struct hyperstone_device::regs_decode *decode)
2140INLINE void hyperstone_xor(hyperstone_state *cpustate, struct regs_decode *decode)
23272141{
23282142   DREG = DREG ^ SREG;
23292143
23302144   SET_DREG(DREG);
23312145   SET_Z( DREG == 0 ? 1 : 0 );
23322146
2333   m_icount -= m_clock_cycles_1;
2147   cpustate->icount -= cpustate->clock_cycles_1;
23342148}
23352149
2336void hyperstone_device::hyperstone_subc(struct hyperstone_device::regs_decode *decode)
2150INLINE void hyperstone_subc(hyperstone_state *cpustate, struct regs_decode *decode)
23372151{
23382152   UINT64 tmp;
23392153
r19871r19872
23662180   SET_Z( GET_Z & (DREG == 0 ? 1 : 0) );
23672181   SET_N( SIGN_BIT(DREG) );
23682182
2369   m_icount -= m_clock_cycles_1;
2183   cpustate->icount -= cpustate->clock_cycles_1;
23702184}
23712185
2372void hyperstone_device::hyperstone_not(struct hyperstone_device::regs_decode *decode)
2186INLINE void hyperstone_not(hyperstone_state *cpustate, struct regs_decode *decode)
23732187{
23742188   SET_DREG(~SREG);
23752189   SET_Z( ~SREG == 0 ? 1 : 0 );
23762190
2377   m_icount -= m_clock_cycles_1;
2191   cpustate->icount -= cpustate->clock_cycles_1;
23782192}
23792193
2380void hyperstone_device::hyperstone_sub(struct hyperstone_device::regs_decode *decode)
2194INLINE void hyperstone_sub(hyperstone_state *cpustate, struct regs_decode *decode)
23812195{
23822196   UINT64 tmp;
23832197
r19871r19872
23972211   SET_Z( DREG == 0 ? 1 : 0 );
23982212   SET_N( SIGN_BIT(DREG) );
23992213
2400   m_icount -= m_clock_cycles_1;
2214   cpustate->icount -= cpustate->clock_cycles_1;
24012215}
24022216
2403void hyperstone_device::hyperstone_subs(struct hyperstone_device::regs_decode *decode)
2217INLINE void hyperstone_subs(hyperstone_state *cpustate, struct regs_decode *decode)
24042218{
24052219   INT32 res;
24062220   INT64 tmp;
r19871r19872
24232237   SET_Z( res == 0 ? 1 : 0 );
24242238   SET_N( SIGN_BIT(res) );
24252239
2426   m_icount -= m_clock_cycles_1;
2240   cpustate->icount -= cpustate->clock_cycles_1;
24272241
24282242   if( GET_V )
24292243   {
2430      UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2431      execute_exception(addr);
2244      UINT32 addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
2245      execute_exception(cpustate, addr);
24322246   }
24332247}
24342248
2435void hyperstone_device::hyperstone_addc(struct hyperstone_device::regs_decode *decode)
2249INLINE void hyperstone_addc(hyperstone_state *cpustate, struct regs_decode *decode)
24362250{
24372251   UINT64 tmp;
24382252
r19871r19872
24702284   SET_Z( GET_Z & (DREG == 0 ? 1 : 0) );
24712285   SET_N( SIGN_BIT(DREG) );
24722286
2473   m_icount -= m_clock_cycles_1;
2287   cpustate->icount -= cpustate->clock_cycles_1;
24742288}
24752289
2476void hyperstone_device::hyperstone_and(struct hyperstone_device::regs_decode *decode)
2290INLINE void hyperstone_and(hyperstone_state *cpustate, struct regs_decode *decode)
24772291{
24782292   DREG = DREG & SREG;
24792293
24802294   SET_DREG(DREG);
24812295   SET_Z( DREG == 0 ? 1 : 0 );
24822296
2483   m_icount -= m_clock_cycles_1;
2297   cpustate->icount -= cpustate->clock_cycles_1;
24842298}
24852299
2486void hyperstone_device::hyperstone_neg(struct hyperstone_device::regs_decode *decode)
2300INLINE void hyperstone_neg(hyperstone_state *cpustate, struct regs_decode *decode)
24872301{
24882302   UINT64 tmp;
24892303
r19871r19872
25012315   SET_Z( DREG == 0 ? 1 : 0 );
25022316   SET_N( SIGN_BIT(DREG) );
25032317
2504   m_icount -= m_clock_cycles_1;
2318   cpustate->icount -= cpustate->clock_cycles_1;
25052319}
25062320
2507void hyperstone_device::hyperstone_negs(struct hyperstone_device::regs_decode *decode)
2321INLINE void hyperstone_negs(hyperstone_state *cpustate, struct regs_decode *decode)
25082322{
25092323   INT32 res;
25102324   INT64 tmp;
r19871r19872
25272341   SET_N( SIGN_BIT(res) );
25282342
25292343
2530   m_icount -= m_clock_cycles_1;
2344   cpustate->icount -= cpustate->clock_cycles_1;
25312345
25322346   if( GET_V && !SRC_IS_SR ) //trap doesn't occur when source is SR
25332347   {
2534      UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2535      execute_exception(addr);
2348      UINT32 addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
2349      execute_exception(cpustate, addr);
25362350   }
25372351}
25382352
2539void hyperstone_device::hyperstone_cmpi(struct hyperstone_device::regs_decode *decode)
2353INLINE void hyperstone_cmpi(hyperstone_state *cpustate, struct regs_decode *decode)
25402354{
25412355   UINT64 tmp;
25422356
r19871r19872
25582372   else
25592373      SET_C(0);
25602374
2561   m_icount -= m_clock_cycles_1;
2375   cpustate->icount -= cpustate->clock_cycles_1;
25622376}
25632377
2564void hyperstone_device::hyperstone_movi(struct hyperstone_device::regs_decode *decode)
2378INLINE void hyperstone_movi(hyperstone_state *cpustate, struct regs_decode *decode)
25652379{
25662380   if( !GET_S && decode->dst >= 16 )
25672381   {
2568      UINT32 addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
2569      execute_exception(addr);
2382      UINT32 addr = get_trap_addr(cpustate, TRAPNO_PRIVILEGE_ERROR);
2383      execute_exception(cpustate, addr);
25702384   }
25712385
25722386   SET_DREG(EXTRA_U);
r19871r19872
25812395   SET_V(0); // or V undefined ?
25822396#endif
25832397
2584   m_icount -= m_clock_cycles_1;
2398   cpustate->icount -= cpustate->clock_cycles_1;
25852399}
25862400
2587void hyperstone_device::hyperstone_addi(struct hyperstone_device::regs_decode *decode)
2401INLINE void hyperstone_addi(hyperstone_state *cpustate, struct regs_decode *decode)
25882402{
25892403   UINT32 imm;
25902404   UINT64 tmp;
r19871r19872
26082422   SET_Z( DREG == 0 ? 1 : 0 );
26092423   SET_N( SIGN_BIT(DREG) );
26102424
2611   m_icount -= m_clock_cycles_1;
2425   cpustate->icount -= cpustate->clock_cycles_1;
26122426}
26132427
2614void hyperstone_device::hyperstone_addsi(struct hyperstone_device::regs_decode *decode)
2428INLINE void hyperstone_addsi(hyperstone_state *cpustate, struct regs_decode *decode)
26152429{
26162430   INT32 imm, res;
26172431   INT64 tmp;
r19871r19872
26352449   SET_Z( res == 0 ? 1 : 0 );
26362450   SET_N( SIGN_BIT(res) );
26372451
2638   m_icount -= m_clock_cycles_1;
2452   cpustate->icount -= cpustate->clock_cycles_1;
26392453
26402454   if( GET_V )
26412455   {
2642      UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
2643      execute_exception(addr);
2456      UINT32 addr = get_trap_addr(cpustate, TRAPNO_RANGE_ERROR);
2457      execute_exception(cpustate, addr);
26442458   }
26452459}
26462460
2647void hyperstone_device::hyperstone_cmpbi(struct hyperstone_device::regs_decode *decode)
2461INLINE void hyperstone_cmpbi(hyperstone_state *cpustate, struct regs_decode *decode)
26482462{
26492463   UINT32 imm;
26502464
r19871r19872
26702484         SET_Z(0);
26712485   }
26722486
2673   m_icount -= m_clock_cycles_1;
2487   cpustate->icount -= cpustate->clock_cycles_1;
26742488}
26752489
2676void hyperstone_device::hyperstone_andni(struct hyperstone_device::regs_decode *decode)
2490INLINE void hyperstone_andni(hyperstone_state *cpustate, struct regs_decode *decode)
26772491{
26782492   UINT32 imm;
26792493
r19871r19872
26872501   SET_DREG(DREG);
26882502   SET_Z( DREG == 0 ? 1 : 0 );
26892503
2690   m_icount -= m_clock_cycles_1;
2504   cpustate->icount -= cpustate->clock_cycles_1;
26912505}
26922506
2693void hyperstone_device::hyperstone_ori(struct hyperstone_device::regs_decode *decode)
2507INLINE void hyperstone_ori(hyperstone_state *cpustate, struct regs_decode *decode)
26942508{
26952509   DREG = DREG | EXTRA_U;
26962510
26972511   SET_DREG(DREG);
26982512   SET_Z( DREG == 0 ? 1 : 0 );
26992513
2700   m_icount -= m_clock_cycles_1;
2514   cpustate->icount -= cpustate->clock_cycles_1;
27012515}
27022516
2703void hyperstone_device::hyperstone_xori(struct hyperstone_device::regs_decode *decode)
2517INLINE void hyperstone_xori(hyperstone_state *cpustate, struct regs_decode *decode)
27042518{
27052519   DREG = DREG ^ EXTRA_U;
27062520
27072521   SET_DREG(DREG);
27082522   SET_Z( DREG == 0 ? 1 : 0 );
27092523
2710   m_icount -= m_clock_cycles_1;
2524   cpustate->icount -= cpustate->clock_cycles_1;
27112525}
27122526
2713void hyperstone_device::hyperstone_shrdi(struct hyperstone_device::regs_decode *decode)
2527INLINE void hyperstone_shrdi(hyperstone_state *cpustate, struct regs_decode *decode)
27142528{
27152529   UINT32 low_order, high_order;
27162530   UINT64 val;
r19871r19872
27352549   SET_Z( val == 0 ? 1 : 0 );
27362550   SET_N( SIGN_BIT(high_order) );
27372551
2738   m_icount -= m_clock_cycles_2;
2552   cpustate->icount -= cpustate->clock_cycles_2;
27392553}
27402554
2741void hyperstone_device::hyperstone_shrd(struct hyperstone_device::regs_decode *decode)
2555INLINE void hyperstone_shrd(hyperstone_state *cpustate, struct regs_decode *decode)
27422556{
27432557   UINT32 low_order, high_order;
27442558   UINT64 val;
r19871r19872
27732587      SET_N( SIGN_BIT(high_order) );
27742588   }
27752589
2776   m_icount -= m_clock_cycles_2;
2590   cpustate->icount -= cpustate->clock_cycles_2;
27772591}
27782592
2779void hyperstone_device::hyperstone_shr(struct hyperstone_device::regs_decode *decode)
2593INLINE void hyperstone_shr(hyperstone_state *cpustate, struct regs_decode *decode)
27802594{
27812595   UINT32 ret;
27822596   UINT8 n;
r19871r19872
27952609   SET_Z( ret == 0 ? 1 : 0 );
27962610   SET_N( SIGN_BIT(ret) );
27972611
2798   m_icount -= m_clock_cycles_1;
2612   cpustate->icount -= cpustate->clock_cycles_1;
27992613}
28002614
2801void hyperstone_device::hyperstone_sardi(struct hyperstone_device::regs_decode *decode)
2615INLINE void hyperstone_sardi(hyperstone_state *cpustate, struct regs_decode *decode)
28022616{
28032617   UINT32 low_order, high_order;
28042618   UINT64 val;
r19871r19872
28352649   SET_Z( val == 0 ? 1 : 0 );
28362650   SET_N( SIGN_BIT(high_order) );
28372651
2838   m_icount -= m_clock_cycles_2;
2652   cpustate->icount -= cpustate->clock_cycles_2;
28392653}
28402654
2841void hyperstone_device::hyperstone_sard(struct hyperstone_device::regs_decode *decode)
2655INLINE void hyperstone_sard(hyperstone_state *cpustate, struct regs_decode *decode)
28422656{
28432657   UINT32 low_order, high_order;
28442658   UINT64 val;
r19871r19872
28852699      SET_N( SIGN_BIT(high_order) );
28862700   }
28872701
2888   m_icount -= m_clock_cycles_2;
2702   cpustate->icount -= cpustate->clock_cycles_2;
28892703}
28902704
2891void hyperstone_device::hyperstone_sar(struct hyperstone_device::regs_decode *decode)
2705INLINE void hyperstone_sar(hyperstone_state *cpustate, struct regs_decode *decode)
28922706{
28932707   UINT32 ret;
28942708   UINT8 n, sign_bit;
r19871r19872
29172731   SET_Z( ret == 0 ? 1 : 0 );
29182732   SET_N( SIGN_BIT(ret) );
29192733
2920   m_icount -= m_clock_cycles_1;
2734   cpustate->icount -= cpustate->clock_cycles_1;
29212735}
29222736
2923void hyperstone_device::hyperstone_shldi(struct hyperstone_device::regs_decode *decode)
2737INLINE void hyperstone_shldi(hyperstone_state *cpustate, struct regs_decode *decode)
29242738{
29252739   UINT32 low_order, high_order, tmp;
29262740   UINT64 val, mask;
r19871r19872
29502764   SET_Z( val == 0 ? 1 : 0 );
29512765   SET_N( SIGN_BIT(high_order) );
29522766
2953   m_icount -= m_clock_cycles_2;
2767   cpustate->icount -= cpustate->clock_cycles_2;
29542768}
29552769
2956void hyperstone_device::hyperstone_shld(struct hyperstone_device::regs_decode *decode)
2770INLINE void hyperstone_shld(hyperstone_state *cpustate, struct regs_decode *decode)
29572771{
29582772   UINT32 low_order, high_order, tmp, n;
29592773   UINT64 val, mask;
r19871r19872
29942808      SET_N( SIGN_BIT(high_order) );
29952809   }
29962810
2997   m_icount -= m_clock_cycles_2;
2811   cpustate->icount -= cpustate->clock_cycles_2;
29982812}
29992813
3000void hyperstone_device::hyperstone_shl(struct hyperstone_device::regs_decode *decode)
2814INLINE void hyperstone_shl(hyperstone_state *cpustate, struct regs_decode *decode)
30012815{
30022816   UINT32 base, ret, n;
30032817   UINT64 mask;
r19871r19872
30182832   SET_Z( ret == 0 ? 1 : 0 );
30192833   SET_N( SIGN_BIT(ret) );
30202834
3021   m_icount -= m_clock_cycles_1;
2835   cpustate->icount -= cpustate->clock_cycles_1;
30222836}
30232837
3024void hyperstone_device::reserved(struct hyperstone_device::regs_decode *decode)
2838static void reserved(hyperstone_state *cpustate, struct regs_decode *decode)
30252839{
30262840   DEBUG_PRINTF(("Executed Reserved opcode. PC = %08X OP = %04X\n", PC, OP));
30272841}
30282842
3029void hyperstone_device::hyperstone_testlz(struct hyperstone_device::regs_decode *decode)
2843INLINE void hyperstone_testlz(hyperstone_state *cpustate, struct regs_decode *decode)
30302844{
30312845   UINT8 zeros = 0;
30322846   UINT32 mask;
r19871r19872
30442858
30452859   SET_DREG(zeros);
30462860
3047   m_icount -= m_clock_cycles_2;
2861   cpustate->icount -= cpustate->clock_cycles_2;
30482862}
30492863
3050void hyperstone_device::hyperstone_rol(struct hyperstone_device::regs_decode *decode)
2864INLINE void hyperstone_rol(hyperstone_state *cpustate, struct regs_decode *decode)
30512865{
30522866   UINT32 val, base;
30532867   UINT8 n;
r19871r19872
30802894   SET_Z( val == 0 ? 1 : 0 );
30812895   SET_N( SIGN_BIT(val) );
30822896
3083   m_icount -= m_clock_cycles_1;
2897   cpustate->icount -= cpustate->clock_cycles_1;
30842898}
30852899
30862900//TODO: add trap error
3087void hyperstone_device::hyperstone_ldxx1(struct hyperstone_device::regs_decode *decode)
2901INLINE void hyperstone_ldxx1(hyperstone_state *cpustate, struct regs_decode *decode)
30882902{
30892903   UINT32 load;
30902904
r19871r19872
30942908      {
30952909         case 0: // LDBS.A
30962910
3097            load = READ_B(EXTRA_S);
2911            load = READ_B(cpustate, EXTRA_S);
30982912            load |= (load & 0x80) ? 0xffffff00 : 0;
30992913            SET_SREG(load);
31002914
r19871r19872
31022916
31032917         case 1: // LDBU.A
31042918
3105            load = READ_B(EXTRA_S);
2919            load = READ_B(cpustate, EXTRA_S);
31062920            SET_SREG(load);
31072921
31082922            break;
31092923
31102924         case 2:
31112925
3112            load = READ_HW(EXTRA_S & ~1);
2926            load = READ_HW(cpustate, EXTRA_S & ~1);
31132927
31142928            if( EXTRA_S & 1 ) // LDHS.A
31152929            {
r19871r19872
31302944
31312945            if( (EXTRA_S & 3) == 3 )      // LDD.IOA
31322946            {
3133               load = IO_READ_W(EXTRA_S & ~3);
2947               load = IO_READ_W(cpustate, EXTRA_S & ~3);
31342948               SET_SREG(load);
31352949
3136               load = IO_READ_W((EXTRA_S & ~3) + 4);
2950               load = IO_READ_W(cpustate, (EXTRA_S & ~3) + 4);
31372951               SET_SREGF(load);
31382952
3139               m_icount -= m_clock_cycles_1; // extra cycle
2953               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
31402954            }
31412955            else if( (EXTRA_S & 3) == 2 ) // LDW.IOA
31422956            {
3143               load = IO_READ_W(EXTRA_S & ~3);
2957               load = IO_READ_W(cpustate, EXTRA_S & ~3);
31442958               SET_SREG(load);
31452959            }
31462960            else if( (EXTRA_S & 3) == 1 ) // LDD.A
31472961            {
3148               load = READ_W(EXTRA_S & ~1);
2962               load = READ_W(cpustate, EXTRA_S & ~1);
31492963               SET_SREG(load);
31502964
3151               load = READ_W((EXTRA_S & ~1) + 4);
2965               load = READ_W(cpustate, (EXTRA_S & ~1) + 4);
31522966               SET_SREGF(load);
31532967
3154               m_icount -= m_clock_cycles_1; // extra cycle
2968               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
31552969            }
31562970            else                      // LDW.A
31572971            {
3158               load = READ_W(EXTRA_S & ~1);
2972               load = READ_W(cpustate, EXTRA_S & ~1);
31592973               SET_SREG(load);
31602974            }
31612975
r19871r19872
31682982      {
31692983         case 0: // LDBS.D
31702984
3171            load = READ_B(DREG + EXTRA_S);
2985            load = READ_B(cpustate, DREG + EXTRA_S);
31722986            load |= (load & 0x80) ? 0xffffff00 : 0;
31732987            SET_SREG(load);
31742988
r19871r19872
31762990
31772991         case 1: // LDBU.D
31782992
3179            load = READ_B(DREG + EXTRA_S);
2993            load = READ_B(cpustate, DREG + EXTRA_S);
31802994            SET_SREG(load);
31812995
31822996            break;
31832997
31842998         case 2:
31852999
3186            load = READ_HW(DREG + (EXTRA_S & ~1));
3000            load = READ_HW(cpustate, DREG + (EXTRA_S & ~1));
31873001
31883002            if( EXTRA_S & 1 ) // LDHS.D
31893003            {
r19871r19872
32043018
32053019            if( (EXTRA_S & 3) == 3 )      // LDD.IOD
32063020            {
3207               load = IO_READ_W(DREG + (EXTRA_S & ~3));
3021               load = IO_READ_W(cpustate, DREG + (EXTRA_S & ~3));
32083022               SET_SREG(load);
32093023
3210               load = IO_READ_W(DREG + (EXTRA_S & ~3) + 4);
3024               load = IO_READ_W(cpustate, DREG + (EXTRA_S & ~3) + 4);
32113025               SET_SREGF(load);
32123026
3213               m_icount -= m_clock_cycles_1; // extra cycle
3027               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
32143028            }
32153029            else if( (EXTRA_S & 3) == 2 ) // LDW.IOD
32163030            {
3217               load = IO_READ_W(DREG + (EXTRA_S & ~3));
3031               load = IO_READ_W(cpustate, DREG + (EXTRA_S & ~3));
32183032               SET_SREG(load);
32193033            }
32203034            else if( (EXTRA_S & 3) == 1 ) // LDD.D
32213035            {
3222               load = READ_W(DREG + (EXTRA_S & ~1));
3036               load = READ_W(cpustate, DREG + (EXTRA_S & ~1));
32233037               SET_SREG(load);
32243038
3225               load = READ_W(DREG + (EXTRA_S & ~1) + 4);
3039               load = READ_W(cpustate, DREG + (EXTRA_S & ~1) + 4);
32263040               SET_SREGF(load);
32273041
3228               m_icount -= m_clock_cycles_1; // extra cycle
3042               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
32293043            }
32303044            else                      // LDW.D
32313045            {
3232               load = READ_W(DREG + (EXTRA_S & ~1));
3046               load = READ_W(cpustate, DREG + (EXTRA_S & ~1));
32333047               SET_SREG(load);
32343048            }
32353049
r19871r19872
32373051      }
32383052   }
32393053
3240   m_icount -= m_clock_cycles_1;
3054   cpustate->icount -= cpustate->clock_cycles_1;
32413055}
32423056
3243void hyperstone_device::hyperstone_ldxx2(struct hyperstone_device::regs_decode *decode)
3057INLINE void hyperstone_ldxx2(hyperstone_state *cpustate, struct regs_decode *decode)
32443058{
32453059   UINT32 load;
32463060
r19871r19872
32573071            if(SAME_SRC_DST)
32583072               DEBUG_PRINTF(("LDBS.N denoted same regs @ %08X",PPC));
32593073
3260            load = READ_B(DREG);
3074            load = READ_B(cpustate, DREG);
32613075            load |= (load & 0x80) ? 0xffffff00 : 0;
32623076            SET_SREG(load);
32633077
r19871r19872
32713085            if(SAME_SRC_DST)
32723086               DEBUG_PRINTF(("LDBU.N denoted same regs @ %08X",PPC));
32733087
3274            load = READ_B(DREG);
3088            load = READ_B(cpustate, DREG);
32753089            SET_SREG(load);
32763090
32773091            if(!SAME_SRC_DST)
r19871r19872
32813095
32823096         case 2:
32833097
3284            load = READ_HW(DREG);
3098            load = READ_HW(cpustate, DREG);
32853099
32863100            if( EXTRA_S & 1 ) // LDHS.N
32873101            {
r19871r19872
33123126                  DEBUG_PRINTF(("LDW.S denoted same regs @ %08X",PPC));
33133127
33143128               if(DREG < SP)
3315                  SET_SREG(READ_W(DREG));
3129                  SET_SREG(READ_W(cpustate, DREG));
33163130               else
33173131                  SET_SREG(GET_ABS_L_REG((DREG & 0xfc) >> 2));
33183132
33193133               if(!SAME_SRC_DST)
33203134                  SET_DREG(DREG + (EXTRA_S & ~3));
33213135
3322               m_icount -= m_clock_cycles_2; // extra cycles
3136               cpustate->icount -= cpustate->clock_cycles_2; // extra cycles
33233137            }
33243138            else if( (EXTRA_S & 3) == 2 ) // Reserved
33253139            {
r19871r19872
33303144               if(SAME_SRC_DST || SAME_SRCF_DST)
33313145                  DEBUG_PRINTF(("LDD.N denoted same regs @ %08X",PPC));
33323146
3333               load = READ_W(DREG);
3147               load = READ_W(cpustate, DREG);
33343148               SET_SREG(load);
33353149
3336               load = READ_W(DREG + 4);
3150               load = READ_W(cpustate, DREG + 4);
33373151               SET_SREGF(load);
33383152
33393153               if(!SAME_SRC_DST && !SAME_SRCF_DST)
33403154                  SET_DREG(DREG + (EXTRA_S & ~1));
33413155
3342               m_icount -= m_clock_cycles_1; // extra cycle
3156               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
33433157            }
33443158            else                      // LDW.N
33453159            {
33463160               if(SAME_SRC_DST)
33473161                  DEBUG_PRINTF(("LDW.N denoted same regs @ %08X",PPC));
33483162
3349               load = READ_W(DREG);
3163               load = READ_W(cpustate, DREG);
33503164               SET_SREG(load);
33513165
33523166               if(!SAME_SRC_DST)
r19871r19872
33573171      }
33583172   }
33593173
3360   m_icount -= m_clock_cycles_1;
3174   cpustate->icount -= cpustate->clock_cycles_1;
33613175}
33623176
33633177//TODO: add trap error
3364void hyperstone_device::hyperstone_stxx1(struct hyperstone_device::regs_decode *decode)
3178INLINE void hyperstone_stxx1(hyperstone_state *cpustate, struct regs_decode *decode)
33653179{
33663180   if( SRC_IS_SR )
33673181      SREG = SREGF = 0;
r19871r19872
33733187         case 0: // STBS.A
33743188
33753189            /* TODO: missing trap on range error */
3376            WRITE_B(EXTRA_S, SREG & 0xff);
3190            WRITE_B(cpustate, EXTRA_S, SREG & 0xff);
33773191
33783192            break;
33793193
33803194         case 1: // STBU.A
33813195
3382            WRITE_B(EXTRA_S, SREG & 0xff);
3196            WRITE_B(cpustate, EXTRA_S, SREG & 0xff);
33833197
33843198            break;
33853199
33863200         case 2:
33873201
3388            WRITE_HW(EXTRA_S & ~1, SREG & 0xffff);
3202            WRITE_HW(cpustate, EXTRA_S & ~1, SREG & 0xffff);
33893203
33903204            /*
33913205                if( EXTRA_S & 1 ) // STHS.A
r19871r19872
34043218
34053219            if( (EXTRA_S & 3) == 3 )      // STD.IOA
34063220            {
3407               IO_WRITE_W(EXTRA_S & ~3, SREG);
3408               IO_WRITE_W((EXTRA_S & ~3) + 4, SREGF);
3221               IO_WRITE_W(cpustate, EXTRA_S & ~3, SREG);
3222               IO_WRITE_W(cpustate, (EXTRA_S & ~3) + 4, SREGF);
34093223
3410               m_icount -= m_clock_cycles_1; // extra cycle
3224               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
34113225            }
34123226            else if( (EXTRA_S & 3) == 2 ) // STW.IOA
34133227            {
3414               IO_WRITE_W(EXTRA_S & ~3, SREG);
3228               IO_WRITE_W(cpustate, EXTRA_S & ~3, SREG);
34153229            }
34163230            else if( (EXTRA_S & 3) == 1 ) // STD.A
34173231            {
3418               WRITE_W(EXTRA_S & ~1, SREG);
3419               WRITE_W((EXTRA_S & ~1) + 4, SREGF);
3232               WRITE_W(cpustate, EXTRA_S & ~1, SREG);
3233               WRITE_W(cpustate, (EXTRA_S & ~1) + 4, SREGF);
34203234
3421               m_icount -= m_clock_cycles_1; // extra cycle
3235               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
34223236            }
34233237            else                      // STW.A
34243238            {
3425               WRITE_W(EXTRA_S & ~1, SREG);
3239               WRITE_W(cpustate, EXTRA_S & ~1, SREG);
34263240            }
34273241
34283242            break;
r19871r19872
34353249         case 0: // STBS.D
34363250
34373251            /* TODO: missing trap on range error */
3438            WRITE_B(DREG + EXTRA_S, SREG & 0xff);
3252            WRITE_B(cpustate, DREG + EXTRA_S, SREG & 0xff);
34393253
34403254            break;
34413255
34423256         case 1: // STBU.D
34433257
3444            WRITE_B(DREG + EXTRA_S, SREG & 0xff);
3258            WRITE_B(cpustate, DREG + EXTRA_S, SREG & 0xff);
34453259
34463260            break;
34473261
34483262         case 2:
34493263
3450            WRITE_HW(DREG + (EXTRA_S & ~1), SREG & 0xffff);
3264            WRITE_HW(cpustate, DREG + (EXTRA_S & ~1), SREG & 0xffff);
34513265
34523266            /*
34533267                if( EXTRA_S & 1 ) // STHS.D
r19871r19872
34663280
34673281            if( (EXTRA_S & 3) == 3 )      // STD.IOD
34683282            {
3469               IO_WRITE_W(DREG + (EXTRA_S & ~3), SREG);
3470               IO_WRITE_W(DREG + (EXTRA_S & ~3) + 4, SREGF);
3283               IO_WRITE_W(cpustate, DREG + (EXTRA_S & ~3), SREG);
3284               IO_WRITE_W(cpustate, DREG + (EXTRA_S & ~3) + 4, SREGF);
34713285
3472               m_icount -= m_clock_cycles_1; // extra cycle
3286               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
34733287            }
34743288            else if( (EXTRA_S & 3) == 2 ) // STW.IOD
34753289            {
3476               IO_WRITE_W(DREG + (EXTRA_S & ~3), SREG);
3290               IO_WRITE_W(cpustate, DREG + (EXTRA_S & ~3), SREG);
34773291            }
34783292            else if( (EXTRA_S & 3) == 1 ) // STD.D
34793293            {
3480               WRITE_W(DREG + (EXTRA_S & ~1), SREG);
3481               WRITE_W(DREG + (EXTRA_S & ~1) + 4, SREGF);
3294               WRITE_W(cpustate, DREG + (EXTRA_S & ~1), SREG);
3295               WRITE_W(cpustate, DREG + (EXTRA_S & ~1) + 4, SREGF);
34823296
3483               m_icount -= m_clock_cycles_1; // extra cycle
3297               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
34843298            }
34853299            else                      // STW.D
34863300            {
3487               WRITE_W(DREG + (EXTRA_S & ~1), SREG);
3301               WRITE_W(cpustate, DREG + (EXTRA_S & ~1), SREG);
34883302            }
34893303
34903304            break;
34913305      }
34923306   }
34933307
3494   m_icount -= m_clock_cycles_1;
3308   cpustate->icount -= cpustate->clock_cycles_1;
34953309}
34963310
3497void hyperstone_device::hyperstone_stxx2(struct hyperstone_device::regs_decode *decode)
3311INLINE void hyperstone_stxx2(hyperstone_state *cpustate, struct regs_decode *decode)
34983312{
34993313   if( SRC_IS_SR )
35003314      SREG = SREGF = 0;
r19871r19872
35103324         case 0: // STBS.N
35113325
35123326            /* TODO: missing trap on range error */
3513            WRITE_B(DREG, SREG & 0xff);
3327            WRITE_B(cpustate, DREG, SREG & 0xff);
35143328            SET_DREG(DREG + EXTRA_S);
35153329
35163330            break;
35173331
35183332         case 1: // STBU.N
35193333
3520            WRITE_B(DREG, SREG & 0xff);
3334            WRITE_B(cpustate, DREG, SREG & 0xff);
35213335            SET_DREG(DREG + EXTRA_S);
35223336
35233337            break;
35243338
35253339         case 2:
35263340
3527            WRITE_HW(DREG, SREG & 0xffff);
3341            WRITE_HW(cpustate, DREG, SREG & 0xffff);
35283342            SET_DREG(DREG + (EXTRA_S & ~1));
35293343
35303344            /*
r19871r19872
35453359            if( (EXTRA_S & 3) == 3 )      // STW.S
35463360            {
35473361               if(DREG < SP)
3548                  WRITE_W(DREG, SREG);
3362                  WRITE_W(cpustate, DREG, SREG);
35493363               else
35503364               {
35513365                  if(((DREG & 0xfc) >> 2) == ((decode->src + GET_FP) % 64) && S_BIT == LOCAL)
r19871r19872
35563370
35573371               SET_DREG(DREG + (EXTRA_S & ~3));
35583372
3559               m_icount -= m_clock_cycles_2; // extra cycles
3373               cpustate->icount -= cpustate->clock_cycles_2; // extra cycles
35603374
35613375            }
35623376            else if( (EXTRA_S & 3) == 2 ) // Reserved
r19871r19872
35653379            }
35663380            else if( (EXTRA_S & 3) == 1 ) // STD.N
35673381            {
3568               WRITE_W(DREG, SREG);
3382               WRITE_W(cpustate, DREG, SREG);
35693383               SET_DREG(DREG + (EXTRA_S & ~1));
35703384
35713385               if( SAME_SRCF_DST )
3572                  WRITE_W(DREG + 4, SREGF + (EXTRA_S & ~1));  // because DREG == SREGF and DREG has been incremented
3386                  WRITE_W(cpustate, DREG + 4, SREGF + (EXTRA_S & ~1));  // because DREG == SREGF and DREG has been incremented
35733387               else
3574                  WRITE_W(DREG + 4, SREGF);
3388                  WRITE_W(cpustate, DREG + 4, SREGF);
35753389
3576               m_icount -= m_clock_cycles_1; // extra cycle
3390               cpustate->icount -= cpustate->clock_cycles_1; // extra cycle
35773391            }
35783392            else                      // STW.N
35793393            {
3580               WRITE_W(DREG, SREG);
3394               WRITE_W(cpustate, DREG, SREG);
35813395               SET_DREG(DREG + (EXTRA_S & ~1));
35823396            }
35833397
r19871r19872
35853399      }
35863400   }
35873401
3588   m_icount -= m_clock_cycles_1;
3402   cpustate->icount -= cpustate->clock_cycles_1;
35893403}
35903404
3591void hyperstone_device::hyperstone_shri(struct hyperstone_device::regs_decode *decode)
3405INLINE void hyperstone_shri(hyperstone_state *cpustate, struct regs_decode *decode)
35923406{
35933407   UINT32 val;
35943408
r19871r19872
36053419   SET_Z( val == 0 ? 1 : 0 );
36063420   SET_N( SIGN_BIT(val) );
36073421
3608   m_icount -= m_clock_cycles_1;
3422   cpustate->icount -= cpustate->clock_cycles_1;
36093423}
36103424
3611void hyperstone_device::hyperstone_sari(struct hyperstone_device::regs_decode *decode)
3425INLINE void hyperstone_sari(hyperstone_state *cpustate, struct regs_decode *decode)
36123426{
36133427   UINT32 val;
36143428   UINT8 sign_bit;
r19871r19872
36363450   SET_Z( val == 0 ? 1 : 0 );
36373451   SET_N( SIGN_BIT(val) );
36383452
3639   m_icount -= m_clock_cycles_1;
3453   cpustate->icount -= cpustate->clock_cycles_1;
36403454}
36413455
3642void hyperstone_device::hyperstone_shli(struct hyperstone_device::regs_decode *decode)
3456INLINE void hyperstone_shli(hyperstone_state *cpustate, struct regs_decode *decode)
36433457{
36443458   UINT32 val, val2;
36453459   UINT64 mask;
r19871r19872
36593473   SET_Z( val2 == 0 ? 1 : 0 );
36603474   SET_N( SIGN_BIT(val2) );
36613475
3662   m_icount -= m_clock_cycles_1;
3476   cpustate->icount -= cpustate->clock_cycles_1;
36633477}
36643478
3665void hyperstone_device::hyperstone_mulu(struct hyperstone_device::regs_decode *decode)
3479INLINE void hyperstone_mulu(hyperstone_state *cpustate, struct regs_decode *decode)
36663480{
36673481   UINT32 low_order, high_order;
36683482   UINT64 double_word;
r19871r19872
36873501   }
36883502
36893503   if(SREG <= 0xffff && DREG <= 0xffff)
3690      m_icount -= m_clock_cycles_4;
3504      cpustate->icount -= cpustate->clock_cycles_4;
36913505   else
3692      m_icount -= m_clock_cycles_6;
3506      cpustate->icount -= cpustate->clock_cycles_6;
36933507}
36943508
3695void hyperstone_device::hyperstone_muls(struct hyperstone_device::regs_decode *decode)
3509INLINE void hyperstone_muls(hyperstone_state *cpustate, struct regs_decode *decode)
36963510{
36973511   UINT32 low_order, high_order;
36983512   INT64 double_word;
r19871r19872
37163530   }
37173531
37183532   if((SREG >= 0xffff8000 && SREG <= 0x7fff) && (DREG >= 0xffff8000 && DREG <= 0x7fff))
3719      m_icount -= m_clock_cycles_4;
3533      cpustate->icount -= cpustate->clock_cycles_4;
37203534   else
3721      m_icount -= m_clock_cycles_6;
3535      cpustate->icount -= cpustate->clock_cycles_6;
37223536}
37233537
3724void hyperstone_device::hyperstone_set(struct hyperstone_device::regs_decode *decode)
3538INLINE void hyperstone_set(hyperstone_state *cpustate, struct regs_decode *decode)
37253539{
37263540   int n = N_VALUE;
37273541
r19871r19872
37343548      //TODO: add fetch opcode when there's the pipeline
37353549
37363550      //TODO: no 1!
3737      m_icount -= m_clock_cycles_1;
3551      cpustate->icount -= cpustate->clock_cycles_1;
37383552   }
37393553   else
37403554   {
r19871r19872
40633877            break;
40643878      }
40653879
4066      m_icount -= m_clock_cycles_1;
3880      cpustate->icount -= cpustate->clock_cycles_1;
40673881   }
40683882}
40693883
4070void hyperstone_device::hyperstone_mul(struct hyperstone_device::regs_decode *decode)
3884INLINE void hyperstone_mul(hyperstone_state *cpustate, struct regs_decode *decode)
40713885{
40723886   UINT32 single_word;
40733887
r19871r19872
40873901   }
40883902
40893903   if((SREG >= 0xffff8000 && SREG <= 0x7fff) && (DREG >= 0xffff8000 && DREG <= 0x7fff))
4090      m_icount -= 3 << m_clock_scale;
3904      cpustate->icount -= 3 << cpustate->clock_scale;
40913905   else
4092      m_icount -= 5 << m_clock_scale;
3906      cpustate->icount -= 5 << cpustate->clock_scale;
40933907}
40943908
4095void hyperstone_device::hyperstone_fadd(struct hyperstone_device::regs_decode *decode)
3909INLINE void hyperstone_fadd(hyperstone_state *cpustate, struct regs_decode *decode)
40963910{
4097   execute_software(decode);
4098   m_icount -= m_clock_cycles_6;
3911   execute_software(cpustate, decode);
3912   cpustate->icount -= cpustate->clock_cycles_6;
40993913}
41003914
4101void hyperstone_device::hyperstone_faddd(struct hyperstone_device::regs_decode *decode)
3915INLINE void hyperstone_faddd(hyperstone_state *cpustate, struct regs_decode *decode)
41023916{
4103   execute_software(decode);
4104   m_icount -= m_clock_cycles_6;
3917   execute_software(cpustate, decode);
3918   cpustate->icount -= cpustate->clock_cycles_6;
41053919}
41063920
4107void hyperstone_device::hyperstone_fsub(struct hyperstone_device::regs_decode *decode)
3921INLINE void hyperstone_fsub(hyperstone_state *cpustate, struct regs_decode *decode)
41083922{
4109   execute_software(decode);
4110   m_icount -= m_clock_cycles_6;
3923   execute_software(cpustate, decode);
3924   cpustate->icount -= cpustate->clock_cycles_6;
41113925}
41123926
4113void hyperstone_device::hyperstone_fsubd(struct hyperstone_device::regs_decode *decode)
3927INLINE void hyperstone_fsubd(hyperstone_state *cpustate, struct regs_decode *decode)
41143928{
4115   execute_software(decode);
4116   m_icount -= m_clock_cycles_6;
3929   execute_software(cpustate, decode);
3930   cpustate->icount -= cpustate->clock_cycles_6;
41173931}
41183932
4119void hyperstone_device::hyperstone_fmul(struct hyperstone_device::regs_decode *decode)
3933INLINE void hyperstone_fmul(hyperstone_state *cpustate, struct regs_decode *decode)
41203934{
4121   execute_software(decode);
4122   m_icount -= m_clock_cycles_6;
3935   execute_software(cpustate, decode);
3936   cpustate->icount -= cpustate->clock_cycles_6;
41233937}
41243938
4125void hyperstone_device::hyperstone_fmuld(struct hyperstone_device::regs_decode *decode)
3939INLINE void hyperstone_fmuld(hyperstone_state *cpustate, struct regs_decode *decode)
41263940{
4127   execute_software(decode);
4128   m_icount -= m_clock_cycles_6;
3941   execute_software(cpustate, decode);
3942   cpustate->icount -= cpustate->clock_cycles_6;
41293943}
41303944
4131void hyperstone_device::hyperstone_fdiv(struct hyperstone_device::regs_decode *decode)
3945INLINE void hyperstone_fdiv(hyperstone_state *cpustate, struct regs_decode *decode)
41323946{
4133   execute_software(decode);
4134   m_icount -= m_clock_cycles_6;
3947   execute_software(cpustate, decode);
3948   cpustate->icount -= cpustate->clock_cycles_6;
41353949}
41363950
4137void hyperstone_device::hyperstone_fdivd(struct hyperstone_device::regs_decode *decode)
3951INLINE void hyperstone_fdivd(hyperstone_state *cpustate, struct regs_decode *decode)
41383952{
4139   execute_software(decode);
4140   m_icount -= m_clock_cycles_6;
3953   execute_software(cpustate, decode);
3954   cpustate->icount -= cpustate->clock_cycles_6;
41413955}
41423956
4143void hyperstone_device::hyperstone_fcmp(struct hyperstone_device::regs_decode *decode)
3957INLINE void hyperstone_fcmp(hyperstone_state *cpustate, struct regs_decode *decode)
41443958{
4145   execute_software(decode);
4146   m_icount -= m_clock_cycles_6;
3959   execute_software(cpustate, decode);
3960   cpustate->icount -= cpustate->clock_cycles_6;
41473961}
41483962
4149void hyperstone_device::hyperstone_fcmpd(struct hyperstone_device::regs_decode *decode)
3963INLINE void hyperstone_fcmpd(hyperstone_state *cpustate, struct regs_decode *decode)
41503964{
4151   execute_software(decode);
4152   m_icount -= m_clock_cycles_6;
3965   execute_software(cpustate, decode);
3966   cpustate->icount -= cpustate->clock_cycles_6;
41533967}
41543968
4155void hyperstone_device::hyperstone_fcmpu(struct hyperstone_device::regs_decode *decode)
3969INLINE void hyperstone_fcmpu(hyperstone_state *cpustate, struct regs_decode *decode)
41563970{
4157   execute_software(decode);
4158   m_icount -= m_clock_cycles_6;
3971   execute_software(cpustate, decode);
3972   cpustate->icount -= cpustate->clock_cycles_6;
41593973}
41603974
4161void hyperstone_device::hyperstone_fcmpud(struct hyperstone_device::regs_decode *decode)
3975INLINE void hyperstone_fcmpud(hyperstone_state *cpustate, struct regs_decode *decode)
41623976{
4163   execute_software(decode);
4164   m_icount -= m_clock_cycles_6;
3977   execute_software(cpustate, decode);
3978   cpustate->icount -= cpustate->clock_cycles_6;
41653979}
41663980
4167void hyperstone_device::hyperstone_fcvt(struct hyperstone_device::regs_decode *decode)
3981INLINE void hyperstone_fcvt(hyperstone_state *cpustate, struct regs_decode *decode)
41683982{
4169   execute_software(decode);
4170   m_icount -= m_clock_cycles_6;
3983   execute_software(cpustate, decode);
3984   cpustate->icount -= cpustate->clock_cycles_6;
41713985}
41723986
4173void hyperstone_device::hyperstone_fcvtd(struct hyperstone_device::regs_decode *decode)
3987INLINE void hyperstone_fcvtd(hyperstone_state *cpustate, struct regs_decode *decode)
41743988{
4175   execute_software(decode);
4176   m_icount -= m_clock_cycles_6;
3989   execute_software(cpustate, decode);
3990   cpustate->icount -= cpustate->clock_cycles_6;
41773991}
41783992
4179void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode *decode)
3993INLINE void hyperstone_extend(hyperstone_state *cpustate, struct regs_decode *decode)
41803994{
41813995   //TODO: add locks, overflow error and other things
41823996   UINT32 vals, vald;
r19871r19872
43744188         break;
43754189   }
43764190
4377   m_icount -= m_clock_cycles_1; //TODO: with the latency it can change
4191   cpustate->icount -= cpustate->clock_cycles_1; //TODO: with the latency it can change
43784192}
43794193
4380void hyperstone_device::hyperstone_do(struct hyperstone_device::regs_decode *decode)
4194INLINE void hyperstone_do(hyperstone_state *cpustate, struct regs_decode *decode)
43814195{
43824196   fatalerror("Executed hyperstone_do instruction. PC = %08X\n", PPC);
43834197}
43844198
4385void hyperstone_device::hyperstone_ldwr(struct hyperstone_device::regs_decode *decode)
4199INLINE void hyperstone_ldwr(hyperstone_state *cpustate, struct regs_decode *decode)
43864200{
4387   SET_SREG(READ_W(DREG));
4201   SET_SREG(READ_W(cpustate, DREG));
43884202
4389   m_icount -= m_clock_cycles_1;
4203   cpustate->icount -= cpustate->clock_cycles_1;
43904204}
43914205
4392void hyperstone_device::hyperstone_lddr(struct hyperstone_device::regs_decode *decode)
4206INLINE void hyperstone_lddr(hyperstone_state *cpustate, struct regs_decode *decode)
43934207{
4394   SET_SREG(READ_W(DREG));
4395   SET_SREGF(READ_W(DREG + 4));
4208   SET_SREG(READ_W(cpustate, DREG));
4209   SET_SREGF(READ_W(cpustate, DREG + 4));
43964210
4397   m_icount -= m_clock_cycles_2;
4211   cpustate->icount -= cpustate->clock_cycles_2;
43984212}
43994213
4400void hyperstone_device::hyperstone_ldwp(struct hyperstone_device::regs_decode *decode)
4214INLINE void hyperstone_ldwp(hyperstone_state *cpustate, struct regs_decode *decode)
44014215{
4402   SET_SREG(READ_W(DREG));
4216   SET_SREG(READ_W(cpustate, DREG));
44034217
44044218   // post increment the destination register if it's different from the source one
44054219   // (needed by Hidden Catch)
44064220   if(!(decode->src == decode->dst && S_BIT == LOCAL))
44074221      SET_DREG(DREG + 4);
44084222
4409   m_icount -= m_clock_cycles_1;
4223   cpustate->icount -= cpustate->clock_cycles_1;
44104224}
44114225
4412void hyperstone_device::hyperstone_lddp(struct hyperstone_device::regs_decode *decode)
4226INLINE void hyperstone_lddp(hyperstone_state *cpustate, struct regs_decode *decode)
44134227{
4414   SET_SREG(READ_W(DREG));
4415   SET_SREGF(READ_W(DREG + 4));
4228   SET_SREG(READ_W(cpustate, DREG));
4229   SET_SREGF(READ_W(cpustate, DREG + 4));
44164230
44174231   // post increment the destination register if it's different from the source one
44184232   // and from the "next source" one
r19871r19872
44254239      DEBUG_PRINTF(("LDD.P denoted same regs @ %08X",PPC));
44264240   }
44274241
4428   m_icount -= m_clock_cycles_2;
4242   cpustate->icount -= cpustate->clock_cycles_2;
44294243}
44304244
4431void hyperstone_device::hyperstone_stwr(struct hyperstone_device::regs_decode *decode)
4245INLINE void hyperstone_stwr(hyperstone_state *cpustate, struct regs_decode *decode)
44324246{
44334247   if( SRC_IS_SR )
44344248      SREG = 0;
44354249
4436   WRITE_W(DREG, SREG);
4250   WRITE_W(cpustate, DREG, SREG);
44374251
4438   m_icount -= m_clock_cycles_1;
4252   cpustate->icount -= cpustate->clock_cycles_1;
44394253}
44404254
4441void hyperstone_device::hyperstone_stdr(struct hyperstone_device::regs_decode *decode)
4255INLINE void hyperstone_stdr(hyperstone_state *cpustate, struct regs_decode *decode)
44424256{
44434257   if( SRC_IS_SR )
44444258      SREG = SREGF = 0;
44454259
4446   WRITE_W(DREG, SREG);
4447   WRITE_W(DREG + 4, SREGF);
4260   WRITE_W(cpustate, DREG, SREG);
4261   WRITE_W(cpustate, DREG + 4, SREGF);
44484262
4449   m_icount -= m_clock_cycles_2;
4263   cpustate->icount -= cpustate->clock_cycles_2;
44504264}
44514265
4452void hyperstone_device::hyperstone_stwp(struct hyperstone_device::regs_decode *decode)
4266INLINE void hyperstone_stwp(hyperstone_state *cpustate, struct regs_decode *decode)
44534267{
44544268   if( SRC_IS_SR )
44554269      SREG = 0;
44564270
4457   WRITE_W(DREG, SREG);
4271   WRITE_W(cpustate, DREG, SREG);
44584272   SET_DREG(DREG + 4);
44594273
4460   m_icount -= m_clock_cycles_1;
4274   cpustate->icount -= cpustate->clock_cycles_1;
44614275}
44624276
4463void hyperstone_device::hyperstone_stdp(struct hyperstone_device::regs_decode *decode)
4277INLINE void hyperstone_stdp(hyperstone_state *cpustate, struct regs_decode *decode)
44644278{
44654279   if( SRC_IS_SR )
44664280      SREG = SREGF = 0;
44674281
4468   WRITE_W(DREG, SREG);
4282   WRITE_W(cpustate, DREG, SREG);
44694283   SET_DREG(DREG + 8);
44704284
44714285   if( SAME_SRCF_DST )
4472      WRITE_W(DREG + 4, SREGF + 8); // because DREG == SREGF and DREG has been incremented
4286      WRITE_W(cpustate, DREG + 4, SREGF + 8); // because DREG == SREGF and DREG has been incremented
44734287   else
4474      WRITE_W(DREG + 4, SREGF);
4288      WRITE_W(cpustate, DREG + 4, SREGF);
44754289
4476   m_icount -= m_clock_cycles_2;
4290   cpustate->icount -= cpustate->clock_cycles_2;
44774291}
44784292
4479void hyperstone_device::hyperstone_dbv(struct hyperstone_device::regs_decode *decode)
4293INLINE void hyperstone_dbv(hyperstone_state *cpustate, struct regs_decode *decode)
44804294{
44814295   if( GET_V )
4482      execute_dbr(decode);
4296      execute_dbr(cpustate, decode);
44834297
4484   m_icount -= m_clock_cycles_1;
4298   cpustate->icount -= cpustate->clock_cycles_1;
44854299}
44864300
4487void hyperstone_device::hyperstone_dbnv(struct hyperstone_device::regs_decode *decode)
4301INLINE void hyperstone_dbnv(hyperstone_state *cpustate, struct regs_decode *decode)
44884302{
44894303   if( !GET_V )
4490      execute_dbr(decode);
4304      execute_dbr(cpustate, decode);
44914305
4492   m_icount -= m_clock_cycles_1;
4306   cpustate->icount -= cpustate->clock_cycles_1;
44934307}
44944308
4495void hyperstone_device::hyperstone_dbe(struct hyperstone_device::regs_decode *decode) //or DBZ
4309INLINE void hyperstone_dbe(hyperstone_state *cpustate, struct regs_decode *decode) //or DBZ
44964310{
44974311   if( GET_Z )
4498      execute_dbr(decode);
4312      execute_dbr(cpustate, decode);
44994313
4500   m_icount -= m_clock_cycles_1;
4314   cpustate->icount -= cpustate->clock_cycles_1;
45014315}
45024316
4503void hyperstone_device::hyperstone_dbne(struct hyperstone_device::regs_decode *decode) //or DBNZ
4317INLINE void hyperstone_dbne(hyperstone_state *cpustate, struct regs_decode *decode) //or DBNZ
45044318{
45054319   if( !GET_Z )
4506      execute_dbr(decode);
4320      execute_dbr(cpustate, decode);
45074321
4508   m_icount -= m_clock_cycles_1;
4322   cpustate->icount -= cpustate->clock_cycles_1;
45094323}
45104324
4511void hyperstone_device::hyperstone_dbc(struct hyperstone_device::regs_decode *decode) //or DBST
4325INLINE void hyperstone_dbc(hyperstone_state *cpustate, struct regs_decode *decode) //or DBST
45124326{
45134327   if( GET_C )
4514      execute_dbr(decode);
4328      execute_dbr(cpustate, decode);
45154329
4516   m_icount -= m_clock_cycles_1;
4330   cpustate->icount -= cpustate->clock_cycles_1;
45174331}
45184332
4519void hyperstone_device::hyperstone_dbnc(struct hyperstone_device::regs_decode *decode) //or DBHE
4333INLINE void hyperstone_dbnc(hyperstone_state *cpustate, struct regs_decode *decode) //or DBHE
45204334{
45214335   if( !GET_C )
4522      execute_dbr(decode);
4336      execute_dbr(cpustate, decode);
45234337
4524   m_icount -= m_clock_cycles_1;
4338   cpustate->icount -= cpustate->clock_cycles_1;
45254339}
45264340
4527void hyperstone_device::hyperstone_dbse(struct hyperstone_device::regs_decode *decode)
4341INLINE void hyperstone_dbse(hyperstone_state *cpustate, struct regs_decode *decode)
45284342{
45294343   if( GET_C || GET_Z )
4530      execute_dbr(decode);
4344      execute_dbr(cpustate, decode);
45314345
4532   m_icount -= m_clock_cycles_1;
4346   cpustate->icount -= cpustate->clock_cycles_1;
45334347}
45344348
4535void hyperstone_device::hyperstone_dbht(struct hyperstone_device::regs_decode *decode)
4349INLINE void hyperstone_dbht(hyperstone_state *cpustate, struct regs_decode *decode)
45364350{
45374351   if( !GET_C && !GET_Z )
4538      execute_dbr(decode);
4352      execute_dbr(cpustate, decode);
45394353
4540   m_icount -= m_clock_cycles_1;
4354   cpustate->icount -= cpustate->clock_cycles_1;
45414355}
45424356
4543void hyperstone_device::hyperstone_dbn(struct hyperstone_device::regs_decode *decode) //or DBLT
4357INLINE void hyperstone_dbn(hyperstone_state *cpustate, struct regs_decode *decode) //or DBLT
45444358{
45454359   if( GET_N )
4546      execute_dbr(decode);
4360      execute_dbr(cpustate, decode);
45474361
4548   m_icount -= m_clock_cycles_1;
4362   cpustate->icount -= cpustate->clock_cycles_1;
45494363}
45504364
4551void hyperstone_device::hyperstone_dbnn(struct hyperstone_device::regs_decode *decode) //or DBGE
4365INLINE void hyperstone_dbnn(hyperstone_state *cpustate, struct regs_decode *decode) //or DBGE
45524366{
45534367   if( !GET_N )
4554      execute_dbr(decode);
4368      execute_dbr(cpustate, decode);
45554369
4556   m_icount -= m_clock_cycles_1;
4370   cpustate->icount -= cpustate->clock_cycles_1;
45574371}
45584372
4559void hyperstone_device::hyperstone_dble(struct hyperstone_device::regs_decode *decode)
4373INLINE void hyperstone_dble(hyperstone_state *cpustate, struct regs_decode *decode)
45604374{
45614375   if( GET_N || GET_Z )
4562      execute_dbr(decode);
4376      execute_dbr(cpustate, decode);
45634377
4564   m_icount -= m_clock_cycles_1;
4378   cpustate->icount -= cpustate->clock_cycles_1;
45654379}
45664380
4567void hyperstone_device::hyperstone_dbgt(struct hyperstone_device::regs_decode *decode)
4381INLINE void hyperstone_dbgt(hyperstone_state *cpustate, struct regs_decode *decode)
45684382{
45694383   if( !GET_N && !GET_Z )
4570      execute_dbr(decode);
4384      execute_dbr(cpustate, decode);
45714385
4572   m_icount -= m_clock_cycles_1;
4386   cpustate->icount -= cpustate->clock_cycles_1;
45734387}
45744388
4575void hyperstone_device::hyperstone_dbr(struct hyperstone_device::regs_decode *decode)
4389INLINE void hyperstone_dbr(hyperstone_state *cpustate, struct regs_decode *decode)
45764390{
4577   execute_dbr(decode);
4391   execute_dbr(cpustate, decode);
45784392}
45794393
4580void hyperstone_device::hyperstone_frame(struct hyperstone_device::regs_decode *decode)
4394INLINE void hyperstone_frame(hyperstone_state *cpustate, struct regs_decode *decode)
45814395{
45824396   INT8 difference; // really it's 7 bits
45834397   UINT8 realfp = GET_FP - SRC_CODE;
r19871r19872
46024416
46034417      do
46044418      {
4605         WRITE_W(SP, GET_ABS_L_REG((SP & 0xfc) >> 2));
4419         WRITE_W(cpustate, SP, GET_ABS_L_REG((SP & 0xfc) >> 2));
46064420         SP += 4;
46074421         difference++;
46084422
r19871r19872
46104424
46114425      if( tmp_flag )
46124426      {
4613         UINT32 addr = get_trap_addr(TRAPNO_FRAME_ERROR);
4614         execute_exception(addr);
4427         UINT32 addr = get_trap_addr(cpustate, TRAPNO_FRAME_ERROR);
4428         execute_exception(cpustate, addr);
46154429      }
46164430   }
46174431
46184432   //TODO: no 1!
4619   m_icount -= m_clock_cycles_1;
4433   cpustate->icount -= cpustate->clock_cycles_1;
46204434}
46214435
4622void hyperstone_device::hyperstone_call(struct hyperstone_device::regs_decode *decode)
4436INLINE void hyperstone_call(hyperstone_state *cpustate, struct regs_decode *decode)
46234437{
46244438   if( SRC_IS_SR )
46254439      SREG = 0;
r19871r19872
46294443
46304444   EXTRA_S = (EXTRA_S & ~1) + SREG;
46314445
4632   SET_ILC(m_instruction_length & 3);
4446   SET_ILC(cpustate->instruction_length & 3);
46334447
46344448   SET_DREG((PC & 0xfffffffe) | GET_S);
46354449   SET_DREGF(SR);
r19871r19872
46424456   PPC = PC;
46434457   PC = EXTRA_S; // const value
46444458
4645   m_intblock = 2;
4459   cpustate->intblock = 2;
46464460
46474461   //TODO: add interrupt locks, errors, ....
46484462
46494463   //TODO: no 1!
4650   m_icount -= m_clock_cycles_1;
4464   cpustate->icount -= cpustate->clock_cycles_1;
46514465}
46524466
4653void hyperstone_device::hyperstone_bv(struct hyperstone_device::regs_decode *decode)
4467INLINE void hyperstone_bv(hyperstone_state *cpustate, struct regs_decode *decode)
46544468{
46554469   if( GET_V )
4656      execute_br(decode);
4470      execute_br(cpustate, decode);
46574471   else
4658      m_icount -= m_clock_cycles_1;
4472      cpustate->icount -= cpustate->clock_cycles_1;
46594473}
46604474
4661void hyperstone_device::hyperstone_bnv(struct hyperstone_device::regs_decode *decode)
4475INLINE void hyperstone_bnv(hyperstone_state *cpustate, struct regs_decode *decode)
46624476{
46634477   if( !GET_V )
4664      execute_br(decode);
4478      execute_br(cpustate, decode);
46654479   else
4666      m_icount -= m_clock_cycles_1;
4480      cpustate->icount -= cpustate->clock_cycles_1;
46674481}
46684482
4669void hyperstone_device::hyperstone_be(struct hyperstone_device::regs_decode *decode) //or BZ
4483INLINE void hyperstone_be(hyperstone_state *cpustate, struct regs_decode *decode) //or BZ
46704484{
46714485   if( GET_Z )
4672      execute_br(decode);
4486      execute_br(cpustate, decode);
46734487   else
4674      m_icount -= m_clock_cycles_1;
4488      cpustate->icount -= cpustate->clock_cycles_1;
46754489}
46764490
4677void hyperstone_device::hyperstone_bne(struct hyperstone_device::regs_decode *decode) //or BNZ
4491INLINE void hyperstone_bne(hyperstone_state *cpustate, struct regs_decode *decode) //or BNZ
46784492{
46794493   if( !GET_Z )
4680      execute_br(decode);
4494      execute_br(cpustate, decode);
46814495   else
4682      m_icount -= m_clock_cycles_1;
4496      cpustate->icount -= cpustate->clock_cycles_1;
46834497}
46844498
4685void hyperstone_device::hyperstone_bc(struct hyperstone_device::regs_decode *decode) //or BST
4499INLINE void hyperstone_bc(hyperstone_state *cpustate, struct regs_decode *decode) //or BST
46864500{
46874501   if( GET_C )
4688      execute_br(decode);
4502      execute_br(cpustate, decode);
46894503   else
4690      m_icount -= m_clock_cycles_1;
4504      cpustate->icount -= cpustate->clock_cycles_1;
46914505}
46924506
4693void hyperstone_device::hyperstone_bnc(struct hyperstone_device::regs_decode *decode) //or BHE
4507INLINE void hyperstone_bnc(hyperstone_state *cpustate, struct regs_decode *decode) //or BHE
46944508{
46954509   if( !GET_C )
4696      execute_br(decode);
4510      execute_br(cpustate, decode);
46974511   else
4698      m_icount -= m_clock_cycles_1;
4512      cpustate->icount -= cpustate->clock_cycles_1;
46994513}
47004514
4701void hyperstone_device::hyperstone_bse(struct hyperstone_device::regs_decode *decode)
4515INLINE void hyperstone_bse(hyperstone_state *cpustate, struct regs_decode *decode)
47024516{
47034517   if( GET_C || GET_Z )
4704      execute_br(decode);
4518      execute_br(cpustate, decode);
47054519   else
4706      m_icount -= m_clock_cycles_1;
4520      cpustate->icount -= cpustate->clock_cycles_1;
47074521}
47084522
4709void hyperstone_device::hyperstone_bht(struct hyperstone_device::regs_decode *decode)
4523INLINE void hyperstone_bht(hyperstone_state *cpustate, struct regs_decode *decode)
47104524{
47114525   if( !GET_C && !GET_Z )
4712      execute_br(decode);
4526      execute_br(cpustate, decode);
47134527   else
4714      m_icount -= m_clock_cycles_1;
4528      cpustate->icount -= cpustate->clock_cycles_1;
47154529}
47164530
4717void hyperstone_device::hyperstone_bn(struct hyperstone_device::regs_decode *decode) //or BLT
4531INLINE void hyperstone_bn(hyperstone_state *cpustate, struct regs_decode *decode) //or BLT
47184532{
47194533   if( GET_N )
4720      execute_br(decode);
4534      execute_br(cpustate, decode);
47214535   else
4722      m_icount -= m_clock_cycles_1;
4536      cpustate->icount -= cpustate->clock_cycles_1;
47234537}
47244538
4725void hyperstone_device::hyperstone_bnn(struct hyperstone_device::regs_decode *decode) //or BGE
4539INLINE void hyperstone_bnn(hyperstone_state *cpustate, struct regs_decode *decode) //or BGE
47264540{
47274541   if( !GET_N )
4728      execute_br(decode);
4542      execute_br(cpustate, decode);
47294543   else
4730      m_icount -= m_clock_cycles_1;
4544      cpustate->icount -= cpustate->clock_cycles_1;
47314545}
47324546
4733void hyperstone_device::hyperstone_ble(struct hyperstone_device::regs_decode *decode)
4547INLINE void hyperstone_ble(hyperstone_state *cpustate, struct regs_decode *decode)
47344548{
47354549   if( GET_N || GET_Z )
4736      execute_br(decode);
4550      execute_br(cpustate, decode);
47374551   else
4738      m_icount -= m_clock_cycles_1;
4552      cpustate->icount -= cpustate->clock_cycles_1;
47394553}
47404554
4741void hyperstone_device::hyperstone_bgt(struct hyperstone_device::regs_decode *decode)
4555INLINE void hyperstone_bgt(hyperstone_state *cpustate, struct regs_decode *decode)
47424556{
47434557   if( !GET_N && !GET_Z )
4744      execute_br(decode);
4558      execute_br(cpustate, decode);
47454559   else
4746      m_icount -= m_clock_cycles_1;
4560      cpustate->icount -= cpustate->clock_cycles_1;
47474561}
47484562
4749void hyperstone_device::hyperstone_br(struct hyperstone_device::regs_decode *decode)
4563INLINE void hyperstone_br(hyperstone_state *cpustate, struct regs_decode *decode)
47504564{
4751   execute_br(decode);
4565   execute_br(cpustate, decode);
47524566}
47534567
4754void hyperstone_device::hyperstone_trap(struct hyperstone_device::regs_decode *decode)
4568INLINE void hyperstone_trap(hyperstone_state *cpustate, struct regs_decode *decode)
47554569{
47564570   UINT8 code, trapno;
47574571   UINT32 addr;
47584572
47594573   trapno = (OP & 0xfc) >> 2;
47604574
4761   addr = get_trap_addr(trapno);
4575   addr = get_trap_addr(cpustate, trapno);
47624576   code = ((OP & 0x300) >> 6) | (OP & 0x03);
47634577
47644578   switch( code )
47654579   {
47664580      case TRAPLE:
47674581         if( GET_N || GET_Z )
4768            execute_trap(addr);
4582            execute_trap(cpustate, addr);
47694583
47704584         break;
47714585
47724586      case TRAPGT:
47734587         if( !GET_N && !GET_Z )
4774            execute_trap(addr);
4588            execute_trap(cpustate, addr);
47754589
47764590         break;
47774591
47784592      case TRAPLT:
47794593         if( GET_N )
4780            execute_trap(addr);
4594            execute_trap(cpustate, addr);
47814595
47824596         break;
47834597
47844598      case TRAPGE:
47854599         if( !GET_N )
4786            execute_trap(addr);
4600            execute_trap(cpustate, addr);
47874601
47884602         break;
47894603
47904604      case TRAPSE:
47914605         if( GET_C || GET_Z )
4792            execute_trap(addr);
4606            execute_trap(cpustate, addr);
47934607
47944608         break;
47954609
47964610      case TRAPHT:
47974611         if( !GET_C && !GET_Z )
4798            execute_trap(addr);
4612            execute_trap(cpustate, addr);
47994613
48004614         break;
48014615
48024616      case TRAPST:
48034617         if( GET_C )
4804            execute_trap(addr);
4618            execute_trap(cpustate, addr);
48054619
48064620         break;
48074621
48084622      case TRAPHE:
48094623         if( !GET_C )
4810            execute_trap(addr);
4624            execute_trap(cpustate, addr);
48114625
48124626         break;
48134627
48144628      case TRAPE:
48154629         if( GET_Z )
4816            execute_trap(addr);
4630            execute_trap(cpustate, addr);
48174631
48184632         break;
48194633
48204634      case TRAPNE:
48214635         if( !GET_Z )
4822            execute_trap(addr);
4636            execute_trap(cpustate, addr);
48234637
48244638         break;
48254639
48264640      case TRAPV:
48274641         if( GET_V )
4828            execute_trap(addr);
4642            execute_trap(cpustate, addr);
48294643
48304644         break;
48314645
48324646      case TRAP:
4833         execute_trap(addr);
4647         execute_trap(cpustate, addr);
48344648
48354649         break;
48364650   }
48374651
4838   m_icount -= m_clock_cycles_1;
4652   cpustate->icount -= cpustate->clock_cycles_1;
48394653}
48404654
48414655
48424656#include "e132xsop.c"
48434657
4844//**************************************************************************
4845//  CORE EXECUTION LOOP
4846//**************************************************************************
48474658
4848//-------------------------------------------------
4849//  execute_min_cycles - return minimum number of
4850//  cycles it takes for one instruction to execute
4851//-------------------------------------------------
4659static CPU_EXECUTE( hyperstone )
4660{
4661   hyperstone_state *cpustate = get_safe_token(device);
48524662
4853UINT32 hyperstone_device::execute_min_cycles() const
4663   if (cpustate->intblock < 0)
4664      cpustate->intblock = 0;
4665   check_interrupts(cpustate);
4666
4667   do
4668   {
4669      UINT32 oldh = SR & 0x00000020;
4670
4671      PPC = PC;   /* copy PC to previous PC */
4672      debugger_instruction_hook(device, PC);
4673
4674      OP = READ_OP(cpustate, PC);
4675      PC += 2;
4676
4677      cpustate->instruction_length = 1;
4678
4679      /* execute opcode */
4680      (*hyperstone_op[(OP & 0xff00) >> 8])(cpustate);
4681
4682      /* clear the H state if it was previously set */
4683      SR ^= oldh;
4684
4685      SET_ILC(cpustate->instruction_length & 3);
4686
4687      if( GET_T && GET_P && cpustate->delay.delay_cmd == NO_DELAY ) /* Not in a Delayed Branch instructions */
4688      {
4689         UINT32 addr = get_trap_addr(cpustate, TRAPNO_TRACE_EXCEPTION);
4690         execute_exception(cpustate, addr);
4691      }
4692
4693      if (--cpustate->intblock == 0)
4694         check_interrupts(cpustate);
4695
4696   } while( cpustate->icount > 0 );
4697}
4698
4699
4700/**************************************************************************
4701 * Generic set_info
4702 **************************************************************************/
4703
4704static CPU_SET_INFO( hyperstone )
48544705{
4855   return 1;
4706   hyperstone_state *cpustate = get_safe_token(device);
4707   switch (state)
4708   {
4709      /* --- the following bits of info are set as 64-bit signed integers --- */
4710
4711      case CPUINFO_INT_PC:
4712      case CPUINFO_INT_REGISTER + E132XS_PC:         PC = info->i;                  break;
4713      case CPUINFO_INT_REGISTER + E132XS_SR:         SR = info->i;                  break;
4714      case CPUINFO_INT_REGISTER + E132XS_FER:         FER = info->i;                  break;
4715      case CPUINFO_INT_REGISTER + E132XS_G3:         set_global_register(cpustate, 3, info->i);   break;
4716      case CPUINFO_INT_REGISTER + E132XS_G4:         set_global_register(cpustate, 4, info->i);   break;
4717      case CPUINFO_INT_REGISTER + E132XS_G5:         set_global_register(cpustate, 5, info->i);   break;
4718      case CPUINFO_INT_REGISTER + E132XS_G6:         set_global_register(cpustate, 6, info->i);   break;
4719      case CPUINFO_INT_REGISTER + E132XS_G7:         set_global_register(cpustate, 7, info->i);   break;
4720      case CPUINFO_INT_REGISTER + E132XS_G8:         set_global_register(cpustate, 8, info->i);   break;
4721      case CPUINFO_INT_REGISTER + E132XS_G9:         set_global_register(cpustate, 9, info->i);   break;
4722      case CPUINFO_INT_REGISTER + E132XS_G10:         set_global_register(cpustate, 10, info->i);   break;
4723      case CPUINFO_INT_REGISTER + E132XS_G11:         set_global_register(cpustate, 11, info->i);   break;
4724      case CPUINFO_INT_REGISTER + E132XS_G12:         set_global_register(cpustate, 12, info->i);   break;
4725      case CPUINFO_INT_REGISTER + E132XS_G13:         set_global_register(cpustate, 13, info->i);   break;
4726      case CPUINFO_INT_REGISTER + E132XS_G14:         set_global_register(cpustate, 14, info->i);   break;
4727      case CPUINFO_INT_REGISTER + E132XS_G15:         set_global_register(cpustate, 15, info->i);   break;
4728      case CPUINFO_INT_REGISTER + E132XS_G16:         set_global_register(cpustate, 16, info->i);   break;
4729      case CPUINFO_INT_REGISTER + E132XS_G17:         set_global_register(cpustate, 17, info->i);   break;
4730      case CPUINFO_INT_SP:
4731      case CPUINFO_INT_REGISTER + E132XS_SP:         SP  = info->i;                     break;
4732      case CPUINFO_INT_REGISTER + E132XS_UB:         UB  = info->i;                     break;
4733      case CPUINFO_INT_REGISTER + E132XS_BCR:         BCR = info->i;                     break;
4734      case CPUINFO_INT_REGISTER + E132XS_TPR:         TPR = info->i;                     break;
4735      case CPUINFO_INT_REGISTER + E132XS_TCR:         TCR = info->i;                     break;
4736      case CPUINFO_INT_REGISTER + E132XS_TR:         set_global_register(cpustate, TR_REGISTER, info->i);   break;
4737      case CPUINFO_INT_REGISTER + E132XS_WCR:         WCR = info->i;                     break;
4738      case CPUINFO_INT_REGISTER + E132XS_ISR:         ISR = info->i;                     break;
4739      case CPUINFO_INT_REGISTER + E132XS_FCR:         FCR = info->i;                     break;
4740      case CPUINFO_INT_REGISTER + E132XS_MCR:         MCR = info->i;                     break;
4741      case CPUINFO_INT_REGISTER + E132XS_G28:         set_global_register(cpustate, 28, info->i);   break;
4742      case CPUINFO_INT_REGISTER + E132XS_G29:         set_global_register(cpustate, 29, info->i);   break;
4743      case CPUINFO_INT_REGISTER + E132XS_G30:         set_global_register(cpustate, 30, info->i);   break;
4744      case CPUINFO_INT_REGISTER + E132XS_G31:         set_global_register(cpustate, 31, info->i);   break;
4745      case CPUINFO_INT_REGISTER + E132XS_CL0:         cpustate->local_regs[(0 + GET_FP) % 64] = info->i; break;
4746      case CPUINFO_INT_REGISTER + E132XS_CL1:         cpustate->local_regs[(1 + GET_FP) % 64] = info->i; break;
4747      case CPUINFO_INT_REGISTER + E132XS_CL2:         cpustate->local_regs[(2 + GET_FP) % 64] = info->i; break;
4748      case CPUINFO_INT_REGISTER + E132XS_CL3:         cpustate->local_regs[(3 + GET_FP) % 64] = info->i; break;
4749      case CPUINFO_INT_REGISTER + E132XS_CL4:         cpustate->local_regs[(4 + GET_FP) % 64] = info->i; break;
4750      case CPUINFO_INT_REGISTER + E132XS_CL5:         cpustate->local_regs[(5 + GET_FP) % 64] = info->i; break;
4751      case CPUINFO_INT_REGISTER + E132XS_CL6:         cpustate->local_regs[(6 + GET_FP) % 64] = info->i; break;
4752      case CPUINFO_INT_REGISTER + E132XS_CL7:         cpustate->local_regs[(7 + GET_FP) % 64] = info->i; break;
4753      case CPUINFO_INT_REGISTER + E132XS_CL8:         cpustate->local_regs[(8 + GET_FP) % 64] = info->i; break;
4754      case CPUINFO_INT_REGISTER + E132XS_CL9:         cpustate->local_regs[(9 + GET_FP) % 64] = info->i; break;
4755      case CPUINFO_INT_REGISTER + E132XS_CL10:      cpustate->local_regs[(10 + GET_FP) % 64] = info->i; break;
4756      case CPUINFO_INT_REGISTER + E132XS_CL11:      cpustate->local_regs[(11 + GET_FP) % 64] = info->i; break;
4757      case CPUINFO_INT_REGISTER + E132XS_CL12:      cpustate->local_regs[(12 + GET_FP) % 64] = info->i; break;
4758      case CPUINFO_INT_REGISTER + E132XS_CL13:      cpustate->local_regs[(13 + GET_FP) % 64] = info->i; break;
4759      case CPUINFO_INT_REGISTER + E132XS_CL14:      cpustate->local_regs[(14 + GET_FP) % 64] = info->i; break;
4760      case CPUINFO_INT_REGISTER + E132XS_CL15:      cpustate->local_regs[(15 + GET_FP) % 64] = info->i; break;
4761      case CPUINFO_INT_REGISTER + E132XS_L0:         cpustate->local_regs[0] = info->i;      break;
4762      case CPUINFO_INT_REGISTER + E132XS_L1:         cpustate->local_regs[1] = info->i;      break;
4763      case CPUINFO_INT_REGISTER + E132XS_L2:         cpustate->local_regs[2] = info->i;      break;
4764      case CPUINFO_INT_REGISTER + E132XS_L3:         cpustate->local_regs[3] = info->i;      break;
4765      case CPUINFO_INT_REGISTER + E132XS_L4:         cpustate->local_regs[4] = info->i;      break;
4766      case CPUINFO_INT_REGISTER + E132XS_L5:         cpustate->local_regs[5] = info->i;      break;
4767      case CPUINFO_INT_REGISTER + E132XS_L6:         cpustate->local_regs[6] = info->i;      break;
4768      case CPUINFO_INT_REGISTER + E132XS_L7:         cpustate->local_regs[7] = info->i;      break;
4769      case CPUINFO_INT_REGISTER + E132XS_L8:         cpustate->local_regs[8] = info->i;      break;
4770      case CPUINFO_INT_REGISTER + E132XS_L9:         cpustate->local_regs[9] = info->i;      break;
4771      case CPUINFO_INT_REGISTER + E132XS_L10:         cpustate->local_regs[10] = info->i;   break;
4772      case CPUINFO_INT_REGISTER + E132XS_L11:         cpustate->local_regs[11] = info->i;   break;
4773      case CPUINFO_INT_REGISTER + E132XS_L12:         cpustate->local_regs[12] = info->i;   break;
4774      case CPUINFO_INT_REGISTER + E132XS_L13:         cpustate->local_regs[13] = info->i;   break;
4775      case CPUINFO_INT_REGISTER + E132XS_L14:         cpustate->local_regs[14] = info->i;   break;
4776      case CPUINFO_INT_REGISTER + E132XS_L15:         cpustate->local_regs[15] = info->i;   break;
4777      case CPUINFO_INT_REGISTER + E132XS_L16:         cpustate->local_regs[16] = info->i;   break;
4778      case CPUINFO_INT_REGISTER + E132XS_L17:         cpustate->local_regs[17] = info->i;   break;
4779      case CPUINFO_INT_REGISTER + E132XS_L18:         cpustate->local_regs[18] = info->i;   break;
4780      case CPUINFO_INT_REGISTER + E132XS_L19:         cpustate->local_regs[19] = info->i;   break;
4781      case CPUINFO_INT_REGISTER + E132XS_L20:         cpustate->local_regs[20] = info->i;   break;
4782      case CPUINFO_INT_REGISTER + E132XS_L21:         cpustate->local_regs[21] = info->i;   break;
4783      case CPUINFO_INT_REGISTER + E132XS_L22:         cpustate->local_regs[22] = info->i;   break;
4784      case CPUINFO_INT_REGISTER + E132XS_L23:         cpustate->local_regs[23] = info->i;   break;
4785      case CPUINFO_INT_REGISTER + E132XS_L24:         cpustate->local_regs[24] = info->i;   break;
4786      case CPUINFO_INT_REGISTER + E132XS_L25:         cpustate->local_regs[25] = info->i;   break;
4787      case CPUINFO_INT_REGISTER + E132XS_L26:         cpustate->local_regs[26] = info->i;   break;
4788      case CPUINFO_INT_REGISTER + E132XS_L27:         cpustate->local_regs[27] = info->i;   break;
4789      case CPUINFO_INT_REGISTER + E132XS_L28:         cpustate->local_regs[28] = info->i;   break;
4790      case CPUINFO_INT_REGISTER + E132XS_L29:         cpustate->local_regs[29] = info->i;   break;
4791      case CPUINFO_INT_REGISTER + E132XS_L30:         cpustate->local_regs[30] = info->i;   break;
4792      case CPUINFO_INT_REGISTER + E132XS_L31:         cpustate->local_regs[31] = info->i;   break;
4793      case CPUINFO_INT_REGISTER + E132XS_L32:         cpustate->local_regs[32] = info->i;   break;
4794      case CPUINFO_INT_REGISTER + E132XS_L33:         cpustate->local_regs[33] = info->i;   break;
4795      case CPUINFO_INT_REGISTER + E132XS_L34:         cpustate->local_regs[34] = info->i;   break;
4796      case CPUINFO_INT_REGISTER + E132XS_L35:         cpustate->local_regs[35] = info->i;   break;
4797      case CPUINFO_INT_REGISTER + E132XS_L36:         cpustate->local_regs[36] = info->i;   break;
4798      case CPUINFO_INT_REGISTER + E132XS_L37:         cpustate->local_regs[37] = info->i;   break;
4799      case CPUINFO_INT_REGISTER + E132XS_L38:         cpustate->local_regs[38] = info->i;   break;
4800      case CPUINFO_INT_REGISTER + E132XS_L39:         cpustate->local_regs[39] = info->i;   break;
4801      case CPUINFO_INT_REGISTER + E132XS_L40:         cpustate->local_regs[40] = info->i;   break;
4802      case CPUINFO_INT_REGISTER + E132XS_L41:         cpustate->local_regs[41] = info->i;   break;
4803      case CPUINFO_INT_REGISTER + E132XS_L42:         cpustate->local_regs[42] = info->i;   break;
4804      case CPUINFO_INT_REGISTER + E132XS_L43:         cpustate->local_regs[43] = info->i;   break;
4805      case CPUINFO_INT_REGISTER + E132XS_L44:         cpustate->local_regs[44] = info->i;   break;
4806      case CPUINFO_INT_REGISTER + E132XS_L45:         cpustate->local_regs[45] = info->i;   break;
4807      case CPUINFO_INT_REGISTER + E132XS_L46:         cpustate->local_regs[46] = info->i;   break;
4808      case CPUINFO_INT_REGISTER + E132XS_L47:         cpustate->local_regs[47] = info->i;   break;
4809      case CPUINFO_INT_REGISTER + E132XS_L48:         cpustate->local_regs[48] = info->i;   break;
4810      case CPUINFO_INT_REGISTER + E132XS_L49:         cpustate->local_regs[49] = info->i;   break;
4811      case CPUINFO_INT_REGISTER + E132XS_L50:         cpustate->local_regs[50] = info->i;   break;
4812      case CPUINFO_INT_REGISTER + E132XS_L51:         cpustate->local_regs[51] = info->i;   break;
4813      case CPUINFO_INT_REGISTER + E132XS_L52:         cpustate->local_regs[52] = info->i;   break;
4814      case CPUINFO_INT_REGISTER + E132XS_L53:         cpustate->local_regs[53] = info->i;   break;
4815      case CPUINFO_INT_REGISTER + E132XS_L54:         cpustate->local_regs[54] = info->i;   break;
4816      case CPUINFO_INT_REGISTER + E132XS_L55:         cpustate->local_regs[55] = info->i;   break;
4817      case CPUINFO_INT_REGISTER + E132XS_L56:         cpustate->local_regs[56] = info->i;   break;
4818      case CPUINFO_INT_REGISTER + E132XS_L57:         cpustate->local_regs[57] = info->i;   break;
4819      case CPUINFO_INT_REGISTER + E132XS_L58:         cpustate->local_regs[58] = info->i;   break;
4820      case CPUINFO_INT_REGISTER + E132XS_L59:         cpustate->local_regs[59] = info->i;   break;
4821      case CPUINFO_INT_REGISTER + E132XS_L60:         cpustate->local_regs[60] = info->i;   break;
4822      case CPUINFO_INT_REGISTER + E132XS_L61:         cpustate->local_regs[61] = info->i;   break;
4823      case CPUINFO_INT_REGISTER + E132XS_L62:         cpustate->local_regs[62] = info->i;   break;
4824      case CPUINFO_INT_REGISTER + E132XS_L63:         cpustate->local_regs[63] = info->i;   break;
4825
4826      case CPUINFO_INT_INPUT_STATE + 0:            set_irq_line(cpustate, 0, info->i);            break;
4827      case CPUINFO_INT_INPUT_STATE + 1:            set_irq_line(cpustate, 1, info->i);            break;
4828      case CPUINFO_INT_INPUT_STATE + 2:            set_irq_line(cpustate, 2, info->i);            break;
4829      case CPUINFO_INT_INPUT_STATE + 3:            set_irq_line(cpustate, 3, info->i);            break;
4830      case CPUINFO_INT_INPUT_STATE + 4:            set_irq_line(cpustate, 4, info->i);            break;
4831      case CPUINFO_INT_INPUT_STATE + 5:            set_irq_line(cpustate, 5, info->i);            break;
4832      case CPUINFO_INT_INPUT_STATE + 6:            set_irq_line(cpustate, 6, info->i);            break;
4833      case CPUINFO_INT_INPUT_STATE + 7:            set_irq_line(cpustate, 7, info->i);            break;
4834   }
48564835}
48574836
4837/**************************************************************************
4838 * Generic get_info
4839 **************************************************************************/
48584840
4859//-------------------------------------------------
4860//  execute_max_cycles - return maximum number of
4861//  cycles it takes for one instruction to execute
4862//-------------------------------------------------
4841static CPU_GET_INFO( hyperstone )
4842{
4843   hyperstone_state *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
4844   switch (state)
4845   {
4846      /* --- the following bits of info are returned as 64-bit signed integers --- */
4847      case CPUINFO_INT_CONTEXT_SIZE:               info->i = sizeof(hyperstone_state);      break;
4848      case CPUINFO_INT_INPUT_LINES:               info->i = 8;                     break;
4849      case CPUINFO_INT_DEFAULT_IRQ_VECTOR:         info->i = 0;                     break;
4850      case CPUINFO_INT_ENDIANNESS:               info->i = ENDIANNESS_BIG;               break;
4851      case CPUINFO_INT_CLOCK_MULTIPLIER:            info->i = 1;                     break;
4852      case CPUINFO_INT_CLOCK_DIVIDER:               info->i = 1;                     break;
4853      case CPUINFO_INT_MIN_INSTRUCTION_BYTES:         info->i = 2;                     break;
4854      case CPUINFO_INT_MAX_INSTRUCTION_BYTES:         info->i = 6;                     break;
4855      case CPUINFO_INT_MIN_CYCLES:               info->i = 1;                     break;
4856      case CPUINFO_INT_MAX_CYCLES:               info->i = 36;                     break;
48634857
4864UINT32 hyperstone_device::execute_max_cycles() const
4858      case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32;               break;
4859      case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0;               break;
4860      case CPUINFO_INT_DATABUS_WIDTH + AS_DATA:   info->i = 0;               break;
4861      case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA:   info->i = 0;               break;
4862      case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA:   info->i = 0;               break;
4863      case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO:      info->i = 15;               break;
4864      case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO:      info->i = 0;               break;
4865
4866      case CPUINFO_INT_INPUT_STATE + 0:               /* not implemented */            break;
4867
4868      case CPUINFO_INT_PREVIOUSPC:               info->i = PPC;                     break;
4869
4870      case CPUINFO_INT_PC:
4871      case CPUINFO_INT_REGISTER + E132XS_PC:         info->i =  PC;                     break;
4872      case CPUINFO_INT_REGISTER + E132XS_SR:         info->i =  SR;                     break;
4873      case CPUINFO_INT_REGISTER + E132XS_FER:         info->i =  FER;                     break;
4874      case CPUINFO_INT_REGISTER + E132XS_G3:         info->i =  get_global_register(cpustate, 3);   break;
4875      case CPUINFO_INT_REGISTER + E132XS_G4:         info->i =  get_global_register(cpustate, 4);   break;
4876      case CPUINFO_INT_REGISTER + E132XS_G5:         info->i =  get_global_register(cpustate, 5);   break;
4877      case CPUINFO_INT_REGISTER + E132XS_G6:         info->i =  get_global_register(cpustate, 6);   break;
4878      case CPUINFO_INT_REGISTER + E132XS_G7:         info->i =  get_global_register(cpustate, 7);   break;
4879      case CPUINFO_INT_REGISTER + E132XS_G8:         info->i =  get_global_register(cpustate, 8);   break;
4880      case CPUINFO_INT_REGISTER + E132XS_G9:         info->i =  get_global_register(cpustate, 9);   break;
4881      case CPUINFO_INT_REGISTER + E132XS_G10:         info->i =  get_global_register(cpustate, 10);   break;
4882      case CPUINFO_INT_REGISTER + E132XS_G11:         info->i =  get_global_register(cpustate, 11);   break;
4883      case CPUINFO_INT_REGISTER + E132XS_G12:         info->i =  get_global_register(cpustate, 12);   break;
4884      case CPUINFO_INT_REGISTER + E132XS_G13:         info->i =  get_global_register(cpustate, 13);   break;
4885      case CPUINFO_INT_REGISTER + E132XS_G14:         info->i =  get_global_register(cpustate, 14);   break;
4886      case CPUINFO_INT_REGISTER + E132XS_G15:         info->i =  get_global_register(cpustate, 15);   break;
4887      case CPUINFO_INT_REGISTER + E132XS_G16:         info->i =  get_global_register(cpustate, 16);   break;
4888      case CPUINFO_INT_REGISTER + E132XS_G17:         info->i =  get_global_register(cpustate, 17);   break;
4889      case CPUINFO_INT_SP:
4890      case CPUINFO_INT_REGISTER + E132XS_SP:         info->i =  SP;                     break;
4891      case CPUINFO_INT_REGISTER + E132XS_UB:         info->i =  UB;                     break;
4892      case CPUINFO_INT_REGISTER + E132XS_BCR:         info->i =  BCR;                     break;
4893      case CPUINFO_INT_REGISTER + E132XS_TPR:         info->i =  TPR;                     break;
4894      case CPUINFO_INT_REGISTER + E132XS_TCR:         info->i =  TCR;                     break;
4895      case CPUINFO_INT_REGISTER + E132XS_TR:         info->i =  TR;                     break;
4896      case CPUINFO_INT_REGISTER + E132XS_WCR:         info->i =  WCR;                     break;
4897      case CPUINFO_INT_REGISTER + E132XS_ISR:         info->i =  ISR;                     break;
4898      case CPUINFO_INT_REGISTER + E132XS_FCR:         info->i =  FCR;                     break;
4899      case CPUINFO_INT_REGISTER + E132XS_MCR:         info->i =  MCR;                     break;
4900      case CPUINFO_INT_REGISTER + E132XS_G28:         info->i =  get_global_register(cpustate, 28);   break;
4901      case CPUINFO_INT_REGISTER + E132XS_G29:         info->i =  get_global_register(cpustate, 29);   break;
4902      case CPUINFO_INT_REGISTER + E132XS_G30:         info->i =  get_global_register(cpustate, 30);   break;
4903      case CPUINFO_INT_REGISTER + E132XS_G31:         info->i =  get_global_register(cpustate, 31);   break;
4904      case CPUINFO_INT_REGISTER + E132XS_CL0:         info->i =  cpustate->local_regs[(0 + GET_FP) % 64]; break;
4905      case CPUINFO_INT_REGISTER + E132XS_CL1:         info->i =  cpustate->local_regs[(1 + GET_FP) % 64]; break;
4906      case CPUINFO_INT_REGISTER + E132XS_CL2:         info->i =  cpustate->local_regs[(2 + GET_FP) % 64]; break;
4907      case CPUINFO_INT_REGISTER + E132XS_CL3:         info->i =  cpustate->local_regs[(3 + GET_FP) % 64]; break;
4908      case CPUINFO_INT_REGISTER + E132XS_CL4:         info->i =  cpustate->local_regs[(4 + GET_FP) % 64]; break;
4909      case CPUINFO_INT_REGISTER + E132XS_CL5:         info->i =  cpustate->local_regs[(5 + GET_FP) % 64]; break;
4910      case CPUINFO_INT_REGISTER + E132XS_CL6:         info->i =  cpustate->local_regs[(6 + GET_FP) % 64]; break;
4911      case CPUINFO_INT_REGISTER + E132XS_CL7:         info->i =  cpustate->local_regs[(7 + GET_FP) % 64]; break;
4912      case CPUINFO_INT_REGISTER + E132XS_CL8:         info->i =  cpustate->local_regs[(8 + GET_FP) % 64]; break;
4913      case CPUINFO_INT_REGISTER + E132XS_CL9:         info->i =  cpustate->local_regs[(9 + GET_FP) % 64]; break;
4914      case CPUINFO_INT_REGISTER + E132XS_CL10:      info->i =  cpustate->local_regs[(10 + GET_FP) % 64]; break;
4915      case CPUINFO_INT_REGISTER + E132XS_CL11:      info->i =  cpustate->local_regs[(11 + GET_FP) % 64]; break;
4916      case CPUINFO_INT_REGISTER + E132XS_CL12:      info->i =  cpustate->local_regs[(12 + GET_FP) % 64]; break;
4917      case CPUINFO_INT_REGISTER + E132XS_CL13:      info->i =  cpustate->local_regs[(13 + GET_FP) % 64]; break;
4918      case CPUINFO_INT_REGISTER + E132XS_CL14:      info->i =  cpustate->local_regs[(14 + GET_FP) % 64]; break;
4919      case CPUINFO_INT_REGISTER + E132XS_CL15:      info->i =  cpustate->local_regs[(15 + GET_FP) % 64]; break;
4920      case CPUINFO_INT_REGISTER + E132XS_L0:         info->i =  cpustate->local_regs[0];   break;
4921      case CPUINFO_INT_REGISTER + E132XS_L1:         info->i =  cpustate->local_regs[1];   break;
4922      case CPUINFO_INT_REGISTER + E132XS_L2:         info->i =  cpustate->local_regs[2];   break;
4923      case CPUINFO_INT_REGISTER + E132XS_L3:         info->i =  cpustate->local_regs[3];   break;
4924      case CPUINFO_INT_REGISTER + E132XS_L4:         info->i =  cpustate->local_regs[4];   break;
4925      case CPUINFO_INT_REGISTER + E132XS_L5:         info->i =  cpustate->local_regs[5];   break;
4926      case CPUINFO_INT_REGISTER + E132XS_L6:         info->i =  cpustate->local_regs[6];   break;
4927      case CPUINFO_INT_REGISTER + E132XS_L7:         info->i =  cpustate->local_regs[7];   break;
4928      case CPUINFO_INT_REGISTER + E132XS_L8:         info->i =  cpustate->local_regs[8];   break;
4929      case CPUINFO_INT_REGISTER + E132XS_L9:         info->i =  cpustate->local_regs[9];   break;
4930      case CPUINFO_INT_REGISTER + E132XS_L10:         info->i =  cpustate->local_regs[10];   break;
4931      case CPUINFO_INT_REGISTER + E132XS_L11:         info->i =  cpustate->local_regs[11];   break;
4932      case CPUINFO_INT_REGISTER + E132XS_L12:         info->i =  cpustate->local_regs[12];   break;
4933      case CPUINFO_INT_REGISTER + E132XS_L13:         info->i =  cpustate->local_regs[13];   break;
4934      case CPUINFO_INT_REGISTER + E132XS_L14:         info->i =  cpustate->local_regs[14];   break;
4935      case CPUINFO_INT_REGISTER + E132XS_L15:         info->i =  cpustate->local_regs[15];   break;
4936      case CPUINFO_INT_REGISTER + E132XS_L16:         info->i =  cpustate->local_regs[16];   break;
4937      case CPUINFO_INT_REGISTER + E132XS_L17:         info->i =  cpustate->local_regs[17];   break;
4938      case CPUINFO_INT_REGISTER + E132XS_L18:         info->i =  cpustate->local_regs[18];   break;
4939      case CPUINFO_INT_REGISTER + E132XS_L19:         info->i =  cpustate->local_regs[19];   break;
4940      case CPUINFO_INT_REGISTER + E132XS_L20:         info->i =  cpustate->local_regs[20];   break;
4941      case CPUINFO_INT_REGISTER + E132XS_L21:         info->i =  cpustate->local_regs[21];   break;
4942      case CPUINFO_INT_REGISTER + E132XS_L22:         info->i =  cpustate->local_regs[22];   break;
4943      case CPUINFO_INT_REGISTER + E132XS_L23:         info->i =  cpustate->local_regs[23];   break;
4944      case CPUINFO_INT_REGISTER + E132XS_L24:         info->i =  cpustate->local_regs[24];   break;
4945      case CPUINFO_INT_REGISTER + E132XS_L25:         info->i =  cpustate->local_regs[25];   break;
4946      case CPUINFO_INT_REGISTER + E132XS_L26:         info->i =  cpustate->local_regs[26];   break;
4947      case CPUINFO_INT_REGISTER + E132XS_L27:         info->i =  cpustate->local_regs[27];   break;
4948      case CPUINFO_INT_REGISTER + E132XS_L28:         info->i =  cpustate->local_regs[28];   break;
4949      case CPUINFO_INT_REGISTER + E132XS_L29:         info->i =  cpustate->local_regs[29];   break;
4950      case CPUINFO_INT_REGISTER + E132XS_L30:         info->i =  cpustate->local_regs[30];   break;
4951      case CPUINFO_INT_REGISTER + E132XS_L31:         info->i =  cpustate->local_regs[31];   break;
4952      case CPUINFO_INT_REGISTER + E132XS_L32:         info->i =  cpustate->local_regs[32];   break;
4953      case CPUINFO_INT_REGISTER + E132XS_L33:         info->i =  cpustate->local_regs[33];   break;
4954      case CPUINFO_INT_REGISTER + E132XS_L34:         info->i =  cpustate->local_regs[34];   break;
4955      case CPUINFO_INT_REGISTER + E132XS_L35:         info->i =  cpustate->local_regs[35];   break;
4956      case CPUINFO_INT_REGISTER + E132XS_L36:         info->i =  cpustate->local_regs[36];   break;
4957      case CPUINFO_INT_REGISTER + E132XS_L37:         info->i =  cpustate->local_regs[37];   break;
4958      case CPUINFO_INT_REGISTER + E132XS_L38:         info->i =  cpustate->local_regs[38];   break;
4959      case CPUINFO_INT_REGISTER + E132XS_L39:         info->i =  cpustate->local_regs[39];   break;
4960      case CPUINFO_INT_REGISTER + E132XS_L40:         info->i =  cpustate->local_regs[40];   break;
4961      case CPUINFO_INT_REGISTER + E132XS_L41:         info->i =  cpustate->local_regs[41];   break;
4962      case CPUINFO_INT_REGISTER + E132XS_L42:         info->i =  cpustate->local_regs[42];   break;
4963      case CPUINFO_INT_REGISTER + E132XS_L43:         info->i =  cpustate->local_regs[43];   break;
4964      case CPUINFO_INT_REGISTER + E132XS_L44:         info->i =  cpustate->local_regs[44];   break;
4965      case CPUINFO_INT_REGISTER + E132XS_L45:         info->i =  cpustate->local_regs[45];   break;
4966      case CPUINFO_INT_REGISTER + E132XS_L46:         info->i =  cpustate->local_regs[46];   break;
4967      case CPUINFO_INT_REGISTER + E132XS_L47:         info->i =  cpustate->local_regs[47];   break;
4968      case CPUINFO_INT_REGISTER + E132XS_L48:         info->i =  cpustate->local_regs[48];   break;
4969      case CPUINFO_INT_REGISTER + E132XS_L49:         info->i =  cpustate->local_regs[49];   break;
4970      case CPUINFO_INT_REGISTER + E132XS_L50:         info->i =  cpustate->local_regs[50];   break;
4971      case CPUINFO_INT_REGISTER + E132XS_L51:         info->i =  cpustate->local_regs[51];   break;
4972      case CPUINFO_INT_REGISTER + E132XS_L52:         info->i =  cpustate->local_regs[52];   break;
4973      case CPUINFO_INT_REGISTER + E132XS_L53:         info->i =  cpustate->local_regs[53];   break;
4974      case CPUINFO_INT_REGISTER + E132XS_L54:         info->i =  cpustate->local_regs[54];   break;
4975      case CPUINFO_INT_REGISTER + E132XS_L55:         info->i =  cpustate->local_regs[55];   break;
4976      case CPUINFO_INT_REGISTER + E132XS_L56:         info->i =  cpustate->local_regs[56];   break;
4977      case CPUINFO_INT_REGISTER + E132XS_L57:         info->i =  cpustate->local_regs[57];   break;
4978      case CPUINFO_INT_REGISTER + E132XS_L58:         info->i =  cpustate->local_regs[58];   break;
4979      case CPUINFO_INT_REGISTER + E132XS_L59:         info->i =  cpustate->local_regs[59];   break;
4980      case CPUINFO_INT_REGISTER + E132XS_L60:         info->i =  cpustate->local_regs[60];   break;
4981      case CPUINFO_INT_REGISTER + E132XS_L61:         info->i =  cpustate->local_regs[61];   break;
4982      case CPUINFO_INT_REGISTER + E132XS_L62:         info->i =  cpustate->local_regs[62];   break;
4983      case CPUINFO_INT_REGISTER + E132XS_L63:         info->i =  cpustate->local_regs[63];   break;
4984
4985      /* --- the following bits of info are returned as pointers to data or functions --- */
4986      case CPUINFO_FCT_SET_INFO:                  info->setinfo = CPU_SET_INFO_NAME(hyperstone);   break;
4987      case CPUINFO_FCT_INIT:                     info->init = NULL;                  break;
4988      case CPUINFO_FCT_RESET:                     info->reset = CPU_RESET_NAME(hyperstone);         break;
4989      case CPUINFO_FCT_EXIT:                     info->exit = CPU_EXIT_NAME(hyperstone);         break;
4990      case CPUINFO_FCT_EXECUTE:                  info->execute = CPU_EXECUTE_NAME(hyperstone);      break;
4991      case CPUINFO_FCT_BURN:                     info->burn = NULL;                  break;
4992      case CPUINFO_FCT_DISASSEMBLE:               info->disassemble = CPU_DISASSEMBLE_NAME(hyperstone);   break;
4993      case CPUINFO_PTR_INSTRUCTION_COUNTER:         info->icount = &cpustate->icount;      break;
4994
4995      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA:    info->internal_map16 = NULL;   break;
4996      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO:      info->internal_map16 = NULL;   break;
4997
4998      /* --- the following bits of info are returned as NULL-terminated strings --- */
4999      case CPUINFO_STR_FAMILY:               strcpy(info->s, "Hyperstone CPU");      break;
5000      case CPUINFO_STR_VERSION:               strcpy(info->s, "0.9");               break;
5001      case CPUINFO_STR_SOURCE_FILE:                  strcpy(info->s, __FILE__);            break;
5002      case CPUINFO_STR_CREDITS:               strcpy(info->s, "Copyright Pierpaolo Prazzoli and Ryan Holtz"); break;
5003
5004      case CPUINFO_STR_FLAGS:
5005         sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c FTE:%X FRM:%X ILC:%d FL:%d FP:%d",
5006            GET_S ? 'S':'.',
5007            GET_P ? 'P':'.',
5008            GET_T ? 'T':'.',
5009            GET_L ? 'L':'.',
5010            GET_I ? 'I':'.',
5011            cpustate->global_regs[1] & 0x00040 ? '?':'.',
5012            GET_H ? 'H':'.',
5013            GET_M ? 'M':'.',
5014            GET_V ? 'V':'.',
5015            GET_N ? 'N':'.',
5016            GET_Z ? 'Z':'.',
5017            GET_C ? 'C':'.',
5018            GET_FTE,
5019            GET_FRM,
5020            GET_ILC,
5021            GET_FL,
5022            GET_FP);
5023         break;
5024
5025      case CPUINFO_STR_REGISTER + E132XS_PC:        sprintf(info->s, "PC  :%08X", cpustate->global_regs[0]); break;
5026      case CPUINFO_STR_REGISTER + E132XS_SR:        sprintf(info->s, "SR  :%08X", cpustate->global_regs[1]); break;
5027      case CPUINFO_STR_REGISTER + E132XS_FER:       sprintf(info->s, "FER :%08X", cpustate->global_regs[2]); break;
5028      case CPUINFO_STR_REGISTER + E132XS_G3:        sprintf(info->s, "G3  :%08X", cpustate->global_regs[3]); break;
5029      case CPUINFO_STR_REGISTER + E132XS_G4:        sprintf(info->s, "G4  :%08X", cpustate->global_regs[4]); break;
5030      case CPUINFO_STR_REGISTER + E132XS_G5:        sprintf(info->s, "G5  :%08X", cpustate->global_regs[5]); break;
5031      case CPUINFO_STR_REGISTER + E132XS_G6:        sprintf(info->s, "G6  :%08X", cpustate->global_regs[6]); break;
5032      case CPUINFO_STR_REGISTER + E132XS_G7:        sprintf(info->s, "G7  :%08X", cpustate->global_regs[7]); break;
5033      case CPUINFO_STR_REGISTER + E132XS_G8:        sprintf(info->s, "G8  :%08X", cpustate->global_regs[8]); break;
5034      case CPUINFO_STR_REGISTER + E132XS_G9:        sprintf(info->s, "G9  :%08X", cpustate->global_regs[9]); break;
5035      case CPUINFO_STR_REGISTER + E132XS_G10:       sprintf(info->s, "G10 :%08X", cpustate->global_regs[10]); break;
5036      case CPUINFO_STR_REGISTER + E132XS_G11:       sprintf(info->s, "G11 :%08X", cpustate->global_regs[11]); break;
5037      case CPUINFO_STR_REGISTER + E132XS_G12:       sprintf(info->s, "G12 :%08X", cpustate->global_regs[12]); break;
5038      case CPUINFO_STR_REGISTER + E132XS_G13:       sprintf(info->s, "G13 :%08X", cpustate->global_regs[13]); break;
5039      case CPUINFO_STR_REGISTER + E132XS_G14:       sprintf(info->s, "G14 :%08X", cpustate->global_regs[14]); break;
5040      case CPUINFO_STR_REGISTER + E132XS_G15:       sprintf(info->s, "G15 :%08X", cpustate->global_regs[15]); break;
5041      case CPUINFO_STR_REGISTER + E132XS_G16:       sprintf(info->s, "G16 :%08X", cpustate->global_regs[16]); break;
5042      case CPUINFO_STR_REGISTER + E132XS_G17:       sprintf(info->s, "G17 :%08X", cpustate->global_regs[17]); break;
5043      case CPUINFO_STR_REGISTER + E132XS_SP:        sprintf(info->s, "SP  :%08X", cpustate->global_regs[18]); break;
5044      case CPUINFO_STR_REGISTER + E132XS_UB:        sprintf(info->s, "UB  :%08X", cpustate->global_regs[19]); break;
5045      case CPUINFO_STR_REGISTER + E132XS_BCR:       sprintf(info->s, "BCR :%08X", cpustate->global_regs[20]); break;
5046      case CPUINFO_STR_REGISTER + E132XS_TPR:       sprintf(info->s, "TPR :%08X", cpustate->global_regs[21]); break;
5047      case CPUINFO_STR_REGISTER + E132XS_TCR:       sprintf(info->s, "TCR :%08X", cpustate->global_regs[22]); break;
5048      case CPUINFO_STR_REGISTER + E132XS_TR:        sprintf(info->s, "TR  :%08X", cpustate->global_regs[23]); break;
5049      case CPUINFO_STR_REGISTER + E132XS_WCR:       sprintf(info->s, "WCR :%08X", cpustate->global_regs[24]); break;
5050      case CPUINFO_STR_REGISTER + E132XS_ISR:       sprintf(info->s, "ISR :%08X", cpustate->global_regs[25]); break;
5051      case CPUINFO_STR_REGISTER + E132XS_FCR:       sprintf(info->s, "FCR :%08X", cpustate->global_regs[26]); break;
5052      case CPUINFO_STR_REGISTER + E132XS_MCR:       sprintf(info->s, "MCR :%08X", cpustate->global_regs[27]); break;
5053      case CPUINFO_STR_REGISTER + E132XS_G28:       sprintf(info->s, "G28 :%08X", cpustate->global_regs[28]); break;
5054      case CPUINFO_STR_REGISTER + E132XS_G29:       sprintf(info->s, "G29 :%08X", cpustate->global_regs[29]); break;
5055      case CPUINFO_STR_REGISTER + E132XS_G30:       sprintf(info->s, "G30 :%08X", cpustate->global_regs[30]); break;
5056      case CPUINFO_STR_REGISTER + E132XS_G31:       sprintf(info->s, "G31 :%08X", cpustate->global_regs[31]); break;
5057      case CPUINFO_STR_REGISTER + E132XS_CL0:       sprintf(info->s, "CL0 :%08X", cpustate->local_regs[(0 + GET_FP) % 64]); break;
5058      case CPUINFO_STR_REGISTER + E132XS_CL1:       sprintf(info->s, "CL1 :%08X", cpustate->local_regs[(1 + GET_FP) % 64]); break;
5059      case CPUINFO_STR_REGISTER + E132XS_CL2:       sprintf(info->s, "CL2 :%08X", cpustate->local_regs[(2 + GET_FP) % 64]); break;
5060      case CPUINFO_STR_REGISTER + E132XS_CL3:       sprintf(info->s, "CL3 :%08X", cpustate->local_regs[(3 + GET_FP) % 64]); break;
5061      case CPUINFO_STR_REGISTER + E132XS_CL4:       sprintf(info->s, "CL4 :%08X", cpustate->local_regs[(4 + GET_FP) % 64]); break;
5062      case CPUINFO_STR_REGISTER + E132XS_CL5:       sprintf(info->s, "CL5 :%08X", cpustate->local_regs[(5 + GET_FP) % 64]); break;
5063      case CPUINFO_STR_REGISTER + E132XS_CL6:       sprintf(info->s, "CL6 :%08X", cpustate->local_regs[(6 + GET_FP) % 64]); break;
5064      case CPUINFO_STR_REGISTER + E132XS_CL7:       sprintf(info->s, "CL7 :%08X", cpustate->local_regs[(7 + GET_FP) % 64]); break;
5065      case CPUINFO_STR_REGISTER + E132XS_CL8:       sprintf(info->s, "CL8 :%08X", cpustate->local_regs[(8 + GET_FP) % 64]); break;
5066      case CPUINFO_STR_REGISTER + E132XS_CL9:       sprintf(info->s, "CL9 :%08X", cpustate->local_regs[(9 + GET_FP) % 64]); break;
5067      case CPUINFO_STR_REGISTER + E132XS_CL10:      sprintf(info->s, "CL10:%08X", cpustate->local_regs[(10 + GET_FP) % 64]); break;
5068      case CPUINFO_STR_REGISTER + E132XS_CL11:      sprintf(info->s, "CL11:%08X", cpustate->local_regs[(11 + GET_FP) % 64]); break;
5069      case CPUINFO_STR_REGISTER + E132XS_CL12:      sprintf(info->s, "CL12:%08X", cpustate->local_regs[(12 + GET_FP) % 64]); break;
5070      case CPUINFO_STR_REGISTER + E132XS_CL13:      sprintf(info->s, "CL13:%08X", cpustate->local_regs[(13 + GET_FP) % 64]); break;
5071      case CPUINFO_STR_REGISTER + E132XS_CL14:      sprintf(info->s, "CL14:%08X", cpustate->local_regs[(14 + GET_FP) % 64]); break;
5072      case CPUINFO_STR_REGISTER + E132XS_CL15:      sprintf(info->s, "CL15:%08X", cpustate->local_regs[(15 + GET_FP) % 64]); break;
5073      case CPUINFO_STR_REGISTER + E132XS_L0:        sprintf(info->s, "L0  :%08X", cpustate->local_regs[0]); break;
5074      case CPUINFO_STR_REGISTER + E132XS_L1:        sprintf(info->s, "L1  :%08X", cpustate->local_regs[1]); break;
5075      case CPUINFO_STR_REGISTER + E132XS_L2:        sprintf(info->s, "L2  :%08X", cpustate->local_regs[2]); break;
5076      case CPUINFO_STR_REGISTER + E132XS_L3:        sprintf(info->s, "L3  :%08X", cpustate->local_regs[3]); break;
5077      case CPUINFO_STR_REGISTER + E132XS_L4:        sprintf(info->s, "L4  :%08X", cpustate->local_regs[4]); break;
5078      case CPUINFO_STR_REGISTER + E132XS_L5:        sprintf(info->s, "L5  :%08X", cpustate->local_regs[5]); break;
5079      case CPUINFO_STR_REGISTER + E132XS_L6:        sprintf(info->s, "L6  :%08X", cpustate->local_regs[6]); break;
5080      case CPUINFO_STR_REGISTER + E132XS_L7:        sprintf(info->s, "L7  :%08X", cpustate->local_regs[7]); break;
5081      case CPUINFO_STR_REGISTER + E132XS_L8:        sprintf(info->s, "L8  :%08X", cpustate->local_regs[8]); break;
5082      case CPUINFO_STR_REGISTER + E132XS_L9:        sprintf(info->s, "L9  :%08X", cpustate->local_regs[9]); break;
5083      case CPUINFO_STR_REGISTER + E132XS_L10:       sprintf(info->s, "L10 :%08X", cpustate->local_regs[10]); break;
5084      case CPUINFO_STR_REGISTER + E132XS_L11:       sprintf(info->s, "L11 :%08X", cpustate->local_regs[11]); break;
5085      case CPUINFO_STR_REGISTER + E132XS_L12:       sprintf(info->s, "L12 :%08X", cpustate->local_regs[12]); break;
5086      case CPUINFO_STR_REGISTER + E132XS_L13:       sprintf(info->s, "L13 :%08X", cpustate->local_regs[13]); break;
5087      case CPUINFO_STR_REGISTER + E132XS_L14:       sprintf(info->s, "L14 :%08X", cpustate->local_regs[14]); break;
5088      case CPUINFO_STR_REGISTER + E132XS_L15:       sprintf(info->s, "L15 :%08X", cpustate->local_regs[15]); break;
5089      case CPUINFO_STR_REGISTER + E132XS_L16:       sprintf(info->s, "L16 :%08X", cpustate->local_regs[16]); break;
5090      case CPUINFO_STR_REGISTER + E132XS_L17:       sprintf(info->s, "L17 :%08X", cpustate->local_regs[17]); break;
5091      case CPUINFO_STR_REGISTER + E132XS_L18:       sprintf(info->s, "L18 :%08X", cpustate->local_regs[18]); break;
5092      case CPUINFO_STR_REGISTER + E132XS_L19:       sprintf(info->s, "L19 :%08X", cpustate->local_regs[19]); break;
5093      case CPUINFO_STR_REGISTER + E132XS_L20:       sprintf(info->s, "L20 :%08X", cpustate->local_regs[20]); break;
5094      case CPUINFO_STR_REGISTER + E132XS_L21:       sprintf(info->s, "L21 :%08X", cpustate->local_regs[21]); break;
5095      case CPUINFO_STR_REGISTER + E132XS_L22:       sprintf(info->s, "L22 :%08X", cpustate->local_regs[22]); break;
5096      case CPUINFO_STR_REGISTER + E132XS_L23:       sprintf(info->s, "L23 :%08X", cpustate->local_regs[23]); break;
5097      case CPUINFO_STR_REGISTER + E132XS_L24:       sprintf(info->s, "L24 :%08X", cpustate->local_regs[24]); break;
5098      case CPUINFO_STR_REGISTER + E132XS_L25:       sprintf(info->s, "L25 :%08X", cpustate->local_regs[25]); break;
5099      case CPUINFO_STR_REGISTER + E132XS_L26:       sprintf(info->s, "L26 :%08X", cpustate->local_regs[26]); break;
5100      case CPUINFO_STR_REGISTER + E132XS_L27:       sprintf(info->s, "L27 :%08X", cpustate->local_regs[27]); break;
5101      case CPUINFO_STR_REGISTER + E132XS_L28:       sprintf(info->s, "L28 :%08X", cpustate->local_regs[28]); break;
5102      case CPUINFO_STR_REGISTER + E132XS_L29:       sprintf(info->s, "L29 :%08X", cpustate->local_regs[29]); break;
5103      case CPUINFO_STR_REGISTER + E132XS_L30:       sprintf(info->s, "L30 :%08X", cpustate->local_regs[30]); break;
5104      case CPUINFO_STR_REGISTER + E132XS_L31:       sprintf(info->s, "L31 :%08X", cpustate->local_regs[31]); break;
5105      case CPUINFO_STR_REGISTER + E132XS_L32:       sprintf(info->s, "L32 :%08X", cpustate->local_regs[32]); break;
5106      case CPUINFO_STR_REGISTER + E132XS_L33:       sprintf(info->s, "L33 :%08X", cpustate->local_regs[33]); break;
5107      case CPUINFO_STR_REGISTER + E132XS_L34:       sprintf(info->s, "L34 :%08X", cpustate->local_regs[34]); break;
5108      case CPUINFO_STR_REGISTER + E132XS_L35:       sprintf(info->s, "L35 :%08X", cpustate->local_regs[35]); break;
5109      case CPUINFO_STR_REGISTER + E132XS_L36:       sprintf(info->s, "L36 :%08X", cpustate->local_regs[36]); break;
5110      case CPUINFO_STR_REGISTER + E132XS_L37:       sprintf(info->s, "L37 :%08X", cpustate->local_regs[37]); break;
5111      case CPUINFO_STR_REGISTER + E132XS_L38:       sprintf(info->s, "L38 :%08X", cpustate->local_regs[38]); break;
5112      case CPUINFO_STR_REGISTER + E132XS_L39:       sprintf(info->s, "L39 :%08X", cpustate->local_regs[39]); break;
5113      case CPUINFO_STR_REGISTER + E132XS_L40:       sprintf(info->s, "L40 :%08X", cpustate->local_regs[40]); break;
5114      case CPUINFO_STR_REGISTER + E132XS_L41:       sprintf(info->s, "L41 :%08X", cpustate->local_regs[41]); break;
5115      case CPUINFO_STR_REGISTER + E132XS_L42:       sprintf(info->s, "L42 :%08X", cpustate->local_regs[42]); break;
5116      case CPUINFO_STR_REGISTER + E132XS_L43:       sprintf(info->s, "L43 :%08X", cpustate->local_regs[43]); break;
5117      case CPUINFO_STR_REGISTER + E132XS_L44:       sprintf(info->s, "L44 :%08X", cpustate->local_regs[44]); break;
5118      case CPUINFO_STR_REGISTER + E132XS_L45:       sprintf(info->s, "L45 :%08X", cpustate->local_regs[45]); break;
5119      case CPUINFO_STR_REGISTER + E132XS_L46:       sprintf(info->s, "L46 :%08X", cpustate->local_regs[46]); break;
5120      case CPUINFO_STR_REGISTER + E132XS_L47:       sprintf(info->s, "L47 :%08X", cpustate->local_regs[47]); break;
5121      case CPUINFO_STR_REGISTER + E132XS_L48:       sprintf(info->s, "L48 :%08X", cpustate->local_regs[48]); break;
5122      case CPUINFO_STR_REGISTER + E132XS_L49:       sprintf(info->s, "L49 :%08X", cpustate->local_regs[49]); break;
5123      case CPUINFO_STR_REGISTER + E132XS_L50:       sprintf(info->s, "L50 :%08X", cpustate->local_regs[50]); break;
5124      case CPUINFO_STR_REGISTER + E132XS_L51:       sprintf(info->s, "L51 :%08X", cpustate->local_regs[51]); break;
5125      case CPUINFO_STR_REGISTER + E132XS_L52:       sprintf(info->s, "L52 :%08X", cpustate->local_regs[52]); break;
5126      case CPUINFO_STR_REGISTER + E132XS_L53:       sprintf(info->s, "L53 :%08X", cpustate->local_regs[53]); break;
5127      case CPUINFO_STR_REGISTER + E132XS_L54:       sprintf(info->s, "L54 :%08X", cpustate->local_regs[54]); break;
5128      case CPUINFO_STR_REGISTER + E132XS_L55:       sprintf(info->s, "L55 :%08X", cpustate->local_regs[55]); break;
5129      case CPUINFO_STR_REGISTER + E132XS_L56:       sprintf(info->s, "L56 :%08X", cpustate->local_regs[56]); break;
5130      case CPUINFO_STR_REGISTER + E132XS_L57:       sprintf(info->s, "L57 :%08X", cpustate->local_regs[57]); break;
5131      case CPUINFO_STR_REGISTER + E132XS_L58:       sprintf(info->s, "L58 :%08X", cpustate->local_regs[58]); break;
5132      case CPUINFO_STR_REGISTER + E132XS_L59:       sprintf(info->s, "L59 :%08X", cpustate->local_regs[59]); break;
5133      case CPUINFO_STR_REGISTER + E132XS_L60:       sprintf(info->s, "L60 :%08X", cpustate->local_regs[60]); break;
5134      case CPUINFO_STR_REGISTER + E132XS_L61:       sprintf(info->s, "L61 :%08X", cpustate->local_regs[61]); break;
5135      case CPUINFO_STR_REGISTER + E132XS_L62:       sprintf(info->s, "L62 :%08X", cpustate->local_regs[62]); break;
5136      case CPUINFO_STR_REGISTER + E132XS_L63:       sprintf(info->s, "L63 :%08X", cpustate->local_regs[63]); break;
5137   }
5138}
5139
5140
5141CPU_GET_INFO( e116t )
48655142{
4866   return 36;
5143   switch (state)
5144   {
5145
5146      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 16;               break;
5147      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 16;               break;
5148
5149      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_4k_iram_map); break;
5150
5151      /* --- the following bits of info are returned as pointers to data or functions --- */
5152      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e116t);               break;
5153
5154      /* --- the following bits of info are returned as NULL-terminated strings --- */
5155      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-16T");            break;
5156
5157      default:
5158         CPU_GET_INFO_CALL(hyperstone);
5159   }
48675160}
48685161
5162CPU_GET_INFO( e116xt )
5163{
5164   switch (state)
5165   {
48695166
4870//-------------------------------------------------
4871//  execute_input_lines - return the number of
4872//  input/interrupt lines
4873//-------------------------------------------------
5167      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 16;               break;
5168      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 16;               break;
48745169
4875UINT32 hyperstone_device::execute_input_lines() const
5170      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_8k_iram_map); break;
5171
5172      /* --- the following bits of info are returned as pointers to data or functions --- */
5173      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e116xt);               break;
5174
5175      /* --- the following bits of info are returned as NULL-terminated strings --- */
5176      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-16XT");            break;
5177
5178      default:
5179         CPU_GET_INFO_CALL(hyperstone);
5180   }
5181}
5182
5183CPU_GET_INFO( e116xs )
48765184{
4877   return 8;
5185   switch (state)
5186   {
5187
5188      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 16;               break;
5189      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 16;               break;
5190
5191      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_16k_iram_map); break;
5192
5193      /* --- the following bits of info are returned as pointers to data or functions --- */
5194      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e116xs);               break;
5195
5196      /* --- the following bits of info are returned as NULL-terminated strings --- */
5197      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-16XS");            break;
5198
5199      default:
5200         CPU_GET_INFO_CALL(hyperstone);
5201   }
48785202}
48795203
5204CPU_GET_INFO( e116xsr )
5205{
5206   switch (state)
5207   {
48805208
4881void hyperstone_device::execute_set_input(int inputnum, int state)
5209      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 16;               break;
5210      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 16;               break;
5211
5212      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_16k_iram_map); break;
5213
5214      /* --- the following bits of info are returned as pointers to data or functions --- */
5215      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e116xsr);               break;
5216
5217      /* --- the following bits of info are returned as NULL-terminated strings --- */
5218      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-16XSR");         break;
5219
5220      default:
5221         CPU_GET_INFO_CALL(hyperstone);
5222   }
5223}
5224
5225CPU_GET_INFO( e132n )
48825226{
4883   if (state)
4884      ISR |= 1 << inputnum;
4885   else
4886      ISR &= ~(1 << inputnum);
5227   switch (state)
5228   {
5229
5230      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 32;               break;
5231      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 32;               break;
5232
5233      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
5234
5235      /* --- the following bits of info are returned as pointers to data or functions --- */
5236      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e132n);               break;
5237
5238      /* --- the following bits of info are returned as NULL-terminated strings --- */
5239      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-32N");            break;
5240
5241      default:
5242         CPU_GET_INFO_CALL(hyperstone);
5243   }
48875244}
48885245
5246CPU_GET_INFO( e132t )
5247{
5248   switch (state)
5249   {
48895250
4890//-------------------------------------------------
4891//  execute_run - execute a timeslice's worth of
4892//  opcodes
4893//-------------------------------------------------
5251      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 32;               break;
5252      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 32;               break;
48945253
4895void hyperstone_device::execute_run()
5254      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
5255
5256      /* --- the following bits of info are returned as pointers to data or functions --- */
5257      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e132t);               break;
5258
5259      /* --- the following bits of info are returned as NULL-terminated strings --- */
5260      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-32T");            break;
5261
5262      default:
5263         CPU_GET_INFO_CALL(hyperstone);
5264   }
5265}
5266
5267CPU_GET_INFO( e132xn )
48965268{
4897   if (m_intblock < 0)
4898      m_intblock = 0;
5269   switch (state)
5270   {
48995271
4900   check_interrupts();
5272      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 32;               break;
5273      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 32;               break;
49015274
4902   do
5275      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
5276
5277      /* --- the following bits of info are returned as pointers to data or functions --- */
5278      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e132xn);               break;
5279
5280      /* --- the following bits of info are returned as NULL-terminated strings --- */
5281      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-32XN");            break;
5282
5283      default:
5284         CPU_GET_INFO_CALL(hyperstone);
5285   }
5286}
5287
5288CPU_GET_INFO( e132xt )
5289{
5290   switch (state)
49035291   {
4904      UINT32 oldh = SR & 0x00000020;
49055292
4906      PPC = PC;   /* copy PC to previous PC */
4907      debugger_instruction_hook(this, PC);
5293      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 32;               break;
5294      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 32;               break;
49085295
4909      OP = READ_OP(PC);
4910      PC += 2;
5296      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
49115297
4912      m_instruction_length = 1;
5298      /* --- the following bits of info are returned as pointers to data or functions --- */
5299      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e132xt);               break;
49135300
4914      /* execute opcode */
4915      (this->*m_opcode[(OP & 0xff00) >> 8])();
5301      /* --- the following bits of info are returned as NULL-terminated strings --- */
5302      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-32XT");            break;
49165303
4917      /* clear the H state if it was previously set */
4918      SR ^= oldh;
5304      default:
5305         CPU_GET_INFO_CALL(hyperstone);
5306   }
5307}
49195308
4920      SET_ILC(m_instruction_length & 3);
5309CPU_GET_INFO( e132xs )
5310{
5311   switch (state)
5312   {
49215313
4922      if( GET_T && GET_P && m_delay.delay_cmd == NO_DELAY ) /* Not in a Delayed Branch instructions */
4923      {
4924         UINT32 addr = get_trap_addr(TRAPNO_TRACE_EXCEPTION);
4925         execute_exception(addr);
4926      }
5314      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 32;               break;
5315      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 32;               break;
49275316
4928      if (--m_intblock == 0)
4929         check_interrupts();
5317      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_16k_iram_map); break;
49305318
4931   } while( m_icount > 0 );
5319      /* --- the following bits of info are returned as pointers to data or functions --- */
5320      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e132xs);               break;
5321
5322      /* --- the following bits of info are returned as NULL-terminated strings --- */
5323      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-32XS");            break;
5324
5325      default:
5326         CPU_GET_INFO_CALL(hyperstone);
5327   }
49325328}
49335329
4934const device_type E116T = &device_creator<e116t_device>;
4935const device_type E116XT = &device_creator<e116xt_device>;
4936const device_type E116XS = &device_creator<e116xs_device>;
4937const device_type E116XSR = &device_creator<e116xsr_device>;
4938const device_type E132N = &device_creator<e132n_device>;
4939const device_type E132T = &device_creator<e132t_device>;
4940const device_type E132XN = &device_creator<e132xn_device>;
4941const device_type E132XT = &device_creator<e132xt_device>;
4942const device_type E132XS = &device_creator<e132xs_device>;
4943const device_type E132XSR = &device_creator<e132xsr_device>;
4944const device_type GMS30C2116 = &device_creator<gms30c2116_device>;
4945const device_type GMS30C2132 = &device_creator<gms30c2132_device>;
4946const device_type GMS30C2216 = &device_creator<gms30c2216_device>;
4947const device_type GMS30C2232 = &device_creator<gms30c2232_device>;
5330CPU_GET_INFO( e132xsr )
5331{
5332   switch (state)
5333   {
5334
5335      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 32;               break;
5336      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 32;               break;
5337
5338      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_16k_iram_map); break;
5339
5340      /* --- the following bits of info are returned as pointers to data or functions --- */
5341      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(e132xsr);               break;
5342
5343      /* --- the following bits of info are returned as NULL-terminated strings --- */
5344      case CPUINFO_STR_NAME:                     strcpy(info->s, "E1-32XSR");         break;
5345
5346      default:
5347         CPU_GET_INFO_CALL(hyperstone);
5348   }
5349}
5350
5351CPU_GET_INFO( gms30c2116 )
5352{
5353   switch (state)
5354   {
5355
5356      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 16;               break;
5357      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 16;               break;
5358
5359      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_4k_iram_map); break;
5360
5361      /* --- the following bits of info are returned as pointers to data or functions --- */
5362      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(gms30c2116);               break;
5363
5364      /* --- the following bits of info are returned as NULL-terminated strings --- */
5365      case CPUINFO_STR_NAME:                     strcpy(info->s, "GMS30C2116");         break;
5366
5367      default:
5368         CPU_GET_INFO_CALL(hyperstone);
5369   }
5370}
5371
5372CPU_GET_INFO( gms30c2132 )
5373{
5374   switch (state)
5375   {
5376
5377      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 32;               break;
5378      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 32;               break;
5379
5380      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
5381
5382      /* --- the following bits of info are returned as pointers to data or functions --- */
5383      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(gms30c2132);               break;
5384
5385      /* --- the following bits of info are returned as NULL-terminated strings --- */
5386      case CPUINFO_STR_NAME:                     strcpy(info->s, "GMS30C2132");         break;
5387
5388      default:
5389         CPU_GET_INFO_CALL(hyperstone);
5390   }
5391}
5392
5393CPU_GET_INFO( gms30c2216 )
5394{
5395   switch (state)
5396   {
5397
5398      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 16;               break;
5399      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 16;               break;
5400
5401      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_8k_iram_map); break;
5402
5403      /* --- the following bits of info are returned as pointers to data or functions --- */
5404      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(gms30c2216);               break;
5405
5406      /* --- the following bits of info are returned as NULL-terminated strings --- */
5407      case CPUINFO_STR_NAME:                     strcpy(info->s, "GMS30C2216");         break;
5408
5409      default:
5410         CPU_GET_INFO_CALL(hyperstone);
5411   }
5412}
5413
5414CPU_GET_INFO( gms30c2232 )
5415{
5416   switch (state)
5417   {
5418
5419      case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM:   info->i = 32;               break;
5420      case CPUINFO_INT_DATABUS_WIDTH + AS_IO:      info->i = 32;               break;
5421
5422      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
5423
5424      /* --- the following bits of info are returned as pointers to data or functions --- */
5425      case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(gms30c2232);               break;
5426
5427      /* --- the following bits of info are returned as NULL-terminated strings --- */
5428      case CPUINFO_STR_NAME:                     strcpy(info->s, "GMS30C2232");         break;
5429
5430      default:
5431         CPU_GET_INFO_CALL(hyperstone);
5432   }
5433}
5434
5435DEFINE_LEGACY_CPU_DEVICE(E116T, e116t);
5436DEFINE_LEGACY_CPU_DEVICE(E116XT, e116xt);
5437DEFINE_LEGACY_CPU_DEVICE(E116XS, e116xs);
5438DEFINE_LEGACY_CPU_DEVICE(E116XSR, e116xsr);
5439DEFINE_LEGACY_CPU_DEVICE(E132N, e132n);
5440DEFINE_LEGACY_CPU_DEVICE(E132T, e132t);
5441DEFINE_LEGACY_CPU_DEVICE(E132XN, e132xn);
5442DEFINE_LEGACY_CPU_DEVICE(E132XT, e132xt);
5443DEFINE_LEGACY_CPU_DEVICE(E132XS, e132xs);
5444DEFINE_LEGACY_CPU_DEVICE(E132XSR, e132xsr);
5445DEFINE_LEGACY_CPU_DEVICE(GMS30C2116, gms30c2116);
5446DEFINE_LEGACY_CPU_DEVICE(GMS30C2132, gms30c2132);
5447DEFINE_LEGACY_CPU_DEVICE(GMS30C2216, gms30c2216);
5448DEFINE_LEGACY_CPU_DEVICE(GMS30C2232, gms30c2232);
trunk/src/emu/cpu/e132xs/e132xs.h
r19871r19872
2222
2323/* Functions */
2424
25/***************************************************************************
26    COMPILE-TIME DEFINITIONS
27***************************************************************************/
25DECLARE_LEGACY_CPU_DEVICE(E116T, e116t);
26DECLARE_LEGACY_CPU_DEVICE(E116XT, e116xt);
27DECLARE_LEGACY_CPU_DEVICE(E116XS, e116xs);
28DECLARE_LEGACY_CPU_DEVICE(E116XSR, e116xsr);
29DECLARE_LEGACY_CPU_DEVICE(E132N, e132n);
30DECLARE_LEGACY_CPU_DEVICE(E132T, e132t);
31DECLARE_LEGACY_CPU_DEVICE(E132XN, e132xn);
32DECLARE_LEGACY_CPU_DEVICE(E132XT, e132xt);
33DECLARE_LEGACY_CPU_DEVICE(E132XS, e132xs);
34DECLARE_LEGACY_CPU_DEVICE(E132XSR, e132xsr);
35DECLARE_LEGACY_CPU_DEVICE(GMS30C2116, gms30c2116);
36DECLARE_LEGACY_CPU_DEVICE(GMS30C2132, gms30c2132);
37DECLARE_LEGACY_CPU_DEVICE(GMS30C2216, gms30c2216);
38DECLARE_LEGACY_CPU_DEVICE(GMS30C2232, gms30c2232);
2839
40
41extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned h_flag, int private_fp);
42
43/* Memory access */
44/* read byte */
45#define READ_B(H,addr)         (H)->program->read_byte((addr))
46/* read half-word */
47#define READ_HW(H,addr)        (H)->program->read_word((addr) & ~1)
48/* read word */
49#define READ_W(H,addr)         (H)->program->read_dword((addr) & ~3)
50
51/* write byte */
52#define WRITE_B(H,addr, data)  (H)->program->write_byte(addr, data)
53/* write half-word */
54#define WRITE_HW(H,addr, data) (H)->program->write_word((addr) & ~1, data)
55/* write word */
56#define WRITE_W(H,addr, data)  (H)->program->write_dword((addr) & ~3, data)
57
58
59/* I/O access */
60/* read word */
61#define IO_READ_W(H,addr)      (H)->io->read_dword(((addr) >> 11) & 0x7ffc)
62/* write word */
63#define IO_WRITE_W(H,addr, data) (H)->io->write_dword(((addr) >> 11) & 0x7ffc, data)
64
65
66#define READ_OP(H,addr)          (H)->direct->read_decrypted_word((addr), (H)->opcodexor)
67
68
69/* Registers Number */
2970#define PC_REGISTER          0
3071#define SR_REGISTER          1
3172#define BCR_REGISTER      20
r19871r19872
91132#define TRAPNO_RESET            62   // reserved if not mapped @ MEM3
92133#define TRAPNO_ERROR_ENTRY         63   // for instruction code of all ones
93134
94/* Trap codes */
135/* Traps code */
95136#define   TRAPLE      4
96137#define   TRAPGT      5
97138#define   TRAPLT      6
r19871r19872
112153#define   E132XS_ENTRY_IRAM   3
113154#define   E132XS_ENTRY_MEM3   7
114155
115/***************************************************************************
116    REGISTER ENUMERATION
117***************************************************************************/
118
119enum
120{
121   E132XS_PC = 1,
122   E132XS_SR,
123   E132XS_FER,
124   E132XS_G3,
125   E132XS_G4,
126   E132XS_G5,
127   E132XS_G6,
128   E132XS_G7,
129   E132XS_G8,
130   E132XS_G9,
131   E132XS_G10,
132   E132XS_G11,
133   E132XS_G12,
134   E132XS_G13,
135   E132XS_G14,
136   E132XS_G15,
137   E132XS_G16,
138   E132XS_G17,
139   E132XS_SP,
140   E132XS_UB,
141   E132XS_BCR,
142   E132XS_TPR,
143   E132XS_TCR,
144   E132XS_TR,
145   E132XS_WCR,
146   E132XS_ISR,
147   E132XS_FCR,
148   E132XS_MCR,
149   E132XS_G28,
150   E132XS_G29,
151   E132XS_G30,
152   E132XS_G31,
153   E132XS_CL0, E132XS_CL1, E132XS_CL2, E132XS_CL3,
154   E132XS_CL4, E132XS_CL5, E132XS_CL6, E132XS_CL7,
155   E132XS_CL8, E132XS_CL9, E132XS_CL10,E132XS_CL11,
156   E132XS_CL12,E132XS_CL13,E132XS_CL14,E132XS_CL15,
157   E132XS_L0,  E132XS_L1,  E132XS_L2,  E132XS_L3,
158   E132XS_L4,  E132XS_L5,  E132XS_L6,  E132XS_L7,
159   E132XS_L8,  E132XS_L9,  E132XS_L10, E132XS_L11,
160   E132XS_L12, E132XS_L13, E132XS_L14, E132XS_L15,
161   E132XS_L16, E132XS_L17, E132XS_L18, E132XS_L19,
162   E132XS_L20, E132XS_L21, E132XS_L22, E132XS_L23,
163   E132XS_L24, E132XS_L25, E132XS_L26, E132XS_L27,
164   E132XS_L28, E132XS_L29, E132XS_L30, E132XS_L31,
165   E132XS_L32, E132XS_L33, E132XS_L34, E132XS_L35,
166   E132XS_L36, E132XS_L37, E132XS_L38, E132XS_L39,
167   E132XS_L40, E132XS_L41, E132XS_L42, E132XS_L43,
168   E132XS_L44, E132XS_L45, E132XS_L46, E132XS_L47,
169   E132XS_L48, E132XS_L49, E132XS_L50, E132XS_L51,
170   E132XS_L52, E132XS_L53, E132XS_L54, E132XS_L55,
171   E132XS_L56, E132XS_L57, E132XS_L58, E132XS_L59,
172   E132XS_L60, E132XS_L61, E132XS_L62, E132XS_L63
173};
174
175extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned h_flag, int private_fp);
176
177/* Memory access */
178/* read byte */
179#define READ_B(addr)            m_program->read_byte((addr))
180/* read half-word */
181#define READ_HW(addr)           m_program->read_word((addr) & ~1)
182/* read word */
183#define READ_W(addr)            m_program->read_dword((addr) & ~3)
184
185/* write byte */
186#define WRITE_B(addr, data)     m_program->write_byte(addr, data)
187/* write half-word */
188#define WRITE_HW(addr, data)    m_program->write_word((addr) & ~1, data)
189/* write word */
190#define WRITE_W(addr, data)     m_program->write_dword((addr) & ~3, data)
191
192
193/* I/O access */
194/* read word */
195#define IO_READ_W(addr)         m_io->read_dword(((addr) >> 11) & 0x7ffc)
196/* write word */
197#define IO_WRITE_W(addr, data)   m_io->write_dword(((addr) >> 11) & 0x7ffc, data)
198
199
200#define READ_OP(addr)          m_direct->read_decrypted_word((addr), m_opcodexor)
201
202//**************************************************************************
203//  TYPE DEFINITIONS
204//**************************************************************************
205
206// ======================> hyperstone_device
207
208// Used by core CPU interface
209class hyperstone_device : public cpu_device
210{
211public:
212   // construction/destruction
213   hyperstone_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
214                 const device_type type, UINT32 prg_data_width, UINT32 io_data_width, address_map_constructor internal_map);
215
216   // public interfaces
217
218protected:
219   void init(int scale_mask);
220
221   // device-level overrides
222   virtual void device_start();
223   virtual void device_reset();
224   virtual void device_stop();
225
226   void make_ops();
227
228   // device_execute_interface overrides
229   virtual UINT32 execute_min_cycles() const;
230   virtual UINT32 execute_max_cycles() const;
231   virtual UINT32 execute_input_lines() const;
232   virtual void execute_run();
233   virtual void execute_set_input(int inputnum, int state);
234
235   // device_memory_interface overrides
236   virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
237
238   // device_disasm_interface overrides
239   virtual UINT32 disasm_min_opcode_bytes() const;
240   virtual UINT32 disasm_max_opcode_bytes() const;
241   virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
242
243   // device_state_interface overrides
244   virtual void state_string_export(const device_state_entry &entry, astring &string);
245
246   // address spaces
247   const address_space_config m_program_config;
248   const address_space_config m_io_config;
249   address_space *m_program;
250   direct_read_data *m_direct;
251   address_space *m_io;
252
253   /* Delay information */
254   struct delay_info
255   {
256      INT32   delay_cmd;
257      UINT32   delay_pc;
258   };
259
260   // CPU registers
261   UINT32   m_global_regs[32];
262   UINT32   m_local_regs[64];
263
264   /* internal stuff */
265   UINT32   m_ppc;         // previous pc
266   UINT16   m_op;         // opcode
267   UINT32   m_trap_entry;    // entry point to get trap address
268
269   UINT8   m_clock_scale_mask;
270   UINT8   m_clock_scale;
271   UINT8   m_clock_cycles_1;
272   UINT8   m_clock_cycles_2;
273   UINT8   m_clock_cycles_4;
274   UINT8   m_clock_cycles_6;
275
276   UINT64   m_tr_base_cycles;
277   UINT32   m_tr_base_value;
278   UINT32   m_tr_clocks_per_tick;
279   UINT8   m_timer_int_pending;
280   emu_timer *m_timer;
281
282   delay_info m_delay;
283
284   UINT32 m_opcodexor;
285
286   INT32 m_instruction_length;
287   INT32 m_intblock;
288
289   // other internal state
290   int      m_icount;
291
292   typedef void (hyperstone_device::*ophandler)();
293
294   ophandler m_opcode[256];
295
296   static const ophandler s_opcodetable[256];
297
298private:
299   struct regs_decode
300   {
301      UINT8   src, dst;      // destination and source register code
302      UINT32   src_value;      // current source register value
303      UINT32   next_src_value; // current next source register value
304      UINT32   dst_value;      // current destination register value
305      UINT32   next_dst_value; // current next destination register value
306      UINT8   sub_type;      // sub type opcode (for DD and X_CODE bits)
307      union
308      {
309         UINT32 u;
310         INT32  s;
311      } extra;            // extra value such as immediate value, const, pcrel, ...
312      UINT8   src_is_local;
313      UINT8   dst_is_local;
314      UINT8   same_src_dst;
315      UINT8   same_src_dstf;
316      UINT8   same_srcf_dst;
317   };
318
319   // internal functions
320   void check_interrupts();
321
322   void set_global_register(UINT8 code, UINT32 val);
323   void set_local_register(UINT8 code, UINT32 val);
324
325   UINT32 get_global_register(UINT8 code);
326
327   UINT32 get_trap_addr(UINT8 trapno);
328   UINT32 get_emu_code_addr(UINT8 num);
329   void hyperstone_set_trap_entry(int which);
330   UINT32 compute_tr();
331   void update_timer_prescale();
332   void adjust_timer_interrupt();
333
334   TIMER_CALLBACK_MEMBER(timer_callback);
335
336   void execute_br(struct regs_decode *decode);
337   void execute_dbr(struct regs_decode *decode);
338   void execute_trap(UINT32 addr);
339   void execute_int(UINT32 addr);
340   void execute_exception(UINT32 addr);
341   void execute_software(struct regs_decode *decode);
342
343   void hyperstone_chk(struct regs_decode *decode);
344   void hyperstone_movd(struct regs_decode *decode);
345   void hyperstone_divu(struct regs_decode *decode);
346   void hyperstone_divs(struct regs_decode *decode);
347   void hyperstone_xm(struct regs_decode *decode);
348   void hyperstone_mask(struct regs_decode *decode);
349   void hyperstone_sum(struct regs_decode *decode);
350   void hyperstone_sums(struct regs_decode *decode);
351   void hyperstone_cmp(struct regs_decode *decode);
352   void hyperstone_mov(struct regs_decode *decode);
353   void hyperstone_add(struct regs_decode *decode);
354   void hyperstone_adds(struct regs_decode *decode);
355   void hyperstone_cmpb(struct regs_decode *decode);
356   void hyperstone_andn(struct regs_decode *decode);
357   void hyperstone_or(struct regs_decode *decode);
358   void hyperstone_xor(struct regs_decode *decode);
359   void hyperstone_subc(struct regs_decode *decode);
360   void hyperstone_not(struct regs_decode *decode);
361   void hyperstone_sub(struct regs_decode *decode);
362   void hyperstone_subs(struct regs_decode *decode);
363   void hyperstone_addc(struct regs_decode *decode);
364   void hyperstone_and(struct regs_decode *decode);
365   void hyperstone_neg(struct regs_decode *decode);
366   void hyperstone_negs(struct regs_decode *decode);
367   void hyperstone_cmpi(struct regs_decode *decode);
368   void hyperstone_movi(struct regs_decode *decode);
369   void hyperstone_addi(struct regs_decode *decode);
370   void hyperstone_addsi(struct regs_decode *decode);
371   void hyperstone_cmpbi(struct regs_decode *decode);
372   void hyperstone_andni(struct regs_decode *decode);
373   void hyperstone_ori(struct regs_decode *decode);
374   void hyperstone_xori(struct regs_decode *decode);
375   void hyperstone_shrdi(struct regs_decode *decode);
376   void hyperstone_shrd(struct regs_decode *decode);
377   void hyperstone_shr(struct regs_decode *decode);
378   void hyperstone_shri(struct regs_decode *decode);
379   void hyperstone_sardi(struct regs_decode *decode);
380   void hyperstone_sard(struct regs_decode *decode);
381   void hyperstone_sar(struct regs_decode *decode);
382   void hyperstone_sari(struct regs_decode *decode);
383   void hyperstone_shldi(struct regs_decode *decode);
384   void hyperstone_shld(struct regs_decode *decode);
385   void hyperstone_shl(struct regs_decode *decode);
386   void hyperstone_shli(struct regs_decode *decode);
387   void hyperstone_testlz(struct regs_decode *decode);
388   void hyperstone_rol(struct regs_decode *decode);
389   void hyperstone_ldxx1(struct regs_decode *decode);
390   void hyperstone_ldxx2(struct regs_decode *decode);
391   void hyperstone_stxx1(struct regs_decode *decode);
392   void hyperstone_stxx2(struct regs_decode *decode);
393   void hyperstone_mulu(struct regs_decode *decode);
394   void hyperstone_muls(struct regs_decode *decode);
395   void hyperstone_mul(struct regs_decode *decode);
396   void hyperstone_set(struct regs_decode *decode);
397
398   void hyperstone_fadd(struct regs_decode *decode);
399   void hyperstone_faddd(struct regs_decode *decode);
400   void hyperstone_fsub(struct regs_decode *decode);
401   void hyperstone_fsubd(struct regs_decode *decode);
402   void hyperstone_fmul(struct regs_decode *decode);
403   void hyperstone_fmuld(struct regs_decode *decode);
404   void hyperstone_fdiv(struct regs_decode *decode);
405   void hyperstone_fdivd(struct regs_decode *decode);
406
407   void hyperstone_fcmp(struct regs_decode *decode);
408   void hyperstone_fcmpd(struct regs_decode *decode);
409   void hyperstone_fcmpu(struct regs_decode *decode);
410   void hyperstone_fcmpud(struct regs_decode *decode);
411
412   void hyperstone_fcvt(struct regs_decode *decode);
413   void hyperstone_fcvtd(struct regs_decode *decode);
414
415   void hyperstone_extend(struct regs_decode *decode);
416
417   void hyperstone_ldwr(struct regs_decode *decode);
418   void hyperstone_lddr(struct regs_decode *decode);
419   void hyperstone_ldwp(struct regs_decode *decode);
420   void hyperstone_lddp(struct regs_decode *decode);
421
422   void hyperstone_stwr(struct regs_decode *decode);
423   void hyperstone_stdr(struct regs_decode *decode);
424   void hyperstone_stwp(struct regs_decode *decode);
425   void hyperstone_stdp(struct regs_decode *decode);
426
427   void hyperstone_dbv(struct regs_decode *decode);
428   void hyperstone_dbnv(struct regs_decode *decode);
429   void hyperstone_dbe(struct regs_decode *decode);
430   void hyperstone_dbne(struct regs_decode *decode);
431   void hyperstone_dbc(struct regs_decode *decode);
432   void hyperstone_dbnc(struct regs_decode *decode);
433   void hyperstone_dbse(struct regs_decode *decode);
434   void hyperstone_dbht(struct regs_decode *decode);
435   void hyperstone_dbn(struct regs_decode *decode);
436   void hyperstone_dbnn(struct regs_decode *decode);
437   void hyperstone_dble(struct regs_decode *decode);
438   void hyperstone_dbgt(struct regs_decode *decode);
439   void hyperstone_dbr(struct regs_decode *decode);
440
441   void hyperstone_frame(struct regs_decode *decode);
442   void hyperstone_call(struct regs_decode *decode);
443
444   void hyperstone_bv(struct regs_decode *decode);
445   void hyperstone_bnv(struct regs_decode *decode);
446   void hyperstone_be(struct regs_decode *decode);
447   void hyperstone_bne(struct regs_decode *decode);
448   void hyperstone_bc(struct regs_decode *decode);
449   void hyperstone_bnc(struct regs_decode *decode);
450   void hyperstone_bse(struct regs_decode *decode);
451   void hyperstone_bht(struct regs_decode *decode);
452   void hyperstone_bn(struct regs_decode *decode);
453   void hyperstone_bnn(struct regs_decode *decode);
454   void hyperstone_ble(struct regs_decode *decode);
455   void hyperstone_bgt(struct regs_decode *decode);
456   void hyperstone_br(struct regs_decode *decode);
457
458   void hyperstone_trap(struct regs_decode *decode);
459   void hyperstone_do(struct regs_decode *decode);
460
461   void reserved(struct regs_decode *decode);
462
463   void op00();   void op01();   void op02();   void op03();   void op04();   void op05();   void op06();   void op07();
464   void op08();   void op09();   void op0a();   void op0b();   void op0c();   void op0d();   void op0e();   void op0f();
465   void op10();   void op11();   void op12();   void op13();   void op14();   void op15();   void op16();   void op17();
466   void op18();   void op19();   void op1a();   void op1b();   void op1c();   void op1d();   void op1e();   void op1f();
467   void op20();   void op21();   void op22();   void op23();   void op24();   void op25();   void op26();   void op27();
468   void op28();   void op29();   void op2a();   void op2b();   void op2c();   void op2d();   void op2e();   void op2f();
469   void op30();   void op31();   void op32();   void op33();   void op34();   void op35();   void op36();   void op37();
470   void op38();   void op39();   void op3a();   void op3b();   void op3c();   void op3d();   void op3e();   void op3f();
471   void op40();   void op41();   void op42();   void op43();   void op44();   void op45();   void op46();   void op47();
472   void op48();   void op49();   void op4a();   void op4b();   void op4c();   void op4d();   void op4e();   void op4f();
473   void op50();   void op51();   void op52();   void op53();   void op54();   void op55();   void op56();   void op57();
474   void op58();   void op59();   void op5a();   void op5b();   void op5c();   void op5d();   void op5e();   void op5f();
475   void op60();   void op61();   void op62();   void op63();   void op64();   void op65();   void op66();   void op67();
476   void op68();   void op69();   void op6a();   void op6b();   void op6c();   void op6d();   void op6e();   void op6f();
477   void op70();   void op71();   void op72();   void op73();   void op74();   void op75();   void op76();   void op77();
478   void op78();   void op79();   void op7a();   void op7b();   void op7c();   void op7d();   void op7e();   void op7f();
479   void op80();   void op81();   void op82();   void op83();   void op84();   void op85();   void op86();   void op87();
480   void op88();   void op89();   void op8a();   void op8b();   void op8c();   void op8d();   void op8e();   void op8f();
481   void op90();   void op91();   void op92();   void op93();   void op94();   void op95();   void op96();   void op97();
482   void op98();   void op99();   void op9a();   void op9b();   void op9c();   void op9d();   void op9e();   void op9f();
483   void opa0();   void opa1();   void opa2();   void opa3();   void opa4();   void opa5();   void opa6();   void opa7();
484   void opa8();   void opa9();   void opaa();   void opab();   void opac();   void opad();   void opae();   void opaf();
485   void opb0();   void opb1();   void opb2();   void opb3();   void opb4();   void opb5();   void opb6();   void opb7();
486   void opb8();   void opb9();   void opba();   void opbb();   void opbc();   void opbd();   void opbe();   void opbf();
487   void opc0();   void opc1();   void opc2();   void opc3();   void opc4();   void opc5();   void opc6();   void opc7();
488   void opc8();   void opc9();   void opca();   void opcb();   void opcc();   void opcd();   void opce();   void opcf();
489   void opd0();   void opd1();   void opd2();   void opd3();   void opd4();   void opd5();   void opd6();   void opd7();
490   void opd8();   void opd9();   void opda();   void opdb();   void opdc();   void opdd();   void opde();   void opdf();
491   void ope0();   void ope1();   void ope2();   void ope3();   void ope4();   void ope5();   void ope6();   void ope7();
492   void ope8();   void ope9();   void opea();   void opeb();   void opec();   void oped();   void opee();   void opef();
493   void opf0();   void opf1();   void opf2();   void opf3();   void opf4();   void opf5();   void opf6();   void opf7();
494   void opf8();   void opf9();   void opfa();   void opfb();   void opfc();   void opfd();   void opfe();   void opff();
495
496   void set_irq_line(int irqline, int state);
497};
498
499// device type definition
500extern const device_type E116T;
501extern const device_type E116XT;
502extern const device_type E116XS;
503extern const device_type E116XSR;
504extern const device_type E132N;
505extern const device_type E132T;
506extern const device_type E132XN;
507extern const device_type E132XT;
508extern const device_type E132XS;
509extern const device_type E132XSR;
510extern const device_type GMS30C2116;
511extern const device_type GMS30C2132;
512extern const device_type GMS30C2216;
513extern const device_type GMS30C2232;
514
515
516// ======================> e116t_device
517
518class e116t_device : public hyperstone_device
519{
520public:
521   // construction/destruction
522   e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
523
524protected:
525   virtual void device_start();
526};
527
528
529// ======================> e116xt_device
530
531class e116xt_device : public hyperstone_device
532{
533public:
534   // construction/destruction
535   e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
536
537protected:
538   virtual void device_start();
539};
540
541
542// ======================> e116xs_device
543
544class e116xs_device : public hyperstone_device
545{
546public:
547   // construction/destruction
548   e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
549
550protected:
551   virtual void device_start();
552};
553
554
555// ======================> e116xsr_device
556
557class e116xsr_device : public hyperstone_device
558{
559public:
560   // construction/destruction
561   e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
562
563protected:
564   virtual void device_start();
565};
566
567
568// ======================> e132n_device
569
570class e132n_device : public hyperstone_device
571{
572public:
573   // construction/destruction
574   e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
575
576protected:
577   virtual void device_start();
578};
579
580
581// ======================> e132t_device
582
583class e132t_device : public hyperstone_device
584{
585public:
586   // construction/destruction
587   e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
588
589protected:
590   virtual void device_start();
591};
592
593
594// ======================> e132xn_device
595
596class e132xn_device : public hyperstone_device
597{
598public:
599   // construction/destruction
600   e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
601
602protected:
603   virtual void device_start();
604};
605
606
607// ======================> e132xt_device
608
609class e132xt_device : public hyperstone_device
610{
611public:
612   // construction/destruction
613   e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
614
615protected:
616   virtual void device_start();
617};
618
619
620// ======================> e132xs_device
621
622class e132xs_device : public hyperstone_device
623{
624public:
625   // construction/destruction
626   e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
627
628protected:
629   virtual void device_start();
630};
631
632
633// ======================> e132xsr_device
634
635class e132xsr_device : public hyperstone_device
636{
637public:
638   // construction/destruction
639   e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
640
641protected:
642   virtual void device_start();
643};
644
645
646// ======================> gms30c2116_device
647
648class gms30c2116_device : public hyperstone_device
649{
650public:
651   // construction/destruction
652   gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
653
654protected:
655   virtual void device_start();
656};
657
658
659// ======================> gms30c2132_device
660
661class gms30c2132_device : public hyperstone_device
662{
663public:
664   // construction/destruction
665   gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
666
667protected:
668   virtual void device_start();
669};
670
671
672// ======================> gms30c2216_device
673
674class gms30c2216_device : public hyperstone_device
675{
676public:
677   // construction/destruction
678   gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
679
680protected:
681   virtual void device_start();
682};
683
684
685// ======================> gms30c2232_device
686
687class gms30c2232_device : public hyperstone_device
688{
689public:
690   // construction/destruction
691   gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
692
693protected:
694   virtual void device_start();
695};
696
697156#endif /* __E132XS_H__ */

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