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r19817 Tuesday 25th December, 2012 at 18:59:11 UTC by Angelo Salese
Added system type variable
[src/mess/drivers]pc9801.c
[src/mess/video]upd7220.c

trunk/src/mess/drivers/pc9801.c
r19816r19817
4141    - Unsupported disk types: *.dsk, *.nfd, *.fdd, *.nhd
4242    - 46 Okunen Monogatari - The Shinkaron
4343    - AD&D Champions of Krynn
44    - AI Shougi (asserts upon loading)
44    - AI Shougi (asserts upon loading, 3'5 image?)
45    - Aki no Tsukasa no Fushigi no Kabe (works in PC-9801RS only)
4546    - Aoki Ookami no Shiroki Mejika - Gengis Khan
4647    - Arcshu
4748    - Arcus 2
r19816r19817
5859   - Birdy World
5960
6061    - Bokosuka Wars
61    - Dokkin Minako Sensei (2dd image)
6262    - Jangou 2: floppy fails to load after the title screen;
6363    - Okuman Chouja 2: fails loading in PC-9801RS only ("packed file is corrupt"). Maybe a 386 core bug?
6464    - Quarth: fails loading in PC-9801RS only ("packed file is corrupt"). Maybe a 386 core bug?
r19816r19817
6868    - A Ressha de Ikou 2: missing text (PC-9801RS only);
6969    - Absolutely Mahjong: Transitions are too fast.
7070    - Agumix Selects!: needs GDC = 5 MHz, interlace doesn't work properly;
71    - Aki no Tsukasa no Fushigi no Kabe: moans with a kanji error
72       "can't use (this) on a vanilla PC-9801, a PC-9801E nor a PC-9801U. Please turn off the computer and turn it on again."
7371    - Alice no Yakata: doesn't set bitmap interlace properly, can't do disk swaps via the File Manager;
7472    - Animahjong V3: accesses port 0x88;
7573    - Anniversary - Memories of Summer: thinks that a button is pressed;
r19816r19817
443441   UINT8 m_pc9821_window_bank;
444442   UINT8 m_joy_sel;
445443   UINT8 m_ext2_ff;
444   UINT8 m_sys_type;
446445
447446   DECLARE_READ8_MEMBER(pc9801_xx_r);
448447   DECLARE_WRITE8_MEMBER(pc9801_xx_w);
r19816r19817
481480   DECLARE_WRITE8_MEMBER(pc9801rs_mouse_freq_w);
482481   inline UINT8 m_pc9801rs_grcg_r(UINT32 offset,int vbank);
483482   inline void m_pc9801rs_grcg_w(UINT32 offset,int vbank,UINT8 data);
483   DECLARE_CUSTOM_INPUT_MEMBER(system_type_r);
484484
485485   DECLARE_WRITE8_MEMBER(sasi_data_w);
486486   DECLARE_WRITE_LINE_MEMBER(sasi_io_w);
r19816r19817
26972697   }
26982698}
26992699
2700CUSTOM_INPUT_MEMBER(pc9801_state::system_type_r)
2701{
2702//  System Type (0x00 stock PC-9801, 0xc0 PC-9801U / PC-98LT, PC-98HA, 0x80 others)
2703   return m_sys_type;
2704}
2705
27002706static INPUT_PORTS_START( pc9801 )
27012707   PORT_START("KEY0") // 0x00 - 0x07
27022708   PORT_BIT(0x01,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("ESC") PORT_CODE(KEYCODE_ESC)  PORT_CHANGED_MEMBER(DEVICE_SELF, pc9801_state, key_stroke, 0x00) PORT_IMPULSE(1)
r19816r19817
29022908   PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) //system clock = 5 MHz (0) / 8 MHz (1)
29032909   PORT_DIPSETTING(      0x20, DEF_STR( Off ) )
29042910   PORT_DIPSETTING(      0x00, DEF_STR( On ) )
2905   PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) // System Type (0x00   stock PC-9801, 0xc0 PC-9801U / PC-98LT, PC-98HA, 0x80 others)
2906   PORT_DIPSETTING(      0x40, DEF_STR( Off ) )
2907   PORT_DIPSETTING(      0x00, DEF_STR( On ) )
2908   PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) //
2909   PORT_DIPSETTING(      0x80, DEF_STR( Off ) )
2910   PORT_DIPSETTING(      0x00, DEF_STR( On ) )
2911   PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, pc9801_state, system_type_r, NULL)
29112912
29122913   PORT_START("DSW2")
29132914   PORT_DIPNAME( 0x01, 0x01, "System Specification" ) PORT_DIPLOCATION("SW1:1") //jumps to daa00 if off, presumably some card booting
r19816r19817
35813582   }
35823583   m_fdc_2hd->set_rate(500000);
35833584   m_fdc_2dd->set_rate(250000);
3585   m_sys_type = 0x00 >> 6;
35843586}
35853587
35863588MACHINE_START_MEMBER(pc9801_state,pc9801rs)
r19816r19817
36003602   fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(pc9801_state::pc9801rs_fdc_drq), this));
36013603
36023604   m_ide_rom = memregion("ide")->base();
3605   m_sys_type = 0x80 >> 6;
36033606}
36043607
36053608MACHINE_START_MEMBER(pc9801_state,pc9821)
trunk/src/mess/video/upd7220.c
r19816r19817
12231223      {
12241224         m_ctop = m_pr[2] & 0x1f;
12251225         m_sc = BIT(m_pr[2], 5);
1226         m_br = (m_pr[2] >> 6); /* guess, assume that blink rate clears upper bits (if any) */
12261227
12271228         LOG(("uPD7220 '%s' CTOP: %u\n", tag(), m_ctop));
12281229         LOG(("uPD7220 '%s' SC: %u\n", tag(), m_sc));

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