Previous 199869 Revisions Next

r19645 Tuesday 18th December, 2012 at 09:36:12 UTC by O. Galibert
mcs96: Fix V setting on divb [O. Galibert]
[src/emu/cpu/mcs96]mcs96ops.lst

trunk/src/emu/cpu/mcs96/mcs96ops.lst
r19644r19645
11571157   if(OP1) {
11581158      TMP = reg_r16(OP2);
11591159      UINT32 TMP2 = INT16(TMP) / INT8(OP1);
1160      if(INT8(TMP2) > 127 || INT8(TMP2) < -128)
1160      if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
11611161         PSW |= F_V|F_VT;
11621162      TMP = INT16(TMP) % INT8(OP1);
11631163      TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
r19644r19645
11701170   if(OP1) {
11711171      TMP = reg_r16(OP2);
11721172      UINT32 TMP2 = INT16(TMP) / INT8(OP1);
1173      if(INT8(TMP2) > 127 || INT8(TMP2) < -128)
1173      if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
11741174         PSW |= F_V|F_VT;
11751175      TMP = INT16(TMP) % INT8(OP1);
11761176      TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);

Previous 199869 Revisions Next


© 1997-2024 The MAME Team