trunk/src/mess/drivers/pc9801.c
| r19479 | r19480 | |
| 47 | 47 | List of per-game TODO: |
| 48 | 48 | - 4D Boxing: inputs are unresponsive |
| 49 | 49 | - A Ressha de Ikou 2: missing text (PC-9801RS only); |
| 50 | | - Absolutely Mahjong: Kanji data doesn't appear at the Epson logo. Transitions are too fast. |
| 51 | | - Agumix Selects!: needs GDC = 5 MHz, interlace doesn't apply there; |
| 50 | - Absolutely Mahjong: Transitions are too fast. |
| 51 | - Agumix Selects!: needs GDC = 5 MHz, interlace doesn't work properly; |
| 52 | - Aki no Tsukasa no Fushigi no Kabe: moans with a kanji error |
| 53 | "can't use (this) on a vanilla PC-9801, a PC-9801E nor a PC-9801U. Please turn off the computer and turn it on again." |
| 54 | display of this kanji error is wrong on PC-9801RS; |
| 55 | - Alice no Yakata: wants a "DSW 1-8" on. |
| 56 | - Animahjong V3: accesses port 0x88, tile selection pointer has a gfx clearance bug; |
| 57 | - Anniversary - Memories of Summer: thinks that a button is pressed, has window masking bugs during intro; |
| 58 | - Another Genesis: fails loading; |
| 59 | |
| 52 | 60 | - Brandish 2: Intro needs some window masking effects; |
| 53 | 61 | - Dragon Buster: missing bitplanes for the PCG (or not?), slight issue with window masking; |
| 54 | 62 | - Far Side Moon: doesn't detect sound board (tied to 0x00ec ports) |
| r19479 | r19480 | |
| 59 | 67 | - Quarth: uploads a PCG charset |
| 60 | 68 | - Runner's High: wrong double height on the title screen; |
| 61 | 69 | - Uchiyama Aki no Chou Bangai: keyboard irq is fussy (sometimes it doesn't register a key press); |
| 70 | - Uno: uses EGC |
| 62 | 71 | |
| 63 | 72 | ======================================================================================== |
| 64 | 73 | |
| r19479 | r19480 | |
| 351 | 360 | |
| 352 | 361 | /* PC9801RS specific */ |
| 353 | 362 | UINT8 m_gate_a20; //A20 line |
| 363 | UINT8 m_nmi_enable; |
| 354 | 364 | UINT8 m_access_ctrl; // DMA related |
| 355 | 365 | UINT8 m_rom_bank; |
| 356 | 366 | UINT8 m_fdc_ctrl; |
| r19479 | r19480 | |
| 458 | 468 | DECLARE_WRITE8_MEMBER(opn_portb_w); |
| 459 | 469 | DECLARE_READ8_MEMBER(pc9801_ext_opna_r); |
| 460 | 470 | DECLARE_WRITE8_MEMBER(pc9801_ext_opna_w); |
| 471 | DECLARE_WRITE8_MEMBER(pc9801rs_nmi_w); |
| 472 | DECLARE_READ8_MEMBER(pc9801rs_midi_r); |
| 461 | 473 | |
| 462 | 474 | DECLARE_READ8_MEMBER(sdip_0_r); |
| 463 | 475 | DECLARE_READ8_MEMBER(sdip_1_r); |
| r19479 | r19480 | |
| 688 | 700 | { |
| 689 | 701 | UINT8 tile_data,secret,reverse,u_line,v_line; |
| 690 | 702 | UINT8 color; |
| 691 | | UINT8 attr,pen; |
| 703 | UINT8 attr; |
| 704 | int pen; |
| 692 | 705 | UINT32 tile_addr; |
| 693 | 706 | UINT8 knj_tile; |
| 694 | 707 | UINT8 gfx_mode; |
| r19479 | r19480 | |
| 772 | 785 | tile_data^=0xff; |
| 773 | 786 | |
| 774 | 787 | if(yi >= char_size) |
| 775 | | pen = 0; |
| 788 | pen = -1; |
| 776 | 789 | else |
| 777 | | pen = (tile_data >> (7-xi) & 1) ? color : 0; |
| 790 | pen = (tile_data >> (7-xi) & 1) ? color : -1; |
| 778 | 791 | |
| 779 | | if(pen) |
| 792 | if(pen != -1) |
| 780 | 793 | bitmap.pix32(res_y, res_x) = palette[pen]; |
| 781 | 794 | |
| 782 | 795 | if(state->m_video_ff[WIDTH40_REG]) |
| r19479 | r19480 | |
| 784 | 797 | if(!device->machine().primary_screen->visible_area().contains(res_x+1, res_y)) |
| 785 | 798 | continue; |
| 786 | 799 | |
| 787 | | bitmap.pix32(res_y, res_x+1) = palette[pen]; |
| 800 | if(pen != -1) |
| 801 | bitmap.pix32(res_y, res_x+1) = palette[pen]; |
| 788 | 802 | } |
| 789 | 803 | } |
| 790 | 804 | } |
| r19479 | r19480 | |
| 1695 | 1709 | { |
| 1696 | 1710 | |
| 1697 | 1711 | if(offset == 0x02) |
| 1698 | | return (m_gate_a20 ^ 1) | 0x2e; |
| 1712 | return (m_gate_a20 ^ 1) | 0xfe; |
| 1699 | 1713 | else if(offset == 0x06) |
| 1700 | | return (m_gate_a20 ^ 1) | 0x5e; |
| 1714 | return (m_gate_a20 ^ 1) | (m_nmi_enable << 1); |
| 1701 | 1715 | |
| 1702 | 1716 | return 0x00; |
| 1703 | 1717 | } |
| r19479 | r19480 | |
| 1928 | 1942 | "<unknown>" // 3 |
| 1929 | 1943 | }; |
| 1930 | 1944 | |
| 1931 | | printf("Write to extend video FF register %s -> %02x\n",ex_video_ff_regnames[(data & 0x06) >> 1],data & 1); |
| 1945 | printf("Write to extended video FF register %s -> %02x\n",ex_video_ff_regnames[(data & 0x06) >> 1],data & 1); |
| 1932 | 1946 | } |
| 1933 | 1947 | //else |
| 1934 | | // printf("Write to extend video FF register %02x\n",data); |
| 1948 | // printf("Write to extended video FF register %02x\n",data); |
| 1935 | 1949 | |
| 1936 | 1950 | return; |
| 1937 | 1951 | } |
| r19479 | r19480 | |
| 1941 | 1955 | |
| 1942 | 1956 | WRITE8_MEMBER(pc9801_state::pc9801rs_a0_w) |
| 1943 | 1957 | { |
| 1944 | | |
| 1945 | 1958 | if((offset & 1) == 0 && offset & 8 && m_ex_video_ff[ANALOG_16_MODE]) |
| 1946 | 1959 | { |
| 1947 | 1960 | switch(offset) |
| r19479 | r19480 | |
| 1988 | 2001 | |
| 1989 | 2002 | READ8_MEMBER( pc9801_state::pc9801_ext_opna_r ) |
| 1990 | 2003 | { |
| 1991 | | printf("OPNA EXT read ID [%02x]\n",offset); |
| 1992 | | return 0; |
| 2004 | if(offset == 0) |
| 2005 | { |
| 2006 | printf("OPNA EXT read ID [%02x]\n",offset); |
| 2007 | return 0xff; |
| 2008 | } |
| 2009 | |
| 2010 | printf("OPNA EXT read unk [%02x]\n",offset); |
| 2011 | return 0xff; |
| 1993 | 2012 | } |
| 1994 | 2013 | |
| 1995 | 2014 | WRITE8_MEMBER( pc9801_state::pc9801_ext_opna_w ) |
| 1996 | 2015 | { |
| 1997 | | printf("OPNA EXT write mask %02x -> [%02x]\n",data,offset); |
| 2016 | if(offset == 0) |
| 2017 | { |
| 2018 | printf("OPNA EXT write mask %02x -> [%02x]\n",data,offset); |
| 2019 | return; |
| 2020 | } |
| 2021 | |
| 2022 | printf("OPNA EXT write unk %02x -> [%02x]\n",data,offset); |
| 1998 | 2023 | } |
| 1999 | 2024 | |
| 2000 | 2025 | |
| 2026 | WRITE8_MEMBER( pc9801_state::pc9801rs_nmi_w ) |
| 2027 | { |
| 2028 | if(offset == 0) |
| 2029 | m_nmi_enable = 0; |
| 2030 | |
| 2031 | if(offset == 2) |
| 2032 | m_nmi_enable = 1; |
| 2033 | } |
| 2034 | |
| 2035 | READ8_MEMBER( pc9801_state::pc9801rs_midi_r ) |
| 2036 | { |
| 2037 | /* unconnect, needed by Amaranth KH to boot */ |
| 2038 | return 0xff; |
| 2039 | } |
| 2040 | |
| 2001 | 2041 | static ADDRESS_MAP_START( pc9801rs_map, AS_PROGRAM, 32, pc9801_state ) |
| 2002 | 2042 | AM_RANGE(0x00000000, 0xffffffff) AM_READWRITE8(pc9801rs_memory_r,pc9801rs_memory_w,0xffffffff) |
| 2003 | 2043 | ADDRESS_MAP_END |
| r19479 | r19480 | |
| 2007 | 2047 | AM_RANGE(0x0020, 0x0027) AM_READWRITE8(pc9801_20_r, pc9801_20_w, 0xffffffff) // RTC / DMA registers (LS244) |
| 2008 | 2048 | AM_RANGE(0x0030, 0x0037) AM_READWRITE8(pc9801rs_30_r, pc9801_30_w, 0xffffffff) //i8251 RS232c / i8255 system port |
| 2009 | 2049 | AM_RANGE(0x0040, 0x0047) AM_READWRITE8(pc9801_40_r, pc9801_40_w, 0xffffffff) //i8255 printer port / i8251 keyboard |
| 2050 | AM_RANGE(0x0050, 0x0053) AM_WRITE8(pc9801rs_nmi_w, 0xffffffff) |
| 2010 | 2051 | AM_RANGE(0x005c, 0x005f) AM_WRITENOP // time-stamp? |
| 2011 | 2052 | AM_RANGE(0x0060, 0x0063) AM_READWRITE8(pc9801_60_r, pc9801_60_w, 0xffffffff) //upd7220 character ports / <undefined> |
| 2012 | 2053 | AM_RANGE(0x0064, 0x0067) AM_WRITE8(pc9801_vrtc_mask_w, 0xffffffff) |
| r19479 | r19480 | |
| 2025 | 2066 | AM_RANGE(0x7fd8, 0x7fdf) AM_READWRITE8(pc9801_mouse_r, pc9801_mouse_w, 0xffffffff) // <undefined> / mouse ppi8255 ports |
| 2026 | 2067 | AM_RANGE(0xa460, 0xa463) AM_READWRITE8(pc9801_ext_opna_r, pc9801_ext_opna_w, 0xffffffff) |
| 2027 | 2068 | AM_RANGE(0xbfd8, 0xbfdf) AM_WRITE8(pc9801rs_mouse_freq_w, 0xffffffff) |
| 2069 | AM_RANGE(0xe0d0, 0xe0d3) AM_READ8(pc9801rs_midi_r, 0xffffffff) |
| 2028 | 2070 | ADDRESS_MAP_END |
| 2029 | 2071 | |
| 2030 | 2072 | READ8_MEMBER(pc9801_state::pc980ux_memory_r) |
| r19479 | r19480 | |
| 2370 | 2412 | AM_RANGE(0x0020, 0x0027) AM_READWRITE8(pc9801_20_r, pc9801_20_w, 0xffffffff) // RTC / DMA registers (LS244) |
| 2371 | 2413 | AM_RANGE(0x0030, 0x0037) AM_READWRITE8(pc9801rs_30_r, pc9801_30_w, 0xffffffff) //i8251 RS232c / i8255 system port |
| 2372 | 2414 | AM_RANGE(0x0040, 0x0047) AM_READWRITE8(pc9801_40_r, pc9801_40_w, 0xffffffff) //i8255 printer port / i8251 keyboard |
| 2415 | AM_RANGE(0x0050, 0x0053) AM_WRITE8(pc9801rs_nmi_w, 0xffffffff) |
| 2373 | 2416 | AM_RANGE(0x005c, 0x005f) AM_READ(pc9821_timestamp_r) AM_WRITENOP |
| 2374 | 2417 | AM_RANGE(0x0060, 0x0063) AM_READWRITE8(pc9801_60_r, pc9801_60_w, 0xffffffff) //upd7220 character ports / <undefined> |
| 2375 | 2418 | AM_RANGE(0x0064, 0x0067) AM_WRITE8(pc9801_vrtc_mask_w, 0xffffffff) |
| r19479 | r19480 | |
| 2671 | 2714 | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 2672 | 2715 | |
| 2673 | 2716 | PORT_START("DSW5") |
| 2674 | | PORT_DIPNAME( 0x01, 0x00, "DSW5" ) |
| 2717 | PORT_DIPNAME( 0x01, 0x00, "DSW5" ) // goes into basic with this off |
| 2675 | 2718 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 2676 | 2719 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 2677 | 2720 | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| r19479 | r19480 | |
| 3406 | 3449 | int i; |
| 3407 | 3450 | static const UINT8 default_memsw_data[0x10] = |
| 3408 | 3451 | { |
| 3409 | | 0xe1, 0x48, 0xe1, 0x05, 0xe1, 0x04, 0xe1, 0x00, 0xe1, 0x01, 0xe1, 0x00, 0xe1, 0x00, 0xe1, 0x00 |
| 3452 | 0xe1, 0x48, 0xe1, 0x05, 0xe1, 0x04, 0xe1, 0x00, 0xe1, 0x01, 0xe1, 0x00, 0xe1, 0x00, 0xe1, 0x6e |
| 3410 | 3453 | // 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff, 0xe1, 0xff |
| 3411 | 3454 | }; |
| 3412 | 3455 | |