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r19397 Friday 7th December, 2012 at 20:50:54 UTC by Angelo Salese
Preliminary 256 color mode support for PC-9821
[src/mess/drivers]pc9801.c

trunk/src/mess/drivers/pc9801.c
r19396r19397
3333   - Microsoft Windows 1.0 MSDOS.SYS error (can be bypassed by loading MS-DOS first)
3434   \- these two happens due of a fail in sense drive status command, ready line (bit 5)
3535
36   - Dokkin Minako Sensei!
36   - Dokkin Minako Sensei
3737
38
3938   List of per-game TODO:
4039   - 4D Boxing: tries to format User Disk;
40   - 4D Driving: accesses some undefined ports (guess that it accesses the low part of them with word opcodes ...)
4141   - Absolutely Mahjong: Epson splash screen doesn't appear at all, why?
42   - Brandish 2: has some annoying strips at the main menu, also no selection seems to work;
4243   - Dragon Buster: missing bitplanes for the PCG, slight issue with window masking;
4344   - Far Side Moon: doesn't detect neither mouse nor sound board;
4445   - First Queen: has broken text display;
r19396r19397
349350      UINT8 r[16],g[16],b[16];
350351   }m_analog16;
351352   struct {
353      UINT8 pal_entry;
354      UINT8 r[0x100],g[0x100],b[0x100];
355   }m_analog256;
356   struct {
352357      UINT8 mode;
353358      UINT8 tile[4], tile_index;
354359   }m_grcg;
355360
356361   /* PC9821 specific */
357   UINT8 m_analog256,m_analog256e;
358362   UINT8 m_sdip[24], m_sdip_bank;
359363   UINT8 *m_ide_rom;
360364   UINT8 *m_ide_ram;
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558562#define MEMSW_REG   6
559563#define DISPLAY_REG 7
560564
561#define ANALOG_16 0
565#define ANALOG_16_MODE 0
566#define ANALOG_256_MODE 0x10
562567
563568void pc9801_state::video_start()
564569{
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599604      return;
600605
601606   interlace_on = state->m_video_ff[INTERLACE_REG];
602   colors16_mode = (state->m_ex_video_ff[0]) ? 16 : 8;
607   colors16_mode = (state->m_ex_video_ff[ANALOG_16_MODE]) ? 16 : 8;
603608
604   for(xi=0;xi<8;xi++)
609   if(state->m_ex_video_ff[ANALOG_256_MODE])
605610   {
606      res_x = x + xi;
607      res_y = y;
611      for(xi=0;xi<8;xi++)
612      {
613         res_x = x + xi;
614         res_y = y;
608615
609      pen = ((state->m_video_ram_2[(address & 0x7fff) + (0x08000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 1 : 0;
610      pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0x10000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 2 : 0;
611      pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0x18000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 4 : 0;
612      if(state->m_ex_video_ff[0])
613         pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 8 : 0;
616         if(!device->machine().primary_screen->visible_area().contains(res_x, res_y*2+0))
617            return;
614618
615      if(interlace_on)
616      {
617         if(device->machine().primary_screen->visible_area().contains(res_x, res_y*2+0))
618            bitmap.pix32(res_y*2+0, res_x) = palette[pen + colors16_mode];
619         pen = state->m_ext_gvram[(address*8+xi)+(state->m_vram_disp*0x40000)];
620
621         bitmap.pix32(res_y*2+0, res_x) = palette[pen + 0x20];
619622         if(device->machine().primary_screen->visible_area().contains(res_x, res_y*2+1))
620            bitmap.pix32(res_y*2+1, res_x) = palette[pen + colors16_mode];
623            bitmap.pix32(res_y*2+1, res_x) = palette[pen + 0x20];
621624      }
622      else
623         bitmap.pix32(res_y, res_x) = palette[pen + colors16_mode];
624625   }
626   else
627   {
628      for(xi=0;xi<8;xi++)
629      {
630         res_x = x + xi;
631         res_y = y;
632
633         pen = ((state->m_video_ram_2[(address & 0x7fff) + (0x08000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 1 : 0;
634         pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0x10000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 2 : 0;
635         pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0x18000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 4 : 0;
636         if(state->m_ex_video_ff[ANALOG_16_MODE])
637            pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 8 : 0;
638
639         if(interlace_on)
640         {
641            if(device->machine().primary_screen->visible_area().contains(res_x, res_y*2+0))
642               bitmap.pix32(res_y*2+0, res_x) = palette[pen + colors16_mode];
643            if(device->machine().primary_screen->visible_area().contains(res_x, res_y*2+1))
644               bitmap.pix32(res_y*2+1, res_x) = palette[pen + colors16_mode];
645         }
646         else
647            bitmap.pix32(res_y, res_x) = palette[pen + colors16_mode];
648      }
649   }
625650}
626651
627652static UPD7220_DRAW_TEXT_LINE( hgdc_draw_text )
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11261151         case 0x00:
11271152         case 0x02:
11281153            return m_hgdc2->read(space, (offset & 2) >> 1);
1129         /* bitmap palette clut read */
1154         /* TODO: double check these two */
11301155         case 0x04:
11311156            return m_vram_disp & 1;
11321157         case 0x06:
11331158            return m_vram_bank & 1;
1159         /* bitmap palette clut read */
11341160         case 0x08:
11351161         case 0x0a:
11361162         case 0x0c:
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11741200         case 0x02:
11751201            m_hgdc2->write(space, (offset & 2) >> 1,data);
11761202            return;
1177         case 0x04: m_vram_disp = data & 1; return;
1203         case 0x04:
1204            m_vram_disp = data & 1;
1205            return;
11781206         case 0x06:
11791207            m_vram_bank = data & 1;
1180            //m_hgdc2->bank_w(space, 0,(data & 1) << 2); //TODO: check me
11811208            return;
11821209         /* bitmap palette clut write */
11831210         case 0x08:
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18041831
18051832WRITE8_MEMBER(pc9801_state::pc9801rs_video_ff_w)
18061833{
1807
18081834   if(offset == 2)
18091835   {
1810      m_ex_video_ff[(data & 0xfe) >> 1] = data & 1;
1836      if((data & 0xf0) == 0) /* disable any PC-9821 specific HW regs */
1837         m_ex_video_ff[(data & 0xfe) >> 1] = data & 1;
18111838
18121839      if(0)
18131840      {
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18331860WRITE8_MEMBER(pc9801_state::pc9801rs_a0_w)
18341861{
18351862
1836   if((offset & 1) == 0 && offset & 8 && m_ex_video_ff[ANALOG_16])
1863   if((offset & 1) == 0 && offset & 8 && m_ex_video_ff[ANALOG_16_MODE])
18371864   {
18381865      switch(offset)
18391866      {
r19396r19397
18761903   AM_RANGE(0x0020, 0x0027) AM_READWRITE8(pc9801_20_r,        pc9801_20_w,        0xffffffff) // RTC / DMA registers (LS244)
18771904   AM_RANGE(0x0030, 0x0037) AM_READWRITE8(pc9801rs_30_r,      pc9801_30_w,        0xffffffff) //i8251 RS232c / i8255 system port
18781905   AM_RANGE(0x0040, 0x0047) AM_READWRITE8(pc9801_40_r,        pc9801_40_w,        0xffffffff) //i8255 printer port / i8251 keyboard
1906   AM_RANGE(0x005c, 0x005f) AM_WRITENOP // time-stamp?
18791907   AM_RANGE(0x0060, 0x0063) AM_READWRITE8(pc9801_60_r,        pc9801_60_w,        0xffffffff) //upd7220 character ports / <undefined>
18801908   AM_RANGE(0x0064, 0x0067) AM_WRITE8(pc9801_vrtc_mask_w, 0xffffffff)
18811909   AM_RANGE(0x0068, 0x006b) AM_WRITE8(pc9801rs_video_ff_w,0xffffffff) //mode FF / <undefined>
r19396r19397
19351963   AM_RANGE(0x0020, 0x0027) AM_READWRITE8(pc9801_20_r,        pc9801_20_w,        0xffff) // RTC / DMA registers (LS244)
19361964   AM_RANGE(0x0030, 0x0037) AM_READWRITE8(pc9801rs_30_r,      pc9801_30_w,        0xffff) //i8251 RS232c / i8255 system port
19371965   AM_RANGE(0x0040, 0x0047) AM_READWRITE8(pc9801_40_r,        pc9801_40_w,        0xffff) //i8255 printer port / i8251 keyboard
1966   AM_RANGE(0x005c, 0x005f) AM_WRITENOP // time-stamp?
19381967   AM_RANGE(0x0060, 0x0063) AM_READWRITE8(pc9801_60_r,        pc9801_60_w,        0xffff) //upd7220 character ports / <undefined>
19391968   AM_RANGE(0x0064, 0x0067) AM_WRITE8(pc9801_vrtc_mask_w, 0xffff)
19401969   AM_RANGE(0x0068, 0x006b) AM_WRITE8(pc9801rs_video_ff_w,0xffff) //mode FF / <undefined>
r19396r19397
19611990READ8_MEMBER(pc9801_state::pc9821_ide_r) { return m_ide_rom[offset]; }
19621991READ8_MEMBER(pc9801_state::pc9821_unkrom_r) { return m_unk_rom[offset]; }
19631992
1964READ8_MEMBER(pc9801_state::pc9821_vram256_r) { return m_vram256[offset]; }
1965WRITE8_MEMBER(pc9801_state::pc9821_vram256_w) {   m_vram256[offset] = data; }
1993READ8_MEMBER(pc9801_state::pc9821_vram256_r)
1994{
1995   if(m_ex_video_ff[ANALOG_256_MODE])
1996      return m_vram256[offset];
19661997
1998   return m_pc9801rs_grcg_r(offset & 0x7fff,0);
1999}
2000
2001WRITE8_MEMBER(pc9801_state::pc9821_vram256_w)
2002{
2003   if(m_ex_video_ff[ANALOG_256_MODE])
2004   {
2005      m_vram256[offset] = data;
2006      return;
2007   }
2008
2009   m_pc9801rs_grcg_w(offset & 0x7fff,0,data);
2010}
2011
19672012/* Note: not hooking this up causes "MEMORY ERROR" at POST */
19682013READ8_MEMBER(pc9801_state::pc9821_ideram_r) { return m_ide_ram[offset]; }
19692014WRITE8_MEMBER(pc9801_state::pc9821_ideram_w) { m_ide_ram[offset] = data; }
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20322077{
20332078   if(offset == 2)
20342079   {
2035      switch(data & 0xf8)   // pc-9821 specific extended registers
2036      {
2037         case 0x20: m_analog256 = data & 1; return;
2038         case 0x68: m_analog256e = data & 1; return;
2039      } // intentional fall-through
2080      m_ex_video_ff[(data & 0xfe) >> 1] = data & 1;
2081
2082      //if((data & 0xfe) == 0x20)
2083      //   printf("%02x\n",data & 1);
20402084   }
20412085
2086   /* Intentional fall-through */
20422087   pc9801rs_video_ff_w(space,offset,data);
20432088}
20442089
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20462091{
20472092   if((offset & 1) == 0 && offset & 8)
20482093   {
2049      if(m_analog256)
2094      if(m_ex_video_ff[ANALOG_256_MODE])
20502095      {
20512096         printf("256 color mode [%02x] R\n",offset);
20522097         return 0;
20532098      }
2054      else if(m_ex_video_ff[ANALOG_16]) //16 color mode, readback possible there
2099      else if(m_ex_video_ff[ANALOG_16_MODE]) //16 color mode, readback possible there
20552100      {
20562101         UINT8 res = 0;
20572102
r19396r19397
20732118WRITE8_MEMBER(pc9801_state::pc9821_a0_w)
20742119{
20752120
2076   if((offset & 1) == 0 && offset & 8 && m_analog256)
2121   if((offset & 1) == 0 && offset & 8 && m_ex_video_ff[ANALOG_256_MODE])
20772122   {
2078      printf("256 color mode [%02x] %02x W\n",offset,data);
2123      switch(offset)
2124      {
2125         case 0x08: m_analog256.pal_entry = data & 0xff; break;
2126         case 0x0a: m_analog256.g[m_analog256.pal_entry] = data & 0xff; break;
2127         case 0x0c: m_analog256.r[m_analog256.pal_entry] = data & 0xff; break;
2128         case 0x0e: m_analog256.b[m_analog256.pal_entry] = data & 0xff; break;
2129      }
2130
2131      palette_set_color_rgb(machine(), (m_analog256.pal_entry)+0x20,
2132                                   m_analog256.r[m_analog256.pal_entry],
2133                                   m_analog256.g[m_analog256.pal_entry],
2134                                   m_analog256.b[m_analog256.pal_entry]);
20792135      return;
20802136   }
20812137

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