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r19333 Wednesday 5th December, 2012 at 15:14:38 UTC by Curt Coder
(MESS) abc80x: Floppy modernization. (nw)

[src/mess/machine]

lux10828.c lux10828.h lux21046.c lux21046.h

trunk/src/mess/machine/lux10828.c

r19332	r19333
237	237	UINT8 data = 0x04;
238	238
239	239	// single/double sided drive
240		UINT8 sw1 = ioport("SW1")->read() & 0x0f;
	240	UINT8 sw1 = m_sw1->read() & 0x0f;
241	241	int ds0 = m_sel0 ? BIT(sw1, 0) : 1;
242	242	int ds1 = m_sel1 ? BIT(sw1, 1) : 1;
243	243	data |= !(ds0 & ds1);
r19332	r19333
251	251	data |= 0x10;
252	252
253	253	// head load
254		//  data |= wd17xx_hdld_r(device) << 6;
255		data |= 0x40;
	254	data |= m_fdc->hld_r() << 6;
	255	data |= 0x40; // TODO remove
256	256
257	257	// FDC interrupt request
258	258	data |= m_fdc_irq << 7;
r19332	r19333
278	278	*/
279	279
280	280	// double density enable
281		wd17xx_dden_w(m_fdc, BIT(data, 3));
	281	m_fdc->dden_w(BIT(data, 3));
282	282
283	283	// head load timing
284		//  wd17xx_hlt_w(m_fdc, BIT(data, 5));
	284	m_fdc->hlt_w(BIT(data, 5));
285	285	}
286	286
287	287	static Z80PIO_INTERFACE( pio_intf )
r19332	r19333
311	311	//  wd17xx_interface fdc_intf
312	312	//-------------------------------------------------
313	313
314		static const floppy_interface lux10828_floppy_interface =
315		{
316		DEVCB_NULL,
317		DEVCB_NULL,
318		DEVCB_NULL,
319		DEVCB_NULL,
320		DEVCB_NULL,
321		FLOPPY_STANDARD_5_25_DSDD,
322		LEGACY_FLOPPY_OPTIONS_NAME(default),
323		"floppy_5_25",
324		NULL
325		};
	314	static SLOT_INTERFACE_START( abc_floppies )
	315	SLOT_INTERFACE( "525sssd", FLOPPY_525_SSSD )
	316	SLOT_INTERFACE( "525sd", FLOPPY_525_SD )
	317	SLOT_INTERFACE( "525ssdd", FLOPPY_525_SSDD )
	318	SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
	319	SLOT_INTERFACE( "8dsdd", FLOPPY_8_DSDD )
	320	SLOT_INTERFACE_END
326	321
327		WRITE_LINE_MEMBER( luxor_55_10828_device::fdc_intrq_w )
	322	void luxor_55_10828_device::fdc_intrq_w(bool state)
328	323	{
329	324	m_fdc_irq = state;
330	325	m_pio->port_b_write(state << 7);
r19332	r19333
332	327	if (state) m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
333	328	}
334	329
335		WRITE_LINE_MEMBER( luxor_55_10828_device::fdc_drq_w )
	330	void luxor_55_10828_device::fdc_drq_w(bool state)
336	331	{
337	332	m_fdc_drq = state;
338	333
339	334	if (state) m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
340	335	}
341	336
342		static const wd17xx_interface fdc_intf =
343		{
344		DEVCB_NULL,
345		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, luxor_55_10828_device, fdc_intrq_w),
346		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, luxor_55_10828_device, fdc_drq_w),
347		{ FLOPPY_0, FLOPPY_1, NULL, NULL }
348		};
349	337
350
351	338	//-------------------------------------------------
352	339	//  MACHINE_DRIVER( luxor_55_10828 )
353	340	//-------------------------------------------------
354	341
355	342	static MACHINE_CONFIG_FRAGMENT( luxor_55_10828 )
356		// main CPU
357	343	MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_4MHz/2)
358	344	MCFG_CPU_PROGRAM_MAP(luxor_55_10828_mem)
359	345	MCFG_CPU_IO_MAP(luxor_55_10828_io)
360	346	MCFG_CPU_CONFIG(daisy_chain)
361	347
362		// devices
363	348	MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_4MHz/2, pio_intf)
364		MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(lux10828_floppy_interface)
365		MCFG_FD1791_ADD(FD1791_TAG, fdc_intf)
	349	MCFG_FD1791x_ADD(FD1791_TAG, XTAL_4MHz/2)
	350
	351	MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":0", abc_floppies, "525dd", NULL, floppy_image_device::default_floppy_formats)
	352	MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":1", abc_floppies, "525dd", NULL, floppy_image_device::default_floppy_formats)
366	353	MACHINE_CONFIG_END
367	354
368	355
r19332	r19333
428	415	m_maincpu(*this, Z80_TAG),
429	416	m_pio(*this, Z80PIO_TAG),
430	417	m_fdc(*this, FD1791_TAG),
431		m_image0(*this, FLOPPY_0),
432		m_image1(*this, FLOPPY_1),
	418	m_floppy0(*this, FD1791_TAG":0"),
	419	m_floppy1(*this, FD1791_TAG":1"),
	420	m_sw1(*this, "SW1"),
	421	m_s1(*this, "S1"),
433	422	m_cs(false),
434	423	m_fdc_irq(0),
435	424	m_fdc_drq(0),
r19332	r19333
488	477
489	478	void luxor_55_10828_device::abcbus_cs(UINT8 data)
490	479	{
491		UINT8 address = 0x2c | BIT(ioport("S1")->read(), 0);
	480	UINT8 address = 0x2c | BIT(m_s1->read(), 0);
492	481
493	482	m_cs = (data == address);
494	483	}
r19332	r19333
619	608	*/
620	609
621	610	// drive selection
622		if (BIT(data, 0)) wd17xx_set_drive(m_fdc, 0);
623		if (BIT(data, 1)) wd17xx_set_drive(m_fdc, 1);
624		//  if (BIT(data, 2)) wd17xx_set_drive(m_fdc, 2);
625	611	m_sel0 = BIT(data, 0);
626	612	m_sel1 = BIT(data, 1);
627	613
628		// motor enable
629		int moton = BIT(data, 3);
630		floppy_mon_w(m_image0, moton);
631		floppy_mon_w(m_image1, moton);
632		floppy_drive_set_ready_state(m_image0, !moton, 1);
633		floppy_drive_set_ready_state(m_image1, !moton, 1);
	614	floppy_image_device *floppy = NULL;
634	615
635		// side selection
636		//wd17xx_set_side(m_fdc, BIT(data, 4));
	616	if (BIT(data, 0)) floppy = m_floppy0->get_device();
	617	if (BIT(data, 1)) floppy = m_floppy1->get_device();
637	618
	619	m_fdc->set_floppy(floppy);
	620
	621	if (floppy)
	622	{
	623	// motor enable
	624	floppy->mon_w(BIT(data, 3));
	625
	626	// side select
	627	floppy->ss_w(BIT(data, 4));
	628	}
	629
638	630	// wait enable
639	631	m_wait_enable = BIT(data, 6);
640	632
641	633	// FDC master reset
642		wd17xx_mr_w(m_fdc, BIT(data, 7));
	634	if (!BIT(data, 7)) m_fdc->reset();
643	635	}
644	636
645	637
r19332	r19333
664	656
665	657	*/
666	658
667		// interrupt
668		//  abcbus_int_w(m_bus, BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE);
669
670	659	m_status = data & 0xfe;
	660
	661	// interrupt
	662	m_bus->int_w(BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE);
671	663	}
672	664
673	665
r19332	r19333
677	669
678	670	READ8_MEMBER( luxor_55_10828_device::fdc_r )
679	671	{
680		UINT8 data = 0xff;
681
682	672	if (!m_wait_enable && !m_fdc_irq && !m_fdc_drq)
683	673	{
684		logerror("WAIT\n");
	674	fatalerror("Z80 WAIT not supported by MAME core\n");
	675
685	676	m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE);
686	677	}
687	678
688		switch (offset & 0x03)
689		{
690		case 0: data = wd17xx_status_r(m_fdc, space, 0); break;
691		case 1: data = wd17xx_track_r(m_fdc, space, 0);  break;
692		case 2: data = wd17xx_sector_r(m_fdc, space, 0); break;
693		case 3: data = wd17xx_data_r(m_fdc, space, 0);   break;
694		}
695
696		return data;
	679	return m_fdc->gen_r(offset);
697	680	}
698	681
699	682
r19332	r19333
705	688	{
706	689	if (!m_wait_enable && !m_fdc_irq && !m_fdc_drq)
707	690	{
708		logerror("WAIT\n");
	691	fatalerror("Z80 WAIT not supported by MAME core\n");
	692
709	693	m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE);
710	694	}
711	695
712		switch (offset & 0x03)
713		{
714		case 0: wd17xx_command_w(m_fdc, space, 0, data); break;
715		case 1: wd17xx_track_w(m_fdc, space, 0, data);   break;
716		case 2: wd17xx_sector_w(m_fdc, space, 0, data);  break;
717		case 3: wd17xx_data_w(m_fdc, space, 0, data);    break;
718		}
	696	m_fdc->gen_w(offset, data);
719	697	}
720	698
721	699

trunk/src/mess/machine/lux10828.h

r19332	r19333
16	16	#include "emu.h"
17	17	#include "cpu/z80/z80.h"
18	18	#include "cpu/z80/z80daisy.h"
19		#include "formats/basicdsk.h"
20		#include "imagedev/flopdrv.h"
21	19	#include "machine/abcbus.h"
22		#include "machine/devhelpr.h"
23		#include "machine/wd17xx.h"
	20	#include "machine/wd_fdc.h"
24	21	#include "machine/z80pio.h"
25	22
26	23
r19332	r19333
29	26	//  MACROS / CONSTANTS
30	27	//**************************************************************************
31	28
32		#define LUXOR_55_10828_TAG   "luxor_55_10828"
33
34
35	29	#define ADDRESS_ABC830         45
36	30	#define ADDRESS_ABC832         44
37	31	#define ADDRESS_ABC834         44
r19332	r19333
73	67	DECLARE_READ8_MEMBER( pio_pb_r );
74	68	DECLARE_WRITE8_MEMBER( pio_pb_w );
75	69
76		DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w );
77		DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
	70	void fdc_intrq_w(bool state);
	71	void fdc_drq_w(bool state);
78	72
79	73	// optional information overrides
80	74	virtual const rom_entry *device_rom_region() const;
r19332	r19333
99	93	private:
100	94	required_device<cpu_device> m_maincpu;
101	95	required_device<z80pio_device> m_pio;
102		required_device<mb8876_device> m_fdc;
103		required_device<legacy_floppy_image_device> m_image0;
104		required_device<legacy_floppy_image_device> m_image1;
	96	required_device<mb8876_t> m_fdc;
	97	required_device<floppy_connector> m_floppy0;
	98	required_device<floppy_connector> m_floppy1;
	99	required_ioport m_sw1;
	100	required_ioport m_s1;
105	101
106	102	bool m_cs;            // card selected
107	103	UINT8 m_status;         // ABC BUS status
108	104	UINT8 m_data;         // ABC BUS data
109		int m_fdc_irq;         // floppy interrupt
110		int m_fdc_drq;         // floppy data request
	105	bool m_fdc_irq;         // floppy interrupt
	106	bool m_fdc_drq;         // floppy data request
111	107	int m_wait_enable;      // wait enable
112	108	int m_sel0;            // drive select 0
113	109	int m_sel1;            // drive select 1
114
115		UINT8 m_sw1;            // single/double sided/density
116		UINT8 m_drive_type;         // drive type
117		UINT8 m_s1;               // ABC bus address
118	110	};
119	111
120	112

trunk/src/mess/machine/lux21046.c

r19332	r19333
74	74
75	75	*/
76	76
77		/*
78
79		TODO:
80
81		- 8" floppy is not supported, but there are no dumps available either
82
83		*/
84
85	77	#include "lux21046.h"
86	78
87	79
r19332	r19333
110	102
111	103	ROM_START( luxor_55_21046 )
112	104	ROM_REGION( 0x4000, Z80_TAG, 0 ) // A13 is always high, thus loading at 0x2000
113		ROM_LOAD_OPTIONAL( "cntr 108.6cd", 0x2000, 0x2000, CRC(229764cb) SHA1(a2e2f6f49c31b827efc62f894de9a770b65d109d) ) // 1986-03-12
114		ROM_LOAD_OPTIONAL( "diab 207.6cd", 0x2000, 0x2000, CRC(86622f52) SHA1(61ad271de53152c1640c0b364fce46d1b0b4c7e2) ) // 1987-06-24
115		ROM_LOAD( "cntr 1.07 6490318-07.6cd", 0x0000, 0x4000, CRC(db8c1c0e) SHA1(8bccd5bc72124984de529ee058df779f06d2c1d5) ) // 1985-07-03
	105	ROM_DEFAULT_BIOS( "v107" )
	106	ROM_SYSTEM_BIOS( 0, "v107", "Luxor v1.07 (1985-07-03)" )
	107	ROMX_LOAD( "cntr 1.07 6490318-07.6cd", 0x0000, 0x4000, CRC(db8c1c0e) SHA1(8bccd5bc72124984de529ee058df779f06d2c1d5), ROM_BIOS(1) )
	108	ROM_SYSTEM_BIOS( 1, "v108", "Luxor v1.08 (1986-03-12)" )
	109	ROMX_LOAD( "cntr 108.6cd", 0x2000, 0x2000, CRC(229764cb) SHA1(a2e2f6f49c31b827efc62f894de9a770b65d109d), ROM_BIOS(2) )
	110	ROM_SYSTEM_BIOS( 2, "v207", "DiAB v2.07 (1987-06-24)" )
	111	ROMX_LOAD( "diab 207.6cd", 0x2000, 0x2000, CRC(86622f52) SHA1(61ad271de53152c1640c0b364fce46d1b0b4c7e2), ROM_BIOS(3) )
116	112	ROM_END
117	113
118	114
r19332	r19333
150	146	AM_RANGE(0x30, 0x30) AM_MIRROR(0xff0f) AM_WRITE(_9b_w)
151	147	AM_RANGE(0x40, 0x40) AM_MIRROR(0xff0f) AM_WRITE(_8a_w)
152	148	AM_RANGE(0x50, 0x50) AM_MIRROR(0xff0f) AM_MASK(0xff00) AM_READ(_9a_r)
153		AM_RANGE(0x60, 0x63) AM_MIRROR(0xff0c) AM_DEVREAD_LEGACY(SAB1793_TAG, wd17xx_r)
154		AM_RANGE(0x70, 0x73) AM_MIRROR(0xff0c) AM_DEVWRITE_LEGACY(SAB1793_TAG, wd17xx_w)
	149	AM_RANGE(0x60, 0x63) AM_MIRROR(0xff0c) AM_DEVREAD(SAB1793_TAG, fd1793_t, read)
	150	AM_RANGE(0x70, 0x73) AM_MIRROR(0xff0c) AM_DEVWRITE(SAB1793_TAG, fd1793_t, write)
155	151	AM_RANGE(0x80, 0x80) AM_MIRROR(0xff0f) AM_DEVREADWRITE_LEGACY(Z80DMA_TAG, z80dma_r, z80dma_w)
156	152	ADDRESS_MAP_END
157	153
r19332	r19333
242	238	//  wd17xx_interface fdc_intf
243	239	//-------------------------------------------------
244	240
245		static const floppy_interface lux21046_floppy_interface =
246		{
247		DEVCB_NULL,
248		DEVCB_NULL,
249		DEVCB_NULL,
250		DEVCB_NULL,
251		DEVCB_NULL,
252		FLOPPY_STANDARD_5_25_DSDD,
253		LEGACY_FLOPPY_OPTIONS_NAME(default),
254		"floppy_5_25",
255		NULL
256		};
	241	static SLOT_INTERFACE_START( abc_floppies )
	242	SLOT_INTERFACE( "525sssd", FLOPPY_525_SSSD )
	243	SLOT_INTERFACE( "525sd", FLOPPY_525_SD )
	244	SLOT_INTERFACE( "525ssdd", FLOPPY_525_SSDD )
	245	SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
	246	SLOT_INTERFACE( "8dsdd", FLOPPY_8_DSDD )
	247	SLOT_INTERFACE_END
257	248
258		WRITE_LINE_MEMBER( luxor_55_21046_device::fdc_intrq_w )
	249	void luxor_55_21046_device::fdc_intrq_w(bool state)
259	250	{
260	251	m_fdc_irq = state;
261	252
262	253	// FDC and DMA interrupts are wire-ORed to the Z80
263		m_maincpu->set_input_line(INPUT_LINE_IRQ0, m_fdc_irq | m_dma_irq);
	254	m_maincpu->set_input_line(INPUT_LINE_IRQ0, m_fdc_irq || m_dma_irq);
264	255	}
265	256
266		static const wd17xx_interface fdc_intf =
	257	void luxor_55_21046_device::fdc_drq_w(bool state)
267	258	{
268		DEVCB_NULL,
269		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, luxor_55_21046_device, fdc_intrq_w),
270		DEVCB_DEVICE_LINE(Z80DMA_TAG, z80dma_rdy_w),
271		{ FLOPPY_0, FLOPPY_1, NULL, NULL }
272		};
	259	m_dma->rdy_w(state);
	260	}
273	261
274	262
275	263	//-------------------------------------------------
r19332	r19333
277	265	//-------------------------------------------------
278	266
279	267	static MACHINE_CONFIG_FRAGMENT( luxor_55_21046 )
280		// main CPU
281	268	MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_16MHz/4)
282	269	MCFG_CPU_PROGRAM_MAP(luxor_55_21046_mem)
283	270	MCFG_CPU_IO_MAP(luxor_55_21046_io)
284	271
285		// devices
286	272	MCFG_Z80DMA_ADD(Z80DMA_TAG, XTAL_16MHz/4, dma_intf)
287		MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(lux21046_floppy_interface)
288		MCFG_FD1793_ADD(SAB1793_TAG, fdc_intf)
	273	MCFG_FD1793x_ADD(SAB1793_TAG, XTAL_16MHz/16)
	274
	275	MCFG_FLOPPY_DRIVE_ADD(SAB1793_TAG":0", abc_floppies, "525dd", NULL, floppy_image_device::default_floppy_formats)
	276	MCFG_FLOPPY_DRIVE_ADD(SAB1793_TAG":1", abc_floppies, "525dd", NULL, floppy_image_device::default_floppy_formats)
289	277	MACHINE_CONFIG_END
290	278
291	279
r19332	r19333
396	384	m_maincpu(*this, Z80_TAG),
397	385	m_dma(*this, Z80DMA_TAG),
398	386	m_fdc(*this, SAB1793_TAG),
399		m_image0(*this, FLOPPY_0),
400		m_image1(*this, FLOPPY_1),
	387	m_floppy0(*this, SAB1793_TAG":0"),
	388	m_floppy1(*this, SAB1793_TAG":1"),
	389	m_floppy(NULL),
	390	m_sw1(*this, "SW1"),
	391	m_sw2(*this, "SW2"),
	392	m_sw3(*this, "SW3"),
401	393	m_cs(false),
402	394	m_fdc_irq(0),
403	395	m_dma_irq(0),
r19332	r19333
438	430	void luxor_55_21046_device::device_reset()
439	431	{
440	432	m_cs = false;
441
442		floppy_mon_w(m_image0, ASSERT_LINE);
443		floppy_mon_w(m_image1, ASSERT_LINE);
444		floppy_drive_set_ready_state(m_image0, 1, 1);
445		floppy_drive_set_ready_state(m_image1, 1, 1);
446	433	}
447	434
448	435
r19332	r19333
457	444
458	445	void luxor_55_21046_device::abcbus_cs(UINT8 data)
459	446	{
460		m_cs = (data == ioport("SW3")->read());
	447	m_cs = (data == m_sw3->read());
461	448	}
462	449
463	450
r19332	r19333
639	626	*/
640	627
641	628	// drive select
642		if (BIT(data, 0)) wd17xx_set_drive(m_fdc, 0);
643		if (BIT(data, 1)) wd17xx_set_drive(m_fdc, 1);
644		//if (BIT(data, 2)) wd17xx_set_drive(m_fdc, 2);
	629	m_floppy = NULL;
645	630
646		// motor enable
647		int mtron = BIT(data, 3);
648		floppy_mon_w(m_image0, !mtron);
649		floppy_mon_w(m_image1, !mtron);
650		floppy_drive_set_ready_state(m_image0, mtron, 1);
651		floppy_drive_set_ready_state(m_image1, mtron, 1);
	631	if (BIT(data, 0)) m_floppy = m_floppy0->get_device();
	632	if (BIT(data, 1)) m_floppy = m_floppy1->get_device();
652	633
653		// side select
654		wd17xx_set_side(m_fdc, BIT(data, 5));
	634	m_fdc->set_floppy(m_floppy);
	635
	636	if (m_floppy)
	637	{
	638	// motor enable
	639	m_floppy->mon_w(!BIT(data, 3));
	640
	641	// side select
	642	m_floppy->ss_w(BIT(data, 5));
	643	}
655	644	}
656	645
657	646
r19332	r19333
679	668	*/
680	669
681	670	// FDC master reset
682		wd17xx_mr_w(m_fdc, BIT(data, 0));
	671	if (!BIT(data, 0)) m_fdc->reset();
683	672
684	673	// density select
685		wd17xx_dden_w(m_fdc, BIT(data, 1));
	674	m_fdc->dden_w(BIT(data, 1));
686	675	}
687	676
688	677
r19332	r19333
699	688	0       busy        controller busy
700	689	1       _FD2S       double-sided disk
701	690	2       SW2
702		3       _DCG ?      disk changed
	691	3       _DCG       disk changed
703	692	4       SW1-1
704	693	5       SW1-2
705	694	6       SW1-3
r19332	r19333
712	701	// busy
713	702	data |= m_busy;
714	703
715		// SW1
716		UINT8 sw1 = ioport("SW1")->read() & 0x0f;
	704	// floppy
	705	data |= (m_floppy ? m_floppy->twosid_r() : 1) << 1;
	706	data |= (m_floppy ? m_floppy->dskchg_r() : 1) << 3;
717	707
718		data |= sw1 << 4;
719
720	708	// SW2
721		UINT8 sw2 = ioport("SW2")->read() & 0x0f;
	709	UINT8 sw2 = m_sw2->read() & 0x0f;
722	710
723	711	// TTL inputs float high so DIP switch in off position equals 1
724	712	int sw2_1 = BIT(sw2, 0) ? 1 : BIT(offset, 8);
r19332	r19333
729	717
730	718	data |= sw2_data << 2;
731	719
	720	// SW1
	721	data |= (m_sw1->read() & 0x0f) << 4;
	722
732	723	return data ^ 0xff;
733	724	}
734	725

trunk/src/mess/machine/lux21046.h

r19332	r19333
16	16	#include "emu.h"
17	17	#include "cpu/z80/z80.h"
18	18	#include "cpu/z80/z80daisy.h"
19		#include "formats/basicdsk.h"
20		#include "imagedev/flopdrv.h"
21	19	#include "machine/abcbus.h"
22		#include "machine/devhelpr.h"
23		#include "machine/wd17xx.h"
	20	#include "machine/wd_fdc.h"
24	21	#include "machine/z80dma.h"
25	22
26	23
r19332	r19333
29	26	//  MACROS / CONSTANTS
30	27	//**************************************************************************
31	28
32		#define LUXOR_55_21046_TAG      "luxor_55_21046"
33
34
35	29	#define ADDRESS_ABC832         44
36	30	#define ADDRESS_ABC830         45
37	31	#define ADDRESS_ABC838         46
r19332	r19333
74	68	DECLARE_WRITE8_MEMBER( _9b_w );
75	69	DECLARE_WRITE8_MEMBER( _8a_w );
76	70	DECLARE_READ8_MEMBER( _9a_r );
	71
77	72	DECLARE_WRITE_LINE_MEMBER( dma_int_w );
78		DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w );
79	73
	74	void fdc_intrq_w(bool state);
	75	void fdc_drq_w(bool state);
	76
80	77	protected:
81	78	// device-level overrides
82	79	virtual void device_start();
r19332	r19333
95	92	private:
96	93	required_device<cpu_device> m_maincpu;
97	94	required_device<z80dma_device> m_dma;
98		required_device<fd1793_device> m_fdc;
99		required_device<legacy_floppy_image_device> m_image0;
100		required_device<legacy_floppy_image_device> m_image1;
	95	required_device<fd1793_t> m_fdc;
	96	required_device<floppy_connector> m_floppy0;
	97	required_device<floppy_connector> m_floppy1;
	98	floppy_image_device *m_floppy;
	99	required_ioport m_sw1;
	100	required_ioport m_sw2;
	101	required_ioport m_sw3;
101	102
102	103	bool m_cs;               // card selected
103	104	UINT8 m_status;            // ABC BUS status
104	105	UINT8 m_data_in;         // ABC BUS data in
105	106	UINT8 m_data_out;         // ABC BUS data out
106		int m_fdc_irq;            // FDC interrupt
	107	bool m_fdc_irq;            // FDC interrupt
107	108	int m_dma_irq;            // DMA interrupt
108	109	int m_busy;               // busy bit
109	110	int m_force_busy;         // force busy bit

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