trunk/src/mess/audio/upd1771.c
| r19147 | r19148 | |
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| 16 | 16 | Thanks to user 'Blanka' from Dragonslairfans for the nice catch! |
| 17 | 17 | (http://www.dragonslairfans.com/smfor/index.php?topic=3061.0) |
| 18 | 18 | |
| 19 | | I've also seen mentions of a 006 and 015 on part miner sites, and since lots |
| 20 | | of part miner sites are the equivalent of email crawlers for chips, |
| 21 | | its possible that these other variants actually exist. |
| 22 | | Its anyone's guess at this point in which products. |
| 19 | Since the chip generates tones using ROM wavetables, |
| 20 | it is perfectly possible to generate other sounds with different rom code and data. |
| 23 | 21 | |
| 24 | | Since the chip generates tones using embeded wavetables, |
| 25 | | it is probable other sounds are possible and were made for other embeded systems. |
| 22 | upd17XXX devices are typically 4bit NEC MCUs, however based on information |
| 23 | in in "Electronic Speech Synthesis" by Geoff Bristow (ISBN 0-07-007912-9, pages 148-152): |
| 26 | 24 | |
| 27 | | upd17XXX devices are typically 4bit NEC MCUs, so it wouldnt be a stretch to |
| 28 | | say that this chip is part of that lot. |
| 29 | | Maybe mask roms 006,and 015 dont generate audio at all, though 011 does. |
| 25 | The uPD1770/uPD1771 is a 16-bit-wide rom/ram mcu with 8kb (4kw) of rom code, |
| 26 | 64 bytes of ram (16x16bit words addressable as 16 or 2x8 bits each, the |
| 27 | remaining 32 bytes acting as a stack), 138 instruction types, a complex |
| 28 | noise-IRQ system, external interrupts, and two 8-bit ports with multiple modes. |
| 30 | 29 | |
| 30 | The uPD1771 internal workings are described to some extent by the Bristow book |
| 31 | and are covered by at least three US patents: |
| 32 | 4408094 - covers the 3 pin 5-bit DAC with the volume control/vref pin. Not all that interesting, |
| 33 | except it might describe to some extent how the 9->5bit PWM works in the text. |
| 34 | 4470113 - covers the multiplexed PB0/1/2/3 pins and their use as /CS /WR /RD and ALE |
| 35 | note as I have marked the pins below I assume the final pins connected |
| 36 | to /CS /WR /RD and /ALE are PB7,6,5,4 but this is just a guess of mine: |
| 37 | The actual order may well match the patent. |
| 38 | 4577343 - covers the VSRSSS implementation as discussed in the Bristow book. |
| 39 | This patent has an internal diagram of the workings of the chips and |
| 40 | a limited description of how many registers etc it has. |
| 41 | |
| 42 | Based on the 4577343 patent mostly: |
| 43 | * these are the registers: |
| 44 | 8bits: |
| 45 | AH, AL (forming the 16-bit A' accumulator), |
| 46 | B, C (a pair of general purpose registers), |
| 47 | 4bits (may be technically part of ALU): |
| 48 | H -> points to one of the 16 words of ram |
| 49 | 1bit: |
| 50 | L -> selector of left or right half of the ram word |
| 51 | ?bits: |
| 52 | D (having to do with the DAC) |
| 53 | N (having to do with the pseudorandom noise interrupt, namely setting the clock divider ratio for the PRNG clock vs cpu clock) |
| 54 | MODE (enabling/disabling/acking the noise interrupt, and the tone interrupts (there are four!)) |
| 55 | SP (the stack pointer, probably 5 bits, points to the stack ram; may encompass H and L as above!) |
| 56 | FLO: unsure. quite possibly 'flag overflow' used for branching. there likely exists other flags as well... |
| 57 | ODF: 'output data flag?', selects which half of a selected ram word is output to the dac not really sure of this? |
| 58 | |
| 59 | |
| 60 | Mask roms known: |
| 61 | uPD1776C: mentioned in the bristow book, implements VSRSSS speech concatenation |
| 62 | (see US Patent 4577343 which is a patent on this VSRSSS implementation) |
| 63 | uPD1771C-006: used in NEC APC for sound as the "MPU" |
| 64 | -011: used on Firefox F-4 handheld |
| 65 | -015: unknown, known to exist from part scalper sites only. |
| 66 | -017: used on Epoch Super Cassete Vision for sound; This audio driver HLEs that part only. |
| 67 | |
| 31 | 68 | Used pinout in the SCV: |
| 32 | 69 | |
| 33 | 70 | NC 1 28 NC |
| r19147 | r19148 | |
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| 45 | 82 | AUDOUT(inv) 13 16 VCC |
| 46 | 83 | GND 14 15 ? tied to pin 16 (VCC) through a resistor (pullup?) |
| 47 | 84 | |
| 85 | Pinout based on guesses and information in "Electronic Speech Synthesis" by Geoff Bristow |
| 86 | (ISBN 0-07-007912-9, pages 148-152); [x] is unsure: |
| 87 | PB3 1 28 PB2 |
| 88 | PB4(/ALE) 2 27 PB1 |
| 89 | PB5(/RD) 3 26 PB0 |
| 90 | PB6(/WR) 4 25 PA7 |
| 91 | PB7(/CS) 5 24 PA6 |
| 92 | /EXTINT? 6 23 PA5 |
| 93 | [RESET?] 7 22 PA4 |
| 94 | VCC 8 21 PA3 |
| 95 | XI 9 20 PA2 |
| 96 | XO 10 19 PA1 |
| 97 | D/A OUT + 11 18 PA0 |
| 98 | [D/A VREF?] 12 17 [MODE3?] |
| 99 | D/A OUT - 13 16 [MODE2?] |
| 100 | GND 14 15 [MODE1/TEST/RESET?] tied to pin 16 (VCC) through a resistor (pullup?) |
| 101 | |
| 48 | 102 | In the SCV: |
| 49 | 103 | pin 5 is tied to the !SCPU pin on the Epoch TV chip pin 29 (0x3600 writes) |
| 50 | 104 | pin 6 is tied to the PC3 pin of the upD7801 CPU |
| r19147 | r19148 | |
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| 55 | 109 | 7 is always low. |
| 56 | 110 | 12 is always high |
| 57 | 111 | |
| 58 | | It is unknown which is the "real" VCC input betwwen pin 8 and 16, |
| 59 | | same goes for GNDs on pin 14 and 17. |
| 112 | (NOTE: the photomicrograph in the bristow book makes it fairly clear due to |
| 113 | pad thicknessess that the real VCC is pin 8 and the real GND is pin 14. |
| 114 | Pins 16 and 17 are some sort of ?mode? inputs but could be the /EXTINT pin too? |
| 115 | Pin 15 MIGHT be the reset pin or could be a TEST pin. RESET could also be pin 7.) |
| 60 | 116 | |
| 61 | 117 | Pins 11 and 13 go to a special circuit, which according to kevtris's analysis |
| 62 | 118 | of my schematics, consist of a balanced output (not unlike XLR cables), |
| 63 | 119 | which are then combined together then sent to the RF box. |
| 120 | (The bristow book explains that there are two DAC pins and one DAC |
| 121 | VREF/volume pin. The dac+ and dac- are pins 11 and 13, and based on the |
| 122 | photomicrograph it looks like dac vref is probably pin 12) |
| 64 | 123 | |
| 65 | | All NC pins are unknown, maybe some are "test" pins. |
| 66 | | |
| 124 | HLE: |
| 67 | 125 | All writes are made through address 0x3600 on the upD7801 |
| 68 | 126 | Instead of using register=value, this chip require sending multiple |
| 69 | 127 | bytes for each command, one after the other. |