trunk/src/mess/drivers/v1050.c
| r19112 | r19113 | |
| 463 | 463 | AM_RANGE(0x8c, 0x8c) AM_DEVREADWRITE(I8251A_SIO_TAG, i8251_device, data_r, data_w) |
| 464 | 464 | AM_RANGE(0x8d, 0x8d) AM_DEVREADWRITE(I8251A_SIO_TAG, i8251_device, status_r, control_w) |
| 465 | 465 | AM_RANGE(0x90, 0x93) AM_DEVREADWRITE(I8255A_MISC_TAG, i8255_device, read, write) |
| 466 | | AM_RANGE(0x94, 0x97) AM_DEVREADWRITE_LEGACY(MB8877_TAG, wd17xx_r, wd17xx_w) |
| 466 | AM_RANGE(0x94, 0x97) AM_DEVREADWRITE(MB8877_TAG, fd1793_t, read, write) |
| 467 | 467 | AM_RANGE(0x9c, 0x9f) AM_DEVREADWRITE(I8255A_RTC_TAG, i8255_device, read, write) |
| 468 | 468 | AM_RANGE(0xa0, 0xa0) AM_READWRITE(vint_clr_r, vint_clr_w) |
| 469 | 469 | AM_RANGE(0xb0, 0xb0) AM_READWRITE(dint_clr_r, dint_clr_w) |
| r19112 | r19113 | |
| 697 | 697 | |
| 698 | 698 | */ |
| 699 | 699 | |
| 700 | | int f_motor_on = !BIT(data, 6); |
| 701 | | |
| 702 | 700 | // floppy drive select |
| 703 | | if (!BIT(data, 0)) wd17xx_set_drive(m_fdc, 0); |
| 704 | | if (!BIT(data, 1)) wd17xx_set_drive(m_fdc, 1); |
| 705 | | if (!BIT(data, 2)) wd17xx_set_drive(m_fdc, 2); |
| 706 | | if (!BIT(data, 3)) wd17xx_set_drive(m_fdc, 3); |
| 701 | floppy_image_device *floppy = NULL; |
| 707 | 702 | |
| 703 | if (!BIT(data, 0)) floppy = m_floppy0->get_device(); |
| 704 | if (!BIT(data, 1)) floppy = m_floppy1->get_device(); |
| 705 | if (!BIT(data, 2)) floppy = m_floppy2->get_device(); |
| 706 | if (!BIT(data, 3)) floppy = m_floppy3->get_device(); |
| 707 | |
| 708 | m_fdc->set_floppy(floppy); |
| 709 | |
| 708 | 710 | // floppy side select |
| 709 | | wd17xx_set_side(m_fdc, BIT(data, 4)); |
| 711 | if (floppy) floppy->ss_w(BIT(data, 4)); |
| 710 | 712 | |
| 711 | 713 | // floppy motor |
| 712 | | floppy_mon_w(m_floppy0, BIT(data, 6)); |
| 713 | | floppy_mon_w(m_floppy1, BIT(data, 6)); |
| 714 | | floppy_drive_set_ready_state(m_floppy0, f_motor_on, 1); |
| 715 | | floppy_drive_set_ready_state(m_floppy1, f_motor_on, 1); |
| 714 | if (floppy) floppy->mon_w(BIT(data, 6)); |
| 716 | 715 | |
| 717 | 716 | // density select |
| 718 | | wd17xx_dden_w(m_fdc, BIT(data, 7)); |
| 717 | m_fdc->dden_w(BIT(data, 7)); |
| 719 | 718 | } |
| 720 | 719 | |
| 721 | 720 | WRITE8_MEMBER(v1050_state::misc_ppi_pb_w) |
| 722 | 721 | { |
| 723 | | centronics_device *centronics = machine().device<centronics_device>(CENTRONICS_TAG); |
| 724 | | centronics->write( machine().driver_data()->generic_space() , 0, ~data & 0xff); |
| 722 | m_centronics->write(~data & 0xff); |
| 725 | 723 | } |
| 726 | 724 | |
| 727 | 725 | READ8_MEMBER(v1050_state::misc_ppi_pc_r) |
| r19112 | r19113 | |
| 742 | 740 | */ |
| 743 | 741 | |
| 744 | 742 | UINT8 data = 0; |
| 745 | | centronics_device *centronics = machine().device<centronics_device>(CENTRONICS_TAG); |
| 746 | | data |= centronics->not_busy_r() << 4; |
| 747 | | data |= centronics->pe_r() << 5; |
| 748 | 743 | |
| 744 | data |= m_centronics->not_busy_r() << 4; |
| 745 | data |= m_centronics->pe_r() << 5; |
| 746 | |
| 749 | 747 | return data; |
| 750 | 748 | } |
| 751 | 749 | |
| r19112 | r19113 | |
| 922 | 920 | { |
| 923 | 921 | m_rxrdy = state; |
| 924 | 922 | |
| 925 | | set_interrupt(INT_RS_232, m_rxrdy | m_txrdy); |
| 923 | set_interrupt(INT_RS_232, m_rxrdy || m_txrdy); |
| 926 | 924 | } |
| 927 | 925 | |
| 928 | 926 | WRITE_LINE_MEMBER( v1050_state::sio_txrdy_w ) |
| 929 | 927 | { |
| 930 | 928 | m_txrdy = state; |
| 931 | 929 | |
| 932 | | set_interrupt(INT_RS_232, m_rxrdy | m_txrdy); |
| 930 | set_interrupt(INT_RS_232, m_rxrdy || m_txrdy); |
| 933 | 931 | } |
| 934 | 932 | |
| 935 | 933 | static const i8251_interface sio_8251_intf = |
| r19112 | r19113 | |
| 947 | 945 | |
| 948 | 946 | // MB8877 Interface |
| 949 | 947 | |
| 950 | | WRITE_LINE_MEMBER( v1050_state::fdc_intrq_w ) |
| 948 | static SLOT_INTERFACE_START( v1050_floppies ) |
| 949 | SLOT_INTERFACE( "525dd", FLOPPY_525_DD ) // Teac FD-55F |
| 950 | SLOT_INTERFACE_END |
| 951 | |
| 952 | void v1050_state::fdc_intrq_w(bool state) |
| 951 | 953 | { |
| 952 | 954 | if (m_f_int_enb) |
| 953 | 955 | { |
| 954 | | set_interrupt(INT_FLOPPY, state); |
| 956 | set_interrupt(INT_FLOPPY, state ? 1 : 0); |
| 955 | 957 | } |
| 956 | 958 | else |
| 957 | 959 | { |
| r19112 | r19113 | |
| 959 | 961 | } |
| 960 | 962 | } |
| 961 | 963 | |
| 962 | | WRITE_LINE_MEMBER( v1050_state::fdc_drq_w ) |
| 964 | void v1050_state::fdc_drq_w(bool state) |
| 963 | 965 | { |
| 964 | 966 | if (m_f_int_enb) |
| 965 | 967 | { |
| 966 | | m_maincpu->set_input_line(INPUT_LINE_NMI, state); |
| 968 | m_maincpu->set_input_line(INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE); |
| 967 | 969 | } |
| 968 | 970 | else |
| 969 | 971 | { |
| r19112 | r19113 | |
| 971 | 973 | } |
| 972 | 974 | } |
| 973 | 975 | |
| 974 | | static const wd17xx_interface fdc_intf = |
| 975 | | { |
| 976 | | DEVCB_NULL, |
| 977 | | DEVCB_DRIVER_LINE_MEMBER(v1050_state, fdc_intrq_w), |
| 978 | | DEVCB_DRIVER_LINE_MEMBER(v1050_state, fdc_drq_w), |
| 979 | | { FLOPPY_0, FLOPPY_1, NULL, NULL } |
| 980 | | }; |
| 981 | | |
| 976 | /* |
| 982 | 977 | static LEGACY_FLOPPY_OPTIONS_START( v1050 ) |
| 983 | 978 | LEGACY_FLOPPY_OPTION( v1050, "dsk", "Visual 1050 disk image", basicdsk_identify_default, basicdsk_construct_default, NULL, |
| 984 | 979 | HEADS([1]) |
| r19112 | r19113 | |
| 987 | 982 | SECTOR_LENGTH([512]) |
| 988 | 983 | FIRST_SECTOR_ID([1])) |
| 989 | 984 | LEGACY_FLOPPY_OPTIONS_END |
| 985 | */ |
| 990 | 986 | |
| 991 | | static const floppy_interface v1050_floppy_interface = |
| 992 | | { |
| 993 | | DEVCB_NULL, |
| 994 | | DEVCB_NULL, |
| 995 | | DEVCB_NULL, |
| 996 | | DEVCB_NULL, |
| 997 | | DEVCB_NULL, |
| 998 | | FLOPPY_STANDARD_5_25_DSHD, |
| 999 | | LEGACY_FLOPPY_OPTIONS_NAME(v1050), |
| 1000 | | "floppy_5_25", |
| 1001 | | NULL |
| 1002 | | }; |
| 1003 | | |
| 1004 | | |
| 1005 | 987 | // Machine Initialization |
| 1006 | 988 | |
| 1007 | 989 | static IRQ_CALLBACK( v1050_int_ack ) |
| r19112 | r19113 | |
| 1021 | 1003 | { |
| 1022 | 1004 | address_space &program = m_maincpu->space(AS_PROGRAM); |
| 1023 | 1005 | |
| 1006 | // floppy callbacks |
| 1007 | m_fdc->setup_intrq_cb(fd1793_t::line_cb(FUNC(v1050_state::fdc_intrq_w), this)); |
| 1008 | m_fdc->setup_drq_cb(fd1793_t::line_cb(FUNC(v1050_state::fdc_drq_w), this)); |
| 1009 | |
| 1024 | 1010 | // initialize I8214 |
| 1025 | 1011 | m_pic->etlg_w(1); |
| 1026 | 1012 | m_pic->inte_w(1); |
| r19112 | r19113 | |
| 1103 | 1089 | MCFG_I8255A_ADD(I8255A_M6502_TAG, m6502_ppi_intf) |
| 1104 | 1090 | MCFG_I8251_ADD(I8251A_KB_TAG, /*XTAL_16MHz/8,*/ kb_8251_intf) |
| 1105 | 1091 | MCFG_I8251_ADD(I8251A_SIO_TAG, /*XTAL_16MHz/8,*/ sio_8251_intf) |
| 1106 | | MCFG_MB8877_ADD(MB8877_TAG, /*XTAL_16MHz/16,*/ fdc_intf ) |
| 1107 | | MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(v1050_floppy_interface) |
| 1092 | MCFG_FD1793x_ADD(MB8877_TAG, XTAL_16MHz/16) |
| 1093 | MCFG_FLOPPY_DRIVE_ADD(MB8877_TAG":0", v1050_floppies, "525dd", NULL, floppy_image_device::default_floppy_formats) |
| 1094 | MCFG_FLOPPY_DRIVE_ADD(MB8877_TAG":1", v1050_floppies, "525dd", NULL, floppy_image_device::default_floppy_formats) |
| 1095 | MCFG_FLOPPY_DRIVE_ADD(MB8877_TAG":2", v1050_floppies, NULL, NULL, floppy_image_device::default_floppy_formats) |
| 1096 | MCFG_FLOPPY_DRIVE_ADD(MB8877_TAG":3", v1050_floppies, NULL, NULL, floppy_image_device::default_floppy_formats) |
| 1108 | 1097 | MCFG_TIMER_DRIVER_ADD_PERIODIC(TIMER_KB_TAG, v1050_state, kb_8251_tick, attotime::from_hz((double)XTAL_16MHz/4/13/8)) |
| 1109 | 1098 | MCFG_TIMER_DRIVER_ADD(TIMER_SIO_TAG, v1050_state, sio_8251_tick) |
| 1110 | 1099 | |
trunk/src/mess/machine/wd1772.c
| r19112 | r19113 | |
| 40 | 40 | const device_type WD1773x = &device_creator<wd1773_t>; |
| 41 | 41 | const device_type WD2793x = &device_creator<wd2793_t>; |
| 42 | 42 | const device_type WD2797x = &device_creator<wd2797_t>; |
| 43 | const device_type FD1793x = &device_creator<fd1793_t>; |
| 43 | 44 | |
| 44 | 45 | wd177x_t::wd177x_t(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) : |
| 45 | 46 | device_t(mconfig, type, name, tag, owner, clock) |
| r19112 | r19113 | |
| 61 | 62 | save_item(NAME(sub_state)); |
| 62 | 63 | save_item(NAME(track)); |
| 63 | 64 | save_item(NAME(sector)); |
| 65 | save_item(NAME(intrq_cond)); |
| 64 | 66 | save_item(NAME(cmd_buffer)); |
| 65 | 67 | save_item(NAME(track_buffer)); |
| 66 | 68 | save_item(NAME(sector_buffer)); |
| r19112 | r19113 | |
| 85 | 87 | last_dir = 1; |
| 86 | 88 | intrq = false; |
| 87 | 89 | drq = false; |
| 90 | hld = false; |
| 88 | 91 | live_abort(); |
| 89 | 92 | } |
| 90 | 93 | |
| r19112 | r19113 | |
| 117 | 120 | drq_cb = cb; |
| 118 | 121 | } |
| 119 | 122 | |
| 123 | void wd177x_t::setup_hld_cb(line_cb cb) |
| 124 | { |
| 125 | hld_cb = cb; |
| 126 | } |
| 127 | |
| 128 | void wd177x_t::setup_enp_cb(line_cb cb) |
| 129 | { |
| 130 | enp_cb = cb; |
| 131 | } |
| 132 | |
| 120 | 133 | void wd177x_t::dden_w(bool _dden) |
| 121 | 134 | { |
| 122 | 135 | dden = _dden; |
| r19112 | r19113 | |
| 163 | 176 | { |
| 164 | 177 | main_state = state; |
| 165 | 178 | status = (status & ~(S_CRC|S_RNF|S_SPIN)) | S_BUSY; |
| 179 | if(has_head_load()) { |
| 180 | // TODO get value from HLT callback |
| 181 | if (command & 8) |
| 182 | status |= S_HLD; |
| 183 | else |
| 184 | status &= ~S_HLD; |
| 185 | } |
| 166 | 186 | sub_state = has_motor() ? SPINUP : SPINUP_DONE; |
| 167 | 187 | status_type_1 = true; |
| 168 | 188 | seek_continue(); |
| r19112 | r19113 | |
| 295 | 315 | { |
| 296 | 316 | if(cur_live.idbuf[0] != track || cur_live.idbuf[2] != sector) |
| 297 | 317 | return false; |
| 298 | | if(!has_side_check()) |
| 318 | if(!has_side_check() || (command & 2)) |
| 299 | 319 | return true; |
| 300 | 320 | if(command & 8) |
| 301 | 321 | return cur_live.idbuf[1] & 1; |
| r19112 | r19113 | |
| 303 | 323 | return !(cur_live.idbuf[1] & 1); |
| 304 | 324 | } |
| 305 | 325 | |
| 326 | bool wd177x_t::is_ready() |
| 327 | { |
| 328 | return (floppy && !floppy->ready_r()); |
| 329 | } |
| 330 | |
| 306 | 331 | void wd177x_t::read_sector_start() |
| 307 | 332 | { |
| 333 | if(has_ready() && !is_ready()) |
| 334 | command_end(); |
| 335 | |
| 308 | 336 | main_state = READ_SECTOR; |
| 309 | 337 | status = (status & ~(S_CRC|S_LOST|S_RNF|S_WP|S_DDM)) | S_BUSY; |
| 310 | 338 | drop_drq(); |
| r19112 | r19113 | |
| 359 | 387 | live_start(SEARCH_ADDRESS_MARK_HEADER); |
| 360 | 388 | return; |
| 361 | 389 | } |
| 390 | // TODO WD2795/7 alternate sector size |
| 362 | 391 | sector_size = 128 << (cur_live.idbuf[3] & 3); |
| 363 | 392 | sub_state = SECTOR_READ; |
| 364 | 393 | live_start(SEARCH_ADDRESS_MARK_DATA); |
| r19112 | r19113 | |
| 391 | 420 | |
| 392 | 421 | void wd177x_t::read_track_start() |
| 393 | 422 | { |
| 423 | if(has_ready() && !is_ready()) |
| 424 | command_end(); |
| 425 | |
| 394 | 426 | main_state = READ_TRACK; |
| 395 | 427 | status = (status & ~(S_LOST|S_RNF)) | S_BUSY; |
| 396 | 428 | drop_drq(); |
| r19112 | r19113 | |
| 455 | 487 | |
| 456 | 488 | void wd177x_t::read_id_start() |
| 457 | 489 | { |
| 490 | if(has_ready() && !is_ready()) |
| 491 | command_end(); |
| 492 | |
| 458 | 493 | main_state = READ_ID; |
| 459 | 494 | status = (status & ~(S_WP|S_DDM|S_LOST|S_RNF)) | S_BUSY; |
| 460 | 495 | drop_drq(); |
| r19112 | r19113 | |
| 517 | 552 | |
| 518 | 553 | void wd177x_t::write_track_start() |
| 519 | 554 | { |
| 555 | if(has_ready() && !is_ready()) |
| 556 | command_end(); |
| 557 | |
| 520 | 558 | main_state = WRITE_TRACK; |
| 521 | 559 | status = (status & ~(S_WP|S_DDM|S_LOST|S_RNF)) | S_BUSY; |
| 522 | 560 | drop_drq(); |
| r19112 | r19113 | |
| 596 | 634 | |
| 597 | 635 | void wd177x_t::write_sector_start() |
| 598 | 636 | { |
| 637 | if(has_ready() && !is_ready()) |
| 638 | command_end(); |
| 639 | |
| 599 | 640 | main_state = WRITE_SECTOR; |
| 600 | 641 | status = (status & ~(S_CRC|S_LOST|S_RNF|S_WP|S_DDM)) | S_BUSY; |
| 601 | 642 | drop_drq(); |
| r19112 | r19113 | |
| 650 | 691 | live_start(SEARCH_ADDRESS_MARK_HEADER); |
| 651 | 692 | return; |
| 652 | 693 | } |
| 694 | // TODO WD2795/7 alternate sector size |
| 653 | 695 | sector_size = 128 << (cur_live.idbuf[3] & 3); |
| 654 | 696 | sub_state = SECTOR_WRITE; |
| 655 | 697 | live_start(WRITE_SECTOR_PRE); |
| r19112 | r19113 | |
| 686 | 728 | drop_drq(); |
| 687 | 729 | motor_timeout = 0; |
| 688 | 730 | } |
| 689 | | if(command & 0x08) { |
| 731 | |
| 732 | if(!(command & 0x0f)) { |
| 733 | intrq_cond = 0; |
| 734 | } else { |
| 735 | intrq_cond = (intrq_cond & I_IMM) | (command & 0x07); |
| 736 | } |
| 737 | |
| 738 | if(intrq_cond & I_IMM) { |
| 690 | 739 | intrq = true; |
| 691 | 740 | if(!intrq_cb.isnull()) |
| 692 | 741 | intrq_cb(intrq); |
| 693 | 742 | } |
| 694 | | if(command & 0x07) { |
| 743 | |
| 744 | if(command & 0x03) { |
| 695 | 745 | logerror("%s: unhandled interrupt generation (%02x)\n", ttsn().cstr(), command); |
| 696 | 746 | } |
| 697 | 747 | } |
| r19112 | r19113 | |
| 791 | 841 | |
| 792 | 842 | void wd177x_t::cmd_w(UINT8 val) |
| 793 | 843 | { |
| 794 | | if(intrq && ((command & 0xf8) != 0xd8)) { |
| 844 | logerror("wd1772 cmd: %02x\n", val); |
| 845 | |
| 846 | if(intrq && !(intrq_cond & I_IMM)) { |
| 795 | 847 | intrq = false; |
| 796 | 848 | if(!intrq_cb.isnull()) |
| 797 | 849 | intrq_cb(intrq); |
| r19112 | r19113 | |
| 808 | 860 | |
| 809 | 861 | UINT8 wd177x_t::status_r() |
| 810 | 862 | { |
| 811 | | if(intrq && ((command & 0xf8) != 0xd8)) { |
| 863 | if(intrq && !(intrq_cond & I_IMM)) { |
| 812 | 864 | intrq = false; |
| 813 | 865 | if(!intrq_cb.isnull()) |
| 814 | 866 | intrq_cb(intrq); |
| 815 | 867 | } |
| 816 | 868 | |
| 869 | if(main_state == IDLE || status_type_1) { |
| 870 | if(floppy && floppy->idx_r()) |
| 871 | status |= S_IP; |
| 872 | else |
| 873 | status &= ~S_IP; |
| 874 | } else { |
| 875 | if(drq) |
| 876 | status |= S_DRQ; |
| 877 | else |
| 878 | status &= ~S_DRQ; |
| 879 | } |
| 880 | |
| 817 | 881 | if(status_type_1) { |
| 818 | 882 | status &= ~(S_TR00|S_WP); |
| 819 | 883 | if(floppy) { |
| r19112 | r19113 | |
| 824 | 888 | } |
| 825 | 889 | } |
| 826 | 890 | |
| 827 | | if(main_state == IDLE || status_type_1) { |
| 828 | | if(floppy && floppy->idx_r()) |
| 829 | | status |= S_IP; |
| 891 | if(has_ready()) { |
| 892 | if(!is_ready()) |
| 893 | status |= S_NRDY; |
| 830 | 894 | else |
| 831 | | status &= ~S_IP; |
| 832 | | } else { |
| 833 | | if(drq) |
| 834 | | status |= S_DRQ; |
| 835 | | else |
| 836 | | status &= ~S_DRQ; |
| 895 | status &= ~S_NRDY; |
| 837 | 896 | } |
| 838 | 897 | |
| 839 | 898 | return status; |
| r19112 | r19113 | |
| 943 | 1002 | return; |
| 944 | 1003 | } |
| 945 | 1004 | |
| 1005 | if(intrq_cond & I_IDX) { |
| 1006 | intrq = true; |
| 1007 | if(!intrq_cb.isnull()) |
| 1008 | intrq_cb(intrq); |
| 1009 | } |
| 1010 | |
| 946 | 1011 | switch(sub_state) { |
| 947 | 1012 | case IDLE: |
| 948 | 1013 | if(has_motor()) { |
| r19112 | r19113 | |
| 1018 | 1083 | return drq; |
| 1019 | 1084 | } |
| 1020 | 1085 | |
| 1086 | bool wd177x_t::hld_r() |
| 1087 | { |
| 1088 | return hld; |
| 1089 | } |
| 1090 | |
| 1091 | void wd177x_t::hlt_w(bool state) |
| 1092 | { |
| 1093 | hlt = state; |
| 1094 | } |
| 1095 | |
| 1096 | bool wd177x_t::enp_r() |
| 1097 | { |
| 1098 | return enp; |
| 1099 | } |
| 1100 | |
| 1021 | 1101 | void wd177x_t::live_start(int state) |
| 1022 | 1102 | { |
| 1023 | 1103 | cur_live.tm = machine().time(); |
| r19112 | r19113 | |
| 1747 | 1827 | return 240000; |
| 1748 | 1828 | } |
| 1749 | 1829 | |
| 1830 | bool wd177x_t::has_ready() const |
| 1831 | { |
| 1832 | return false; |
| 1833 | } |
| 1834 | |
| 1835 | bool wd177x_t::has_head_load() const |
| 1836 | { |
| 1837 | return false; |
| 1838 | } |
| 1839 | |
| 1750 | 1840 | bool wd177x_t::has_side_check() const |
| 1751 | 1841 | { |
| 1752 | 1842 | return false; |
| r19112 | r19113 | |
| 1757 | 1847 | return false; |
| 1758 | 1848 | } |
| 1759 | 1849 | |
| 1760 | | wd1770_t::wd1770_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : wd177x_t(mconfig, WD1770x, "WD1770", tag, owner, clock) |
| 1850 | bool wd177x_t::has_sector_length_select() const |
| 1761 | 1851 | { |
| 1852 | return false; |
| 1762 | 1853 | } |
| 1763 | 1854 | |
| 1764 | | bool wd1770_t::has_motor() const |
| 1855 | bool wd177x_t::has_precompensation() const |
| 1765 | 1856 | { |
| 1766 | | return true; |
| 1857 | return false; |
| 1767 | 1858 | } |
| 1768 | 1859 | |
| 1769 | | wd1772_t::wd1772_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : wd177x_t(mconfig, WD1772x, "WD1772", tag, owner, clock) |
| 1860 | wd1770_t::wd1770_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : wd177x_t(mconfig, WD1770x, "WD1770", tag, owner, clock) |
| 1770 | 1861 | { |
| 1771 | 1862 | } |
| 1772 | 1863 | |
| 1773 | | bool wd1772_t::has_motor() const |
| 1864 | wd1772_t::wd1772_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : wd177x_t(mconfig, WD1772x, "WD1772", tag, owner, clock) |
| 1774 | 1865 | { |
| 1775 | | return true; |
| 1776 | 1866 | } |
| 1777 | 1867 | |
| 1778 | 1868 | int wd1772_t::step_time(int mode) const |
| r19112 | r19113 | |
| 1790 | 1880 | { |
| 1791 | 1881 | } |
| 1792 | 1882 | |
| 1793 | | bool wd1773_t::has_motor() const |
| 1794 | | { |
| 1795 | | return false; |
| 1796 | | } |
| 1797 | | |
| 1798 | | bool wd1773_t::has_side_check() const |
| 1799 | | { |
| 1800 | | return false; |
| 1801 | | } |
| 1802 | | |
| 1803 | 1883 | wd2793_t::wd2793_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : wd177x_t(mconfig, WD2793x, "WD2793", tag, owner, clock) |
| 1804 | 1884 | { |
| 1805 | 1885 | } |
| 1806 | 1886 | |
| 1807 | | bool wd2793_t::has_motor() const |
| 1808 | | { |
| 1809 | | return false; |
| 1810 | | } |
| 1811 | | |
| 1812 | | bool wd2793_t::has_side_check() const |
| 1813 | | { |
| 1814 | | return true; |
| 1815 | | } |
| 1816 | | |
| 1817 | 1887 | wd2797_t::wd2797_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : wd177x_t(mconfig, WD2797x, "WD2797", tag, owner, clock) |
| 1818 | 1888 | { |
| 1819 | 1889 | } |
| 1820 | 1890 | |
| 1821 | | bool wd2797_t::has_motor() const |
| 1891 | fd1793_t::fd1793_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : wd177x_t(mconfig, FD1793x, "FD1793", tag, owner, clock) |
| 1822 | 1892 | { |
| 1823 | | return false; |
| 1824 | 1893 | } |
| 1825 | | |
| 1826 | | bool wd2797_t::has_side_check() const |
| 1827 | | { |
| 1828 | | return false; |
| 1829 | | } |
| 1830 | | |
| 1831 | | bool wd2797_t::has_side_select() const |
| 1832 | | { |
| 1833 | | return true; |
| 1834 | | } |
trunk/src/mess/machine/wd1772.h
| r19112 | r19113 | |
| 19 | 19 | #define MCFG_WD2797x_ADD(_tag, _clock) \ |
| 20 | 20 | MCFG_DEVICE_ADD(_tag, WD2797x, _clock) |
| 21 | 21 | |
| 22 | #define MCFG_FD1793x_ADD(_tag, _clock) \ |
| 23 | MCFG_DEVICE_ADD(_tag, FD1793x, _clock) |
| 24 | |
| 22 | 25 | class wd177x_t : public device_t { |
| 23 | 26 | public: |
| 24 | 27 | typedef delegate<void (bool state)> line_cb; |
| r19112 | r19113 | |
| 29 | 32 | void set_floppy(floppy_image_device *floppy); |
| 30 | 33 | void setup_intrq_cb(line_cb cb); |
| 31 | 34 | void setup_drq_cb(line_cb cb); |
| 35 | void setup_hld_cb(line_cb cb); |
| 36 | void setup_enp_cb(line_cb cb); |
| 32 | 37 | |
| 33 | 38 | void cmd_w(UINT8 val); |
| 34 | 39 | UINT8 status_r(); |
| r19112 | r19113 | |
| 52 | 57 | |
| 53 | 58 | void gen_w(int reg, UINT8 val); |
| 54 | 59 | UINT8 gen_r(int reg); |
| 60 | DECLARE_READ8_MEMBER( read ) { return gen_r(offset);} |
| 61 | DECLARE_WRITE8_MEMBER( write ) { gen_w(offset,data); } |
| 55 | 62 | |
| 56 | 63 | bool intrq_r(); |
| 57 | 64 | bool drq_r(); |
| 58 | 65 | |
| 59 | | DECLARE_READ8_MEMBER( read ) { return gen_r(offset);} |
| 60 | | DECLARE_WRITE8_MEMBER( write ) { gen_w(offset,data); } |
| 66 | bool hld_r(); |
| 67 | void hlt_w(bool state); |
| 61 | 68 | |
| 69 | bool enp_r(); |
| 70 | |
| 62 | 71 | protected: |
| 63 | 72 | virtual void device_start(); |
| 64 | 73 | virtual void device_reset(); |
| 65 | 74 | virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); |
| 66 | 75 | |
| 76 | virtual bool has_ready() const; |
| 67 | 77 | virtual bool has_motor() const = 0; |
| 78 | virtual bool has_head_load() const; |
| 68 | 79 | virtual bool has_side_check() const; |
| 69 | 80 | virtual bool has_side_select() const; |
| 81 | virtual bool has_sector_length_select() const; |
| 82 | virtual bool has_precompensation() const; |
| 70 | 83 | virtual int step_time(int mode) const; |
| 71 | 84 | virtual int settle_time() const; |
| 72 | 85 | |
| r19112 | r19113 | |
| 223 | 236 | S_LOST = 0x04, |
| 224 | 237 | S_CRC = 0x08, |
| 225 | 238 | S_RNF = 0x10, |
| 226 | | S_SPIN = 0x20, |
| 239 | S_HLD = 0x20, |
| 240 | S_SPIN = 0x20, // WD1770, WD1772 |
| 227 | 241 | S_DDM = 0x20, |
| 242 | S_WF = 0x20, // WD1773 |
| 228 | 243 | S_WP = 0x40, |
| 229 | | S_MON = 0x80 |
| 244 | S_NRDY = 0x80, |
| 245 | S_MON = 0x80 // WD1770, WD1772 |
| 230 | 246 | }; |
| 231 | 247 | |
| 248 | enum { |
| 249 | I_RDY = 0x01, |
| 250 | I_NRDY = 0x02, |
| 251 | I_IDX = 0x04, |
| 252 | I_IMM = 0x08 |
| 253 | }; |
| 254 | |
| 232 | 255 | floppy_image_device *floppy; |
| 233 | 256 | |
| 234 | 257 | emu_timer *t_gen, *t_cmd, *t_track, *t_sector; |
| 235 | 258 | |
| 236 | | bool dden, status_type_1, intrq, drq; |
| 259 | bool dden, status_type_1, intrq, drq, hld, hlt, enp; |
| 237 | 260 | int main_state, sub_state; |
| 238 | | UINT8 command, track, sector, data, status; |
| 261 | UINT8 command, track, sector, data, status, intrq_cond; |
| 239 | 262 | int last_dir; |
| 240 | 263 | |
| 241 | 264 | int counter, motor_timeout, sector_size; |
| r19112 | r19113 | |
| 243 | 266 | int cmd_buffer, track_buffer, sector_buffer; |
| 244 | 267 | |
| 245 | 268 | live_info cur_live, checkpoint_live; |
| 246 | | line_cb intrq_cb, drq_cb; |
| 269 | line_cb intrq_cb, drq_cb, hld_cb, enp_cb; |
| 247 | 270 | |
| 248 | 271 | static astring tts(attotime t); |
| 249 | 272 | astring ttsn(); |
| r19112 | r19113 | |
| 284 | 307 | void spinup(); |
| 285 | 308 | void index_callback(floppy_image_device *floppy, int state); |
| 286 | 309 | bool sector_matches() const; |
| 310 | bool is_ready(); |
| 287 | 311 | |
| 288 | 312 | void live_start(int live_state); |
| 289 | 313 | void live_abort(); |
| r19112 | r19113 | |
| 307 | 331 | wd1770_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 308 | 332 | |
| 309 | 333 | protected: |
| 310 | | virtual bool has_motor() const; |
| 334 | virtual bool has_motor() const { return true; } |
| 335 | virtual bool has_precompensation() const { return true; } |
| 311 | 336 | }; |
| 312 | 337 | |
| 313 | 338 | class wd1772_t : public wd177x_t { |
| r19112 | r19113 | |
| 315 | 340 | wd1772_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 316 | 341 | |
| 317 | 342 | protected: |
| 318 | | virtual bool has_motor() const; |
| 343 | virtual bool has_motor() const { return true; } |
| 344 | virtual bool has_precompensation() const { return true; } |
| 319 | 345 | virtual int step_time(int mode) const; |
| 320 | 346 | virtual int settle_time() const; |
| 321 | 347 | }; |
| r19112 | r19113 | |
| 325 | 351 | wd1773_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 326 | 352 | |
| 327 | 353 | protected: |
| 328 | | virtual bool has_motor() const; |
| 329 | | virtual bool has_side_check() const; |
| 354 | virtual bool has_motor() const { return false; } |
| 355 | virtual bool has_head_load() const { return true; } |
| 356 | virtual bool has_side_check() const { return true; } |
| 330 | 357 | }; |
| 331 | 358 | |
| 332 | 359 | class wd2793_t : public wd177x_t { |
| r19112 | r19113 | |
| 334 | 361 | wd2793_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 335 | 362 | |
| 336 | 363 | protected: |
| 337 | | virtual bool has_motor() const; |
| 338 | | virtual bool has_side_check() const; |
| 364 | virtual bool has_ready() const { return true; } |
| 365 | virtual bool has_motor() const { return false; } |
| 366 | virtual bool has_head_load() const { return true; } |
| 367 | virtual bool has_side_check() const { return true; } |
| 339 | 368 | }; |
| 340 | 369 | |
| 341 | 370 | class wd2797_t : public wd177x_t { |
| r19112 | r19113 | |
| 343 | 372 | wd2797_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 344 | 373 | |
| 345 | 374 | protected: |
| 346 | | virtual bool has_motor() const; |
| 347 | | virtual bool has_side_check() const; |
| 348 | | virtual bool has_side_select() const; |
| 375 | virtual bool has_ready() const { return true; } |
| 376 | virtual bool has_motor() const { return false; } |
| 377 | virtual bool has_head_load() const { return true; } |
| 378 | virtual bool has_side_select() const { return true; } |
| 379 | virtual bool has_sector_length_select() const { return true; } |
| 349 | 380 | }; |
| 350 | 381 | |
| 382 | class fd1793_t : public wd177x_t { |
| 383 | public: |
| 384 | fd1793_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 385 | |
| 386 | protected: |
| 387 | virtual bool has_ready() const { return true; } |
| 388 | virtual bool has_motor() const { return false; } |
| 389 | virtual bool has_head_load() const { return true; } |
| 390 | virtual bool has_side_check() const { return true; } |
| 391 | }; |
| 392 | |
| 351 | 393 | extern const device_type WD1770x; |
| 352 | 394 | extern const device_type WD1772x; |
| 353 | 395 | extern const device_type WD1773x; |
| 354 | 396 | extern const device_type WD2793x; |
| 355 | 397 | extern const device_type WD2797x; |
| 398 | extern const device_type FD1793x; |
| 356 | 399 | |
| 357 | 400 | #endif |
trunk/src/mess/includes/v1050.h
| r19112 | r19113 | |
| 17 | 17 | #include "machine/ram.h" |
| 18 | 18 | #include "machine/scsicb.h" |
| 19 | 19 | #include "machine/v1050kb.h" |
| 20 | | #include "machine/wd17xx.h" |
| 20 | #include "machine/wd1772.h" |
| 21 | 21 | #include "video/mc6845.h" |
| 22 | 22 | |
| 23 | 23 | #define SCREEN_TAG "screen" |
| r19112 | r19113 | |
| 69 | 69 | m_crtc(*this, H46505_TAG), |
| 70 | 70 | m_centronics(*this, CENTRONICS_TAG), |
| 71 | 71 | m_ram(*this, RAM_TAG), |
| 72 | | m_floppy0(*this, FLOPPY_0), |
| 73 | | m_floppy1(*this, FLOPPY_1), |
| 72 | m_floppy0(*this, MB8877_TAG":0"), |
| 73 | m_floppy1(*this, MB8877_TAG":1"), |
| 74 | m_floppy2(*this, MB8877_TAG":2"), |
| 75 | m_floppy3(*this, MB8877_TAG":3"), |
| 74 | 76 | m_timer_sio(*this, TIMER_SIO_TAG), |
| 75 | 77 | m_timer_ack(*this, TIMER_ACK_TAG), |
| 76 | 78 | m_timer_rst(*this, TIMER_RST_TAG), |
| 77 | | m_sasibus(*this, SASIBUS_TAG ":host") |
| 78 | | , |
| 79 | | m_video_ram(*this, "video_ram"){ } |
| 79 | m_sasibus(*this, SASIBUS_TAG ":host"), |
| 80 | m_video_ram(*this, "video_ram") |
| 81 | { } |
| 80 | 82 | |
| 81 | 83 | required_device<cpu_device> m_maincpu; |
| 82 | 84 | required_device<cpu_device> m_subcpu; |
| r19112 | r19113 | |
| 84 | 86 | required_device<msm58321_device> m_rtc; |
| 85 | 87 | required_device<i8251_device> m_uart_kb; |
| 86 | 88 | required_device<i8251_device> m_uart_sio; |
| 87 | | required_device<device_t> m_fdc; |
| 89 | required_device<fd1793_t> m_fdc; |
| 88 | 90 | required_device<mc6845_device> m_crtc; |
| 89 | 91 | required_device<centronics_device> m_centronics; |
| 90 | 92 | required_device<ram_device> m_ram; |
| 91 | | required_device<device_t> m_floppy0; |
| 92 | | required_device<device_t> m_floppy1; |
| 93 | required_device<floppy_connector> m_floppy0; |
| 94 | required_device<floppy_connector> m_floppy1; |
| 95 | required_device<floppy_connector> m_floppy2; |
| 96 | required_device<floppy_connector> m_floppy3; |
| 93 | 97 | required_device<timer_device> m_timer_sio; |
| 94 | 98 | required_device<timer_device> m_timer_ack; |
| 95 | 99 | required_device<timer_device> m_timer_rst; |
| r19112 | r19113 | |
| 121 | 125 | DECLARE_WRITE_LINE_MEMBER( kb_rxrdy_w ); |
| 122 | 126 | DECLARE_WRITE_LINE_MEMBER( sio_rxrdy_w ); |
| 123 | 127 | DECLARE_WRITE_LINE_MEMBER( sio_txrdy_w ); |
| 124 | | DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w ); |
| 125 | | DECLARE_WRITE_LINE_MEMBER( fdc_drq_w ); |
| 128 | void fdc_intrq_w(bool state); |
| 129 | void fdc_drq_w(bool state); |
| 126 | 130 | DECLARE_READ8_MEMBER( attr_r ); |
| 127 | 131 | DECLARE_WRITE8_MEMBER( attr_w ); |
| 128 | 132 | DECLARE_READ8_MEMBER( videoram_r ); |