trunk/src/mess/drivers/apc.c
| r18987 | r18988 | |
| 68 | 68 | public: |
| 69 | 69 | apc_state(const machine_config &mconfig, device_type type, const char *tag) |
| 70 | 70 | : driver_device(mconfig, type, tag), |
| 71 | | m_maincpu(*this, "maincpu"), |
| 72 | | m_hgdc1(*this, "upd7220_chr"), |
| 73 | | m_hgdc2(*this, "upd7220_btm"), |
| 74 | | m_i8259_m(*this, "pic8259_master"), |
| 75 | | m_i8259_s(*this, "pic8259_slave"), |
| 76 | | m_video_ram_1(*this, "video_ram_1"), |
| 77 | | m_video_ram_2(*this, "video_ram_2") |
| 71 | m_maincpu(*this, "maincpu"), |
| 72 | m_hgdc1(*this, "upd7220_chr"), |
| 73 | m_hgdc2(*this, "upd7220_btm"), |
| 74 | m_i8259_m(*this, "pic8259_master"), |
| 75 | m_i8259_s(*this, "pic8259_slave"), |
| 76 | m_fdc(*this, "upd765"), |
| 77 | m_dma(*this, "8237dma"), |
| 78 | m_video_ram_1(*this, "video_ram_1"), |
| 79 | m_video_ram_2(*this, "video_ram_2") |
| 78 | 80 | { } |
| 79 | 81 | |
| 80 | 82 | // devices |
| r18987 | r18988 | |
| 83 | 85 | required_device<upd7220_device> m_hgdc2; |
| 84 | 86 | required_device<pic8259_device> m_i8259_m; |
| 85 | 87 | required_device<pic8259_device> m_i8259_s; |
| 88 | required_device<upd765a_device> m_fdc; |
| 89 | required_device<i8237_device> m_dma; |
| 86 | 90 | UINT8 *m_char_rom; |
| 87 | 91 | |
| 88 | 92 | required_shared_ptr<UINT8> m_video_ram_1; |
| r18987 | r18988 | |
| 101 | 105 | DECLARE_READ8_MEMBER(apc_kbd_r); |
| 102 | 106 | DECLARE_WRITE8_MEMBER(apc_kbd_w); |
| 103 | 107 | DECLARE_WRITE8_MEMBER(apc_dma_segments_w); |
| 108 | DECLARE_READ8_MEMBER(apc_dma_r); |
| 109 | DECLARE_WRITE8_MEMBER(apc_dma_w); |
| 104 | 110 | |
| 105 | 111 | DECLARE_WRITE_LINE_MEMBER(apc_master_set_int_line); |
| 106 | 112 | DECLARE_READ8_MEMBER(get_slave_ack); |
| 107 | | DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed); |
| 108 | | DECLARE_WRITE_LINE_MEMBER(pc_dack0_w); |
| 109 | | DECLARE_WRITE_LINE_MEMBER(pc_dack1_w); |
| 110 | | DECLARE_WRITE_LINE_MEMBER(pc_dack2_w); |
| 111 | | DECLARE_WRITE_LINE_MEMBER(pc_dack3_w); |
| 113 | DECLARE_WRITE_LINE_MEMBER(apc_dma_hrq_changed); |
| 114 | DECLARE_WRITE_LINE_MEMBER(apc_tc_w); |
| 115 | DECLARE_WRITE_LINE_MEMBER(apc_dack0_w); |
| 116 | DECLARE_WRITE_LINE_MEMBER(apc_dack1_w); |
| 117 | DECLARE_WRITE_LINE_MEMBER(apc_dack2_w); |
| 118 | DECLARE_WRITE_LINE_MEMBER(apc_dack3_w); |
| 112 | 119 | DECLARE_READ8_MEMBER(test_r); |
| 113 | 120 | DECLARE_WRITE8_MEMBER(test_w); |
| 114 | | DECLARE_READ8_MEMBER(pc_dma_read_byte); |
| 115 | | DECLARE_WRITE8_MEMBER(pc_dma_write_byte); |
| 121 | DECLARE_READ8_MEMBER(apc_dma_read_byte); |
| 122 | DECLARE_WRITE8_MEMBER(apc_dma_write_byte); |
| 116 | 123 | |
| 124 | void fdc_irq(bool state); |
| 125 | void fdc_drq(bool state); |
| 126 | DECLARE_WRITE_LINE_MEMBER(fdc_irq); |
| 127 | DECLARE_WRITE_LINE_MEMBER(fdc_drq); |
| 128 | |
| 117 | 129 | DECLARE_DRIVER_INIT(apc); |
| 118 | 130 | DECLARE_PALETTE_INIT(apc); |
| 119 | 131 | |
| r18987 | r18988 | |
| 330 | 342 | m_dma_offset[0][offset & 3] = data & 0x0f; |
| 331 | 343 | } |
| 332 | 344 | |
| 345 | /* |
| 346 | NEC APC i8237 hook-up looks pretty weird ... |
| 347 | |
| 348 | NEC APC (shift 1) IBM PC |
| 349 | CH0_ADR == 0X01 0x00 0x00 ; CH-0 address (RW) |
| 350 | CH1_ADR == 0X03 0x01 0x02 ; CH-1 address (RW) |
| 351 | CH2_ADR == 0X05 0x02 0x04 ; CH-2 address (RW) |
| 352 | CH3_ADR == 0X07 0x03 0x06 ; CH-3 address (RW) |
| 353 | DMA_ST == 0X09 0x04 0x08 ; status register (R) |
| 354 | DMA_CMD == 0X09 0x04 0x08 ; command register (W) |
| 355 | DMA_WSM == 0X0B 0x05 0x0a ; write single mask (W) |
| 356 | DMA_CFF == 0X0D 0x06 0x0c ; clear flip flop (W) |
| 357 | |
| 358 | CH0_TC == 0X11 0x08 0x01 ; CH-0 terminal count (RW) |
| 359 | CH1_TC == 0X13 0x09 0x03 ; CH-1 terminal count (RW) |
| 360 | CH2_TC == 0X15 0x0a 0x05 ; CH-2 terminal count (RW) |
| 361 | CH3_TC == 0X17 0x0b 0x07 ; CH-3 terminal count (RW) |
| 362 | DMA_WRR == 0X19 0x0c 0x09 ; write request register (W) |
| 363 | DMA_MODE== 0X1B 0x0d 0x0b ; write mode (W) |
| 364 | DMA_RTR == 0X1D 0x0e 0x0d? ; read temp register (R) |
| 365 | DMA_MC == 0X1D 0x0e 0x0d ; master clear (W) |
| 366 | DMA_WAM == 0X1F 0x0f 0x0f? ; write all mask (W) |
| 367 | CH0_EXA == 0X38 ; CH-0 extended address (W) |
| 368 | CH1_EXA == 0X3A ; CH-1 extended address (W) |
| 369 | CH2_EXA == 0X3C ; CH-2 extended address (W) |
| 370 | CH3_EXA == 0X3E ; CH-3 extended address (W) |
| 371 | |
| 372 | ... apparently, they rotated right the offset, compared to normal hook-up. |
| 373 | */ |
| 374 | |
| 375 | READ8_MEMBER(apc_state::apc_dma_r) |
| 376 | { |
| 377 | return i8237_r(m_dma, space, BITSWAP8(offset,7,6,5,4,2,1,0,3)); |
| 378 | } |
| 379 | |
| 380 | WRITE8_MEMBER(apc_state::apc_dma_w) |
| 381 | { |
| 382 | i8237_w(m_dma, space, BITSWAP8(offset,7,6,5,4,2,1,0,3), data); |
| 383 | } |
| 384 | |
| 385 | |
| 333 | 386 | static ADDRESS_MAP_START( apc_map, AS_PROGRAM, 16, apc_state ) |
| 334 | 387 | AM_RANGE(0x00000, 0x1ffff) AM_RAM |
| 335 | 388 | // AM_RANGE(0xa0000, 0xaffff) space for an external ROM |
| r18987 | r18988 | |
| 338 | 391 | |
| 339 | 392 | static ADDRESS_MAP_START( apc_io, AS_IO, 16, apc_state ) |
| 340 | 393 | // ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 341 | | AM_RANGE(0x00, 0x1f) AM_DEVREADWRITE8_LEGACY("8237dma", i8237_r, i8237_w, 0x00ff) |
| 394 | AM_RANGE(0x00, 0x1f) AM_READWRITE8(apc_dma_r, apc_dma_w,0xff00) |
| 342 | 395 | AM_RANGE(0x20, 0x23) AM_DEVREADWRITE8_LEGACY("pic8259_master", pic8259_r, pic8259_w, 0x00ff) // i8259 |
| 343 | 396 | AM_RANGE(0x28, 0x2f) AM_READWRITE8(apc_port_28_r, apc_port_28_w, 0xffff) |
| 344 | 397 | // 0x30, 0x37 serial port 0/1 (i8251) (even/odd) |
| r18987 | r18988 | |
| 411 | 464 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 412 | 465 | INPUT_PORTS_END |
| 413 | 466 | |
| 467 | void apc_state::fdc_drq(bool state) |
| 468 | { |
| 469 | printf("%02x DRQ\n",state); |
| 470 | i8237_dreq0_w(m_dma, state); |
| 471 | } |
| 414 | 472 | |
| 473 | void apc_state::fdc_irq(bool state) |
| 474 | { |
| 475 | printf("IRQ %d\n",state); |
| 476 | pic8259_ir3_w(machine().device("pic8259_slave"), state); |
| 477 | } |
| 478 | |
| 415 | 479 | void apc_state::machine_start() |
| 416 | 480 | { |
| 481 | m_fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(apc_state::fdc_irq), this)); |
| 482 | m_fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(apc_state::fdc_drq), this)); |
| 417 | 483 | } |
| 418 | 484 | |
| 419 | 485 | void apc_state::machine_reset() |
| r18987 | r18988 | |
| 423 | 489 | |
| 424 | 490 | void apc_state::palette_init() |
| 425 | 491 | { |
| 492 | |
| 426 | 493 | } |
| 427 | 494 | |
| 428 | 495 | static UPD7220_INTERFACE( hgdc_1_intf ) |
| r18987 | r18988 | |
| 551 | 618 | * |
| 552 | 619 | ****************************************/ |
| 553 | 620 | |
| 554 | | WRITE_LINE_MEMBER(apc_state::pc_dma_hrq_changed) |
| 621 | WRITE_LINE_MEMBER(apc_state::apc_dma_hrq_changed) |
| 555 | 622 | { |
| 556 | 623 | machine().device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); |
| 557 | 624 | |
| 625 | printf("%02x HLDA\n",state); |
| 626 | |
| 558 | 627 | /* Assert HLDA */ |
| 559 | 628 | i8237_hlda_w( machine().device("dma8237"), state ); |
| 560 | 629 | } |
| 561 | 630 | |
| 631 | WRITE_LINE_MEMBER( apc_state::apc_tc_w ) |
| 632 | { |
| 633 | /* floppy terminal count */ |
| 634 | // m_fdc->tc_w(!state); |
| 635 | printf("TC %02x\n",state); |
| 636 | } |
| 562 | 637 | |
| 563 | | READ8_MEMBER(apc_state::pc_dma_read_byte) |
| 638 | READ8_MEMBER(apc_state::apc_dma_read_byte) |
| 564 | 639 | { |
| 565 | 640 | offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) |
| 566 | 641 | & 0xFF0000; |
| r18987 | r18988 | |
| 569 | 644 | } |
| 570 | 645 | |
| 571 | 646 | |
| 572 | | WRITE8_MEMBER(apc_state::pc_dma_write_byte) |
| 647 | WRITE8_MEMBER(apc_state::apc_dma_write_byte) |
| 573 | 648 | { |
| 574 | 649 | offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) |
| 575 | 650 | & 0xFF0000; |
| r18987 | r18988 | |
| 583 | 658 | if (!state) drvstate->m_dma_channel = channel; |
| 584 | 659 | } |
| 585 | 660 | |
| 586 | | WRITE_LINE_MEMBER(apc_state::pc_dack0_w){ /*printf("%02x 0\n",state);*/ set_dma_channel(machine(), 0, state); } |
| 587 | | WRITE_LINE_MEMBER(apc_state::pc_dack1_w){ /*printf("%02x 1\n",state);*/ set_dma_channel(machine(), 1, state); } |
| 588 | | WRITE_LINE_MEMBER(apc_state::pc_dack2_w){ /*printf("%02x 2\n",state);*/ set_dma_channel(machine(), 2, state); } |
| 589 | | WRITE_LINE_MEMBER(apc_state::pc_dack3_w){ /*printf("%02x 3\n",state);*/ set_dma_channel(machine(), 3, state); } |
| 661 | WRITE_LINE_MEMBER(apc_state::apc_dack0_w){ printf("%02x 0\n",state); set_dma_channel(machine(), 0, state); } |
| 662 | WRITE_LINE_MEMBER(apc_state::apc_dack1_w){ printf("%02x 1\n",state); set_dma_channel(machine(), 1, state); } |
| 663 | WRITE_LINE_MEMBER(apc_state::apc_dack2_w){ printf("%02x 2\n",state); set_dma_channel(machine(), 2, state); } |
| 664 | WRITE_LINE_MEMBER(apc_state::apc_dack3_w){ printf("%02x 3\n",state); set_dma_channel(machine(), 3, state); } |
| 590 | 665 | |
| 591 | 666 | READ8_MEMBER(apc_state::test_r) |
| 592 | 667 | { |
| 593 | | // printf("2dd DACK R\n"); |
| 668 | printf("2dd DACK R\n"); |
| 594 | 669 | |
| 595 | 670 | return 0xff; |
| 596 | 671 | } |
| 597 | 672 | |
| 598 | 673 | WRITE8_MEMBER(apc_state::test_w) |
| 599 | 674 | { |
| 600 | | // printf("2dd DACK W\n"); |
| 675 | printf("2dd DACK W\n"); |
| 601 | 676 | } |
| 602 | 677 | |
| 603 | 678 | static I8237_INTERFACE( dma8237_config ) |
| 604 | 679 | { |
| 605 | | DEVCB_DRIVER_LINE_MEMBER(apc_state, pc_dma_hrq_changed), |
| 606 | | DEVCB_NULL, |
| 607 | | DEVCB_DRIVER_MEMBER(apc_state, pc_dma_read_byte), |
| 608 | | DEVCB_DRIVER_MEMBER(apc_state, pc_dma_write_byte), |
| 609 | | { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(apc_state,test_r) }, |
| 610 | | { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(apc_state,test_w) }, |
| 611 | | { DEVCB_DRIVER_LINE_MEMBER(apc_state, pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(apc_state, pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(apc_state, pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(apc_state, pc_dack3_w) } |
| 680 | DEVCB_DRIVER_LINE_MEMBER(apc_state, apc_dma_hrq_changed), |
| 681 | DEVCB_DRIVER_LINE_MEMBER(apc_state, apc_tc_w), |
| 682 | DEVCB_DRIVER_MEMBER(apc_state, apc_dma_read_byte), |
| 683 | DEVCB_DRIVER_MEMBER(apc_state, apc_dma_write_byte), |
| 684 | { DEVCB_NULL, DEVCB_DRIVER_MEMBER(apc_state,test_r), DEVCB_NULL, DEVCB_NULL }, |
| 685 | { DEVCB_NULL, DEVCB_DRIVER_MEMBER(apc_state,test_w), DEVCB_NULL, DEVCB_NULL }, |
| 686 | { DEVCB_DRIVER_LINE_MEMBER(apc_state, apc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(apc_state, apc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(apc_state, apc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(apc_state, apc_dack3_w) } |
| 612 | 687 | }; |
| 613 | 688 | |
| 614 | 689 | static const floppy_format_type apc_floppy_formats[] = { |
| r18987 | r18988 | |
| 693 | 768 | |
| 694 | 769 | DRIVER_INIT_MEMBER(apc_state,apc) |
| 695 | 770 | { |
| 696 | | UINT8 *ROM = memregion("ipl")->base(); |
| 697 | | |
| 698 | | /* patch DMA check */ |
| 699 | | ROM[0xff334 & 0x1fff] = 0x90; |
| 700 | | ROM[0xff335 & 0x1fff] = 0x90; |
| 701 | | ROM[0xff339 & 0x1fff] = 0x90; |
| 702 | | ROM[0xff33a & 0x1fff] = 0x90; |
| 703 | | |
| 771 | // ... |
| 704 | 772 | } |
| 705 | 773 | |
| 706 | 774 | GAME( 1982, apc, 0, apc, apc, apc_state, apc, ROT0, "NEC", "APC", GAME_NOT_WORKING | GAME_NO_SOUND ) |