trunk/src/mess/drivers/pc100.c
| r18944 | r18945 | |
| 52 | 52 | |
| 53 | 53 | #include "emu.h" |
| 54 | 54 | #include "cpu/i86/i86.h" |
| 55 | #include "imagedev/flopdrv.h" |
| 56 | #include "formats/mfi_dsk.h" |
| 57 | #include "formats/d88_dsk.h" |
| 55 | 58 | #include "machine/i8255.h" |
| 56 | 59 | #include "machine/pic8259.h" |
| 60 | #include "machine/upd765.h" |
| 61 | #include "machine/msm58321.h" |
| 57 | 62 | |
| 58 | 63 | class pc100_state : public driver_device |
| 59 | 64 | { |
| 60 | 65 | public: |
| 61 | 66 | pc100_state(const machine_config &mconfig, device_type type, const char *tag) |
| 62 | 67 | : driver_device(mconfig, type, tag) , |
| 63 | | m_palram(*this, "palram"){ } |
| 68 | m_rtc(*this, "rtc"), |
| 69 | m_palram(*this, "palram") |
| 70 | { } |
| 64 | 71 | |
| 72 | required_device<msm58321_device> m_rtc; |
| 73 | required_shared_ptr<UINT16> m_palram; |
| 74 | |
| 65 | 75 | DECLARE_READ16_MEMBER(pc100_vram_r); |
| 66 | 76 | DECLARE_WRITE16_MEMBER(pc100_vram_w); |
| 67 | 77 | DECLARE_READ16_MEMBER(pc100_kanji_r); |
| r18944 | r18945 | |
| 78 | 88 | DECLARE_WRITE8_MEMBER(lower_mask_w); |
| 79 | 89 | DECLARE_WRITE8_MEMBER(upper_mask_w); |
| 80 | 90 | DECLARE_WRITE8_MEMBER(crtc_bank_w); |
| 91 | DECLARE_WRITE8_MEMBER(rtc_porta_w); |
| 81 | 92 | DECLARE_WRITE_LINE_MEMBER(pc100_set_int_line); |
| 82 | 93 | UINT16 *m_kanji_rom; |
| 83 | 94 | UINT16 *m_vram; |
| 84 | | required_shared_ptr<UINT16> m_palram; |
| 85 | 95 | UINT16 m_kanji_addr; |
| 86 | 96 | UINT8 m_timer_mode; |
| 87 | 97 | |
| r18944 | r18945 | |
| 264 | 274 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 265 | 275 | AM_RANGE(0x00, 0x03) AM_DEVREADWRITE8_LEGACY("pic8259", pic8259_r, pic8259_w, 0x00ff) // i8259 |
| 266 | 276 | // AM_RANGE(0x04, 0x07) i8237? |
| 267 | | // AM_RANGE(0x08, 0x0b) upd765 |
| 268 | | // AM_RANGE(0x10, 0x17) i8255 #1 |
| 277 | AM_RANGE(0x08, 0x0b) AM_DEVICE8("upd765", upd765a_device, map, 0x00ff ) // upd765 |
| 278 | AM_RANGE(0x10, 0x17) AM_DEVREADWRITE8("ppi8255_1", i8255_device, read, write,0x00ff) // i8255 #1 |
| 269 | 279 | AM_RANGE(0x18, 0x1f) AM_DEVREADWRITE8("ppi8255_2", i8255_device, read, write,0x00ff) // i8255 #2 |
| 270 | 280 | AM_RANGE(0x20, 0x23) AM_READ8(pc100_key_r,0x00ff) //i/o, keyboard, mouse |
| 271 | 281 | AM_RANGE(0x22, 0x25) AM_WRITE8(pc100_output_w,0x00ff) //i/o, keyboard, mouse |
| r18944 | r18945 | |
| 326 | 336 | GFXDECODE_ENTRY( "kanji", 0x0000, kanji_layout, 8, 1 ) |
| 327 | 337 | GFXDECODE_END |
| 328 | 338 | |
| 339 | /* TODO: untested */ |
| 340 | WRITE8_MEMBER( pc100_state::rtc_porta_w ) |
| 341 | { |
| 342 | /* |
| 343 | ---- -x-- chip select |
| 344 | ---- --x- read |
| 345 | ---- ---x write |
| 346 | */ |
| 347 | |
| 348 | m_rtc->write_w(data & 1); |
| 349 | m_rtc->read_w((data & 2) >> 1); |
| 350 | m_rtc->cs1_w((data & 4) >> 2); |
| 351 | } |
| 352 | |
| 353 | static I8255A_INTERFACE( pc100_ppi8255_interface_1 ) |
| 354 | { |
| 355 | DEVCB_NULL, |
| 356 | DEVCB_DRIVER_MEMBER(pc100_state, rtc_porta_w), |
| 357 | DEVCB_NULL, |
| 358 | DEVCB_NULL, |
| 359 | DEVCB_DEVICE_MEMBER("rtc", msm58321_device, read), |
| 360 | DEVCB_DEVICE_MEMBER("rtc", msm58321_device, write) |
| 361 | }; |
| 362 | |
| 363 | |
| 329 | 364 | WRITE8_MEMBER( pc100_state::lower_mask_w ) |
| 330 | 365 | { |
| 331 | 366 | m_crtc.mask = (m_crtc.mask & 0xff00) | data; |
| r18944 | r18945 | |
| 424 | 459 | } |
| 425 | 460 | } |
| 426 | 461 | |
| 462 | static const floppy_format_type pc100_floppy_formats[] = { |
| 463 | FLOPPY_D88_FORMAT, |
| 464 | FLOPPY_MFI_FORMAT, |
| 465 | NULL |
| 466 | }; |
| 467 | |
| 468 | static SLOT_INTERFACE_START( pc100_floppies ) |
| 469 | SLOT_INTERFACE( "525hd", FLOPPY_525_HD ) |
| 470 | SLOT_INTERFACE_END |
| 471 | |
| 472 | static MSM58321_INTERFACE( rtc_intf ) |
| 473 | { |
| 474 | DEVCB_NULL |
| 475 | }; |
| 476 | |
| 427 | 477 | #define MASTER_CLOCK 6988800 |
| 428 | 478 | |
| 429 | 479 | static MACHINE_CONFIG_START( pc100, pc100_state ) |
| r18944 | r18945 | |
| 433 | 483 | MCFG_CPU_IO_MAP(pc100_io) |
| 434 | 484 | MCFG_CPU_VBLANK_INT_DRIVER("screen", pc100_state, pc100_vblank_irq) |
| 435 | 485 | |
| 486 | MCFG_TIMER_DRIVER_ADD_PERIODIC("600hz", pc100_state, pc100_600hz_irq, attotime::from_hz(MASTER_CLOCK/600)) |
| 487 | MCFG_TIMER_DRIVER_ADD_PERIODIC("100hz", pc100_state, pc100_100hz_irq, attotime::from_hz(MASTER_CLOCK/100)) |
| 488 | MCFG_TIMER_DRIVER_ADD_PERIODIC("50hz", pc100_state, pc100_50hz_irq, attotime::from_hz(MASTER_CLOCK/50)) |
| 489 | MCFG_TIMER_DRIVER_ADD_PERIODIC("10hz", pc100_state, pc100_10hz_irq, attotime::from_hz(MASTER_CLOCK/10)) |
| 490 | MCFG_I8255_ADD( "ppi8255_1", pc100_ppi8255_interface_1 ) |
| 491 | MCFG_I8255_ADD( "ppi8255_2", pc100_ppi8255_interface_2 ) |
| 492 | MCFG_PIC8259_ADD( "pic8259", pc100_pic8259_config ) |
| 493 | MCFG_UPD765A_ADD("upd765", true, true) |
| 494 | MCFG_MSM58321_ADD("rtc", XTAL_32_768kHz, rtc_intf) |
| 436 | 495 | |
| 496 | MCFG_FLOPPY_DRIVE_ADD("upd765:0", pc100_floppies, "525hd", 0, pc100_floppy_formats) |
| 497 | MCFG_FLOPPY_DRIVE_ADD("upd765:1", pc100_floppies, "525hd", 0, pc100_floppy_formats) |
| 498 | |
| 437 | 499 | /* video hardware */ |
| 438 | 500 | MCFG_SCREEN_ADD("screen", RASTER) |
| 439 | | // MCFG_SCREEN_REFRESH_RATE(60) |
| 440 | | // MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ |
| 441 | | // MCFG_SCREEN_SIZE(1024, 264*2) |
| 442 | | // MCFG_SCREEN_VISIBLE_AREA(0, 768-1, 0, 512-1) |
| 443 | 501 | /* TODO: Unknown Pixel Clock and CRTC is dynamic */ |
| 444 | 502 | MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK*4, 1024, 0, 768, 264*2, 0, 512) |
| 445 | 503 | MCFG_SCREEN_UPDATE_DRIVER(pc100_state, screen_update_pc100) |
| 446 | 504 | MCFG_GFXDECODE(pc100) |
| 447 | 505 | MCFG_PALETTE_LENGTH(16) |
| 448 | 506 | // MCFG_PALETTE_INIT(black_and_white) |
| 449 | | |
| 450 | | MCFG_TIMER_DRIVER_ADD_PERIODIC("600hz", pc100_state, pc100_600hz_irq, attotime::from_hz(MASTER_CLOCK/600)) |
| 451 | | MCFG_TIMER_DRIVER_ADD_PERIODIC("100hz", pc100_state, pc100_100hz_irq, attotime::from_hz(MASTER_CLOCK/100)) |
| 452 | | MCFG_TIMER_DRIVER_ADD_PERIODIC("50hz", pc100_state, pc100_50hz_irq, attotime::from_hz(MASTER_CLOCK/50)) |
| 453 | | MCFG_TIMER_DRIVER_ADD_PERIODIC("10hz", pc100_state, pc100_10hz_irq, attotime::from_hz(MASTER_CLOCK/10)) |
| 454 | | MCFG_I8255_ADD( "ppi8255_2", pc100_ppi8255_interface_2 ) |
| 455 | | MCFG_PIC8259_ADD( "pic8259", pc100_pic8259_config ) |
| 456 | 507 | MACHINE_CONFIG_END |
| 457 | 508 | |
| 458 | 509 | /* ROM definition */ |