trunk/src/emu/sound/nes_apu.c
| r18897 | r18898 | |
| 371 | 371 | if (chan->regs[0] & 0x80) /* IRQ Generator */ |
| 372 | 372 | { |
| 373 | 373 | chan->irq_occurred = TRUE; |
| 374 | | downcast<n2a03_device &>(info->APU.dpcm.memory->device()).set_input_line(N2A03_IRQ_LINE, ASSERT_LINE); |
| 374 | downcast<n2a03_device &>(info->APU.dpcm.memory->device()).set_input_line(N2A03_APU_IRQ_LINE, ASSERT_LINE); |
| 375 | 375 | } |
| 376 | 376 | break; |
| 377 | 377 | } |
| r18897 | r18898 | |
| 521 | 521 | case APU_WRE0: |
| 522 | 522 | info->APU.dpcm.regs[0] = value; |
| 523 | 523 | if (0 == (value & 0x80)) { |
| 524 | | downcast<n2a03_device &>(info->APU.dpcm.memory->device()).set_input_line(N2A03_IRQ_LINE, CLEAR_LINE); |
| 524 | downcast<n2a03_device &>(info->APU.dpcm.memory->device()).set_input_line(N2A03_APU_IRQ_LINE, CLEAR_LINE); |
| 525 | 525 | info->APU.dpcm.irq_occurred = FALSE; |
| 526 | 526 | } |
| 527 | 527 | break; |
trunk/src/emu/cpu/m6502/m6502.c
| r18897 | r18898 | |
| 96 | 96 | save_item(NAME(IR)); |
| 97 | 97 | save_item(NAME(nmi_state)); |
| 98 | 98 | save_item(NAME(irq_state)); |
| 99 | save_item(NAME(apu_irq_state)); |
| 99 | 100 | save_item(NAME(v_state)); |
| 100 | 101 | save_item(NAME(inst_state)); |
| 101 | 102 | save_item(NAME(inst_substate)); |
| r18897 | r18898 | |
| 116 | 117 | IR = 0x00; |
| 117 | 118 | nmi_state = false; |
| 118 | 119 | irq_state = false; |
| 120 | apu_irq_state = false; |
| 119 | 121 | irq_taken = false; |
| 120 | 122 | v_state = false; |
| 121 | 123 | inst_state = STATE_RESET; |
| r18897 | r18898 | |
| 131 | 133 | inst_substate = 0; |
| 132 | 134 | nmi_state = false; |
| 133 | 135 | irq_state = false; |
| 136 | apu_irq_state = false; |
| 134 | 137 | irq_taken = false; |
| 135 | 138 | v_state = false; |
| 136 | 139 | end_cycles = 0; |
| r18897 | r18898 | |
| 416 | 419 | { |
| 417 | 420 | switch(inputnum) { |
| 418 | 421 | case IRQ_LINE: irq_state = state == ASSERT_LINE; break; |
| 422 | case APU_IRQ_LINE: apu_irq_state = state == ASSERT_LINE; break; |
| 419 | 423 | case NMI_LINE: nmi_state = nmi_state || (state == ASSERT_LINE); break; |
| 420 | 424 | case V_LINE: |
| 421 | 425 | if(!v_state && state == ASSERT_LINE) |
| r18897 | r18898 | |
| 612 | 616 | IR = mintf->read_decrypted(PC); |
| 613 | 617 | sync = false; |
| 614 | 618 | |
| 615 | | if((nmi_state || (irq_state && !(P & F_I))) && !inhibit_interrupts) { |
| 619 | if((nmi_state || ((irq_state || apu_irq_state) && !(P & F_I))) && !inhibit_interrupts) { |
| 616 | 620 | irq_taken = true; |
| 617 | 621 | IR = 0x00; |
| 618 | 622 | } else |
trunk/src/emu/cpu/m6502/m6502.h
| r18897 | r18898 | |
| 47 | 47 | public: |
| 48 | 48 | enum { |
| 49 | 49 | IRQ_LINE = INPUT_LINE_IRQ0, |
| 50 | APU_IRQ_LINE = INPUT_LINE_IRQ1, |
| 50 | 51 | NMI_LINE = INPUT_LINE_NMI, |
| 51 | 52 | V_LINE = 10 |
| 52 | 53 | }; |
| r18897 | r18898 | |
| 176 | 177 | memory_interface *mintf; |
| 177 | 178 | int inst_state, inst_substate; |
| 178 | 179 | int icount; |
| 179 | | bool nmi_state, irq_state, v_state; |
| 180 | bool nmi_state, irq_state, apu_irq_state, v_state; |
| 180 | 181 | bool irq_taken, sync, direct_disabled, inhibit_interrupts; |
| 181 | 182 | UINT64 end_cycles; |
| 182 | 183 | |