MAME SVN History

199869 Revisions

r18895 Wednesday 7th November, 2012 at 15:30:50 UTC by Curt Coder
(MESS) adam: Created an ADAMnet slot interface and separated the ADAMnet devices from the driver. [Curt Coder]

[src/mess]	mess.mak
[src/mess/drivers]	adam.c
[src/mess/includes]	adam.h
[src/mess/machine]	adam_ddp.c* adam_ddp.h* adam_fdc.c* adam_fdc.h* adam_kb.c* adam_kb.h* adam_prn.c* adam_prn.h* adam_spi.c* adam_spi.h* adamnet.c* adamnet.h*

trunk/src/mess/drivers/adam.c
r18894	r18895
236	236	Notes:
237	237
238	238	1) Port 41 or port 43 is used by the Eve 80 column unit as a keyboard input port.
239		2) Not useable from expansion card slots (can't read or write data to or from ports) -
	239	2) Not useable from expansion card slots (can't read or write data to or from ports) -
240	240	may be available on side port.
241	241	3) Powermate IDE hard disk drive will not interfere with Powermate serial ports.
242	242	4) Powermate serial ports will probably interfere with autodialer.
243		5) Reserved ports in Powermate serial port map: Input ports 12 and 1A - screw up serial
244		ports if used; Input port 1C doesn't bother anything but the 2681 drives the bus;
	243	5) Reserved ports in Powermate serial port map: Input ports 12 and 1A - screw up serial
	244	ports if used; Input port 1C doesn't bother anything but the 2681 drives the bus;
245	245	6) Orphanware serial port number 4 probably interferes with the ADAMlink modem.
246		7) According to my analysis of circuit U6 in the ADAM computer, all of upper I/O address
247		space is decoded (by an LS138). However, not all outputs appear to be used. The
248		circuit description follows. Please correct any misassumptions I've made. Note that
249		if my analysis is correct, then the Orphanware hard disk should be interfering with
	246	7) According to my analysis of circuit U6 in the ADAM computer, all of upper I/O address
	247	space is decoded (by an LS138). However, not all outputs appear to be used. The
	248	circuit description follows. Please correct any misassumptions I've made. Note that
	249	if my analysis is correct, then the Orphanware hard disk should be interfering with
250	250	the signal STA\ (which is associated with the joysticks in some way).
251	251
252	252
r18894	r18895
273	273
274	274	Conventions:
275	275
276		1) The "o" symbol next to an input or an output implies that the pin requires an active
	276	1) The "o" symbol next to an input or an output implies that the pin requires an active
277	277	low signal.
278	278	2) The "\" symbol following a signal mnemonic indicates that the signal is active low.
279	279
r18894	r18895
287	287
288	288	TODO:
289	289
290		- floppy
291		- slot interface
	290	- floppy
	291	- slot interface
292	292	- printer
293	293	- SPI
294	294	- sound (PSG RDY -> Z80 WAIT)
r18894	r18895
352	352	switch (m_mioc & 0x03)
353	353	{
354	354	case LO_SMARTWRITER:
355		if (BIT(m_a~~dam~~net, 1))
	355	if (BIT(m_an, 1))
356	356	{
357	357	program.unmap_readwrite(0x0000, 0x5fff);
358	358	program.install_rom(0x6000, 0x7fff, memregion("wp")->base() + 0x8000);
r18894	r18895
429	429	{
430	430	/*
431	431
432		bit description
	432	bit description
433	433
434		0 Lower memory option 0
435		1 Lower memory option 1
436		2 Upper memory option 0
437		3 Upper memory option 1
438		4
439		5
440		6
441		7
	434	0 Lower memory option 0
	435	1 Lower memory option 1
	436	2 Upper memory option 0
	437	3 Upper memory option 1
	438	4
	439	5
	440	6
	441	7
442	442
443		*/
	443	*/
444	444
445	445	m_mioc = data;
446	446
r18894	r18895
454	454	//**************************************************************************
455	455
456	456	//-------------------------------------------------
457		// adamnet_txd_w -
458		//-------------------------------------------------
459
460		void adam_state::adamnet_txd_w(int device, int state)
461		{
462		m_txd[device] = state;
463
464		m_rxd = 1;
465
466		for (int i = 0; i < 4; i++)
467		{
468		if (!m_txd[i]) m_rxd = 0;
469		}
470		}
471
472
473		//-------------------------------------------------
474	457	// adamnet_r -
475	458	//-------------------------------------------------
476	459
477	460	READ8_MEMBER( adam_state::adamnet_r )
478	461	{
479		return m_a~~dam~~net & 0x0f;
	462	return m_an & 0x0f;
480	463	}
481	464
482	465
r18894	r18895
488	471	{
489	472	/*
490	473
491		bit description
	474	bit description
492	475
493		0 Network reset
494		1 EOS enable
495		2
496		3
497		4
498		5
499		6
500		7
	476	0 Network reset
	477	1 EOS enable
	478	2
	479	3
	480	4
	481	5
	482	6
	483	7
501	484
502		*/
	485	*/
503	486
504		// network reset
505		if (BIT(m_adamnet, 0) && !BIT(data, 0))
	487	if (BIT(m_an, 0) && !BIT(data, 0))
506	488	{
507		m_reset = 1;
508
509		machine().device(M6801_KB_TAG)->reset();
510		machine().device(M6801_DDP_TAG)->reset();
511		machine().device(M6801_PRN_TAG)->reset();
512		machine().device(M6801_FDC_TAG)->reset();
513		wd17xx_mr_w(m_fdc, 0);
514		wd17xx_mr_w(m_fdc, 1);
515		//machine().device(M6801_SPI_TAG)->reset();
516
517		m_reset = 0;
	489	// network reset
	490	m_adamnet->reset_w(ASSERT_LINE);
	491	m_adamnet->reset_w(CLEAR_LINE);
518	492	}
519	493
520		m_a~~dam~~net = data;
	494	m_an = data;
521	495
522	496	bankswitch();
523	497	}
524	498
525	499
526	500	//-------------------------------------------------
527		// kb6801_p1_r -
	501	// m6801_p1_w -
528	502	//-------------------------------------------------
529	503
530		WRITE8_MEMBER( adam_state::m~~aster~~6801_p1_w )
	504	WRITE8_MEMBER( adam_state::m6801_p1_w )
531	505	{
532	506	/*
533	507
534		bit description
	508	bit description
535	509
536		0 BA8
537		1 BA9
538		2 BA10
539		3 BA11
540		4 BA12
541		5 BA13
542		6 BA14
543		7 BA15
	510	0 BA8
	511	1 BA9
	512	2 BA10
	513	3 BA11
	514	4 BA12
	515	5 BA13
	516	6 BA14
	517	7 BA15
544	518
545		*/
	519	*/
546	520
547	521	m_ba = (data << 8) \| (m_ba & 0xff);
548	522	}
549	523
550	524
551	525	//-------------------------------------------------
552		// m~~aster~~6801_p2_r -
	526	// m6801_p2_r -
553	527	//-------------------------------------------------
554	528
555		READ8_MEMBER( adam_state::m~~aster~~6801_p2_r )
	529	READ8_MEMBER( adam_state::m6801_p2_r )
556	530	{
557	531	/*
558	532
559		bit description
	533	bit description
560	534
561		0 M6801 mode bit 0
562		1 M6801 mode bit 1
563		2 M6801 mode bit 2
564		3 NET RXD
565		4
	535	0 M6801 mode bit 0
	536	1 M6801 mode bit 1
	537	2 M6801 mode bit 2
	538	3 NET RXD
	539	4
566	540
567		*/
	541	*/
568	542
569	543	UINT8 data = M6801_MODE_7;
570	544
571	545	// NET RXD
572		data \|= m_rxd << 3;
	546	data \|= m_adamnet->rxd_r() << 3;
573	547
574	548	return data;
575	549	}
576	550
577	551
578	552	//-------------------------------------------------
579		// m~~aster~~6801_p2_w -
	553	// m6801_p2_w -
580	554	//-------------------------------------------------
581	555
582		WRITE8_MEMBER( adam_state::m~~aster~~6801_p2_w )
	556	WRITE8_MEMBER( adam_state::m6801_p2_w )
583	557	{
584	558	/*
585	559
586		bit description
	560	bit description
587	561
588		0 _DMA
589		1
590		2 _BWR
591		3
592		4 NET TXD
	562	0 _DMA
	563	1
	564	2 _BWR
	565	3
	566	4 NET TXD
593	567
594		*/
	568	*/
595	569
596	570	// DMA
597	571	m_dma = BIT(data, 0);
r18894	r18895
600	574	m_bwr = BIT(data, 2);
601	575
602	576	// NET TXD
603		adamnet_txd_w(~~ADAMNET_MASTER,~~ BIT(data, 4));
	577	m_adamnet->txd_w(BIT(data, 4));
604	578	}
605	579
606	580
607	581	//-------------------------------------------------
608		// m~~aster~~6801_p3_r -
	582	// m6801_p3_r -
609	583	//-------------------------------------------------
610	584
611		READ8_MEMBER( adam_state::m~~aster~~6801_p3_r )
	585	READ8_MEMBER( adam_state::m6801_p3_r )
612	586	{
613	587	/*
614	588
615		bit description
	589	bit description
616	590
617		0 BD0
618		1 BD1
619		2 BD2
620		3 BD3
621		4 BD4
622		5 BD5
623		6 BD6
624		7 BD7
	591	0 BD0
	592	1 BD1
	593	2 BD2
	594	3 BD3
	595	4 BD4
	596	5 BD5
	597	6 BD6
	598	7 BD7
625	599
626		*/
	600	*/
627	601
628	602	return m_data_out;
629	603	}
630	604
631	605
632	606	//-------------------------------------------------
633		// m~~aster~~6801_p3_w -
	607	// m6801_p3_w -
634	608	//-------------------------------------------------
635	609
636		WRITE8_MEMBER( adam_state::m~~aster~~6801_p3_w )
	610	WRITE8_MEMBER( adam_state::m6801_p3_w )
637	611	{
638	612	/*
639	613
640		bit description
	614	bit description
641	615
642		0 BD0
643		1 BD1
644		2 BD2
645		3 BD3
646		4 BD4
647		5 BD5
648		6 BD6
649		7 BD7
	616	0 BD0
	617	1 BD1
	618	2 BD2
	619	3 BD3
	620	4 BD4
	621	5 BD5
	622	6 BD6
	623	7 BD7
650	624
651		*/
	625	*/
652	626
653	627	m_data_in = data;
654	628	}
655	629
656	630
657	631	//-------------------------------------------------
658		// m~~aster~~6801_p4_w -
	632	// m6801_p4_w -
659	633	//-------------------------------------------------
660	634
661		WRITE8_MEMBER( adam_state::m~~aster~~6801_p4_w )
	635	WRITE8_MEMBER( adam_state::m6801_p4_w )
662	636	{
663	637	/*
664	638
665		bit description
	639	bit description
666	640
667		0 BA0
668		1 BA1
669		2 BA2
670		3 BA3
671		4 BA4
672		5 BA5
673		6 BA6
674		7 BA7
	641	0 BA0
	642	1 BA1
	643	2 BA2
	644	3 BA3
	645	4 BA4
	646	5 BA5
	647	6 BA6
	648	7 BA7
675	649
676		*/
	650	*/
677	651
678	652	m_ba = (m_ba & 0xff00) \| data;
679	653	}
680	654
681	655
682		//-------------------------------------------------
683		// kb6801_p1_r -
684		//-------------------------------------------------
685	656
686		READ8_MEMBER( adam_state::kb6801_p1_r )
687		{
688		/*
689
690		bit description
691
692		0 X0
693		1 X1
694		2 X2
695		3 X3
696		4 X4
697		5 X5
698		6 X6
699		7 X7
700
701		*/
702
703		UINT8 data = 0xff;
704
705		if (!BIT(m_key_y, 0)) data &= ioport("Y0")->read();
706		if (!BIT(m_key_y, 1)) data &= ioport("Y1")->read();
707		if (!BIT(m_key_y, 2)) data &= ioport("Y2")->read();
708		if (!BIT(m_key_y, 3)) data &= ioport("Y3")->read();
709		if (!BIT(m_key_y, 4)) data &= ioport("Y4")->read();
710		if (!BIT(m_key_y, 5)) data &= ioport("Y5")->read();
711		if (!BIT(m_key_y, 6)) data &= ioport("Y6")->read();
712		if (!BIT(m_key_y, 7)) data &= ioport("Y7")->read();
713		if (!BIT(m_key_y, 8)) data &= ioport("Y8")->read();
714		if (!BIT(m_key_y, 9)) data &= ioport("Y9")->read();
715		if (!BIT(m_key_y, 10)) data &= ioport("Y10")->read();
716		if (!BIT(m_key_y, 11)) data &= ioport("Y11")->read();
717		if (!BIT(m_key_y, 12)) data &= ioport("Y12")->read();
718
719		return data;
720		}
721
722
723		//-------------------------------------------------
724		// kb6801_p2_r -
725		//-------------------------------------------------
726
727		READ8_MEMBER( adam_state::kb6801_p2_r )
728		{
729		/*
730
731		bit description
732
733		0 mode bit 0
734		1 mode bit 1
735		2 mode bit 2
736		3 NET RXD
737		4 NET TXD
738
739		*/
740
741		UINT8 data = M6801_MODE_7;
742
743		// NET RXD
744		data \|= m_rxd << 3;
745
746		return data;
747		}
748
749
750		//-------------------------------------------------
751		// kb6801_p2_w -
752		//-------------------------------------------------
753
754		WRITE8_MEMBER( adam_state::kb6801_p2_w )
755		{
756		/*
757
758		bit description
759
760		0 mode bit 0
761		1 mode bit 1
762		2 mode bit 2
763		3 NET RXD
764		4 NET TXD
765
766		*/
767
768		adamnet_txd_w(ADAMNET_KEYBOARD, BIT(data, 4));
769		}
770
771
772		//-------------------------------------------------
773		// kb6801_p3_r -
774		//-------------------------------------------------
775
776		READ8_MEMBER( adam_state::kb6801_p3_r )
777		{
778		return 0xff;
779		}
780
781
782		//-------------------------------------------------
783		// kb6801_p3_w -
784		//-------------------------------------------------
785
786		WRITE8_MEMBER( adam_state::kb6801_p3_w )
787		{
788		/*
789
790		bit description
791
792		0 Y0
793		1 Y1
794		2 Y2
795		3 Y3
796		4 Y4
797		5 Y5
798		6 Y6
799		7 Y7
800
801		*/
802
803		m_key_y = (m_key_y & 0x1f00) \| data;
804		}
805
806
807		//-------------------------------------------------
808		// kb6801_p4_r -
809		//-------------------------------------------------
810
811		READ8_MEMBER( adam_state::kb6801_p4_r )
812		{
813		return 0xff;
814		}
815
816
817		//-------------------------------------------------
818		// kb6801_p4_w -
819		//-------------------------------------------------
820
821		WRITE8_MEMBER( adam_state::kb6801_p4_w )
822		{
823		/*
824
825		bit description
826
827		0 Y8
828		1 Y9
829		2 Y10
830		3 Y11
831		4 Y12
832		5
833		6
834		7
835
836		*/
837
838		m_key_y = ((data & 0x1f) << 8) \| (m_key_y & 0xff);
839		}
840
841
842		//-------------------------------------------------
843		// ddp6801_p1_w -
844		//-------------------------------------------------
845
846		WRITE8_MEMBER( adam_state::ddp6801_p1_w )
847		{
848		/*
849
850		bit description
851
852		0 SPD SEL (0=20 ips, 1=80ips)
853		1 STOP0
854		2 STOP1
855		3 _GO FWD
856		4 _GO REV
857		5 BRAKE
858		6 _WR0
859		7 _WR1
860
861		*/
862
863		if(m_ddp0->exists())
864		{
865		m_ddp0->set_speed(BIT(data, 0) ? (double) 80/1.875 : 20/1.875); // speed select
866		if(!(data & 0x08)) m_ddp0->go_forward();
867		if(!(data & 0x10)) m_ddp0->go_reverse();
868		m_ddp0->change_state(BIT(data, 1) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR); // motor control
869		}
870
871		if(m_ddp1->exists())
872		{
873		m_ddp1->set_speed(BIT(data, 0) ? (double) 80/1.875 : 20/1.875); // speed select
874		if(!(data & 0x08)) m_ddp1->go_forward();
875		if(!(data & 0x10)) m_ddp1->go_reverse();
876		m_ddp1->change_state(BIT(data, 2) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR); // motor control
877		}
878
879		// data write 0
880		m_wr0 = BIT(data, 6);
881
882		// data write 1
883		m_wr1 = BIT(data, 7);
884		}
885
886
887		//-------------------------------------------------
888		// ddp6801_p2_r -
889		//-------------------------------------------------
890
891		READ8_MEMBER( adam_state::ddp6801_p2_r )
892		{
893		/*
894
895		bit description
896
897		0 mode bit 0
898		1 mode bit 1 / CIP1
899		2 mode bit 2
900		3 NET RXD
901		4
902
903		*/
904
905		UINT8 data = 0;
906
907		if (m_reset)
908		data \|= M6801_MODE_6;
909		else
910		data \|= m_ddp1->exists() << 1; // Cassette in place 1
911
912		// NET RXD
913		data \|= m_rxd << 3;
914
915		return data;
916		}
917
918
919		//-------------------------------------------------
920		// ddp6801_p2_w -
921		//-------------------------------------------------
922
923		WRITE8_MEMBER( adam_state::ddp6801_p2_w )
924		{
925		/*
926
927		bit description
928
929		0 WRT DATA
930		1
931		2 TRACK A/B (0=B, 1=A)
932		3
933		4 NET TXD
934
935		*/
936
937		if(m_ddp0->exists())
938		{
939		m_ddp0->set_channel(!BIT(data, 2)); // Track select
940		if (!m_wr0) m_ddp0->output(BIT(data, 0) ? 1.0 : -1.0); // write data
941		}
942
943		if(m_ddp1->exists())
944		{
945		m_ddp1->set_channel(!BIT(data, 2));
946		if (!m_wr1) m_ddp1->output(BIT(data, 0) ? 1.0 : -1.0);
947		}
948
949		// NET TXD
950		adamnet_txd_w(ADAMNET_DDP, BIT(data, 4));
951		}
952
953		//-------------------------------------------------
954		// ddp6801_p4_r -
955		//-------------------------------------------------
956
957		READ8_MEMBER( adam_state::ddp6801_p4_r )
958		{
959		/*
960
961		bit description
962
963		0 A8
964		1 A9
965		2 A10 (2114 _S)
966		3 MSENSE 0
967		4 MSENSE 1
968		5 CIP0
969		6 RD DATA 0 (always 1)
970		7 RD DATA 1 (data from drives ORed together)
971
972		*/
973
974		UINT8 data = 0;
975
976		// drive 0
977		if(m_ddp0->exists())
978		{
979		data \|= ((m_ddp0->get_state() & CASSETTE_MASK_UISTATE) != CASSETTE_STOPPED) << 3; // motion sense
980		data \|= 1 << 5; // cassette in place
981		data \|= (m_ddp0->input() < 0) << 7; // read data
982		}
983
984		// drive 1
985		if(m_ddp1->exists())
986		{
987		data \|= ((m_ddp1->get_state() & CASSETTE_MASK_UISTATE) != CASSETTE_STOPPED) << 4; // motion sense
988		data \|= (m_ddp1->input() < 0) << 7; // read data
989		}
990
991		// read data 0 (always 1)
992		data \|= 0x40;
993
994		return data;
995		}
996
997
998		//-------------------------------------------------
999		// printer6801_p1_w -
1000		//-------------------------------------------------
1001
1002		WRITE8_MEMBER( adam_state::printer6801_p1_w )
1003		{
1004		/*
1005
1006		bit description
1007
1008		0 M2 phase D
1009		1 M2 phase B
1010		2 M2 phase C
1011		3 M2 phase A
1012		4 M3 phase B
1013		5 M3 phase D
1014		6 M3 phase A
1015		7 M3 phase C
1016
1017		*/
1018		}
1019
1020
1021		//-------------------------------------------------
1022		// printer6801_p2_r -
1023		//-------------------------------------------------
1024
1025		READ8_MEMBER( adam_state::printer6801_p2_r )
1026		{
1027		/*
1028
1029		bit description
1030
1031		0 mode bit 0
1032		1 mode bit 1
1033		2 mode bit 2
1034		3 NET RXD
1035		4 NET TXD
1036
1037		*/
1038
1039		UINT8 data = M6801_MODE_7;
1040
1041		// NET RXD
1042		data \|= m_rxd << 3;
1043
1044		return data;
1045		}
1046
1047
1048		//-------------------------------------------------
1049		// printer6801_p2_w -
1050		//-------------------------------------------------
1051
1052		WRITE8_MEMBER( adam_state::printer6801_p2_w )
1053		{
1054		/*
1055
1056		bit description
1057
1058		0 mode bit 0
1059		1 mode bit 1
1060		2 mode bit 2
1061		3 NET RXD
1062		4 NET TXD
1063
1064		*/
1065
1066		adamnet_txd_w(ADAMNET_PRINTER, BIT(data, 4));
1067		}
1068
1069
1070		//-------------------------------------------------
1071		// printer6801_p3_r -
1072		//-------------------------------------------------
1073
1074		READ8_MEMBER( adam_state::printer6801_p3_r )
1075		{
1076		return 0xff;
1077		}
1078
1079
1080		//-------------------------------------------------
1081		// printer6801_p4_r -
1082		//-------------------------------------------------
1083
1084		READ8_MEMBER( adam_state::printer6801_p4_r )
1085		{
1086		/*
1087
1088		bit description
1089
1090		0
1091		1
1092		2
1093		3
1094		4 left margin
1095		5 platen detent
1096		6 wheel home
1097		7 self-test
1098
1099		*/
1100
1101		return 0x80;
1102		}
1103
1104
1105		//-------------------------------------------------
1106		// printer6801_p4_w -
1107		//-------------------------------------------------
1108
1109		WRITE8_MEMBER( adam_state::printer6801_p4_w )
1110		{
1111		/*
1112
1113		bit description
1114
1115		0 print hammer solenoid
1116		1 ribbon advance solenoid
1117		2 platen motor advance
1118		3 platen motor break
1119		4
1120		5
1121		6
1122		7
1123
1124		*/
1125		}
1126
1127
1128		//-------------------------------------------------
1129		// fdc6801_p1_r -
1130		//-------------------------------------------------
1131
1132		READ8_MEMBER( adam_state::fdc6801_p1_r )
1133		{
1134		/*
1135
1136		bit description
1137
1138		0 disk in place
1139		1
1140		2 FDC DRQ
1141		3
1142		4
1143		5
1144		6
1145		7 SW3 (0=DS1, 1=DS2)
1146
1147		*/
1148
1149		UINT8 data = 0x01;
1150
1151		// floppy data request
1152		data \|= wd17xx_drq_r(m_fdc) << 2;
1153
1154		return data;
1155		}
1156
1157
1158		//-------------------------------------------------
1159		// fdc6801_p1_w -
1160		//-------------------------------------------------
1161
1162		WRITE8_MEMBER( adam_state::fdc6801_p1_w )
1163		{
1164		/*
1165
1166		bit description
1167
1168		0
1169		1 FDC ENP
1170		2
1171		3 FDC _DDEN
1172		4
1173		5 DRIVE SELECT
1174		6 MOTOR ON
1175		7
1176
1177		*/
1178
1179		// density select
1180		wd17xx_dden_w(m_fdc, BIT(data, 3));
1181
1182		// motor enable
1183		floppy_mon_w(m_floppy0, !BIT(data, 6));
1184		floppy_drive_set_ready_state(m_floppy0, 1, 1);
1185		}
1186
1187
1188		//-------------------------------------------------
1189		// fdc6801_p2_r -
1190		//-------------------------------------------------
1191
1192		READ8_MEMBER( adam_state::fdc6801_p2_r )
1193		{
1194		/*
1195
1196		bit description
1197
1198		0 mode bit 0
1199		1 mode bit 1
1200		2 mode bit 2
1201		3 NET RXD
1202		4
1203
1204		*/
1205
1206		UINT8 data = M6801_MODE_2;
1207
1208		// NET RXD
1209		data \|= m_rxd << 3;
1210
1211		return data;
1212		}
1213
1214
1215		//-------------------------------------------------
1216		// fdc6801_p2_w -
1217		//-------------------------------------------------
1218
1219		WRITE8_MEMBER( adam_state::fdc6801_p2_w )
1220		{
1221		/*
1222
1223		bit description
1224
1225		0
1226		1
1227		2
1228		3
1229		4 NET TXD
1230
1231		*/
1232
1233		adamnet_txd_w(ADAMNET_FDC, BIT(data, 4));
1234		}
1235
1236
1237		//-------------------------------------------------
1238		// fdc6801_p4_w -
1239		//-------------------------------------------------
1240
1241		WRITE8_MEMBER( adam_state::fdc6801_p4_w )
1242		{
1243		/*
1244
1245		bit description
1246
1247		0 A8
1248		1 A9
1249		2 A10
1250		3 A11
1251		4 _WE
1252		5 FDC CA0
1253		6 FDC CA1
1254		7 chip select logic?
1255
1256		*/
1257		}
1258
1259
1260
1261	657	//**************************************************************************
1262	658	// PADDLES
1263	659	//**************************************************************************
r18894	r18895
1333	729
1334	730	static ADDRESS_MAP_START( adam_io, AS_IO, 8, adam_state )
1335	731	ADDRESS_MAP_GLOBAL_MASK(0xff)
1336		// AM_RANGE(0x1e, 0x1e) Optional Auto Dialer
1337	732	AM_RANGE(0x20, 0x20) AM_MIRROR(0x1f) AM_READWRITE(adamnet_r, adamnet_w)
1338		// AM_RANGE(0x40, 0x40) Printer Data
1339		// AM_RANGE(0x42, 0x42) Expansion RAM Page Select
1340		// AM_RANGE(0x52, 0x52) Adam Resident Debugger ?
1341		// AM_RANGE(0x54, 0x54) Adam Resident Debugger ?
1342		// AM_RANGE(0x55, 0x55) Adam Resident Debugger ?
1343		// AM_RANGE(0x5e, 0x5e) Optional Modem Data I/O
1344		// AM_RANGE(0x5f, 0x5f) Optional Modem Control Status
1345	733	AM_RANGE(0x60, 0x60) AM_MIRROR(0x1f) AM_READWRITE(mioc_r, mioc_w)
1346	734	AM_RANGE(0x80, 0x80) AM_MIRROR(0x1f) AM_WRITE(paddle_w)
1347	735	AM_RANGE(0xa0, 0xa0) AM_MIRROR(0x1e) AM_DEVREADWRITE(TMS9928A_TAG, tms9928a_device, vram_read, vram_write)
r18894	r18895
1354	742
1355	743
1356	744	//-------------------------------------------------
1357		// ADDRESS_MAP( m~~aster~~6801_mem )
	745	// ADDRESS_MAP( m6801_mem )
1358	746	//-------------------------------------------------
1359	747
1360		static ADDRESS_MAP_START( m~~aster~~6801_mem, AS_PROGRAM, 8, adam_state )
	748	static ADDRESS_MAP_START( m6801_mem, AS_PROGRAM, 8, adam_state )
1361	749	AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
1362	750	AM_RANGE(0x0080, 0x00ff) AM_RAM
1363		AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_~~MAIN_~~TAG, 0)
	751	AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_TAG, 0)
1364	752	ADDRESS_MAP_END
1365	753
1366	754
1367	755	//-------------------------------------------------
1368		// ADDRESS_MAP( m~~aster~~6801_io )
	756	// ADDRESS_MAP( m6801_io )
1369	757	//-------------------------------------------------
1370	758
1371		static ADDRESS_MAP_START( master6801_io, AS_IO, 8, adam_state )
1372		AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(master6801_p1_w)
1373		AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(master6801_p2_r, master6801_p2_w)
1374		AM_RANGE(M6801_PORT3, M6801_PORT3) AM_READWRITE(master6801_p3_r, master6801_p3_w)
1375		AM_RANGE(M6801_PORT4, M6801_PORT4) AM_WRITE(master6801_p4_w)
	759	static ADDRESS_MAP_START( m6801_io, AS_IO, 8, adam_state )
	760	AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(m6801_p1_w)
	761	AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(m6801_p2_r, m6801_p2_w)
	762	AM_RANGE(M6801_PORT3, M6801_PORT3) AM_READWRITE(m6801_p3_r, m6801_p3_w)
	763	AM_RANGE(M6801_PORT4, M6801_PORT4) AM_WRITE(m6801_p4_w)
1376	764	ADDRESS_MAP_END
1377	765
1378	766
1379		//-------------------------------------------------
1380		// ADDRESS_MAP( kb6801_mem )
1381		//-------------------------------------------------
1382	767
1383		static ADDRESS_MAP_START( kb6801_mem, AS_PROGRAM, 8, adam_state )
1384		AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
1385		AM_RANGE(0x0080, 0x00ff) AM_RAM
1386		AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_KB_TAG, 0)
1387		ADDRESS_MAP_END
1388
1389
1390		//-------------------------------------------------
1391		// ADDRESS_MAP( kb6801_io )
1392		//-------------------------------------------------
1393
1394		static ADDRESS_MAP_START( kb6801_io, AS_IO, 8, adam_state )
1395		AM_RANGE(M6801_PORT1, M6801_PORT1) AM_READ(kb6801_p1_r)
1396		AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(kb6801_p2_r, kb6801_p2_w)
1397		AM_RANGE(M6801_PORT3, M6801_PORT3) AM_READWRITE(kb6801_p3_r, kb6801_p3_w)
1398		AM_RANGE(M6801_PORT4, M6801_PORT4) AM_READWRITE(kb6801_p4_r, kb6801_p4_w)
1399		ADDRESS_MAP_END
1400
1401
1402		//-------------------------------------------------
1403		// ADDRESS_MAP( ddp6801_mem )
1404		//-------------------------------------------------
1405
1406		static ADDRESS_MAP_START( ddp6801_mem, AS_PROGRAM, 8, adam_state )
1407		AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
1408		AM_RANGE(0x0080, 0x00ff) AM_RAM
1409		AM_RANGE(0x0400, 0x07ff) AM_RAM
1410		AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_DDP_TAG, 0)
1411		ADDRESS_MAP_END
1412
1413
1414		//-------------------------------------------------
1415		// ADDRESS_MAP( ddp6801_io )
1416		//-------------------------------------------------
1417
1418		static ADDRESS_MAP_START( ddp6801_io, AS_IO, 8, adam_state )
1419		AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(ddp6801_p1_w)
1420		AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(ddp6801_p2_r, ddp6801_p2_w)
1421		AM_RANGE(M6801_PORT3, M6801_PORT3) AM_NOP // Multiplexed Address/Data
1422		AM_RANGE(M6801_PORT4, M6801_PORT4) AM_READ(ddp6801_p4_r)
1423		ADDRESS_MAP_END
1424
1425
1426		//-------------------------------------------------
1427		// ADDRESS_MAP( printer6801_mem )
1428		//-------------------------------------------------
1429
1430		static ADDRESS_MAP_START( printer6801_mem, AS_PROGRAM, 8, adam_state )
1431		AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
1432		AM_RANGE(0x0080, 0x00ff) AM_RAM
1433		AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_PRN_TAG, 0)
1434		ADDRESS_MAP_END
1435
1436
1437		//-------------------------------------------------
1438		// ADDRESS_MAP( printer6801_io )
1439		//-------------------------------------------------
1440
1441		static ADDRESS_MAP_START( printer6801_io, AS_IO, 8, adam_state )
1442		AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(printer6801_p1_w)
1443		AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(printer6801_p2_r, printer6801_p2_w)
1444		AM_RANGE(M6801_PORT3, M6801_PORT3) AM_READ(printer6801_p3_r)
1445		AM_RANGE(M6801_PORT4, M6801_PORT4) AM_READWRITE(printer6801_p4_r, printer6801_p4_w)
1446		ADDRESS_MAP_END
1447
1448
1449		//-------------------------------------------------
1450		// ADDRESS_MAP( fdc6801_mem )
1451		//-------------------------------------------------
1452
1453		static ADDRESS_MAP_START( fdc6801_mem, AS_PROGRAM, 8, adam_state )
1454		AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
1455		AM_RANGE(0x0080, 0x00ff) AM_RAM
1456		AM_RANGE(0x0400, 0x07ff) AM_RAM AM_WRITEONLY AM_SHARE("fdc_ram")
1457		AM_RANGE(0x0800, 0x0800) AM_MIRROR(0xff) AM_DEVREAD_LEGACY(WD2793_TAG, wd17xx_status_r)
1458		AM_RANGE(0x1400, 0x17ff) AM_RAM AM_READONLY AM_SHARE("fdc_ram")
1459		AM_RANGE(0x1800, 0x1800) AM_MIRROR(0xff) AM_DEVWRITE_LEGACY(WD2793_TAG, wd17xx_command_w)
1460		AM_RANGE(0x2800, 0x2800) AM_MIRROR(0xff) AM_DEVREAD_LEGACY(WD2793_TAG, wd17xx_track_r)
1461		AM_RANGE(0x3800, 0x3800) AM_MIRROR(0xff) AM_DEVWRITE_LEGACY(WD2793_TAG, wd17xx_track_w)
1462		AM_RANGE(0x4800, 0x4800) AM_MIRROR(0xff) AM_DEVREAD_LEGACY(WD2793_TAG, wd17xx_sector_r)
1463		AM_RANGE(0x5800, 0x5800) AM_MIRROR(0xff) AM_DEVWRITE_LEGACY(WD2793_TAG, wd17xx_sector_w)
1464		AM_RANGE(0x6800, 0x6800) AM_MIRROR(0xff) AM_DEVREAD_LEGACY(WD2793_TAG, wd17xx_data_r)
1465		AM_RANGE(0x7800, 0x7800) AM_MIRROR(0xff) AM_DEVWRITE_LEGACY(WD2793_TAG, wd17xx_data_w)
1466		AM_RANGE(0x8000, 0x8fff) AM_MIRROR(0x7000) AM_ROM AM_REGION(M6801_FDC_TAG, 0)
1467		ADDRESS_MAP_END
1468
1469
1470		//-------------------------------------------------
1471		// ADDRESS_MAP( fdc6801_io )
1472		//-------------------------------------------------
1473
1474		static ADDRESS_MAP_START( fdc6801_io, AS_IO, 8, adam_state )
1475		AM_RANGE(M6801_PORT1, M6801_PORT1) AM_READWRITE(fdc6801_p1_r, fdc6801_p1_w)
1476		AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(fdc6801_p2_r, fdc6801_p2_w)
1477		AM_RANGE(M6801_PORT3, M6801_PORT3)
1478		AM_RANGE(M6801_PORT4, M6801_PORT4) AM_WRITE(fdc6801_p4_w)
1479		ADDRESS_MAP_END
1480
1481
1482
1483	768	//**************************************************************************
1484		// INPUT PORTS
1485		//**************************************************************************
1486
1487		//-------------------------------------------------
1488		// INPUT_PORTS( adam )
1489		//-------------------------------------------------
1490
1491		static INPUT_PORTS_START( adam )
1492		PORT_START("Y0")
1493		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("WILD CARD") PORT_CODE(KEYCODE_F7)
1494		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("I") PORT_CODE(KEYCODE_F1)
1495		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("II") PORT_CODE(KEYCODE_F2)
1496		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("III") PORT_CODE(KEYCODE_F3)
1497		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("IV") PORT_CODE(KEYCODE_F4)
1498		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("V") PORT_CODE(KEYCODE_F5)
1499		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("VI") PORT_CODE(KEYCODE_F6)
1500		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UNDO") PORT_CODE(KEYCODE_F8)
1501
1502		PORT_START("Y1")
1503		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
1504		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
1505		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
1506		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
1507		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
1508		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('_')
1509		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
1510		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*')
1511
1512		PORT_START("Y2")
1513		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t')
1514		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
1515		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
1516		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
1517		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
1518		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
1519		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
1520		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
1521
1522		PORT_START("Y3")
1523		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
1524		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
1525		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
1526		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
1527		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
1528		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
1529		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
1530		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
1531
1532		PORT_START("Y4")
1533		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
1534		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
1535		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
1536		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
1537		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
1538		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
1539		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
1540		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')
1541
1542		PORT_START("Y5")
1543		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(')
1544		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
1545		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('\'')
1546		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('+') PORT_CHAR('=')
1547		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('^') PORT_CHAR('~')
1548		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
1549		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':')
1550		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('\"')
1551
1552		PORT_START("Y6")
1553		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
1554		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
1555		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
1556		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{')
1557		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
1558		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
1559		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
1560		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
1561
1562		PORT_START("Y7")
1563		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('\|')
1564		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("ESCAPE/WP") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC))
1565		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
1566		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
1567		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
1568		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("MOVE/COPY") PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT))
1569		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("STORE/GET") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME))
1570		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CLEAR") PORT_CODE(KEYCODE_PGUP) PORT_CHAR(UCHAR_MAMEKEY(PGUP))
1571
1572		PORT_START("Y8")
1573		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
1574		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
1575		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
1576		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
1577		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("BACKSPACE") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
1578		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("INSERT") PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL))
1579		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("PRINT") PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(END))
1580		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("DELETE") PORT_CODE(KEYCODE_PGDN) PORT_CHAR(UCHAR_MAMEKEY(PGDN))
1581
1582		PORT_START("Y9")
1583		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CONTROL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
1584		PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
1585
1586		PORT_START("Y10")
1587		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
1588		PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
1589
1590		PORT_START("Y11")
1591		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("LOCK") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
1592		PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
1593
1594		PORT_START("Y12")
1595		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("HOME") PORT_CODE(KEYCODE_F9)
1596		PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
1597
1598		PORT_INCLUDE( coleco )
1599		INPUT_PORTS_END
1600
1601
1602
1603		//**************************************************************************
1604	769	// DEVICE CONFIGURATION
1605	770	//**************************************************************************
1606	771
1607	772	//-------------------------------------------------
1608		// TMS9928a_~~interface~~ ~~tms9928a~~_interf~~ace~~
	773	// TMS9928A_INTERFACE( vdc_intf )
1609	774	//-------------------------------------------------
1610	775
1611		WRITE_LINE_MEMBER( adam_state::~~adam_~~vdp_int~~errupt~~ )
	776	WRITE_LINE_MEMBER( adam_state::vdc_int_w )
1612	777	{
1613	778	if (state && !m_vdp_nmi)
1614	779	{
r18894	r18895
1618	783	m_vdp_nmi = state;
1619	784	}
1620	785
1621		static TMS9928A_INTERFACE(vcd_intf)
	786	static TMS9928A_INTERFACE( vdc_intf )
1622	787	{
1623	788	SCREEN_TAG,
1624	789	0x4000,
1625		DEVCB_DRIVER_LINE_MEMBER(adam_state, ~~adam_~~vdp_int~~errupt~~)
	790	DEVCB_DRIVER_LINE_MEMBER(adam_state, vdc_int_w)
1626	791	};
1627	792
1628		//-------------------------------------------------
1629		// cassette_interface adam_cassette_interface
1630		//-------------------------------------------------
1631	793
1632		static const struct CassetteOptions adam_cassette_options =
1633		{
1634		2, /* channels */
1635		16, /* bits per sample */
1636		44100 /* sample frequency */
1637		};
1638
1639		static const cassette_interface adam_cassette_interface =
1640		{
1641		coleco_adam_cassette_formats,
1642		&adam_cassette_options,
1643		(cassette_state)(CASSETTE_PLAY \| CASSETTE_MOTOR_DISABLED \| CASSETTE_SPEAKER_MUTED),
1644		"adam_cass",
1645		NULL
1646		};
1647
1648
1649	794	//-------------------------------------------------
1650		// wd17xx_interface fdc_intf
1651		//-------------------------------------------------
1652
1653		static LEGACY_FLOPPY_OPTIONS_START( adam )
1654		LEGACY_FLOPPY_OPTION( adam, "dsk", "Coleco Adam floppy disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
1655		HEADS([1])
1656		TRACKS([40])
1657		SECTORS([8])
1658		SECTOR_LENGTH([512])
1659		FIRST_SECTOR_ID([0]))
1660		LEGACY_FLOPPY_OPTIONS_END
1661
1662		static const floppy_interface adam_floppy_interface =
1663		{
1664		DEVCB_NULL,
1665		DEVCB_NULL,
1666		DEVCB_NULL,
1667		DEVCB_NULL,
1668		DEVCB_NULL,
1669		FLOPPY_STANDARD_5_25_SSDD,
1670		LEGACY_FLOPPY_OPTIONS_NAME(adam),
1671		"floppy_5_25",
1672		NULL
1673		};
1674
1675		static const wd17xx_interface fdc_intf =
1676		{
1677		DEVCB_NULL,
1678		DEVCB_CPU_INPUT_LINE(M6801_FDC_TAG, INPUT_LINE_NMI),
1679		DEVCB_NULL,
1680		{ FLOPPY_0, NULL, NULL, NULL }
1681		};
1682
1683
1684		//-------------------------------------------------
1685	795	// sn76496_config psg_intf
1686	796	//-------------------------------------------------
1687	797
1688	798	static const sn76496_config psg_intf =
1689	799	{
1690		DEVCB_NULL
	800	DEVCB_NULL // TODO Z80 RDY
1691	801	};
1692	802
1693	803
1694	804	//-------------------------------------------------
1695		// M6801_INTERFACE( m~~aster~~6801_intf )
	805	// M6801_INTERFACE( m6801_intf )
1696	806	//-------------------------------------------------
1697	807
1698	808	WRITE_LINE_MEMBER( adam_state::os3_w )
r18894	r18895
1717	827	}
1718	828	}
1719	829
1720		static M6801_INTERFACE( m~~aster~~6801_intf )
	830	static M6801_INTERFACE( m6801_intf )
1721	831	{
1722	832	DEVCB_DRIVER_LINE_MEMBER(adam_state, os3_w)
1723	833	};
r18894	r18895
1737	847	// state saving
1738	848	save_item(NAME(m_mioc));
1739	849	save_item(NAME(m_game));
1740		save_item(NAME(m_adamnet));
1741		save_item(NAME(m_txd));
1742		save_item(NAME(m_rxd));
1743		save_item(NAME(m_reset));
	850	save_item(NAME(m_an));
1744	851	save_item(NAME(m_ba));
1745	852	save_item(NAME(m_dma));
1746	853	save_item(NAME(m_bwr));
1747	854	save_item(NAME(m_data_in));
1748	855	save_item(NAME(m_data_out));
1749		save_item(NAME(m_key_y));
1750	856	save_item(NAME(m_joy_mode));
1751	857	save_item(NAME(m_joy_status0));
1752	858	save_item(NAME(m_joy_status1));
1753	859	save_item(NAME(m_vdp_nmi));
1754		save_item(NAME(m_wr0));
1755		save_item(NAME(m_wr1));
1756		save_item(NAME(m_track));
1757	860	}
1758	861
1759	862
r18894	r18895
1765	868	{
1766	869	device_image_interface image = dynamic_cast<device_image_interface >(machine().device("cart"));
1767	870
1768		if (image->exists())
	871	if (image->exists())
1769	872	{
1770	873	// game reset
1771	874	m_game = 1;
r18894	r18895
1778	881	m_mioc = 0;
1779	882	}
1780	883
1781		m_a~~dam~~net = 0;
	884	m_an = 0;
1782	885
1783	886	bankswitch();
	887
	888	m_maincpu->reset();
	889	m_netcpu->reset();
1784	890	}
1785	891
1786	892
r18894	r18895
1799	905	MCFG_CPU_PROGRAM_MAP(adam_mem)
1800	906	MCFG_CPU_IO_MAP(adam_io)
1801	907
1802		MCFG_CPU_ADD(M6801_MAIN_TAG, M6801, XTAL_4MHz)
1803		MCFG_CPU_PROGRAM_MAP(master6801_mem)
1804		MCFG_CPU_IO_MAP(master6801_io)
1805		MCFG_CPU_CONFIG(master6801_intf)
	908	MCFG_CPU_ADD(M6801_TAG, M6801, XTAL_4MHz)
	909	MCFG_CPU_PROGRAM_MAP(m6801_mem)
	910	MCFG_CPU_IO_MAP(m6801_io)
	911	MCFG_CPU_CONFIG(m6801_intf)
	912	MCFG_QUANTUM_PERFECT_CPU(M6801_TAG)
1806	913
1807		// keyboard
1808		MCFG_CPU_ADD(M6801_KB_TAG, M6801, XTAL_4MHz)
1809		MCFG_CPU_PROGRAM_MAP(kb6801_mem)
1810		MCFG_CPU_IO_MAP(kb6801_io)
1811
1812		// digital data pack
1813		MCFG_CPU_ADD(M6801_DDP_TAG, M6801, XTAL_4MHz)
1814		MCFG_CPU_PROGRAM_MAP(ddp6801_mem)
1815		MCFG_CPU_IO_MAP(ddp6801_io)
1816		MCFG_CASSETTE_ADD(CASSETTE_TAG, adam_cassette_interface)
1817		MCFG_CASSETTE_ADD(CASSETTE2_TAG, adam_cassette_interface)
1818
1819		// printer
1820		MCFG_CPU_ADD(M6801_PRN_TAG, M6801, XTAL_4MHz)
1821		MCFG_CPU_PROGRAM_MAP(printer6801_mem)
1822		MCFG_CPU_IO_MAP(printer6801_io)
1823		MCFG_DEVICE_DISABLE()
1824
1825		// floppy
1826		MCFG_CPU_ADD(M6801_FDC_TAG, M6801, XTAL_4MHz)
1827		MCFG_CPU_PROGRAM_MAP(fdc6801_mem)
1828		MCFG_CPU_IO_MAP(fdc6801_io)
1829		MCFG_WD2793_ADD(WD2793_TAG, fdc_intf)
1830		MCFG_LEGACY_FLOPPY_DRIVE_ADD(FLOPPY_0, adam_floppy_interface)
1831
1832		// serial port interface
1833		MCFG_CPU_ADD(M6801_SPI_TAG, M6801, XTAL_4MHz)
1834		MCFG_DEVICE_DISABLE()
1835
1836	914	// video hardware
1837		MCFG_TMS9928A_ADD(TMS9928A_TAG, TMS9928A, vcd_intf)
	915	MCFG_TMS9928A_ADD(TMS9928A_TAG, TMS9928A, vdc_intf)
1838	916	MCFG_TMS9928A_SCREEN_ADD_NTSC(SCREEN_TAG)
1839	917	MCFG_SCREEN_UPDATE_DEVICE(TMS9928A_TAG, tms9928a_device, screen_update)
1840	918
r18894	r18895
1842	920	MCFG_SPEAKER_STANDARD_MONO("mono")
1843	921	MCFG_SOUND_ADD(SN76489A_TAG, SN76489A, XTAL_7_15909MHz/2)
1844	922	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
1845		MCFG_SOUND_CONFIG(psg_intf)
	923	MCFG_SOUND_CONFIG(psg_intf)
1846	924
1847	925	// devices
	926	MCFG_ADAMNET_BUS_ADD()
	927	MCFG_ADAMNET_SLOT_ADD("an1", adamnet_devices, "kb", NULL)
	928	MCFG_ADAMNET_SLOT_ADD("an2", adamnet_devices, "prn", NULL)
	929	MCFG_ADAMNET_SLOT_ADD("an3", adamnet_devices, "ddp", NULL)
	930	MCFG_ADAMNET_SLOT_ADD("an4", adamnet_devices, "fdc", NULL)
	931	MCFG_ADAMNET_SLOT_ADD("an5", adamnet_devices, NULL, NULL)
	932	MCFG_ADAMNET_SLOT_ADD("an6", adamnet_devices, NULL, NULL)
	933	MCFG_ADAMNET_SLOT_ADD("an7", adamnet_devices, NULL, NULL)
	934	MCFG_ADAMNET_SLOT_ADD("an8", adamnet_devices, NULL, NULL)
	935	MCFG_ADAMNET_SLOT_ADD("an9", adamnet_devices, NULL, NULL)
	936	MCFG_ADAMNET_SLOT_ADD("an10", adamnet_devices, NULL, NULL)
	937	MCFG_ADAMNET_SLOT_ADD("an11", adamnet_devices, NULL, NULL)
	938	MCFG_ADAMNET_SLOT_ADD("an12", adamnet_devices, NULL, NULL)
	939	MCFG_ADAMNET_SLOT_ADD("an13", adamnet_devices, NULL, NULL)
	940	MCFG_ADAMNET_SLOT_ADD("an14", adamnet_devices, NULL, NULL)
	941	MCFG_ADAMNET_SLOT_ADD("an15", adamnet_devices, NULL, NULL)
	942
1848	943	MCFG_TIMER_DRIVER_ADD_PERIODIC("paddles", adam_state, paddle_tick, attotime::from_msec(20))
1849	944
1850	945	// cartridge
r18894	r18895
1892	987	ROM_LOAD( "alf #3 rev 57 8534.u21", 0x4000, 0x2000, CRC(77657b90) SHA1(d25d32ab6c8fafbc21b4b925b3e644fa26d111f7) )
1893	988	ROM_LOAD( "eos 6 rev 57 08dd.u22", 0x8000, 0x2000, CRC(ef6403c5) SHA1(28c7616cd02e4286f9b4c1c4a8b8850832b49fcb) )
1894	989	ROM_CONTINUE( 0x6000, 0x2000 )
1895		ROM_LOAD( "wp_r80.rom", 0x0000, 0x8000, BAD_DUMP CRC(58d86a2a) SHA1(d4aec4efe1431e56fe52d83baf9118542c525255) ) // should be separate 8/16K ROMs
	990	ROM_LOAD( "wp_r80.rom", 0x0000, 0x8000, BAD_DUMP CRC(58d86a2a) SHA1(d4aec4efe1431e56fe52d83baf9118542c525255) ) // should be separate 8/16K ROMs
1896	991
	992	ROM_REGION( 0x800, M6801_TAG, 0 )
	993	ROM_LOAD( "master rev a 174b.u6", 0x000, 0x800, CRC(035a7a3d) SHA1(0426e6eaf18c2be9fe08066570c214ab5951ee14) )
	994
1897	995	ROM_REGION( 0x8000, "xrom", ROMREGION_ERASE00 )
1898	996	ROM_CART_LOAD( "xrom", 0x0000, 0x8000, ROM_NOMIRROR \| ROM_OPTIONAL )
1899	997
1900	998	ROM_REGION( 0x8000, "cart", 0 )
1901	999	ROM_CART_LOAD( "cart", 0x0000, 0x8000, ROM_NOMIRROR \| ROM_OPTIONAL )
1902
1903		ROM_REGION( 0x800, M6801_MAIN_TAG, 0 )
1904		ROM_LOAD( "master rev a 174b.u6", 0x000, 0x800, CRC(035a7a3d) SHA1(0426e6eaf18c2be9fe08066570c214ab5951ee14) )
1905
1906		ROM_REGION( 0x800, M6801_KB_TAG, 0 )
1907		ROM_LOAD( "keyboard.u2", 0x000, 0x800, CRC(ef204746) SHA1(83162ffc75847328a05429135b728a63efb05b93) )
1908
1909		ROM_REGION( 0x800, M6801_DDP_TAG, 0 )
1910		ROM_LOAD( "tape rev a 8865.u24", 0x000, 0x800, CRC(6b9ea1cf) SHA1(b970f11e8f443fa130fba02ad1f60da51bf89673) )
1911
1912		ROM_REGION( 0x800, M6801_PRN_TAG, 0 )
1913		ROM_LOAD( "printer.u2", 0x000, 0x800, CRC(e8db783b) SHA1(32b40679749ad0317c2c9ee9ca619fad6d850ce7) )
1914
1915		ROM_REGION( 0x1000, M6801_FDC_TAG, 0 )
1916		ROM_LOAD( "320ta.u10", 0x0000, 0x1000, CRC(dcd865b3) SHA1(dde583e0d18ce4406e9ea44ab34d083e73ee30e2) ) // 320KB DSDD
1917		ROM_LOAD( "pmhdfdc.u10", 0x0000, 0x1000, CRC(fed4006c) SHA1(bc8dd00dd5cde9500a4cd7dc1e4d74330184472a) ) // PowerMate High-Density
1918		ROM_LOAD( "ad31_reva.u10", 0x0000, 0x1000, CRC(4b0b7143) SHA1(1cb68891c3af80e99efad7e309136ca37244f060) ) // Coleco original 160KB SSDD
1919
1920		ROM_REGION( 0x800, M6801_SPI_TAG, 0 )
1921		ROM_LOAD( "spi.bin", 0x000, 0x800, CRC(4ba30352) SHA1(99fe5aebd505a208bea6beec5d7322b15426e9c1) )
1922	1000	ROM_END
1923	1001
1924	1002
r18894	r18895
1928	1006	//**************************************************************************
1929	1007
1930	1008	// YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS
1931		COMP( 1982, adam, 0, coleco, adam, ~~adam~~, driver_device, 0, "Coleco", "Adam", GAME_NOT_~~WORKING~~ )
	1009	COMP( 1982, adam, 0, coleco, adam, coleco, driver_device, 0, "Coleco", "Adam", GAME_SUPPORTS_SAVE )

trunk/src/mess/mess.mak
r18894	r18895
970	970	$(MESS_DRIVERS)/coleco.o \
971	971	$(MESS_MACHINE)/coleco.o \
972	972	$(MESS_DRIVERS)/adam.o \
	973	$(MESS_MACHINE)/adamnet.o \
	974	$(MESS_MACHINE)/adam_ddp.o \
	975	$(MESS_MACHINE)/adam_fdc.o \
	976	$(MESS_MACHINE)/adam_kb.o \
	977	$(MESS_MACHINE)/adam_prn.o \
	978	$(MESS_MACHINE)/adam_spi.o \
973	979
974	980	$(MESSOBJ)/cromemco.a: \
975	981	$(MESS_DRIVERS)/c10.o \

trunk/src/mess/machine/adam_fdc.c
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam floppy disk controller emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#include "adam_fdc.h"
	11
	12
	13
	14	//**************************************************************************
	15	// MACROS / CONSTANTS
	16	//**************************************************************************
	17
	18	#define M6801_TAG "u6"
	19	#define WD2793_TAG "u11"
	20
	21
	22
	23	//**************************************************************************
	24	// DEVICE DEFINITIONS
	25	//**************************************************************************
	26
	27	const device_type ADAM_FDC = &device_creator<adam_fdc_device>;
	28
	29
	30	//-------------------------------------------------
	31	// ROM( adam_fdc )
	32	//-------------------------------------------------
	33
	34	ROM_START( adam_fdc )
	35	ROM_REGION( 0x1000, M6801_TAG, 0 )
	36	ROM_DEFAULT_BIOS("ssdd")
	37	ROM_SYSTEM_BIOS( 0, "ssdd", "Coleco 160KB SSDD" )
	38	ROMX_LOAD( "ad31_reva.u10", 0x0000, 0x1000, CRC(4b0b7143) SHA1(1cb68891c3af80e99efad7e309136ca37244f060), ROM_BIOS(1) )
	39	ROM_SYSTEM_BIOS( 1, "dsdd", "320KB DSDD" )
	40	ROMX_LOAD( "320ta.u10", 0x0000, 0x1000, CRC(dcd865b3) SHA1(dde583e0d18ce4406e9ea44ab34d083e73ee30e2), ROM_BIOS(2) )
	41	ROM_SYSTEM_BIOS( 2, "pmhd", "Powermate High Density" )
	42	ROMX_LOAD( "pmhdfdc.u10", 0x0000, 0x1000, CRC(fed4006c) SHA1(bc8dd00dd5cde9500a4cd7dc1e4d74330184472a), ROM_BIOS(3) )
	43	ROM_END
	44
	45
	46	//-------------------------------------------------
	47	// rom_region - device-specific ROM region
	48	//-------------------------------------------------
	49
	50	const rom_entry *adam_fdc_device::device_rom_region() const
	51	{
	52	return ROM_NAME( adam_fdc );
	53	}
	54
	55
	56	//-------------------------------------------------
	57	// ADDRESS_MAP( fdc6801_mem )
	58	//-------------------------------------------------
	59
	60	static ADDRESS_MAP_START( adam_fdc_mem, AS_PROGRAM, 8, adam_fdc_device )
	61	AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
	62	AM_RANGE(0x0080, 0x00ff) AM_RAM
	63	AM_RANGE(0x0400, 0x07ff) AM_RAM AM_WRITEONLY AM_SHARE("ram")
	64	AM_RANGE(0x0800, 0x0800) AM_MIRROR(0xff) AM_DEVREAD(WD2793_TAG, wd2793_t, status_r)
	65	AM_RANGE(0x1400, 0x17ff) AM_RAM AM_READONLY AM_SHARE("ram")
	66	AM_RANGE(0x1800, 0x1800) AM_MIRROR(0xff) AM_DEVWRITE(WD2793_TAG, wd2793_t, cmd_w)
	67	AM_RANGE(0x2800, 0x2800) AM_MIRROR(0xff) AM_DEVREAD(WD2793_TAG, wd2793_t, track_r)
	68	AM_RANGE(0x3800, 0x3800) AM_MIRROR(0xff) AM_DEVWRITE(WD2793_TAG, wd2793_t, track_w)
	69	AM_RANGE(0x4800, 0x4800) AM_MIRROR(0xff) AM_DEVREAD(WD2793_TAG, wd2793_t, sector_r)
	70	AM_RANGE(0x5800, 0x5800) AM_MIRROR(0xff) AM_DEVWRITE(WD2793_TAG, wd2793_t, sector_w)
	71	AM_RANGE(0x6800, 0x6800) AM_MIRROR(0xff) AM_DEVREAD(WD2793_TAG, wd2793_t, data_r)
	72	AM_RANGE(0x7800, 0x7800) AM_MIRROR(0xff) AM_DEVWRITE(WD2793_TAG, wd2793_t, data_w)
	73	AM_RANGE(0x8000, 0x8fff) AM_MIRROR(0x7000) AM_ROM AM_REGION(M6801_TAG, 0)
	74	ADDRESS_MAP_END
	75
	76
	77	//-------------------------------------------------
	78	// ADDRESS_MAP( fdc6801_io )
	79	//-------------------------------------------------
	80
	81	static ADDRESS_MAP_START( adam_fdc_io, AS_IO, 8, adam_fdc_device )
	82	AM_RANGE(M6801_PORT1, M6801_PORT1) AM_READWRITE(p1_r, p1_w)
	83	AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(p2_r, p2_w)
	84	AM_RANGE(M6801_PORT3, M6801_PORT3) AM_WRITENOP
	85	AM_RANGE(M6801_PORT4, M6801_PORT4) AM_WRITENOP
	86	ADDRESS_MAP_END
	87
	88
	89	//-------------------------------------------------
	90	// floppy_format_type floppy_formats
	91	//-------------------------------------------------
	92
	93	void adam_fdc_device::fdc_intrq_w(bool state)
	94	{
	95	m_maincpu->set_input_line(INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE);
	96	}
	97
	98	const floppy_format_type adam_fdc_device::floppy_formats[] = {
	99	FLOPPY_ADAM_FORMAT, FLOPPY_MFM_FORMAT, FLOPPY_MFI_FORMAT,
	100	NULL
	101	};
	102
	103	static SLOT_INTERFACE_START( adam_fdc_floppies )
	104	SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
	105	SLOT_INTERFACE_END
	106
	107
	108	//-------------------------------------------------
	109	// MACHINE_DRIVER( adam_fdc )
	110	//-------------------------------------------------
	111
	112	static MACHINE_CONFIG_FRAGMENT( adam_fdc )
	113	MCFG_CPU_ADD(M6801_TAG, M6801, XTAL_4MHz)
	114	MCFG_CPU_PROGRAM_MAP(adam_fdc_mem)
	115	MCFG_CPU_IO_MAP(adam_fdc_io)
	116	MCFG_DEVICE_DISABLE() // TODO
	117
	118	MCFG_WD2793x_ADD(WD2793_TAG, XTAL_4MHz/4)
	119
	120	MCFG_FLOPPY_DRIVE_ADD(WD2793_TAG":0", adam_fdc_floppies, "525dd", 0, adam_fdc_device::floppy_formats)
	121	MACHINE_CONFIG_END
	122
	123
	124	//-------------------------------------------------
	125	// machine_config_additions - device-specific
	126	// machine configurations
	127	//-------------------------------------------------
	128
	129	machine_config_constructor adam_fdc_device::device_mconfig_additions() const
	130	{
	131	return MACHINE_CONFIG_NAME( adam_fdc );
	132	}
	133
	134
	135	//-------------------------------------------------
	136	// INPUT_PORTS( adam_fdc )
	137	//-------------------------------------------------
	138
	139	static INPUT_PORTS_START( adam_fdc )
	140	PORT_START("SW3")
	141	PORT_DIPNAME( 0x01, 0x00, "Drive Select" ) PORT_DIPLOCATION("SW3:1")
	142	PORT_DIPSETTING( 0x00, "DS1" )
	143	PORT_DIPSETTING( 0x01, "DS2" )
	144	INPUT_PORTS_END
	145
	146
	147	//-------------------------------------------------
	148	// input_ports - device-specific input ports
	149	//-------------------------------------------------
	150
	151	ioport_constructor adam_fdc_device::device_input_ports() const
	152	{
	153	return INPUT_PORTS_NAME( adam_fdc );
	154	}
	155
	156
	157
	158	//**************************************************************************
	159	// LIVE DEVICE
	160	//**************************************************************************
	161
	162	//-------------------------------------------------
	163	// adam_fdc_device - constructor
	164	//-------------------------------------------------
	165
	166	adam_fdc_device::adam_fdc_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
	167	: device_t(mconfig, ADAM_FDC, "Adam FDC", tag, owner, clock),
	168	device_adamnet_card_interface(mconfig, *this),
	169	m_maincpu(*this, M6801_TAG),
	170	m_fdc(*this, WD2793_TAG),
	171	m_floppy0(*this, WD2793_TAG":0"),
	172	m_ram(*this, "ram"),
	173	m_image0(NULL)
	174	{
	175	}
	176
	177
	178	//-------------------------------------------------
	179	// device_start - device-specific startup
	180	//-------------------------------------------------
	181
	182	void adam_fdc_device::device_start()
	183	{
	184	m_fdc->setup_intrq_cb(wd2793_t::line_cb(FUNC(adam_fdc_device::fdc_intrq_w), this));
	185	}
	186
	187
	188	//-------------------------------------------------
	189	// adamnet_reset_w -
	190	//-------------------------------------------------
	191
	192	void adam_fdc_device::adamnet_reset_w(int state)
	193	{
	194	m_maincpu->set_input_line(INPUT_LINE_RESET, state);
	195
	196	if (state == ASSERT_LINE) m_fdc->reset();
	197	}
	198
	199
	200	//-------------------------------------------------
	201	// p1_r -
	202	//-------------------------------------------------
	203
	204	READ8_MEMBER( adam_fdc_device::p1_r )
	205	{
	206	/*
	207
	208	bit description
	209
	210	0 disk in place
	211	1
	212	2 FDC DRQ
	213	3
	214	4
	215	5
	216	6
	217	7 SW3 (0=DS1, 1=DS2)
	218
	219	*/
	220
	221	UINT8 data = 0;
	222
	223	// disk in place
	224	data \|= m_floppy0->get_device()->exists();
	225
	226	// floppy data request
	227	data \|= m_fdc->drq_r() ? 0x04 : 0;
	228
	229	// drive select
	230	data \|= ioport("SW3")->read() << 7;
	231
	232	return data;
	233	}
	234
	235
	236	//-------------------------------------------------
	237	// p1_w -
	238	//-------------------------------------------------
	239
	240	WRITE8_MEMBER( adam_fdc_device::p1_w )
	241	{
	242	/*
	243
	244	bit description
	245
	246	0
	247	1 FDC ENP
	248	2
	249	3 FDC _DDEN
	250	4
	251	5 DRIVE SELECT
	252	6 MOTOR ON
	253	7
	254
	255	*/
	256
	257	// write precompensation
	258	//m_fdc->enp_w(BIT(data, 1));
	259
	260	// density select
	261	m_fdc->dden_w(BIT(data, 3));
	262
	263	// drive select
	264	m_image0 = NULL;
	265
	266	if (BIT(data, 5))
	267	{
	268	m_image0 = m_floppy0->get_device();
	269	}
	270
	271	m_fdc->set_floppy(m_image0);
	272
	273	// motor enable
	274	if (m_image0) m_image0->mon_w(!BIT(data, 6));
	275	}
	276
	277
	278	//-------------------------------------------------
	279	// p2_r -
	280	//-------------------------------------------------
	281
	282	READ8_MEMBER( adam_fdc_device::p2_r )
	283	{
	284	/*
	285
	286	bit description
	287
	288	0 mode bit 0
	289	1 mode bit 1
	290	2 mode bit 2
	291	3 NET RXD
	292	4
	293
	294	*/
	295
	296	UINT8 data = M6801_MODE_2;
	297
	298	// NET RXD
	299	data \|= m_bus->rxd_r(this) << 3;
	300
	301	return data;
	302	}
	303
	304
	305	//-------------------------------------------------
	306	// p2_w -
	307	//-------------------------------------------------
	308
	309	WRITE8_MEMBER( adam_fdc_device::p2_w )
	310	{
	311	/*
	312
	313	bit description
	314
	315	0
	316	1
	317	2
	318	3
	319	4 NET TXD
	320
	321	*/
	322
	323	m_bus->txd_w(this, BIT(data, 4));
	324	}

trunk/src/mess/machine/adam_fdc.h
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam floppy disk controller emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#pragma once
	11
	12	#ifndef __ADAM_FDC__
	13	#define __ADAM_FDC__
	14
	15	#include "emu.h"
	16	#include "cpu/m6800/m6800.h"
	17	#include "formats/adam_dsk.h"
	18	#include "formats/hxcmfm_dsk.h"
	19	#include "formats/mfi_dsk.h"
	20	#include "imagedev/floppy.h"
	21	#include "machine/adamnet.h"
	22	#include "machine/wd1772.h"
	23
	24
	25
	26	//**************************************************************************
	27	// TYPE DEFINITIONS
	28	//**************************************************************************
	29
	30	// ======================> adam_fdc_device
	31
	32	class adam_fdc_device : public device_t,
	33	public device_adamnet_card_interface
	34	{
	35	public:
	36	// construction/destruction
	37	adam_fdc_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	38
	39	// optional information overrides
	40	virtual const rom_entry *device_rom_region() const;
	41	virtual machine_config_constructor device_mconfig_additions() const;
	42	virtual ioport_constructor device_input_ports() const;
	43
	44	// not really public
	45	DECLARE_READ8_MEMBER( p1_r );
	46	DECLARE_WRITE8_MEMBER( p1_w );
	47	DECLARE_READ8_MEMBER( p2_r );
	48	DECLARE_WRITE8_MEMBER( p2_w );
	49
	50	void fdc_intrq_w(bool state);
	51
	52	static const floppy_format_type floppy_formats[];
	53
	54	protected:
	55	// device-level overrides
	56	virtual void device_config_complete() { m_shortname = "adam_fdc"; }
	57	virtual void device_start();
	58
	59	// device_adamnet_card_interface overrides
	60	virtual void adamnet_reset_w(int state);
	61
	62	required_device<cpu_device> m_maincpu;
	63	required_device<wd2793_t> m_fdc;
	64	required_device<floppy_connector> m_floppy0;
	65	required_shared_ptr<UINT8> m_ram;
	66
	67	floppy_image_device *m_image0;
	68	};
	69
	70
	71	// device type definition
	72	extern const device_type ADAM_FDC;
	73
	74
	75
	76	#endif

trunk/src/mess/machine/adam_spi.c
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam serial port interface emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#include "adam_spi.h"
	11
	12
	13
	14	//**************************************************************************
	15	// MACROS / CONSTANTS
	16	//**************************************************************************
	17
	18	#define M6801_TAG "m6801"
	19
	20
	21
	22	//**************************************************************************
	23	// DEVICE DEFINITIONS
	24	//**************************************************************************
	25
	26	const device_type ADAM_SPI = &device_creator<adam_spi_device>;
	27
	28
	29	//-------------------------------------------------
	30	// ROM( adam_spi )
	31	//-------------------------------------------------
	32
	33	ROM_START( adam_spi )
	34	ROM_REGION( 0x800, M6801_TAG, 0 )
	35	ROM_LOAD( "spi.bin", 0x000, 0x800, CRC(4ba30352) SHA1(99fe5aebd505a208bea6beec5d7322b15426e9c1) )
	36	ROM_END
	37
	38
	39	//-------------------------------------------------
	40	// rom_region - device-specific ROM region
	41	//-------------------------------------------------
	42
	43	const rom_entry *adam_spi_device::device_rom_region() const
	44	{
	45	return ROM_NAME( adam_spi );
	46	}
	47
	48
	49	//-------------------------------------------------
	50	// ADDRESS_MAP( adam_spi_mem )
	51	//-------------------------------------------------
	52
	53	static ADDRESS_MAP_START( adam_spi_mem, AS_PROGRAM, 8, adam_spi_device )
	54	AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
	55	AM_RANGE(0x0080, 0x00ff) AM_RAM
	56	AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_TAG, 0)
	57	ADDRESS_MAP_END
	58
	59
	60	//-------------------------------------------------
	61	// ADDRESS_MAP( adam_spi_io )
	62	//-------------------------------------------------
	63
	64	static ADDRESS_MAP_START( adam_spi_io, AS_IO, 8, adam_spi_device )
	65	AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(p2_r, p2_w)
	66	ADDRESS_MAP_END
	67
	68
	69	//-------------------------------------------------
	70	// MACHINE_DRIVER( adam_spi )
	71	//-------------------------------------------------
	72
	73	static MACHINE_CONFIG_FRAGMENT( adam_spi )
	74	MCFG_CPU_ADD(M6801_TAG, M6801, XTAL_4MHz)
	75	MCFG_CPU_PROGRAM_MAP(adam_spi_mem)
	76	MCFG_CPU_IO_MAP(adam_spi_io)
	77
	78	MCFG_DEVICE_DISABLE()
	79	MACHINE_CONFIG_END
	80
	81
	82	//-------------------------------------------------
	83	// machine_config_additions - device-specific
	84	// machine configurations
	85	//-------------------------------------------------
	86
	87	machine_config_constructor adam_spi_device::device_mconfig_additions() const
	88	{
	89	return MACHINE_CONFIG_NAME( adam_spi );
	90	}
	91
	92
	93
	94	//**************************************************************************
	95	// LIVE DEVICE
	96	//**************************************************************************
	97
	98	//-------------------------------------------------
	99	// adam_spi_device - constructor
	100	//-------------------------------------------------
	101
	102	adam_spi_device::adam_spi_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
	103	: device_t(mconfig, ADAM_SPI, "Adam SPI", tag, owner, clock),
	104	device_adamnet_card_interface(mconfig, *this),
	105	m_maincpu(*this, M6801_TAG)
	106	{
	107	}
	108
	109
	110	//-------------------------------------------------
	111	// device_start - device-specific startup
	112	//-------------------------------------------------
	113
	114	void adam_spi_device::device_start()
	115	{
	116	}
	117
	118
	119	//-------------------------------------------------
	120	// adamnet_reset_w -
	121	//-------------------------------------------------
	122
	123	void adam_spi_device::adamnet_reset_w(int state)
	124	{
	125	m_maincpu->set_input_line(INPUT_LINE_RESET, state);
	126	}
	127
	128
	129	//-------------------------------------------------
	130	// p2_r -
	131	//-------------------------------------------------
	132
	133	READ8_MEMBER( adam_spi_device::p2_r )
	134	{
	135	/*
	136
	137	bit description
	138
	139	0 mode bit 0
	140	1 mode bit 1
	141	2 mode bit 2
	142	3 NET RXD
	143	4
	144
	145	*/
	146
	147	UINT8 data = M6801_MODE_7;
	148
	149	// NET RXD
	150	data \|= m_bus->rxd_r(this) << 3;
	151
	152	return data;
	153	}
	154
	155
	156	//-------------------------------------------------
	157	// p2_w -
	158	//-------------------------------------------------
	159
	160	WRITE8_MEMBER( adam_spi_device::p2_w )
	161	{
	162	/*
	163
	164	bit description
	165
	166	0
	167	1
	168	2
	169	3
	170	4 NET TXD
	171
	172	*/
	173
	174	m_bus->txd_w(this, BIT(data, 4));
	175	}

trunk/src/mess/machine/adam_spi.h
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam floppy disk controller emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#pragma once
	11
	12	#ifndef __ADAM_SPI__
	13	#define __ADAM_SPI__
	14
	15	#include "emu.h"
	16	#include "cpu/m6800/m6800.h"
	17	#include "machine/adamnet.h"
	18
	19
	20
	21	//**************************************************************************
	22	// TYPE DEFINITIONS
	23	//**************************************************************************
	24
	25	// ======================> adam_spi_device
	26
	27	class adam_spi_device : public device_t,
	28	public device_adamnet_card_interface
	29	{
	30	public:
	31	// construction/destruction
	32	adam_spi_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	33
	34	// optional information overrides
	35	virtual const rom_entry *device_rom_region() const;
	36	virtual machine_config_constructor device_mconfig_additions() const;
	37
	38	// not really public
	39	DECLARE_READ8_MEMBER( p2_r );
	40	DECLARE_WRITE8_MEMBER( p2_w );
	41
	42	protected:
	43	// device-level overrides
	44	virtual void device_config_complete() { m_shortname = "adam_spi"; }
	45	virtual void device_start();
	46
	47	// device_adamnet_card_interface overrides
	48	virtual void adamnet_reset_w(int state);
	49
	50	required_device<cpu_device> m_maincpu;
	51	};
	52
	53
	54	// device type definition
	55	extern const device_type ADAM_SPI;
	56
	57
	58
	59	#endif

trunk/src/mess/machine/adam_prn.c
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam printer emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#include "adam_prn.h"
	11
	12
	13
	14	//**************************************************************************
	15	// MACROS / CONSTANTS
	16	//**************************************************************************
	17
	18	#define M6801_TAG "u2"
	19
	20
	21
	22	//**************************************************************************
	23	// DEVICE DEFINITIONS
	24	//**************************************************************************
	25
	26	const device_type ADAM_PRN = &device_creator<adam_printer_device>;
	27
	28
	29	//-------------------------------------------------
	30	// ROM( adam_prn )
	31	//-------------------------------------------------
	32
	33	ROM_START( adam_prn )
	34	ROM_REGION( 0x800, M6801_TAG, 0 )
	35	ROM_LOAD( "printer.u2", 0x000, 0x800, CRC(e8db783b) SHA1(32b40679749ad0317c2c9ee9ca619fad6d850ce7) )
	36	ROM_END
	37
	38
	39	//-------------------------------------------------
	40	// rom_region - device-specific ROM region
	41	//-------------------------------------------------
	42
	43	const rom_entry *adam_printer_device::device_rom_region() const
	44	{
	45	return ROM_NAME( adam_prn );
	46	}
	47
	48
	49	//-------------------------------------------------
	50	// ADDRESS_MAP( adam_prn_mem )
	51	//-------------------------------------------------
	52
	53	static ADDRESS_MAP_START( adam_prn_mem, AS_PROGRAM, 8, adam_printer_device )
	54	AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
	55	AM_RANGE(0x0080, 0x00ff) AM_RAM
	56	AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_TAG, 0)
	57	ADDRESS_MAP_END
	58
	59
	60	//-------------------------------------------------
	61	// ADDRESS_MAP( adam_prn_io )
	62	//-------------------------------------------------
	63
	64	static ADDRESS_MAP_START( adam_prn_io, AS_IO, 8, adam_printer_device )
	65	AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(p1_w)
	66	AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(p2_r, p2_w)
	67	AM_RANGE(M6801_PORT3, M6801_PORT3) AM_READ(p3_r)
	68	AM_RANGE(M6801_PORT4, M6801_PORT4) AM_READWRITE(p4_r, p4_w)
	69	ADDRESS_MAP_END
	70
	71
	72	//-------------------------------------------------
	73	// MACHINE_DRIVER( adam_prn )
	74	//-------------------------------------------------
	75
	76	static MACHINE_CONFIG_FRAGMENT( adam_prn )
	77	MCFG_CPU_ADD(M6801_TAG, M6801, XTAL_4MHz)
	78	MCFG_CPU_PROGRAM_MAP(adam_prn_mem)
	79	MCFG_CPU_IO_MAP(adam_prn_io)
	80	MCFG_DEVICE_DISABLE() // TODO
	81	MACHINE_CONFIG_END
	82
	83
	84	//-------------------------------------------------
	85	// machine_config_additions - device-specific
	86	// machine configurations
	87	//-------------------------------------------------
	88
	89	machine_config_constructor adam_printer_device::device_mconfig_additions() const
	90	{
	91	return MACHINE_CONFIG_NAME( adam_prn );
	92	}
	93
	94
	95
	96	//**************************************************************************
	97	// LIVE DEVICE
	98	//**************************************************************************
	99
	100	//-------------------------------------------------
	101	// adam_printer_device - constructor
	102	//-------------------------------------------------
	103
	104	adam_printer_device::adam_printer_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
	105	: device_t(mconfig, ADAM_PRN, "Adam printer", tag, owner, clock),
	106	device_adamnet_card_interface(mconfig, *this),
	107	m_maincpu(*this, M6801_TAG)
	108	{
	109	}
	110
	111
	112	//-------------------------------------------------
	113	// device_start - device-specific startup
	114	//-------------------------------------------------
	115
	116	void adam_printer_device::device_start()
	117	{
	118	}
	119
	120
	121	//-------------------------------------------------
	122	// adamnet_reset_w -
	123	//-------------------------------------------------
	124
	125	void adam_printer_device::adamnet_reset_w(int state)
	126	{
	127	m_maincpu->set_input_line(INPUT_LINE_RESET, state);
	128	}
	129
	130
	131	//-------------------------------------------------
	132	// p1_w -
	133	//-------------------------------------------------
	134
	135	WRITE8_MEMBER( adam_printer_device::p1_w )
	136	{
	137	/*
	138
	139	bit description
	140
	141	0 M2 phase D
	142	1 M2 phase B
	143	2 M2 phase C
	144	3 M2 phase A
	145	4 M3 phase B
	146	5 M3 phase D
	147	6 M3 phase A
	148	7 M3 phase C
	149
	150	*/
	151	}
	152
	153
	154	//-------------------------------------------------
	155	// p2_r -
	156	//-------------------------------------------------
	157
	158	READ8_MEMBER( adam_printer_device::p2_r )
	159	{
	160	/*
	161
	162	bit description
	163
	164	0 mode bit 0
	165	1 mode bit 1
	166	2 mode bit 2
	167	3 NET RXD
	168	4 NET TXD
	169
	170	*/
	171
	172	UINT8 data = M6801_MODE_7;
	173
	174	// NET RXD
	175	data \|= m_bus->rxd_r(this) << 3;
	176
	177	return data;
	178	}
	179
	180
	181	//-------------------------------------------------
	182	// p2_w -
	183	//-------------------------------------------------
	184
	185	WRITE8_MEMBER( adam_printer_device::p2_w )
	186	{
	187	/*
	188
	189	bit description
	190
	191	0 mode bit 0
	192	1 mode bit 1
	193	2 mode bit 2
	194	3 NET RXD
	195	4 NET TXD
	196
	197	*/
	198
	199	m_bus->txd_w(this, BIT(data, 4));
	200	}
	201
	202
	203	//-------------------------------------------------
	204	// p3_r -
	205	//-------------------------------------------------
	206
	207	READ8_MEMBER( adam_printer_device::p3_r )
	208	{
	209	return 0xff;
	210	}
	211
	212
	213	//-------------------------------------------------
	214	// p4_r -
	215	//-------------------------------------------------
	216
	217	READ8_MEMBER( adam_printer_device::p4_r )
	218	{
	219	/*
	220
	221	bit description
	222
	223	0
	224	1
	225	2
	226	3
	227	4 left margin
	228	5 platen detent
	229	6 wheel home
	230	7 self-test
	231
	232	*/
	233
	234	return 0x80;
	235	}
	236
	237
	238	//-------------------------------------------------
	239	// p4_w -
	240	//-------------------------------------------------
	241
	242	WRITE8_MEMBER( adam_printer_device::p4_w )
	243	{
	244	/*
	245
	246	bit description
	247
	248	0 print hammer solenoid
	249	1 ribbon advance solenoid
	250	2 platen motor advance
	251	3 platen motor break
	252	4
	253	5
	254	6
	255	7
	256
	257	*/
	258	}

trunk/src/mess/machine/adam_prn.h
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam floppy disk controller emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#pragma once
	11
	12	#ifndef __ADAM_PRN__
	13	#define __ADAM_PRN__
	14
	15	#include "emu.h"
	16	#include "cpu/m6800/m6800.h"
	17	#include "machine/adamnet.h"
	18
	19
	20
	21	//**************************************************************************
	22	// TYPE DEFINITIONS
	23	//**************************************************************************
	24
	25	// ======================> adam_printer_device
	26
	27	class adam_printer_device : public device_t,
	28	public device_adamnet_card_interface
	29	{
	30	public:
	31	// construction/destruction
	32	adam_printer_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	33
	34	// optional information overrides
	35	virtual const rom_entry *device_rom_region() const;
	36	virtual machine_config_constructor device_mconfig_additions() const;
	37
	38	// not really public
	39	DECLARE_WRITE8_MEMBER( p1_w );
	40	DECLARE_READ8_MEMBER( p2_r );
	41	DECLARE_WRITE8_MEMBER( p2_w );
	42	DECLARE_READ8_MEMBER( p3_r );
	43	DECLARE_READ8_MEMBER( p4_r );
	44	DECLARE_WRITE8_MEMBER( p4_w );
	45
	46	protected:
	47	// device-level overrides
	48	virtual void device_config_complete() { m_shortname = "adam_prn"; }
	49	virtual void device_start();
	50
	51	// device_adamnet_card_interface overrides
	52	virtual void adamnet_reset_w(int state);
	53
	54	required_device<cpu_device> m_maincpu;
	55	};
	56
	57
	58	// device type definition
	59	extern const device_type ADAM_PRN;
	60
	61
	62
	63	#endif

trunk/src/mess/machine/adam_kb.c
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam keyboard emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#include "adam_kb.h"
	11
	12
	13
	14	//**************************************************************************
	15	// MACROS / CONSTANTS
	16	//**************************************************************************
	17
	18	#define M6801_TAG "u2"
	19
	20
	21
	22	//**************************************************************************
	23	// DEVICE DEFINITIONS
	24	//**************************************************************************
	25
	26	const device_type ADAM_KB = &device_creator<adam_keyboard_device>;
	27
	28
	29	//-------------------------------------------------
	30	// ROM( adam_kb )
	31	//-------------------------------------------------
	32
	33	ROM_START( adam_kb )
	34	ROM_REGION( 0x800, M6801_TAG, 0 )
	35	ROM_LOAD( "keyboard.u2", 0x000, 0x800, CRC(ef204746) SHA1(83162ffc75847328a05429135b728a63efb05b93) )
	36	ROM_END
	37
	38
	39	//-------------------------------------------------
	40	// rom_region - device-specific ROM region
	41	//-------------------------------------------------
	42
	43	const rom_entry *adam_keyboard_device::device_rom_region() const
	44	{
	45	return ROM_NAME( adam_kb );
	46	}
	47
	48
	49	//-------------------------------------------------
	50	// ADDRESS_MAP( adam_kb_mem )
	51	//-------------------------------------------------
	52
	53	static ADDRESS_MAP_START( adam_kb_mem, AS_PROGRAM, 8, adam_keyboard_device )
	54	AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
	55	AM_RANGE(0x0080, 0x00ff) AM_RAM
	56	AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_TAG, 0)
	57	ADDRESS_MAP_END
	58
	59
	60	//-------------------------------------------------
	61	// ADDRESS_MAP( adam_kb_io )
	62	//-------------------------------------------------
	63
	64	static ADDRESS_MAP_START( adam_kb_io, AS_IO, 8, adam_keyboard_device )
	65	AM_RANGE(M6801_PORT1, M6801_PORT1) AM_READ(p1_r)
	66	AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(p2_r, p2_w)
	67	AM_RANGE(M6801_PORT3, M6801_PORT3) AM_READWRITE(p3_r, p3_w)
	68	AM_RANGE(M6801_PORT4, M6801_PORT4) AM_READWRITE(p4_r, p4_w)
	69	ADDRESS_MAP_END
	70
	71
	72	//-------------------------------------------------
	73	// MACHINE_DRIVER( adam_kb )
	74	//-------------------------------------------------
	75
	76	static MACHINE_CONFIG_FRAGMENT( adam_kb )
	77	MCFG_CPU_ADD(M6801_TAG, M6801, XTAL_4MHz)
	78	MCFG_CPU_PROGRAM_MAP(adam_kb_mem)
	79	MCFG_CPU_IO_MAP(adam_kb_io)
	80	MACHINE_CONFIG_END
	81
	82
	83	//-------------------------------------------------
	84	// machine_config_additions - device-specific
	85	// machine configurations
	86	//-------------------------------------------------
	87
	88	machine_config_constructor adam_keyboard_device::device_mconfig_additions() const
	89	{
	90	return MACHINE_CONFIG_NAME( adam_kb );
	91	}
	92
	93
	94	//-------------------------------------------------
	95	// INPUT_PORTS( adam_kb )
	96	//-------------------------------------------------
	97
	98	static INPUT_PORTS_START( adam_kb )
	99	PORT_START("Y0")
	100	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("WILD CARD") PORT_CODE(KEYCODE_F7)
	101	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("I") PORT_CODE(KEYCODE_F1)
	102	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("II") PORT_CODE(KEYCODE_F2)
	103	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("III") PORT_CODE(KEYCODE_F3)
	104	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("IV") PORT_CODE(KEYCODE_F4)
	105	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("V") PORT_CODE(KEYCODE_F5)
	106	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("VI") PORT_CODE(KEYCODE_F6)
	107	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UNDO") PORT_CODE(KEYCODE_F8)
	108
	109	PORT_START("Y1")
	110	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
	111	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
	112	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
	113	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
	114	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
	115	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('_')
	116	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
	117	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*')
	118
	119	PORT_START("Y2")
	120	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t')
	121	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
	122	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
	123	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
	124	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
	125	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
	126	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
	127	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
	128
	129	PORT_START("Y3")
	130	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
	131	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
	132	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
	133	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
	134	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
	135	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
	136	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
	137	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
	138
	139	PORT_START("Y4")
	140	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
	141	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
	142	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
	143	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
	144	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
	145	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
	146	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
	147	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')
	148
	149	PORT_START("Y5")
	150	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(')
	151	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
	152	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('\'')
	153	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('+') PORT_CHAR('=')
	154	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('^') PORT_CHAR('~')
	155	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
	156	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':')
	157	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('\"')
	158
	159	PORT_START("Y6")
	160	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
	161	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
	162	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
	163	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{')
	164	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
	165	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
	166	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
	167	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
	168
	169	PORT_START("Y7")
	170	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('\|')
	171	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("ESCAPE/WP") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC))
	172	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
	173	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
	174	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
	175	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("MOVE/COPY") PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT))
	176	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("STORE/GET") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME))
	177	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CLEAR") PORT_CODE(KEYCODE_PGUP) PORT_CHAR(UCHAR_MAMEKEY(PGUP))
	178
	179	PORT_START("Y8")
	180	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
	181	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
	182	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
	183	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
	184	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("BACKSPACE") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
	185	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("INSERT") PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL))
	186	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("PRINT") PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(END))
	187	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("DELETE") PORT_CODE(KEYCODE_PGDN) PORT_CHAR(UCHAR_MAMEKEY(PGDN))
	188
	189	PORT_START("Y9")
	190	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CONTROL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
	191	PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
	192
	193	PORT_START("Y10")
	194	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
	195	PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
	196
	197	PORT_START("Y11")
	198	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("LOCK") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
	199	PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
	200
	201	PORT_START("Y12")
	202	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("HOME") PORT_CODE(KEYCODE_F9)
	203	PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
	204	INPUT_PORTS_END
	205
	206
	207	//-------------------------------------------------
	208	// input_ports - device-specific input ports
	209	//-------------------------------------------------
	210
	211	ioport_constructor adam_keyboard_device::device_input_ports() const
	212	{
	213	return INPUT_PORTS_NAME( adam_kb );
	214	}
	215
	216
	217
	218	//**************************************************************************
	219	// LIVE DEVICE
	220	//**************************************************************************
	221
	222	//-------------------------------------------------
	223	// adam_keyboard_device - constructor
	224	//-------------------------------------------------
	225
	226	adam_keyboard_device::adam_keyboard_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
	227	: device_t(mconfig, ADAM_KB, "Adam keyboard", tag, owner, clock),
	228	device_adamnet_card_interface(mconfig, *this),
	229	m_maincpu(*this, M6801_TAG),
	230	m_key_y(0x1ff)
	231	{
	232	}
	233
	234
	235	//-------------------------------------------------
	236	// device_start - device-specific startup
	237	//-------------------------------------------------
	238
	239	void adam_keyboard_device::device_start()
	240	{
	241	// state saving
	242	save_item(NAME(m_key_y));
	243	}
	244
	245
	246	//-------------------------------------------------
	247	// adamnet_reset_w -
	248	//-------------------------------------------------
	249
	250	void adam_keyboard_device::adamnet_reset_w(int state)
	251	{
	252	m_maincpu->set_input_line(INPUT_LINE_RESET, state);
	253	}
	254
	255
	256	//-------------------------------------------------
	257	// p1_r -
	258	//-------------------------------------------------
	259
	260	READ8_MEMBER( adam_keyboard_device::p1_r )
	261	{
	262	/*
	263
	264	bit description
	265
	266	0 X0
	267	1 X1
	268	2 X2
	269	3 X3
	270	4 X4
	271	5 X5
	272	6 X6
	273	7 X7
	274
	275	*/
	276
	277	UINT8 data = 0xff;
	278
	279	if (!BIT(m_key_y, 0)) data &= ioport("Y0")->read();
	280	if (!BIT(m_key_y, 1)) data &= ioport("Y1")->read();
	281	if (!BIT(m_key_y, 2)) data &= ioport("Y2")->read();
	282	if (!BIT(m_key_y, 3)) data &= ioport("Y3")->read();
	283	if (!BIT(m_key_y, 4)) data &= ioport("Y4")->read();
	284	if (!BIT(m_key_y, 5)) data &= ioport("Y5")->read();
	285	if (!BIT(m_key_y, 6)) data &= ioport("Y6")->read();
	286	if (!BIT(m_key_y, 7)) data &= ioport("Y7")->read();
	287	if (!BIT(m_key_y, 8)) data &= ioport("Y8")->read();
	288	if (!BIT(m_key_y, 9)) data &= ioport("Y9")->read();
	289	if (!BIT(m_key_y, 10)) data &= ioport("Y10")->read();
	290	if (!BIT(m_key_y, 11)) data &= ioport("Y11")->read();
	291	if (!BIT(m_key_y, 12)) data &= ioport("Y12")->read();
	292
	293	return data;
	294	}
	295
	296
	297	//-------------------------------------------------
	298	// p2_r -
	299	//-------------------------------------------------
	300
	301	READ8_MEMBER( adam_keyboard_device::p2_r )
	302	{
	303	/*
	304
	305	bit description
	306
	307	0 mode bit 0
	308	1 mode bit 1
	309	2 mode bit 2
	310	3 NET RXD
	311	4
	312
	313	*/
	314
	315	UINT8 data = M6801_MODE_7;
	316
	317	// NET RXD
	318	data \|= m_bus->rxd_r(this) << 3;
	319
	320	return data;
	321	}
	322
	323
	324	//-------------------------------------------------
	325	// p2_w -
	326	//-------------------------------------------------
	327
	328	WRITE8_MEMBER( adam_keyboard_device::p2_w )
	329	{
	330	/*
	331
	332	bit description
	333
	334	0
	335	1
	336	2
	337	3
	338	4 NET TXD
	339
	340	*/
	341
	342	m_bus->txd_w(this, BIT(data, 4));
	343	}
	344
	345
	346	//-------------------------------------------------
	347	// p3_r -
	348	//-------------------------------------------------
	349
	350	READ8_MEMBER( adam_keyboard_device::p3_r )
	351	{
	352	return 0xff;
	353	}
	354
	355
	356	//-------------------------------------------------
	357	// p3_w -
	358	//-------------------------------------------------
	359
	360	WRITE8_MEMBER( adam_keyboard_device::p3_w )
	361	{
	362	/*
	363
	364	bit description
	365
	366	0 Y0
	367	1 Y1
	368	2 Y2
	369	3 Y3
	370	4 Y4
	371	5 Y5
	372	6 Y6
	373	7 Y7
	374
	375	*/
	376
	377	m_key_y = (m_key_y & 0x1f00) \| data;
	378	}
	379
	380
	381	//-------------------------------------------------
	382	// p4_r -
	383	//-------------------------------------------------
	384
	385	READ8_MEMBER( adam_keyboard_device::p4_r )
	386	{
	387	return 0xff;
	388	}
	389
	390
	391	//-------------------------------------------------
	392	// p4_w -
	393	//-------------------------------------------------
	394
	395	WRITE8_MEMBER( adam_keyboard_device::p4_w )
	396	{
	397	/*
	398
	399	bit description
	400
	401	0 Y8
	402	1 Y9
	403	2 Y10
	404	3 Y11
	405	4 Y12
	406	5
	407	6
	408	7
	409
	410	*/
	411
	412	m_key_y = ((data & 0x1f) << 8) \| (m_key_y & 0xff);
	413	}

trunk/src/mess/machine/adam_kb.h
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam keyboard emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#pragma once
	11
	12	#ifndef __ADAM_KB__
	13	#define __ADAM_KB__
	14
	15	#include "emu.h"
	16	#include "cpu/m6800/m6800.h"
	17	#include "machine/adamnet.h"
	18
	19
	20
	21	//**************************************************************************
	22	// TYPE DEFINITIONS
	23	//**************************************************************************
	24
	25	// ======================> adam_keyboard_device
	26
	27	class adam_keyboard_device : public device_t,
	28	public device_adamnet_card_interface
	29	{
	30	public:
	31	// construction/destruction
	32	adam_keyboard_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	33
	34	// optional information overrides
	35	virtual const rom_entry *device_rom_region() const;
	36	virtual machine_config_constructor device_mconfig_additions() const;
	37	virtual ioport_constructor device_input_ports() const;
	38
	39	// not really public
	40	DECLARE_READ8_MEMBER( p1_r );
	41	DECLARE_READ8_MEMBER( p2_r );
	42	DECLARE_WRITE8_MEMBER( p2_w );
	43	DECLARE_READ8_MEMBER( p3_r );
	44	DECLARE_WRITE8_MEMBER( p3_w );
	45	DECLARE_READ8_MEMBER( p4_r );
	46	DECLARE_WRITE8_MEMBER( p4_w );
	47
	48	protected:
	49	// device-level overrides
	50	virtual void device_config_complete() { m_shortname = "adam_kb"; }
	51	virtual void device_start();
	52
	53	// device_adamnet_card_interface overrides
	54	virtual void adamnet_reset_w(int state);
	55
	56	required_device<cpu_device> m_maincpu;
	57
	58	UINT16 m_key_y;
	59	};
	60
	61
	62	// device type definition
	63	extern const device_type ADAM_KB;
	64
	65
	66
	67	#endif

trunk/src/mess/machine/adam_ddp.c
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam Digital Data Pack emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#include "adam_ddp.h"
	11
	12
	13
	14	//**************************************************************************
	15	// MACROS / CONSTANTS
	16	//**************************************************************************
	17
	18	#define M6801_TAG "m6801"
	19
	20
	21
	22	//**************************************************************************
	23	// DEVICE DEFINITIONS
	24	//**************************************************************************
	25
	26	const device_type ADAM_DDP = &device_creator<adam_digital_data_pack_device>;
	27
	28
	29	//-------------------------------------------------
	30	// ROM( adam_ddp )
	31	//-------------------------------------------------
	32
	33	ROM_START( adam_ddp )
	34	ROM_REGION( 0x800, M6801_TAG, 0 )
	35	ROM_LOAD( "tape rev a 8865.u24", 0x000, 0x800, CRC(6b9ea1cf) SHA1(b970f11e8f443fa130fba02ad1f60da51bf89673) )
	36	ROM_END
	37
	38
	39	//-------------------------------------------------
	40	// rom_region - device-specific ROM region
	41	//-------------------------------------------------
	42
	43	const rom_entry *adam_digital_data_pack_device::device_rom_region() const
	44	{
	45	return ROM_NAME( adam_ddp );
	46	}
	47
	48
	49	//-------------------------------------------------
	50	// ADDRESS_MAP( adam_ddp_mem )
	51	//-------------------------------------------------
	52
	53	static ADDRESS_MAP_START( adam_ddp_mem, AS_PROGRAM, 8, adam_digital_data_pack_device )
	54	AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r, m6801_io_w)
	55	AM_RANGE(0x0080, 0x00ff) AM_RAM
	56	AM_RANGE(0x0400, 0x07ff) AM_RAM
	57	AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(M6801_TAG, 0)
	58	ADDRESS_MAP_END
	59
	60
	61	//-------------------------------------------------
	62	// ADDRESS_MAP( adam_ddp_io )
	63	//-------------------------------------------------
	64
	65	static ADDRESS_MAP_START( adam_ddp_io, AS_IO, 8, adam_digital_data_pack_device )
	66	AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(p1_w)
	67	AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READWRITE(p2_r, p2_w)
	68	AM_RANGE(M6801_PORT3, M6801_PORT3) AM_NOP // Multiplexed Address/Data
	69	AM_RANGE(M6801_PORT4, M6801_PORT4) AM_READ(p4_r) AM_WRITENOP
	70	ADDRESS_MAP_END
	71
	72
	73	//-------------------------------------------------
	74	// cassette_interface adam_cassette_interface
	75	//-------------------------------------------------
	76
	77	static const struct CassetteOptions adam_cassette_options =
	78	{
	79	2, /* channels */
	80	16, /* bits per sample */
	81	44100 /* sample frequency */
	82	};
	83
	84	static const cassette_interface adam_cassette_interface =
	85	{
	86	coleco_adam_cassette_formats,
	87	&adam_cassette_options,
	88	(cassette_state)(CASSETTE_PLAY \| CASSETTE_MOTOR_DISABLED \| CASSETTE_SPEAKER_MUTED),
	89	"adam_cass",
	90	NULL
	91	};
	92
	93
	94	//-------------------------------------------------
	95	// MACHINE_DRIVER( adam_ddp )
	96	//-------------------------------------------------
	97
	98	static MACHINE_CONFIG_FRAGMENT( adam_ddp )
	99	MCFG_CPU_ADD(M6801_TAG, M6801, XTAL_4MHz)
	100	MCFG_CPU_PROGRAM_MAP(adam_ddp_mem)
	101	MCFG_CPU_IO_MAP(adam_ddp_io)
	102
	103	MCFG_CASSETTE_ADD(CASSETTE_TAG, adam_cassette_interface)
	104	MCFG_CASSETTE_ADD(CASSETTE2_TAG, adam_cassette_interface)
	105	MACHINE_CONFIG_END
	106
	107
	108	//-------------------------------------------------
	109	// machine_config_additions - device-specific
	110	// machine configurations
	111	//-------------------------------------------------
	112
	113	machine_config_constructor adam_digital_data_pack_device::device_mconfig_additions() const
	114	{
	115	return MACHINE_CONFIG_NAME( adam_ddp );
	116	}
	117
	118
	119
	120	//**************************************************************************
	121	// LIVE DEVICE
	122	//**************************************************************************
	123
	124	//-------------------------------------------------
	125	// adam_digital_data_pack_device - constructor
	126	//-------------------------------------------------
	127
	128	adam_digital_data_pack_device::adam_digital_data_pack_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
	129	: device_t(mconfig, ADAM_DDP, "Adam DDP", tag, owner, clock),
	130	device_adamnet_card_interface(mconfig, *this),
	131	m_maincpu(*this, M6801_TAG),
	132	m_ddp0(*this, CASSETTE_TAG),
	133	m_ddp1(*this, CASSETTE2_TAG)
	134	{
	135	}
	136
	137
	138	//-------------------------------------------------
	139	// device_start - device-specific startup
	140	//-------------------------------------------------
	141
	142	void adam_digital_data_pack_device::device_start()
	143	{
	144	// state saving
	145	save_item(NAME(m_wr0));
	146	save_item(NAME(m_wr1));
	147	save_item(NAME(m_track));
	148	}
	149
	150
	151	//-------------------------------------------------
	152	// adamnet_reset_w -
	153	//-------------------------------------------------
	154
	155	void adam_digital_data_pack_device::adamnet_reset_w(int state)
	156	{
	157	m_maincpu->set_input_line(INPUT_LINE_RESET, state);
	158	}
	159
	160
	161	//-------------------------------------------------
	162	// p1_w -
	163	//-------------------------------------------------
	164
	165	WRITE8_MEMBER( adam_digital_data_pack_device::p1_w )
	166	{
	167	/*
	168
	169	bit description
	170
	171	0 SPD SEL (0=20 ips, 1=80ips)
	172	1 STOP0
	173	2 STOP1
	174	3 _GO FWD
	175	4 _GO REV
	176	5 BRAKE
	177	6 _WR0
	178	7 _WR1
	179
	180	*/
	181
	182	if (m_ddp0->exists())
	183	{
	184	m_ddp0->set_speed(BIT(data, 0) ? (double) 80/1.875 : 20/1.875); // speed select
	185	if(!(data & 0x08)) m_ddp0->go_forward();
	186	if(!(data & 0x10)) m_ddp0->go_reverse();
	187	m_ddp0->change_state(BIT(data, 1) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR); // motor control
	188	}
	189
	190	if (m_ddp1->exists())
	191	{
	192	m_ddp1->set_speed(BIT(data, 0) ? (double) 80/1.875 : 20/1.875); // speed select
	193	if(!(data & 0x08)) m_ddp1->go_forward();
	194	if(!(data & 0x10)) m_ddp1->go_reverse();
	195	m_ddp1->change_state(BIT(data, 2) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR); // motor control
	196	}
	197
	198	// data write 0
	199	m_wr0 = BIT(data, 6);
	200
	201	// data write 1
	202	m_wr1 = BIT(data, 7);
	203	}
	204
	205
	206	//-------------------------------------------------
	207	// p2_r -
	208	//-------------------------------------------------
	209
	210	READ8_MEMBER( adam_digital_data_pack_device::p2_r )
	211	{
	212	/*
	213
	214	bit description
	215
	216	0 mode bit 0
	217	1 mode bit 1 / CIP1
	218	2 mode bit 2
	219	3 NET RXD
	220	4
	221
	222	*/
	223
	224	UINT8 data = 0;
	225
	226	if (m_bus->reset_r())
	227	data \|= M6801_MODE_6;
	228	else
	229	data \|= m_ddp1->exists() << 1; // Cassette in place 1
	230
	231	// NET RXD
	232	data \|= m_bus->rxd_r(this) << 3;
	233
	234	return data;
	235	}
	236
	237
	238	//-------------------------------------------------
	239	// p2_w -
	240	//-------------------------------------------------
	241
	242	WRITE8_MEMBER( adam_digital_data_pack_device::p2_w )
	243	{
	244	/*
	245
	246	bit description
	247
	248	0 WRT DATA
	249	1
	250	2 TRACK A/B (0=B, 1=A)
	251	3
	252	4 NET TXD
	253
	254	*/
	255
	256	if (m_ddp0->exists())
	257	{
	258	m_ddp0->set_channel(!BIT(data, 2)); // Track select
	259	if (!m_wr0) m_ddp0->output(BIT(data, 0) ? 1.0 : -1.0); // write data
	260	}
	261
	262	if (m_ddp1->exists())
	263	{
	264	m_ddp1->set_channel(!BIT(data, 2));
	265	if (!m_wr1) m_ddp1->output(BIT(data, 0) ? 1.0 : -1.0);
	266	}
	267
	268	// NET TXD
	269	m_bus->txd_w(this, BIT(data, 4));
	270	}
	271
	272
	273	//-------------------------------------------------
	274	// p4_r -
	275	//-------------------------------------------------
	276
	277	READ8_MEMBER( adam_digital_data_pack_device::p4_r )
	278	{
	279	/*
	280
	281	bit description
	282
	283	0 A8
	284	1 A9
	285	2 A10 (2114 _S)
	286	3 MSENSE 0
	287	4 MSENSE 1
	288	5 CIP0
	289	6 RD DATA 0 (always 1)
	290	7 RD DATA 1 (data from drives ORed together)
	291
	292	*/
	293
	294	UINT8 data = 0;
	295
	296	// drive 0
	297	if (m_ddp0->exists())
	298	{
	299	data \|= ((m_ddp0->get_state() & CASSETTE_MASK_UISTATE) != CASSETTE_STOPPED) << 3; // motion sense
	300	data \|= 1 << 5; // cassette in place
	301	data \|= (m_ddp0->input() < 0) << 7; // read data
	302	}
	303
	304	// drive 1
	305	if (m_ddp1->exists())
	306	{
	307	data \|= ((m_ddp1->get_state() & CASSETTE_MASK_UISTATE) != CASSETTE_STOPPED) << 4; // motion sense
	308	data \|= (m_ddp1->input() < 0) << 7; // read data
	309	}
	310
	311	// read data 0 (always 1)
	312	data \|= 0x40;
	313
	314	return data;
	315	}

trunk/src/mess/machine/adam_ddp.h
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco Adam Digital Data Pack emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#pragma once
	11
	12	#ifndef __ADAM_DDP__
	13	#define __ADAM_DDP__
	14
	15	#include "emu.h"
	16	#include "cpu/m6800/m6800.h"
	17	#include "formats/adam_cas.h"
	18	#include "imagedev/cassette.h"
	19	#include "machine/adamnet.h"
	20
	21
	22
	23	//**************************************************************************
	24	// TYPE DEFINITIONS
	25	//**************************************************************************
	26
	27	// ======================> adam_digital_data_pack_device
	28
	29	class adam_digital_data_pack_device : public device_t,
	30	public device_adamnet_card_interface
	31	{
	32	public:
	33	// construction/destruction
	34	adam_digital_data_pack_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	35
	36	// optional information overrides
	37	virtual const rom_entry *device_rom_region() const;
	38	virtual machine_config_constructor device_mconfig_additions() const;
	39
	40	// not really public
	41	DECLARE_WRITE8_MEMBER( p1_w );
	42	DECLARE_READ8_MEMBER( p2_r );
	43	DECLARE_WRITE8_MEMBER( p2_w );
	44	DECLARE_READ8_MEMBER( p4_r );
	45
	46	protected:
	47	// device-level overrides
	48	virtual void device_config_complete() { m_shortname = "adam_ddp"; }
	49	virtual void device_start();
	50
	51	// device_adamnet_card_interface overrides
	52	virtual void adamnet_reset_w(int state);
	53
	54	required_device<cpu_device> m_maincpu;
	55	required_device<cassette_image_device> m_ddp0;
	56	required_device<cassette_image_device> m_ddp1;
	57
	58	int m_wr0;
	59	int m_wr1;
	60	int m_track;
	61	};
	62
	63
	64	// device type definition
	65	extern const device_type ADAM_DDP;
	66
	67
	68
	69	#endif

trunk/src/mess/machine/adamnet.c
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco ADAMnet bus emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#include "machine/adamnet.h"
	11
	12
	13
	14	//**************************************************************************
	15	// GLOBAL VARIABLES
	16	//**************************************************************************
	17
	18	const device_type ADAMNET = &device_creator<adamnet_device>;
	19	const device_type ADAMNET_SLOT = &device_creator<adamnet_slot_device>;
	20
	21
	22
	23	//**************************************************************************
	24	// DEVICE ADAMNET CARD INTERFACE
	25	//**************************************************************************
	26
	27	//-------------------------------------------------
	28	// device_adamnet_card_interface - constructor
	29	//-------------------------------------------------
	30
	31	device_adamnet_card_interface::device_adamnet_card_interface(const machine_config &mconfig, device_t &device)
	32	: device_slot_card_interface(mconfig, device)
	33	{
	34	}
	35
	36
	37	//-------------------------------------------------
	38	// ~device_adamnet_card_interface - destructor
	39	//-------------------------------------------------
	40
	41	device_adamnet_card_interface::~device_adamnet_card_interface()
	42	{
	43	}
	44
	45
	46
	47	//**************************************************************************
	48	// LIVE DEVICE
	49	//**************************************************************************
	50
	51	//-------------------------------------------------
	52	// adamnet_slot_device - constructor
	53	//-------------------------------------------------
	54	adamnet_slot_device::adamnet_slot_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock) :
	55	device_t(mconfig, ADAMNET_SLOT, "ADAMnet slot", tag, owner, clock),
	56	device_slot_interface(mconfig, *this)
	57	{
	58	}
	59
	60
	61	//-------------------------------------------------
	62	// device_start - device-specific startup
	63	//-------------------------------------------------
	64
	65	void adamnet_slot_device::device_start()
	66	{
	67	m_bus = machine().device<adamnet_device>(ADAMNET_TAG);
	68	device_adamnet_card_interface dev = dynamic_cast<device_adamnet_card_interface >(get_card_device());
	69	if (dev) m_bus->add_device(get_card_device());
	70	}
	71
	72
	73
	74	//**************************************************************************
	75	// LIVE DEVICE
	76	//**************************************************************************
	77
	78	//-------------------------------------------------
	79	// adamnet_device - constructor
	80	//-------------------------------------------------
	81
	82	adamnet_device::adamnet_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock) :
	83	device_t(mconfig, ADAMNET, "ADAMnet bus", tag, owner, clock),
	84	m_txd(1),
	85	m_reset(CLEAR_LINE)
	86	{
	87	}
	88
	89
	90	//-------------------------------------------------
	91	// device_start - device-specific startup
	92	//-------------------------------------------------
	93
	94	void adamnet_device::device_start()
	95	{
	96	}
	97
	98
	99	//-------------------------------------------------
	100	// device_stop - device-specific stop
	101	//-------------------------------------------------
	102
	103	void adamnet_device::device_stop()
	104	{
	105	m_device_list.reset();
	106	}
	107
	108
	109	//-------------------------------------------------
	110	// add_adamnet_card - add ADAMNET card
	111	//-------------------------------------------------
	112
	113	void adamnet_device::add_device(device_t *target)
	114	{
	115	daisy_entry *entry = auto_alloc(machine(), daisy_entry(target));
	116
	117	entry->m_interface->m_bus = this;
	118
	119	m_device_list.append(*entry);
	120	}
	121
	122
	123	//-------------------------------------------------
	124	// daisy_entry - constructor
	125	//-------------------------------------------------
	126
	127	adamnet_device::daisy_entry::daisy_entry(device_t *device)
	128	: m_next(NULL),
	129	m_device(device),
	130	m_interface(NULL),
	131	m_txd(1)
	132	{
	133	device->interface(m_interface);
	134	}
	135
	136
	137	//-------------------------------------------------
	138	// rxd_r - receive data
	139	//-------------------------------------------------
	140
	141	READ_LINE_MEMBER( adamnet_device::rxd_r )
	142	{
	143	int state = m_txd;//1;
	144
	145	daisy_entry *entry = m_device_list.first();
	146
	147	while (entry)
	148	{
	149	state &= entry->m_txd;
	150
	151	entry = entry->next();
	152	}
	153
	154	return state;
	155	}
	156
	157
	158	//-------------------------------------------------
	159	// rxd_r - receive data
	160	//-------------------------------------------------
	161
	162	int adamnet_device::rxd_r(device_t *device)
	163	{
	164	int state = m_txd;
	165
	166	daisy_entry *entry = m_device_list.first();
	167
	168	while (entry)
	169	{
	170	//if (strcmp(entry->m_device->tag(), device->tag()))
	171	{
	172	state &= entry->m_txd;
	173	}
	174
	175	entry = entry->next();
	176	}
	177
	178	return state;
	179	}
	180
	181
	182	//-------------------------------------------------
	183	// txd_w - transmit data
	184	//-------------------------------------------------
	185
	186	WRITE_LINE_MEMBER( adamnet_device::txd_w )
	187	{
	188	if (m_txd != state)
	189	{
	190	m_txd = state;
	191	}
	192	}
	193
	194
	195	//-------------------------------------------------
	196	// txd_w - transmit data
	197	//-------------------------------------------------
	198
	199	void adamnet_device::txd_w(device_t *device, int state)
	200	{
	201	daisy_entry *entry = m_device_list.first();
	202
	203	while (entry)
	204	{
	205	if (!strcmp(entry->m_device->tag(), device->tag()))
	206	{
	207	if (entry->m_txd != state)
	208	{
	209	entry->m_txd = state;
	210	}
	211	break;
	212	}
	213
	214	entry = entry->next();
	215	}
	216	}
	217
	218
	219	//-------------------------------------------------
	220	// reset_r - bus reset
	221	//-------------------------------------------------
	222
	223	READ_LINE_MEMBER( adamnet_device::reset_r )
	224	{
	225	return m_reset;
	226	}
	227
	228
	229	//-------------------------------------------------
	230	// reset_w - bus reset
	231	//-------------------------------------------------
	232
	233	WRITE_LINE_MEMBER( adamnet_device::reset_w )
	234	{
	235	m_reset = state;
	236
	237	daisy_entry *entry = m_device_list.first();
	238
	239	while (entry)
	240	{
	241	entry->m_interface->adamnet_reset_w(state);
	242
	243	entry = entry->next();
	244	}
	245	}
	246
	247
	248	//-------------------------------------------------
	249	// SLOT_INTERFACE( adamnet_devices )
	250	//-------------------------------------------------
	251
	252	SLOT_INTERFACE_START( adamnet_devices )
	253	SLOT_INTERFACE("ddp", ADAM_DDP)
	254	SLOT_INTERFACE("fdc", ADAM_FDC)
	255	SLOT_INTERFACE("kb", ADAM_KB)
	256	SLOT_INTERFACE("prn", ADAM_PRN)
	257	SLOT_INTERFACE("spi", ADAM_SPI)
	258	SLOT_INTERFACE_END

trunk/src/mess/machine/adamnet.h
r0	r18895
	1	/**********************************************************************
	2
	3	Coleco ADAMnet bus emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#pragma once
	11
	12	#ifndef __ADAMNET__
	13	#define __ADAMNET__
	14
	15	#include "emu.h"
	16
	17
	18
	19	//**************************************************************************
	20	// CONSTANTS
	21	//**************************************************************************
	22
	23	#define ADAMNET_TAG "adamnet"
	24
	25
	26
	27	//**************************************************************************
	28	// INTERFACE CONFIGURATION MACROS
	29	//**************************************************************************
	30
	31	#define MCFG_ADAMNET_BUS_ADD() \
	32	MCFG_DEVICE_ADD(ADAMNET_TAG, ADAMNET, 0)
	33
	34	#define MCFG_ADAMNET_SLOT_ADD(_tag, _slot_intf, _def_slot, _def_inp) \
	35	MCFG_DEVICE_ADD(_tag, ADAMNET_SLOT, 0) \
	36	MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _def_inp, false)
	37
	38
	39
	40	//**************************************************************************
	41	// TYPE DEFINITIONS
	42	//**************************************************************************
	43
	44	class device_adamnet_card_interface;
	45
	46	// ======================> adamnet_device
	47
	48	class adamnet_device : public device_t
	49	{
	50	public:
	51	// construction/destruction
	52	adamnet_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	53
	54	void add_device(device_t *target);
	55
	56	DECLARE_READ_LINE_MEMBER( rxd_r );
	57	int rxd_r(device_t *device);
	58	DECLARE_WRITE_LINE_MEMBER( txd_w );
	59	void txd_w(device_t *device, int state);
	60
	61	DECLARE_READ_LINE_MEMBER( reset_r );
	62	DECLARE_WRITE_LINE_MEMBER( reset_w );
	63
	64	protected:
	65	// device-level overrides
	66	virtual void device_start();
	67	virtual void device_stop();
	68
	69	private:
	70	class daisy_entry
	71	{
	72	public:
	73	daisy_entry(device_t *device);
	74	daisy_entry *next() const { return m_next; }
	75
	76	daisy_entry * m_next; // next device
	77	device_t * m_device; // associated device
	78	device_adamnet_card_interface * m_interface; // associated device's daisy interface
	79
	80	int m_txd;
	81	};
	82
	83	simple_list<daisy_entry> m_device_list;
	84
	85	int m_txd;
	86	int m_reset;
	87	};
	88
	89
	90	// ======================> adamnet_slot_device
	91
	92	class adamnet_slot_device : public device_t,
	93	public device_slot_interface
	94	{
	95	public:
	96	// construction/destruction
	97	adamnet_slot_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
	98
	99	// device-level overrides
	100	virtual void device_start();
	101
	102	protected:
	103	// configuration
	104	adamnet_device *m_bus;
	105	};
	106
	107
	108	// ======================> device_adamnet_card_interface
	109
	110	class device_adamnet_card_interface : public device_slot_card_interface
	111	{
	112	public:
	113	// construction/destruction
	114	device_adamnet_card_interface(const machine_config &mconfig, device_t &device);
	115	virtual ~device_adamnet_card_interface();
	116
	117	virtual void adamnet_reset_w(int state) = 0;
	118
	119	adamnet_device *m_bus;
	120	};
	121
	122
	123	// device type definitions
	124	extern const device_type ADAMNET;
	125	extern const device_type ADAMNET_SLOT;
	126
	127
	128	// slot devices
	129	#include "machine/adam_ddp.h"
	130	#include "machine/adam_fdc.h"
	131	#include "machine/adam_kb.h"
	132	#include "machine/adam_prn.h"
	133	#include "machine/adam_spi.h"
	134
	135	SLOT_INTERFACE_EXTERN( adamnet_devices );
	136
	137
	138
	139	#endif

trunk/src/mess/includes/adam.h
r18894	r18895
6	6	#include "emu.h"
7	7	#include "cpu/z80/z80.h"
8	8	#include "cpu/m6800/m6800.h"
9		#include "formats/basicdsk.h"
10		#include "formats/adam_cas.h"
11	9	#include "imagedev/cartslot.h"
12		#include "imagedev/cassette.h"
13		#include "imagedev/flopdrv.h"
	10	#include "machine/adamnet.h"
14	11	#include "machine/coleco.h"
15	12	#include "machine/ram.h"
16		#include "machine/wd17xx.h"
17	13	#include "sound/sn76496.h"
18	14	#include "video/tms9928a.h"
19	15
20		#define Z80_TAG "u1"
21		#define SN76489A_TAG "u20"
22		#define TMS9928A_TAG "tms9928a"
23		#define WD2793_TAG "u11"
24		#define M6801_MAIN_TAG "cpu1"
25		#define M6801_KB_TAG "cpu2"
26		#define M6801_DDP_TAG "cpu3"
27		#define M6801_PRN_TAG "cpu4"
28		#define M6801_FDC_TAG "cpu5"
29		#define M6801_SPI_TAG "cpu6"
30		#define SCREEN_TAG "screen"
	16	#define Z80_TAG "u1"
	17	#define M6801_TAG "u6"
	18	#define SN76489A_TAG "u20"
	19	#define TMS9928A_TAG "tms9928a"
	20	#define SCREEN_TAG "screen"
31	21
32	22	class adam_state : public driver_device
33	23	{
34	24	public:
35	25	adam_state(const machine_config &mconfig, device_type type, const char *tag)
36	26	: driver_device(mconfig, type, tag),
37		m_maincpu(*this, Z80_TAG),
38		m_netcpu(*this, M6801_MAIN_TAG),
39		m_fdc(*this, WD2793_TAG),
40		m_ram(*this, RAM_TAG),
41		m_ddp0(*this, CASSETTE_TAG),
42		m_ddp1(*this, CASSETTE2_TAG),
43		m_floppy0(*this, FLOPPY_0),
44		m_rxd(1),
45		m_reset(0),
46		m_dma(1),
47		m_bwr(1),
48		m_fdc_ram(*this, "fdc_ram")
49		{
50		for (int i = 0; i < 6; i++)
51		m_txd[i] = 1;
52		}
	27	m_maincpu(*this, Z80_TAG),
	28	m_netcpu(*this, M6801_TAG),
	29	m_ram(*this, RAM_TAG),
	30	m_adamnet(*this, ADAMNET_TAG),
	31	m_dma(1),
	32	m_bwr(1)
	33	{ }
53	34
54	35	required_device<cpu_device> m_maincpu;
55	36	required_device<cpu_device> m_netcpu;
56		required_device<wd2793_device> m_fdc;
57	37	required_device<ram_device> m_ram;
58		required_device<cassette_image_device> m_ddp0;
59		required_device<cassette_image_device> m_ddp1;
60		required_device<legacy_floppy_image_device> m_floppy0;
	38	required_device<adamnet_device> m_adamnet;
61	39
62	40	virtual void machine_start();
63	41	virtual void machine_reset();
64	42
65	43	void bankswitch();
66		void adamnet_txd_w(int device, int state);
67	44
68	45	DECLARE_WRITE_LINE_MEMBER( os3_w );
69	46
r18894	r18895
76	53	DECLARE_READ8_MEMBER( input1_r );
77	54	DECLARE_READ8_MEMBER( input2_r );
78	55
79		DECLARE_WRITE8_MEMBER( master6801_p1_w );
80		DECLARE_READ8_MEMBER( master6801_p2_r );
81		DECLARE_WRITE8_MEMBER( master6801_p2_w );
82		DECLARE_READ8_MEMBER( master6801_p3_r );
83		DECLARE_WRITE8_MEMBER( master6801_p3_w );
84		DECLARE_WRITE8_MEMBER( master6801_p4_w );
	56	DECLARE_WRITE8_MEMBER( m6801_p1_w );
	57	DECLARE_READ8_MEMBER( m6801_p2_r );
	58	DECLARE_WRITE8_MEMBER( m6801_p2_w );
	59	DECLARE_READ8_MEMBER( m6801_p3_r );
	60	DECLARE_WRITE8_MEMBER( m6801_p3_w );
	61	DECLARE_WRITE8_MEMBER( m6801_p4_w );
85	62
86		DECLARE_READ8_MEMBER( kb6801_p1_r );
87		DECLARE_READ8_MEMBER( kb6801_p2_r );
88		DECLARE_WRITE8_MEMBER( kb6801_p2_w );
89		DECLARE_READ8_MEMBER( kb6801_p3_r );
90		DECLARE_WRITE8_MEMBER( kb6801_p3_w );
91		DECLARE_READ8_MEMBER( kb6801_p4_r );
92		DECLARE_WRITE8_MEMBER( kb6801_p4_w );
	63	DECLARE_WRITE_LINE_MEMBER( vdc_int_w );
93	64
94		DECLARE_WRITE8_MEMBER( ddp6801_p1_w );
95		DECLARE_READ8_MEMBER( ddp6801_p2_r );
96		DECLARE_WRITE8_MEMBER( ddp6801_p2_w );
97		DECLARE_READ8_MEMBER( ddp6801_p4_r );
98
99		DECLARE_WRITE8_MEMBER( printer6801_p1_w );
100		DECLARE_READ8_MEMBER( printer6801_p2_r );
101		DECLARE_WRITE8_MEMBER( printer6801_p2_w );
102		DECLARE_READ8_MEMBER( printer6801_p3_r );
103		DECLARE_READ8_MEMBER( printer6801_p4_r );
104		DECLARE_WRITE8_MEMBER( printer6801_p4_w );
105
106		DECLARE_READ8_MEMBER( fdc6801_p1_r );
107		DECLARE_WRITE8_MEMBER( fdc6801_p1_w );
108		DECLARE_READ8_MEMBER( fdc6801_p2_r );
109		DECLARE_WRITE8_MEMBER( fdc6801_p2_w );
110		DECLARE_WRITE8_MEMBER( fdc6801_p4_w );
111
112	65	// memory state
113	66	UINT8 m_mioc;
114	67	int m_game;
115	68
116	69	// ADAMnet state
117		UINT8 m_adamnet;
118		int m_txd[6];
119		int m_rxd;
120		int m_reset;
	70	UINT8 m_an;
121	71
122	72	// DMA state
123	73	UINT16 m_ba;
r18894	r18895
126	76	UINT8 m_data_in;
127	77	UINT8 m_data_out;
128	78
129		// keyboard state
130		UINT16 m_key_y;
131
132	79	// paddle state
133	80	int m_joy_mode;
134	81	UINT8 m_joy_status0;
r18894	r18895
137	84	// video state
138	85	int m_vdp_nmi;
139	86
140		// cassette state
141		int m_wr0;
142		int m_wr1;
143		int m_track;
144	87	TIMER_DEVICE_CALLBACK_MEMBER(paddle_tick);
145		DECLARE_WRITE_LINE_MEMBER(adam_vdp_interrupt);
146
147		// floppy state
148		required_shared_ptr<UINT8> m_fdc_ram;
149	88	};
150	89
151	90	#endif

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