trunk/src/emu/cpu/m6502/ddeco16.lst
r18891 | r18892 | |
1 | 1 | # deco16 - deco variant |
2 | | brk_imp ora_idx ill_non ill_non ill_non ora_zpg asl_zpg ill_non php_imp ora_imm asl_acc u0B_zpg ill_non ora_aba asl_aba ill_non |
| 2 | brk_16_imp ora_idx ill_non ill_non ill_non ora_zpg asl_zpg ill_non php_imp ora_imm asl_acc u0B_zpg ill_non ora_aba asl_aba ill_non |
3 | 3 | bpl_rel ora_idy ill_non u13_zpg ill_non ora_zpx asl_zpx ill_non clc_imp ora_aby ill_non ill_non ill_non ora_abx asl_abx ill_non |
4 | 4 | jsr_adr and_idx ill_non u23_zpg bit_zpg and_zpg rol_zpg ill_non plp_imp and_imm rol_acc ill_non bit_aba and_aba rol_aba ill_non |
5 | 5 | bmi_rel and_idy ill_non ill_non ill_non and_zpx rol_zpx ill_non sec_imp and_aby ill_non ill_non ill_non and_abx rol_abx u3F_zpg |
r18891 | r18892 | |
15 | 15 | bne_rel cmp_idy ill_non ill_non ill_non cmp_zpx dec_zpx ill_non cld_imp cmp_aby ill_non ill_non ill_non cmp_abx dec_abx ill_non |
16 | 16 | cpx_imm sbc_idx ill_non ill_non cpx_zpg sbc_zpg inc_zpg ill_non inx_imp sbc_imm nop_imp ill_non cpx_aba sbc_aba inc_aba ill_non |
17 | 17 | beq_rel sbc_idy ill_non ill_non ill_non sbc_zpx inc_zpx ill_non sed_imp sbc_aby ill_non ill_non ill_non sbc_abx inc_abx ill_non |
18 | | reset |
| 18 | reset_16 |
trunk/src/emu/cpu/m6502/odeco16.lst
r18891 | r18892 | |
1 | 1 | # deco 16 opcodes |
| 2 | brk_16_imp |
| 3 | // The 6502 bug when a nmi occurs in a brk is reproduced (case !irq_taken && nmi_state) |
| 4 | if(irq_taken) { |
| 5 | read_pc_noinc(); |
| 6 | } else { |
| 7 | read_pc(); |
| 8 | } |
| 9 | write(SP, PC >> 8); |
| 10 | dec_SP(); |
| 11 | write(SP, PC); |
| 12 | dec_SP(); |
| 13 | write(SP, irq_taken ? P & ~F_B : P); |
| 14 | dec_SP(); |
| 15 | if(nmi_state) { |
| 16 | PC = read_direct(0xfff7); |
| 17 | PC = set_h(PC, read_direct(0xfff6)); |
| 18 | nmi_state = false; |
| 19 | standard_irq_callback(NMI_LINE); |
| 20 | } else { |
| 21 | PC = read_direct(0xfff3); |
| 22 | PC = set_h(PC, read_direct(0xfff2)); |
| 23 | if(irq_taken) |
| 24 | standard_irq_callback(IRQ_LINE); |
| 25 | } |
| 26 | irq_taken = false; |
| 27 | P |= F_I; // Do *not* move after the prefetch |
| 28 | prefetch(); |
| 29 | inst_state = -1; |
| 30 | |
2 | 31 | ill_non |
3 | 32 | logerror("%s: Unimplemented instruction %02x\n", tag(), inst_state); |
4 | 33 | prefetch(); |
r18891 | r18892 | |
63 | 92 | if(DECO16_VERBOSE) |
64 | 93 | logerror("%s: VBL %02x (%04x)\n", tag(), NPC, TMP2); |
65 | 94 | prefetch(); |
| 95 | |
| 96 | # exceptions |
| 97 | reset_16 |
| 98 | PC = read_direct(0xfff1); |
| 99 | PC = set_h(PC, read_direct(0xfff0)); |
| 100 | prefetch(); |
| 101 | inst_state = -1; |