trunk/src/mame/drivers/namcos23.c
| r18807 | r18808 | |
|---|
| 1292 | 1292 | UINT16 sram[0x20000]; // Ram-based tiles for rendering |
| 1293 | 1293 | UINT16 pczram[0x200]; // Ram-based tilemap for rendering, or something else |
| 1294 | 1294 | UINT32 adr; |
| 1295 | UINT16 status_c; |
| 1295 | 1296 | }; |
| 1296 | 1297 | |
| 1297 | 1298 | struct c421_t |
| r18807 | r18808 | |
|---|
| 1671 | 1672 | return m_c412.adr >> 16; |
| 1672 | 1673 | case 0xa: |
| 1673 | 1674 | return s23_c412_ram_r(space, m_c412.adr, mem_mask); |
| 1675 | case 0xc: |
| 1676 | // unknown status, 500gp reads it and waits for a transition |
| 1677 | // no other games use it? |
| 1678 | m_c412.status_c ^= 1; |
| 1679 | return m_c412.status_c; |
| 1674 | 1680 | } |
| 1675 | 1681 | |
| 1676 | 1682 | logerror("c412_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); |
| r18807 | r18808 | |
|---|
| 1681 | 1687 | { |
| 1682 | 1688 | switch (offset) |
| 1683 | 1689 | { |
| 1684 | | case 8: |
| 1690 | case 0x2: |
| 1691 | // d0: cz on |
| 1692 | // other bits: no function? |
| 1693 | break; |
| 1694 | case 0x8: |
| 1685 | 1695 | m_c412.adr = (data & mem_mask) | (m_c412.adr & (0xffffffff ^ mem_mask)); |
| 1686 | 1696 | break; |
| 1687 | | case 9: |
| 1697 | case 0x9: |
| 1688 | 1698 | m_c412.adr = ((data & mem_mask) << 16) | (m_c412.adr & (0xffffffff ^ (mem_mask << 16))); |
| 1689 | 1699 | break; |
| 1690 | | case 10: |
| 1700 | case 0xa: |
| 1691 | 1701 | s23_c412_ram_w(space, m_c412.adr, data, mem_mask); |
| 1692 | 1702 | m_c412.adr += 2; |
| 1693 | 1703 | break; |