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r18780 Tuesday 30th October, 2012 at 14:27:27 UTC by Dirk Best
px4: cleanup
[src/mess/drivers]px4.c

trunk/src/mess/drivers/px4.c
r18779r18780
1919#include "px4.lh"
2020
2121
22/***************************************************************************
23    CONSTANTS
24***************************************************************************/
22//**************************************************************************
23//  CONSTANTS
24//**************************************************************************
2525
26#define VERBOSE 0
26#define VERBOSE 1
2727
28/* interrupt sources */
29#define INT0_7508   0x01
30#define INT1_ART   0x02
31#define INT2_ICF   0x04
32#define INT3_OVF   0x08
33#define INT4_EXT   0x10
28// interrupt sources
29#define INT0_7508   0x01
30#define INT1_ART    0x02
31#define INT2_ICF    0x04
32#define INT3_OVF    0x08
33#define INT4_EXT    0x10
3434
35/* 7508 interrupt sources */
36#define UPD7508_INT_ALARM      0x02
37#define UPD7508_INT_POWER_FAIL   0x04
38#define UPD7508_INT_7508_RESET   0x08
39#define UPD7508_INT_Z80_RESET   0x10
40#define UPD7508_INT_ONE_SECOND   0x20
35// 7508 interrupt sources
36#define UPD7508_INT_ALARM       0x02
37#define UPD7508_INT_POWER_FAIL  0x04
38#define UPD7508_INT_7508_RESET  0x08
39#define UPD7508_INT_Z80_RESET   0x10
40#define UPD7508_INT_ONE_SECOND  0x20
4141
42/* art (asynchronous receiver transmitter) */
43#define ART_TXRDY   0x01   /* output buffer empty */
44#define ART_RXRDY   0x02   /* data byte received */
45#define ART_TXEMPTY   0x04   /* transmit buffer empty */
46#define ART_PE      0x08   /* parity error */
47#define ART_OE      0x10   /* overrun error */
48#define ART_FE      0x20   /* framing error */
42// art (asynchronous receiver transmitter)
43#define ART_TXRDY   0x01    // output buffer empty
44#define ART_RXRDY   0x02    // data byte received
45#define ART_TXEMPTY 0x04    // transmit buffer empty
46#define ART_PE      0x08    // parity error
47#define ART_OE      0x10    // overrun error
48#define ART_FE      0x20    // framing error
4949
50/* art baud rates */
50// art baud rates
5151static const int transmit_rate[] = { 2112, 1536, 768, 384, 192, 96, 48, 24, 192, 3072, 12, 6, 1152 };
5252static const int receive_rate[] = { 2112, 1536, 768, 384, 192, 96, 48, 24, 3072, 192, 12, 6, 1152 };
5353
5454
55/***************************************************************************
56    MACROS
57***************************************************************************/
55//**************************************************************************
56//  MACROS
57//**************************************************************************
5858
59#define ART_TX_ENABLED   (BIT(m_artcr, 0))
60#define ART_RX_ENABLED   (BIT(px4->m_artcr, 2))
59#define ART_TX_ENABLED  (BIT(m_artcr, 0))
60#define ART_RX_ENABLED  (BIT(m_artcr, 2))
6161
62#define ART_DATA      (BIT(px4->m_artmr, 2))   /* number of data bits, 7 or 8 */
63#define ART_PEN         (BIT(px4->m_artmr, 4))   /* parity enabled */
64#define ART_EVEN      (BIT(px4->m_artmr, 5))   /* even or odd parity */
65#define ART_STOP      (BIT(px4->m_artmr, 7))   /* number of stop bits, 1 or 2 */
62#define ART_DATA        (BIT(m_artmr, 2))   // number of data bits, 7 or 8
63#define ART_PEN         (BIT(m_artmr, 4))   // parity enabled
64#define ART_EVEN        (BIT(m_artmr, 5))   // even or odd parity
65#define ART_STOP        (BIT(m_artmr, 7))   // number of stop bits, 1 or 2
6666
6767
68/***************************************************************************
69    TYPE DEFINITIONS
70***************************************************************************/
68//**************************************************************************
69//  TYPE DEFINITIONS
70//**************************************************************************
7171
7272class px4_state : public driver_device
7373{
7474public:
7575   px4_state(const machine_config &mconfig, device_type type, const char *tag)
76      : driver_device(mconfig, type, tag) { }
76      : driver_device(mconfig, type, tag),
77         m_z80(*this, "maincpu"),
78         m_ram(*this, RAM_TAG),
79         m_centronics(*this, "centronics"),
80         m_ext_cas(*this, "extcas")
81         { }
7782
78   /* internal ram */
79   ram_device *m_ram;
83   // internal devices
84   required_device<cpu_device> m_z80;
85   required_device<ram_device> m_ram;
86   required_device<centronics_device> m_centronics;
87   required_device<cassette_image_device> m_ext_cas;
8088
8189   /* gapnit register */
8290   UINT8 m_ctrl1;
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95103   UINT8 m_vadr;
96104   UINT8 m_yoff;
97105
106   void gapnit_interrupt();
107
98108   /* gapnio */
99109   emu_timer *m_receive_timer;
100110   emu_timer *m_transmit_timer;
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106116   UINT8 m_swr;
107117
108118   /* 7508 internal */
109   int m_one_sec_int_enabled;
110   int m_alarm_int_enabled;
111   int m_key_int_enabled;
119   bool m_one_sec_int_enabled;
120   bool m_alarm_int_enabled;
121   bool m_key_int_enabled;
112122
113123   UINT8 m_key_status;
114124   UINT8 m_interrupt_status;
115125
116   /* centronics printer */
117   centronics_device *m_centronics;
118
119126   /* external ramdisk */
120127   offs_t m_ramdisk_address;
121128   UINT8 *m_ramdisk;
122129
123130   /* external cassette/barcode reader */
124   cassette_image_device *m_ext_cas;
125131   emu_timer *m_ext_cas_timer;
126132   int m_ear_last_state;
127133
128134   /* external devices */
129135   device_t *m_sio_device;
130136   device_t *m_rs232c_device;
137
138   void install_rom_capsule(address_space &space, int size, const char *region);
139
131140   DECLARE_READ8_MEMBER(px4_icrlc_r);
132141   DECLARE_WRITE8_MEMBER(px4_ctrl1_w);
133142   DECLARE_READ8_MEMBER(px4_icrhc_r);
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172181   TIMER_CALLBACK_MEMBER(receive_data);
173182   TIMER_DEVICE_CALLBACK_MEMBER(frc_tick);
174183   TIMER_DEVICE_CALLBACK_MEMBER(upd7508_1sec_callback);
184
175185   void px4_sio_txd(device_t *device,int state);
176186   int px4_sio_rxd(device_t *device);
177187   int px4_sio_pin(device_t *device);
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186196};
187197
188198
189/***************************************************************************
190    SERIAL PORT
191***************************************************************************/
199//**************************************************************************
200//  SERIAL PORT
201//**************************************************************************
192202
193/* The floppy is connected to this port */
203// The floppy is connected to this port
194204
195205void px4_state::px4_sio_txd(device_t *device,int state)
196206{
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233243}
234244
235245
236/***************************************************************************
237    RS232C PORT
238***************************************************************************/
246//**************************************************************************
247//  RS232C PORT
248//**************************************************************************
239249
240/* Currently nothing is connected to this port */
250// Currently nothing is connected to this port
241251
242252void px4_state::px4_rs232c_txd(device_t *device,int state)
243253{
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291301}
292302
293303
294/***************************************************************************
295    GAPNIT
296***************************************************************************/
304//**************************************************************************
305//  GAPNIT
306//**************************************************************************
297307
298/* process interrupts */
299static void gapnit_interrupt(running_machine &machine)
308// process interrupts
309void px4_state::gapnit_interrupt()
300310{
301   px4_state *px4 = machine.driver_data<px4_state>();
302
303   /* any interrupts enabled and pending? */
304   if (px4->m_ier & px4->m_isr & INT0_7508)
311   // any interrupts enabled and pending?
312   if (m_ier & m_isr & INT0_7508)
305313   {
306      px4->m_isr &= ~INT0_7508;
307      machine.device("maincpu")->execute().set_input_line_and_vector(0, ASSERT_LINE, 0xf0);
314      m_isr &= ~INT0_7508;
315      m_z80->set_input_line_and_vector(0, ASSERT_LINE, 0xf0);
308316   }
309   else if (px4->m_ier & px4->m_isr & INT1_ART)
310      machine.device("maincpu")->execute().set_input_line_and_vector(0, ASSERT_LINE, 0xf2);
311   else if (px4->m_ier & px4->m_isr & INT2_ICF)
312      machine.device("maincpu")->execute().set_input_line_and_vector(0, ASSERT_LINE, 0xf4);
313   else if (px4->m_ier & px4->m_isr & INT3_OVF)
314      machine.device("maincpu")->execute().set_input_line_and_vector(0, ASSERT_LINE, 0xf6);
315   else if (px4->m_ier & px4->m_isr & INT4_EXT)
316      machine.device("maincpu")->execute().set_input_line_and_vector(0, ASSERT_LINE, 0xf8);
317   else if (m_ier & m_isr & INT1_ART)
318      m_z80->set_input_line_and_vector(0, ASSERT_LINE, 0xf2);
319   else if (m_ier & m_isr & INT2_ICF)
320      m_z80->set_input_line_and_vector(0, ASSERT_LINE, 0xf4);
321   else if (m_ier & m_isr & INT3_OVF)
322      m_z80->set_input_line_and_vector(0, ASSERT_LINE, 0xf6);
323   else if (m_ier & m_isr & INT4_EXT)
324      m_z80->set_input_line_and_vector(0, ASSERT_LINE, 0xf8);
317325   else
318      machine.device("maincpu")->execute().set_input_line(0, CLEAR_LINE);
326      m_z80->set_input_line(0, CLEAR_LINE);
319327}
320328
321/* external cassette or barcode reader input */
329// external cassette or barcode reader input
322330TIMER_CALLBACK_MEMBER(px4_state::ext_cassette_read)
323331{
324332   UINT8 result;
325333   int trigger = 0;
326334
327   /* sample input state */
335   // sample input state
328336   result = (m_ext_cas->input() > 0) ? 1 : 0;
329337
330   /* detect transition */
338   // detect transition
331339   switch ((m_ctrl1 >> 1) & 0x03)
332340   {
333   case 0: /* trigger inhibit */
341   case 0: // trigger inhibit
334342      trigger = 0;
335343      break;
336   case 1: /* falling edge trigger */
344   case 1: // falling edge trigger
337345      trigger = m_ear_last_state == 1 && result == 0;
338346      break;
339   case 2: /* rising edge trigger */
347   case 2: // rising edge trigger
340348      trigger = m_ear_last_state == 0 && result == 1;
341349      break;
342   case 3: /* rising/falling edge trigger */
350   case 3: // rising/falling edge trigger
343351      trigger = m_ear_last_state != result;
344352      break;
345353   }
346354
347   /* generate an interrupt if we need to trigger */
355   // generate an interrupt if we need to trigger
348356   if (trigger)
349357   {
350358      m_icrb = m_frc_value;
351359      m_isr |= INT2_ICF;
352      gapnit_interrupt(machine());
360      gapnit_interrupt();
353361   }
354362
355   /* save last state */
363   // save last state
356364   m_ear_last_state = result;
357365}
358366
359/* free running counter */
367// free running counter
360368TIMER_DEVICE_CALLBACK_MEMBER(px4_state::frc_tick)
361369{
362370
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365373   if (m_frc_value == 0)
366374   {
367375      m_isr |= INT3_OVF;
368      gapnit_interrupt(machine());
376      gapnit_interrupt();
369377   }
370378}
371379
372/* input capture register low command trigger */
380// input capture register low command trigger
373381READ8_MEMBER(px4_state::px4_icrlc_r)
374382{
375
376383   if (VERBOSE)
377384      logerror("%s: px4_icrlc_r\n", machine().describe_context());
378385
379   /* latch value */
386   // latch value
380387   m_frc_latch = m_frc_value;
381388
382389   return m_frc_latch & 0xff;
383390}
384391
385/* control register 1 */
392// control register 1
386393WRITE8_MEMBER(px4_state::px4_ctrl1_w)
387394{
388395   int baud;
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390397   if (VERBOSE)
391398      logerror("%s: px4_ctrl1_w (0x%02x)\n", machine().describe_context(), data);
392399
393   /* baudrate generator */
400   // baudrate generator
394401   baud = data >> 4;
395402
396403   if (baud <= 12)
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402409   m_ctrl1 = data;
403410}
404411
405/* input capture register high command trigger */
412// input capture register high command trigger
406413READ8_MEMBER(px4_state::px4_icrhc_r)
407414{
408
409415   if (VERBOSE)
410416      logerror("%s: px4_icrhc_r\n", machine().describe_context());
411417
412418   return (m_frc_latch >> 8) & 0xff;
413419}
414420
415/* command register */
421// command register
416422WRITE8_MEMBER(px4_state::px4_cmdr_w)
417423{
418
419424   if (VERBOSE)
420425      logerror("%s: px4_cmdr_w (0x%02x)\n", machine().describe_context(), data);
421426
422   /* clear overflow interrupt? */
427   // clear overflow interrupt?
423428   if (BIT(data, 2))
424429   {
425430      m_isr &= ~INT3_OVF;
426      gapnit_interrupt(machine());
431      gapnit_interrupt();
427432   }
428433}
429434
430/* input capture register low barcode trigger */
435// input capture register low barcode trigger
431436READ8_MEMBER(px4_state::px4_icrlb_r)
432437{
433
434438   if (VERBOSE)
435439      logerror("%s: px4_icrlb_r\n", machine().describe_context());
436440
437441   return m_icrb & 0xff;
438442}
439443
440/* control register 2 */
444// control register 2
441445WRITE8_MEMBER(px4_state::px4_ctrl2_w)
442446{
443
444447   if (VERBOSE)
445448      logerror("%s: px4_ctrl2_w (0x%02x)\n", machine().describe_context(), data);
446449
447   /* bit 0, MIC, cassette output */
450   // bit 0, MIC, cassette output
448451   m_ext_cas->output( BIT(data, 0) ? -1.0 : +1.0);
449452
450   /* bit 1, RMT, cassette motor */
453   // bit 1, RMT, cassette motor
451454   if (BIT(data, 1))
452455   {
453      m_ext_cas->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
456      m_ext_cas->change_state(CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);
454457      m_ext_cas_timer->adjust(attotime::zero, 0, attotime::from_hz(44100));
455458   }
456459   else
457460   {
458      m_ext_cas->change_state(CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
461      m_ext_cas->change_state(CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
459462      m_ext_cas_timer->adjust(attotime::zero);
460463   }
461464}
462465
463/* input capture register high barcode trigger */
466// input capture register high barcode trigger
464467READ8_MEMBER(px4_state::px4_icrhb_r)
465468{
466
467469   if (VERBOSE)
468470      logerror("%s: px4_icrhb_r\n", machine().describe_context());
469471
470   /* clear icf interrupt */
472   // clear icf interrupt
471473   m_isr &= ~INT2_ICF;
472   gapnit_interrupt(machine());
474   gapnit_interrupt();
473475
474476   return (m_icrb >> 8) & 0xff;
475477}
476478
477/* interrupt status register */
479// interrupt status register
478480READ8_MEMBER(px4_state::px4_isr_r)
479481{
480
481482   if (VERBOSE)
482483      logerror("%s: px4_isr_r\n", machine().describe_context());
483484
484485   return m_isr;
485486}
486487
487/* interrupt enable register */
488// interrupt enable register
488489WRITE8_MEMBER(px4_state::px4_ier_w)
489490{
490
491491   if (VERBOSE)
492492      logerror("%s: px4_ier_w (0x%02x)\n", machine().describe_context(), data);
493493
494494   m_ier = data;
495   gapnit_interrupt(machine());
495   gapnit_interrupt();
496496}
497497
498/* status register */
498// status register
499499READ8_MEMBER(px4_state::px4_str_r)
500500{
501501   UINT8 result = 0;
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504504      logerror("%s: px4_str_r\n", machine().describe_context());
505505
506506   result |= (m_ext_cas)->input() > 0 ? 1 : 0;
507   result |= 1 << 1;   /* BCRD, barcode reader input */
508   result |= 1 << 2;   /* RDY signal from 7805 */
509   result |= 1 << 3;   /* RDYSIO, enable access to the 7805 */
510   result |= m_bankr & 0xf0;   /* bit 4-7, BANK - memory bank */
507   result |= 1 << 1;   // BCRD, barcode reader input
508   result |= 1 << 2;   // RDY signal from 7805
509   result |= 1 << 3;   // RDYSIO, enable access to the 7805
510   result |= m_bankr & 0xf0;   // bit 4-7, BANK - memory bank
511511
512512   return result;
513513}
514514
515/* helper function to map rom capsules */
516static void install_rom_capsule(address_space &space, int size, const char *region)
515// helper function to map rom capsules
516void px4_state::install_rom_capsule(address_space &space, int size, const char *region)
517517{
518   px4_state *state = space.machine().driver_data<px4_state>();
519
520   /* ram, part 1 */
518   // ram, part 1
521519   space.install_readwrite_bank(0x0000, 0xdfff - size, "bank1");
522   state->membank("bank1")->set_base(state->m_ram->pointer());
520   membank("bank1")->set_base(m_ram->pointer());
523521
524   /* actual rom data, part 1 */
522   // actual rom data, part 1
525523   space.install_read_bank(0xe000 - size, 0xffff - size, "bank2");
526524   space.nop_write(0xe000 - size, 0xffff - size);
527   state->membank("bank2")->set_base(space.machine().root_device().memregion(region)->base() + (size - 0x2000));
525   membank("bank2")->set_base(memregion(region)->base() + (size - 0x2000));
528526
529   /* rom data, part 2 */
527   // rom data, part 2
530528   if (size != 0x2000)
531529   {
532530      space.install_read_bank(0x10000 - size, 0xdfff, "bank3");
533531      space.nop_write(0x10000 - size, 0xdfff);
534      state->membank("bank3")->set_base(state->memregion(region)->base());
532      membank("bank3")->set_base(memregion(region)->base());
535533   }
536534
537   /* ram, continued */
535   // ram, continued
538536   space.install_readwrite_bank(0xe000, 0xffff, "bank4");
539   state->membank("bank4")->set_base(state->m_ram->pointer() + 0xe000);
537   membank("bank4")->set_base(m_ram->pointer() + 0xe000);
540538}
541539
542/* bank register */
540// bank register
543541WRITE8_MEMBER(px4_state::px4_bankr_w)
544542{
545   address_space &space_program = machine().device("maincpu")->memory().space(AS_PROGRAM);
543   address_space &space_program = m_z80->space(AS_PROGRAM);
546544
547545   if (VERBOSE)
548546      logerror("%s: px4_bankr_w (0x%02x)\n", machine().describe_context(), data);
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556554      /* system bank */
557555      space_program.install_read_bank(0x0000, 0x7fff, "bank1");
558556      space_program.nop_write(0x0000, 0x7fff);
559      membank("bank1")->set_base(machine().root_device().memregion("os")->base());
557      membank("bank1")->set_base(memregion("os")->base());
560558      space_program.install_readwrite_bank(0x8000, 0xffff, "bank2");
561559      membank("bank2")->set_base(m_ram->pointer() + 0x8000);
562560      break;
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581579   }
582580}
583581
584/* serial io register */
582// serial io register
585583READ8_MEMBER(px4_state::px4_sior_r)
586584{
587
588585   if (VERBOSE)
589586      logerror("%s: px4_sior_r 0x%02x\n", machine().describe_context(), m_sior);
590587
591588   return m_sior;
592589}
593590
594/* serial io register */
591// serial io register
595592WRITE8_MEMBER(px4_state::px4_sior_w)
596593{
597
598594   if (VERBOSE)
599595      logerror("%s: px4_sior_w (0x%02x)\n", machine().describe_context(), data);
600596
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619615         if (VERBOSE)
620616            logerror("> 7508 has interrupts pending: 0x%02x\n", m_interrupt_status);
621617
622         /* signal the interrupt(s) */
618         // signal the interrupt(s)
623619         m_sior = 0xc1 | m_interrupt_status;
624620         m_interrupt_status = 0x00;
625621      }
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630626      }
631627      else
632628      {
633         /* nothing happenend */
629         // nothing happenend
634630         m_sior = 0xbf;
635631      }
636632
r18779r18780
649645      if (VERBOSE)
650646         logerror("7508 cmd: KB Interrupt OFF\n");
651647
652      m_key_int_enabled = FALSE;
648      m_key_int_enabled = false;
653649      break;
654650
655651   case 0x16:
r18779r18780
657653      if (VERBOSE)
658654         logerror("7508 cmd: KB Interrupt ON\n");
659655
660      m_key_int_enabled = TRUE;
656      m_key_int_enabled = true;
661657      break;
662658
663659   case 0x07: if (VERBOSE) logerror("7508 cmd: Clock Read\n"); break;
r18779r18780
668664      if (VERBOSE)
669665         logerror("7508 cmd: Power Switch Read\n");
670666
671      /* indicate that the power switch is in the "ON" position */
667      // indicate that the power switch is in the "ON" position
672668      m_sior = 0x01;
673669      break;
674670
r18779r18780
694690      if (VERBOSE)
695691         logerror("7508 cmd: 1 sec. Interrupt OFF\n");
696692
697      m_one_sec_int_enabled = FALSE;
693      m_one_sec_int_enabled = false;
698694      break;
699695
700696   case 0x1d:
r18779r18780
702698      if (VERBOSE)
703699         logerror("7508 cmd: 1 sec. Interrupt ON\n");
704700
705      m_one_sec_int_enabled = TRUE;
701      m_one_sec_int_enabled = true;
706702      break;
707703
708704   case 0x0e:
r18779r18780
718714}
719715
720716
721/***************************************************************************
722    GAPNDL
723***************************************************************************/
717//**************************************************************************
718//  GAPNDL
719//**************************************************************************
724720
725/* vram start address register */
721// vram start address register
726722WRITE8_MEMBER(px4_state::px4_vadr_w)
727723{
728
729724   if (VERBOSE)
730725      logerror("%s: px4_vadr_w (0x%02x)\n", machine().describe_context(), data);
731726
732727   m_vadr = data;
733728}
734729
735/* y offset register */
730// y offset register
736731WRITE8_MEMBER(px4_state::px4_yoff_w)
737732{
738
739733   if (VERBOSE)
740734      logerror("%s: px4_yoff_w (0x%02x)\n", machine().describe_context(), data);
741735
742736   m_yoff = data;
743737}
744738
745/* frame register */
739// frame register
746740WRITE8_MEMBER(px4_state::px4_fr_w)
747741{
748742   if (VERBOSE)
749743      logerror("%s: px4_fr_w (0x%02x)\n", machine().describe_context(), data);
750744}
751745
752/* speed-up register */
746// speed-up register
753747WRITE8_MEMBER(px4_state::px4_spur_w)
754748{
755749   if (VERBOSE)
r18779r18780
757751}
758752
759753
760/***************************************************************************
761    GAPNIO
762***************************************************************************/
754//**************************************************************************
755//  GAPNIO
756//**************************************************************************
763757
764758TIMER_CALLBACK_MEMBER(px4_state::transmit_data)
765759{
766
767   if (BIT(m_artcr, 0))// ART_TX_ENABLED
760   if (ART_TX_ENABLED)
768761   {
769762
770763   }
r18779r18780
772765
773766TIMER_CALLBACK_MEMBER(px4_state::receive_data)
774767{
775   px4_state *px4 = machine().driver_data<px4_state>();
776
777768   if (ART_RX_ENABLED)
778769   {
779770
780771   }
781772}
782773
783/* cartridge interface */
774// cartridge interface
784775READ8_MEMBER(px4_state::px4_ctgif_r)
785776{
786777   if (VERBOSE)
r18779r18780
789780   return 0xff;
790781}
791782
792/* cartridge interface */
783// cartridge interface
793784WRITE8_MEMBER(px4_state::px4_ctgif_w)
794785{
795786   if (VERBOSE)
796787      logerror("%s: px4_ctgif_w (0x%02x @ 0x%02x)\n", machine().describe_context(), data, offset);
797788}
798789
799/* art data input register */
790// art data input register
800791READ8_MEMBER(px4_state::px4_artdir_r)
801792{
802
803793   if (VERBOSE)
804794      logerror("%s: px4_artdir_r\n", machine().describe_context());
805795
806796   return m_artdir;
807797}
808798
809/* art data output register */
799// art data output register
810800WRITE8_MEMBER(px4_state::px4_artdor_w)
811801{
812
813802   if (VERBOSE)
814803      logerror("%s: px4_artdor_w (0x%02x)\n", machine().describe_context(), data);
815804
816   /* clear ready */
805   // clear ready
817806   m_artsr &= ~ART_TXRDY;
818807
819808   m_artdor = data;
820809}
821810
822/* art status register */
811// art status register
823812READ8_MEMBER(px4_state::px4_artsr_r)
824813{
825814   UINT8 result = 0;
r18779r18780
832821   return result | m_artsr;
833822}
834823
835/* art mode register */
824// art mode register
836825WRITE8_MEMBER(px4_state::px4_artmr_w)
837826{
838
839827   if (VERBOSE)
840828      logerror("%s: px4_artmr_w (0x%02x)\n", machine().describe_context(), data);
841829
842830   m_artmr = data;
843831}
844832
845/* io status register */
833// io status register
846834READ8_MEMBER(px4_state::px4_iostr_r)
847835{
848836   UINT8 result = 0;
r18779r18780
856844   result |= px4_sio_rxd(m_sio_device) << 3;
857845   result |= px4_rs232c_dcd(m_rs232c_device) << 4;
858846   result |= px4_rs232c_cts(m_rs232c_device) << 5;
859   result |= 1 << 6;   /* bit 6, csel, cartridge option select signal, set to 'other mode' */
860   result |= 0 << 7;   /* bit 7, caud - audio input from cartridge */
847   result |= 1 << 6;   // bit 6, csel, cartridge option select signal, set to 'other mode'
848   result |= 0 << 7;   // bit 7, caud - audio input from cartridge
861849
862850   return result;
863851}
864852
865/* art command register */
853// art command register
866854WRITE8_MEMBER(px4_state::px4_artcr_w)
867855{
868
869856   if (VERBOSE)
870857      logerror("%s: px4_artcr_w (0x%02x)\n", machine().describe_context(), data);
871858
872859   m_artcr = data;
873860
874   /* bit 0, txe - transmit enable */
861   // bit 0, txe - transmit enable
875862   if (!ART_TX_ENABLED)
876863   {
877      /* force high when disabled */
864      // force high when disabled
878865      px4_sio_txd(m_sio_device, ASSERT_LINE);
879866      px4_rs232c_txd(m_rs232c_device, ASSERT_LINE);
880867   }
881868
882   /* bit 3, sbrk - break output */
869   // bit 3, sbrk - break output
883870   if (ART_TX_ENABLED && BIT(data, 3))
884871   {
885      /* force low when enabled and transmit enabled */
872      // force low when enabled and transmit enabled
886873      px4_sio_txd(m_sio_device, CLEAR_LINE);
887874      px4_rs232c_txd(m_rs232c_device, CLEAR_LINE);
888875   }
889876
890   /* error reset */
877   // error reset
891878   if (BIT(data, 4))
892879      m_artsr &= ~(ART_PE | ART_OE | ART_FE);
893880
r18779r18780
895882   px4_rs232c_rts(m_rs232c_device, BIT(data, 5));
896883}
897884
898/* switch register */
885// switch register
899886WRITE8_MEMBER(px4_state::px4_swr_w)
900887{
901
902888   if (VERBOSE)
903889      logerror("%s: px4_swr_w (0x%02x)\n", machine().describe_context(), data);
904890
905891   m_swr = data;
906892}
907893
908/* io control register */
894// io control register
909895WRITE8_MEMBER(px4_state::px4_ioctlr_w)
910896{
911
912897   if (VERBOSE)
913898      logerror("%s: px4_ioctlr_w (0x%02x)\n", machine().describe_context(), data);
914899
r18779r18780
917902
918903   px4_sio_pout(m_sio_device, BIT(data, 2));
919904
920   /* bit 3, cartridge reset */
905   // bit 3, cartridge reset
921906
922   output_set_value("led_0", BIT(data, 4)); /* caps lock */
923   output_set_value("led_1", BIT(data, 5)); /* num lock */
924   output_set_value("led_2", BIT(data, 6)); /* "led 2" */
907   output_set_value("led_0", BIT(data, 4)); // caps lock
908   output_set_value("led_1", BIT(data, 5)); // num lock
909   output_set_value("led_2", BIT(data, 6)); // "led 2"
925910
926   /* bit 7, sp - speaker */
911   // bit 7, sp - speaker
927912}
928913
929914
930/***************************************************************************
931    7508 RELATED
932***************************************************************************/
915//**************************************************************************
916//  7508 RELATED
917//**************************************************************************
933918
934919TIMER_DEVICE_CALLBACK_MEMBER(px4_state::upd7508_1sec_callback)
935920{
936921
937   /* adjust interrupt status */
922   // adjust interrupt status
938923   m_interrupt_status |= UPD7508_INT_ONE_SECOND;
939924
940   /* are interrupts enabled? */
925   // are interrupts enabled?
941926   if (m_one_sec_int_enabled)
942927   {
943928      m_isr |= INT0_7508;
944      gapnit_interrupt(machine());
929      gapnit_interrupt();
945930   }
946931}
947932
r18779r18780
958943         down = (newvalue & (1 << i)) ? 0x10 : 0x00;
959944         scancode = (FPTR)param * 32 + i;
960945
961         /* control keys */
946         // control keys
962947         if ((scancode & 0xa0) == 0xa0)
963948            scancode |= down;
964949
r18779r18780
979964            logerror("upd7508: key interrupt\n");
980965
981966         m_isr |= INT0_7508;
982         gapnit_interrupt(machine());
967         gapnit_interrupt();
983968      }
984969   }
985970}
986971
987972
988/***************************************************************************
989    EXTERNAL RAM-DISK
990***************************************************************************/
973//**************************************************************************
974//  EXTERNAL RAM-DISK
975//**************************************************************************
991976
992977WRITE8_MEMBER(px4_state::px4_ramdisk_address_w)
993978{
994
995979   switch (offset)
996980   {
997   case 0x00: m_ramdisk_address = (m_ramdisk_address & 0xffff00) | data; break;
998   case 0x01: m_ramdisk_address = (m_ramdisk_address & 0xff00ff) | (data << 8); break;
981   case 0x00: m_ramdisk_address = (m_ramdisk_address & 0xffff00) | ((data & 0xff) <<  0); break;
982   case 0x01: m_ramdisk_address = (m_ramdisk_address & 0xff00ff) | ((data & 0xff) <<  8); break;
999983   case 0x02: m_ramdisk_address = (m_ramdisk_address & 0x00ffff) | ((data & 0x07) << 16); break;
1000984   }
1001985}
r18779r18780
1006990
1007991   if (m_ramdisk_address < 0x20000)
1008992   {
1009      /* read from ram */
993      // read from ram
1010994      ret = m_ramdisk[m_ramdisk_address];
1011995   }
1012996   else if (m_ramdisk_address < 0x40000)
1013997   {
1014      /* read from rom */
998      // read from rom
1015999      ret = memregion("ramdisk")->base()[m_ramdisk_address];
10161000   }
10171001
r18779r18780
10311015
10321016READ8_MEMBER(px4_state::px4_ramdisk_control_r)
10331017{
1034   /* bit 7 determines the presence of a ram-disk */
1018   // bit 7 determines the presence of a ram-disk
10351019   return 0x7f;
10361020}
10371021
1038/***************************************************************************
1039    VIDEO EMULATION
1040***************************************************************************/
1022//**************************************************************************
1023//  VIDEO EMULATION
1024//**************************************************************************
10411025
10421026UINT32 px4_state::screen_update_px4(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
10431027{
1044
1045   /* display enabled? */
1028   // display enabled?
10461029   if (BIT(m_yoff, 7))
10471030   {
10481031      int y, x;
10491032
1050      /* get vram start address */
1033      // get vram start address
10511034      UINT8 *vram = &m_ram->pointer()[(m_vadr & 0xf8) << 8];
10521035
10531036      for (y = 0; y < 64; y++)
10541037      {
1055         /* adjust against y-offset */
1038         // adjust against y-offset
10561039         UINT8 row = (y - (m_yoff & 0x3f)) & 0x3f;
10571040
10581041         for (x = 0; x < 240/8; x++)
r18779r18780
10691052            vram++;
10701053         }
10711054
1072         /* skip the last 2 unused bytes */
1055         // skip the last 2 unused bytes
10731056         vram += 2;
10741057      }
10751058   }
10761059   else
10771060   {
1078      /* display is disabled, draw an empty screen */
1061      // display is disabled, draw an empty screen
10791062      bitmap.fill(0, cliprect);
10801063   }
10811064
r18779r18780
10831066}
10841067
10851068
1086/***************************************************************************
1087    DRIVER INIT
1088***************************************************************************/
1069//**************************************************************************
1070//  DRIVER INIT
1071//**************************************************************************
10891072
10901073DRIVER_INIT_MEMBER(px4_state,px4)
10911074{
1075   // init 7508
1076   m_one_sec_int_enabled = true;
1077   m_key_int_enabled = true;
1078   m_alarm_int_enabled = true;
10921079
1093   /* find devices */
1094   m_ram = machine().device<ram_device>(RAM_TAG);
1080   // art
1081   m_receive_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::receive_data), this));
1082   m_transmit_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::transmit_data), this));
10951083
1096   /* init 7508 */
1097   m_one_sec_int_enabled = TRUE;
1098   m_key_int_enabled = TRUE;
1099   m_alarm_int_enabled = TRUE;
1100
1101   /* art */
1102   m_receive_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::receive_data),this));
1103   m_transmit_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::transmit_data),this));
1104
1105   /* printer */
1106   m_centronics = machine().device<centronics_device>("centronics");
1107
1108   /* external cassette or barcode reader */
1109   m_ext_cas_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::ext_cassette_read),this));
1110   m_ext_cas = machine().device<cassette_image_device>("extcas");
1084   // external cassette or barcode reader
1085   m_ext_cas_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::ext_cassette_read), this));
11111086   m_ear_last_state = 0;
11121087
1113   /* external devices */
1088   // external devices
11141089   m_sio_device = machine().device("floppy");
11151090   m_rs232c_device = NULL;
11161091
1117   /* map os rom and last half of memory */
1118   membank("bank1")->set_base(machine().root_device().memregion("os")->base());
1092   // map os rom and last half of memory
1093   membank("bank1")->set_base(memregion("os")->base());
11191094   membank("bank2")->set_base(m_ram->pointer() + 0x8000);
11201095}
11211096
1122DRIVER_INIT_MEMBER(px4_state,px4p)
1097DRIVER_INIT_MEMBER(px4_state, px4p)
11231098{
1124
11251099   DRIVER_INIT_CALL(px4);
11261100
1127   /* reserve memory for external ram-disk */
1101   // reserve memory for external ram-disk
11281102   m_ramdisk = auto_alloc_array(machine(), UINT8, 0x20000);
11291103}
11301104
r18779r18780
11331107   m_artsr = ART_TXRDY | ART_TXEMPTY;
11341108}
11351109
1136MACHINE_START_MEMBER(px4_state,px4_ramdisk)
1110MACHINE_START_MEMBER(px4_state, px4_ramdisk)
11371111{
11381112   machine().device<nvram_device>("nvram")->set_base(m_ramdisk, 0x20000);
11391113}
11401114
1141/***************************************************************************
1142    ADDRESS MAPS
1143***************************************************************************/
1115//**************************************************************************
1116//  ADDRESS MAPS
1117//**************************************************************************
11441118
11451119static ADDRESS_MAP_START( px4_mem, AS_PROGRAM, 8, px4_state )
11461120   AM_RANGE(0x0000, 0x7fff) AM_ROMBANK("bank1")
r18779r18780
11501124static ADDRESS_MAP_START( px4_io, AS_IO, 8, px4_state )
11511125   ADDRESS_MAP_UNMAP_HIGH
11521126   ADDRESS_MAP_GLOBAL_MASK(0xff)
1153   /* gapnit, 0x00-0x07 */
1127   // gapnit, 0x00-0x07
11541128   AM_RANGE(0x00, 0x00) AM_READWRITE(px4_icrlc_r, px4_ctrl1_w)
11551129   AM_RANGE(0x01, 0x01) AM_READWRITE(px4_icrhc_r, px4_cmdr_w)
11561130   AM_RANGE(0x02, 0x02) AM_READWRITE(px4_icrlb_r, px4_ctrl2_w)
r18779r18780
11591133   AM_RANGE(0x05, 0x05) AM_READWRITE(px4_str_r, px4_bankr_w)
11601134   AM_RANGE(0x06, 0x06) AM_READWRITE(px4_sior_r, px4_sior_w)
11611135   AM_RANGE(0x07, 0x07) AM_NOP
1162   /* gapndl, 0x08-0x0f */
1136   // gapndl, 0x08-0x0f
11631137   AM_RANGE(0x08, 0x08) AM_WRITE(px4_vadr_w)
11641138   AM_RANGE(0x09, 0x09) AM_WRITE(px4_yoff_w)
11651139   AM_RANGE(0x0a, 0x0a) AM_WRITE(px4_fr_w)
11661140   AM_RANGE(0x0b, 0x0b) AM_WRITE(px4_spur_w)
11671141   AM_RANGE(0x0c, 0x0f) AM_NOP
1168   /* gapnio, 0x10-0x1f */
1142   // gapnio, 0x10-0x1f
11691143   AM_RANGE(0x10, 0x13) AM_READWRITE(px4_ctgif_r, px4_ctgif_w)
11701144   AM_RANGE(0x14, 0x14) AM_READWRITE(px4_artdir_r, px4_artdor_w)
11711145   AM_RANGE(0x15, 0x15) AM_READWRITE(px4_artsr_r, px4_artmr_w)
r18779r18780
11841158ADDRESS_MAP_END
11851159
11861160
1187/***************************************************************************
1188    INPUT PORTS
1189***************************************************************************/
1161//**************************************************************************
1162//  INPUT PORTS
1163//**************************************************************************
11901164
11911165/* The PX-4 has an exchangeable keyboard. Available is a standard ASCII
11921166 * keyboard and an "item" keyboard, as well as regional variants for
11931167 * UK, France, Germany, Denmark, Sweden, Norway, Italy and Spain.
11941168 */
11951169
1196/* configuration dip switch found on the rom capsule board */
1170// configuration dip switch found on the rom capsule board
11971171static INPUT_PORTS_START( px4_dips )
11981172   PORT_START("dips")
11991173
r18779r18780
12171191   PORT_DIPSETTING(0x20, "RS-232C")
12181192   PORT_DIPSETTING(0x30, "Centronics printer")
12191193
1220   /* available for user applications */
1194   // available for user applications
12211195   PORT_DIPNAME(0x40, 0x40, "Not used")
12221196   PORT_DIPLOCATION("DIP:2")
12231197   PORT_DIPSETTING(0x40, "Enable")
12241198   PORT_DIPSETTING(0x00, "Disable")
12251199
1226   /* this is automatically selected by the os, the switch has no effect */
1200   // this is automatically selected by the os, the switch has no effect
12271201   PORT_DIPNAME(0x80, 0x00, "Keyboard type")
12281202   PORT_DIPLOCATION("DIP:1")
12291203   PORT_DIPSETTING(0x80, "Item keyboard")
12301204   PORT_DIPSETTING(0x00, "Standard keyboard")
12311205INPUT_PORTS_END
12321206
1233/* US ASCII keyboard */
1207// US ASCII keyboard
12341208static INPUT_PORTS_START( px4_h450a )
12351209   PORT_INCLUDE(px4_dips)
12361210   PORT_INCLUDE(tf20)
12371211
12381212   PORT_START("keyboard_0")
1239   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(ESC))   // 00
1240   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(PAUSE))   // 01
1241   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F6))    PORT_NAME("Help")   // 02
1242   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F1))    PORT_NAME("PF1")   // 03
1243   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F2))    PORT_NAME("PF2")   // 04
1244   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F3))    PORT_NAME("PF3")   // 05
1245   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F4))    PORT_NAME("PF4")   // 06
1246   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F5))    PORT_NAME("PF5")   // 07
1247   PORT_BIT(0x0000ff00, IP_ACTIVE_HIGH, IPT_UNUSED)   // 08-0f
1248   PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_ESC)   PORT_CHAR(UCHAR_MAMEKEY(CANCEL)) PORT_NAME("Stop")   // 10
1249   PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_1)   PORT_CHAR('1') PORT_CHAR('!')   // 11
1250   PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_2)   PORT_CHAR('2') PORT_CHAR('"')   // 12
1251   PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_3)   PORT_CHAR('3') PORT_CHAR('#')   // 13
1252   PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_4)   PORT_CHAR('4') PORT_CHAR('$')   // 14
1253   PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_5)   PORT_CHAR('5') PORT_CHAR('%')   // 15
1254   PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_6)   PORT_CHAR('6') PORT_CHAR('&')   // 16
1255   PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_7)   PORT_CHAR('7') PORT_CHAR('\'')   // 17
1256   PORT_BIT(0xff000000, IP_ACTIVE_HIGH, IPT_UNUSED)   // 18-1f
1213   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(ESC)) // 00
1214   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(PAUSE))   // 01
1215   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F6))    PORT_NAME("Help") // 02
1216   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F1))    PORT_NAME("PF1")  // 03
1217   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F2))    PORT_NAME("PF2")  // 04
1218   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F3))    PORT_NAME("PF3")  // 05
1219   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F4))    PORT_NAME("PF4")  // 06
1220   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F5))    PORT_NAME("PF5")  // 07
1221   PORT_BIT(0x0000ff00, IP_ACTIVE_HIGH, IPT_UNUSED)    // 08-0f
1222   PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_ESC)  PORT_CHAR(UCHAR_MAMEKEY(CANCEL)) PORT_NAME("Stop")  // 10
1223   PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_1)   PORT_CHAR('1') PORT_CHAR('!')    // 11
1224   PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_2)   PORT_CHAR('2') PORT_CHAR('"')    // 12
1225   PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_3)   PORT_CHAR('3') PORT_CHAR('#')    // 13
1226   PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_4)   PORT_CHAR('4') PORT_CHAR('$')    // 14
1227   PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_5)   PORT_CHAR('5') PORT_CHAR('%')    // 15
1228   PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_6)   PORT_CHAR('6') PORT_CHAR('&')    // 16
1229   PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)0) PORT_CODE(KEYCODE_7)   PORT_CHAR('7') PORT_CHAR('\'')   // 17
1230   PORT_BIT(0xff000000, IP_ACTIVE_HIGH, IPT_UNUSED)    // 18-1f
12571231
12581232   PORT_START("keyboard_1")
1259   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')   // 20
1260   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')   // 21
1261   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')   // 22
1262   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')   // 23
1263   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')   // 24
1264   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')   // 25
1265   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')   // 26
1266   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')   // 27
1267   PORT_BIT(0x0000ff00, IP_ACTIVE_HIGH, IPT_UNUSED)   // 28-2f
1268   PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_D)     PORT_CHAR('d') PORT_CHAR('D')   // 30
1269   PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_F)     PORT_CHAR('f') PORT_CHAR('F')   // 31
1270   PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_G)     PORT_CHAR('g') PORT_CHAR('G')   // 32
1271   PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_H)     PORT_CHAR('h') PORT_CHAR('H')   // 33
1272   PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_J)     PORT_CHAR('j') PORT_CHAR('J')   // 34
1273   PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_K)     PORT_CHAR('k') PORT_CHAR('K')   // 35
1274   PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_L)     PORT_CHAR('l') PORT_CHAR('L')   // 36
1275   PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+')   // 37
1276   PORT_BIT(0xff000000, IP_ACTIVE_HIGH, IPT_UNUSED)   // 38-3f
1233   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')  // 20
1234   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')  // 21
1235   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')  // 22
1236   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')  // 23
1237   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')  // 24
1238   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')  // 25
1239   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')  // 26
1240   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')  // 27
1241   PORT_BIT(0x0000ff00, IP_ACTIVE_HIGH, IPT_UNUSED)    // 28-2f
1242   PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_D)     PORT_CHAR('d') PORT_CHAR('D')  // 30
1243   PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_F)     PORT_CHAR('f') PORT_CHAR('F')  // 31
1244   PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_G)     PORT_CHAR('g') PORT_CHAR('G')  // 32
1245   PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_H)     PORT_CHAR('h') PORT_CHAR('H')  // 33
1246   PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_J)     PORT_CHAR('j') PORT_CHAR('J')  // 34
1247   PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_K)     PORT_CHAR('k') PORT_CHAR('K')  // 35
1248   PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_L)     PORT_CHAR('l') PORT_CHAR('L')  // 36
1249   PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)1) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+')  // 37
1250   PORT_BIT(0xff000000, IP_ACTIVE_HIGH, IPT_UNUSED)    // 38-3f
12771251
12781252   PORT_START("keyboard_2")
1279   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_B)     PORT_CHAR('b') PORT_CHAR('B')   // 40
1280   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_N)     PORT_CHAR('n') PORT_CHAR('N')   // 41
1281   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_M)     PORT_CHAR('m') PORT_CHAR('M')   // 42
1282   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')   // 43
1283   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_STOP)  PORT_CHAR('.') PORT_CHAR('>')   // 44
1284   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')   // 45
1285   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_F9)    PORT_CHAR('[') PORT_CHAR('{')   // 46
1286   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_F10)   PORT_CHAR(']') PORT_CHAR('}')   // 47
1287   PORT_BIT(0x0000ff00, IP_ACTIVE_HIGH, IPT_UNUSED)   // 48-4f
1288   PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_8)         PORT_CHAR('8') PORT_CHAR('(')   // 50
1289   PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_9)         PORT_CHAR('9') PORT_CHAR(')')   // 51
1290   PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_0)         PORT_CHAR('0') PORT_CHAR('_')   // 52
1291   PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_MINUS)     PORT_CHAR('-') PORT_CHAR('=')   // 53
1292   PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_EQUALS)    PORT_CHAR('^') PORT_CHAR('~')   // 54
1293   PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_UP)        PORT_CHAR(UCHAR_MAMEKEY(UP))   // 55
1294   PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)   PORT_CHAR(UCHAR_MAMEKEY(HOME))   // 56
1295   PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_TAB)       PORT_CHAR('\t')   // 57
1296   PORT_BIT(0xff000000, IP_ACTIVE_HIGH, IPT_UNUSED)   // 58-5f
1253   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_B)     PORT_CHAR('b') PORT_CHAR('B')  // 40
1254   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_N)     PORT_CHAR('n') PORT_CHAR('N')  // 41
1255   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_M)     PORT_CHAR('m') PORT_CHAR('M')  // 42
1256   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')  // 43
1257   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_STOP)  PORT_CHAR('.') PORT_CHAR('>')  // 44
1258   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')  // 45
1259   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_F9)    PORT_CHAR('[') PORT_CHAR('{')  // 46
1260   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_F10)   PORT_CHAR(']') PORT_CHAR('}')  // 47
1261   PORT_BIT(0x0000ff00, IP_ACTIVE_HIGH, IPT_UNUSED)    // 48-4f
1262   PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_8)         PORT_CHAR('8') PORT_CHAR('(')  // 50
1263   PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_9)         PORT_CHAR('9') PORT_CHAR(')')  // 51
1264   PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_0)         PORT_CHAR('0') PORT_CHAR('_')  // 52
1265   PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_MINUS)     PORT_CHAR('-') PORT_CHAR('=')  // 53
1266   PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_EQUALS)    PORT_CHAR('^') PORT_CHAR('~')  // 54
1267   PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_UP)        PORT_CHAR(UCHAR_MAMEKEY(UP))   // 55
1268   PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)   PORT_CHAR(UCHAR_MAMEKEY(HOME))  // 56
1269   PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)2) PORT_CODE(KEYCODE_TAB)       PORT_CHAR('\t')    // 57
1270   PORT_BIT(0xff000000, IP_ACTIVE_HIGH, IPT_UNUSED)    // 58-5f
12971271
12981272   PORT_START("keyboard_3")
1299   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_O)         PORT_CHAR('o') PORT_CHAR('O')   // 60
1300   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_P)         PORT_CHAR('p') PORT_CHAR('P')   // 61
1301   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_CHAR(96)   // 62
1302   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_LEFT)      PORT_CHAR(UCHAR_MAMEKEY(LEFT))   // 63
1303   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_DOWN)      PORT_CHAR(UCHAR_MAMEKEY(DOWN))   // 64
1304   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_RIGHT)     PORT_CHAR(UCHAR_MAMEKEY(RIGHT))   // 65
1305   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_A)         PORT_CHAR('a') PORT_CHAR('A')   // 66
1306   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_S)         PORT_CHAR('s') PORT_CHAR('S')   // 67
1307   PORT_BIT(0x0000ff00, IP_ACTIVE_HIGH, IPT_UNUSED)   // 48-4f
1308   PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_QUOTE)     PORT_CHAR(':') PORT_CHAR('*')   // 70
1309   PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_ENTER)     PORT_CHAR(13)   // 71
1310   PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')   // 72
1311   PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_SPACE)     PORT_CHAR(' ')   // 73
1312   PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_Z)         PORT_CHAR('z') PORT_CHAR('Z')   // 74
1313   PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_X)         PORT_CHAR('x') PORT_CHAR('X')   // 75
1314   PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_C)         PORT_CHAR('c') PORT_CHAR('C')   // 76
1315   PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_V)         PORT_CHAR('v') PORT_CHAR('V')   // 77
1316   PORT_BIT(0xff000000, IP_ACTIVE_HIGH, IPT_UNUSED)   // 58-5f
1273   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_O)         PORT_CHAR('o') PORT_CHAR('O')  // 60
1274   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_P)         PORT_CHAR('p') PORT_CHAR('P')  // 61
1275   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_CHAR(96)   // 62
1276   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_LEFT)      PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // 63
1277   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_DOWN)      PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // 64
1278   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_RIGHT)     PORT_CHAR(UCHAR_MAMEKEY(RIGHT))    // 65
1279   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_A)         PORT_CHAR('a') PORT_CHAR('A')  // 66
1280   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_S)         PORT_CHAR('s') PORT_CHAR('S')  // 67
1281   PORT_BIT(0x0000ff00, IP_ACTIVE_HIGH, IPT_UNUSED)    // 48-4f
1282   PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_QUOTE)     PORT_CHAR(':')  PORT_CHAR('*') // 70
1283   PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_ENTER)     PORT_CHAR(13)  // 71
1284   PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') // 72
1285   PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_SPACE)     PORT_CHAR(' ') // 73
1286   PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_Z)         PORT_CHAR('z') PORT_CHAR('Z')  // 74
1287   PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_X)         PORT_CHAR('x') PORT_CHAR('X')  // 75
1288   PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_C)         PORT_CHAR('c') PORT_CHAR('C')  // 76
1289   PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)3) PORT_CODE(KEYCODE_V)         PORT_CHAR('v') PORT_CHAR('V')  // 77
1290   PORT_BIT(0xff000000, IP_ACTIVE_HIGH, IPT_UNUSED)    // 58-5f
13171291
13181292   PORT_START("keyboard_4")
1319   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)4) PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT)) PORT_CHAR(UCHAR_MAMEKEY(PRTSCR))   // 80
1320   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)4) PORT_CODE(KEYCODE_DEL)      PORT_CHAR(UCHAR_MAMEKEY(DEL))    PORT_CHAR(12)   // 81
1321   PORT_BIT(0xfffffffc, IP_ACTIVE_HIGH, IPT_UNUSED)   // 82-9f
1293   PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)4) PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT)) PORT_CHAR(UCHAR_MAMEKEY(PRTSCR)) // 80
1294   PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)4) PORT_CODE(KEYCODE_DEL)    PORT_CHAR(UCHAR_MAMEKEY(DEL))    PORT_CHAR(12)   // 81
1295   PORT_BIT(0xfffffffc, IP_ACTIVE_HIGH, IPT_UNUSED)    // 82-9f
13221296
13231297   PORT_START("keyboard_5")
1324   PORT_BIT(0x00000003, IP_ACTIVE_HIGH, IPT_UNUSED)   // a0-a1
1325   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2)   // a2
1326   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_LSHIFT)   PORT_CHAR(UCHAR_SHIFT_1)   // a3
1327   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_LALT)     PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))   // a4
1328   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_RALT)     PORT_NAME("Graph")   // a5
1329   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_RSHIFT)   PORT_CHAR(UCHAR_SHIFT_1)   // a6
1330   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_NUMLOCK)  PORT_CHAR(UCHAR_MAMEKEY(NUMLOCK))   // a7
1331   PORT_BIT(0xffffff00, IP_ACTIVE_HIGH, IPT_UNUSED)   // a8-bf /* b2-b7 are the 'make' codes for the above keys */
1298   PORT_BIT(0x00000003, IP_ACTIVE_HIGH, IPT_UNUSED)    // a0-a1
1299   PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2)    // a2
1300   PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_LSHIFT)   PORT_CHAR(UCHAR_SHIFT_1)    // a3
1301   PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_LALT)     PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))  // a4
1302   PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_RALT)     PORT_NAME("Graph")  // a5
1303   PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_RSHIFT)   PORT_CHAR(UCHAR_SHIFT_1)    // a6
1304   PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, px4_state, key_callback, (void *)5) PORT_CODE(KEYCODE_NUMLOCK)  PORT_CHAR(UCHAR_MAMEKEY(NUMLOCK))   // a7
1305   PORT_BIT(0xffffff00, IP_ACTIVE_HIGH, IPT_UNUSED)    // a8-bf /* b2-b7 are the 'make' codes for the above keys */
13321306INPUT_PORTS_END
13331307
1308#if 0
1309
13341310/* item keyboard */
1335/*static INPUT_PORTS_START( px4_h421a )
1336    PORT_INCLUDE(px4_dips)
1337    PORT_INCLUDE(tf20)
1311static INPUT_PORTS_START( px4_h421a )
1312   PORT_INCLUDE(px4_dips)
1313   PORT_INCLUDE(tf20)
13381314INPUT_PORTS_END
1339*/
13401315
1341/***************************************************************************
1342    PALETTE
1343***************************************************************************/
1316#endif
13441317
1318//**************************************************************************
1319//  PALETTE
1320//**************************************************************************
1321
13451322void px4_state::palette_init()
13461323{
13471324   palette_set_color(machine(), 0, MAKE_RGB(138, 146, 148));
13481325   palette_set_color(machine(), 1, MAKE_RGB(92, 83, 88));
13491326}
13501327
1351PALETTE_INIT_MEMBER(px4_state,px4p)
1328PALETTE_INIT_MEMBER(px4_state, px4p)
13521329{
13531330   palette_set_color(machine(), 0, MAKE_RGB(149, 157, 130));
13541331   palette_set_color(machine(), 1, MAKE_RGB(92, 83, 88));
13551332}
13561333
13571334
1358/***************************************************************************
1359    MACHINE DRIVERS
1360***************************************************************************/
1335//**************************************************************************
1336//  MACHINE DRIVERS
1337//**************************************************************************
13611338
13621339static const cassette_interface px4_cassette_interface =
13631340{
r18779r18780
13691346};
13701347
13711348static MACHINE_CONFIG_START( px4, px4_state )
1372
1373   /* basic machine hardware */
1374   MCFG_CPU_ADD("maincpu", Z80, XTAL_7_3728MHz / 2)   /* uPD70008 */
1349   // basic machine hardware
1350   MCFG_CPU_ADD("maincpu", Z80, XTAL_7_3728MHz / 2)    // uPD70008
13751351   MCFG_CPU_PROGRAM_MAP(px4_mem)
13761352   MCFG_CPU_IO_MAP(px4_io)
13771353
1378
1379   /* video hardware */
1354   // video hardware
13801355   MCFG_SCREEN_ADD("screen", LCD)
13811356   MCFG_SCREEN_REFRESH_RATE(72)
13821357   MCFG_SCREEN_SIZE(240, 64)
r18779r18780
13901365   MCFG_TIMER_DRIVER_ADD_PERIODIC("one_sec", px4_state, upd7508_1sec_callback, attotime::from_seconds(1))
13911366   MCFG_TIMER_DRIVER_ADD_PERIODIC("frc", px4_state, frc_tick, attotime::from_hz(XTAL_7_3728MHz / 2 / 6))
13921367
1393   /* internal ram */
1368   // internal ram
13941369   MCFG_RAM_ADD(RAM_TAG)
13951370   MCFG_RAM_DEFAULT_SIZE("64k")
13961371
1397   /* centronics printer */
1372   // centronics printer
13981373   MCFG_CENTRONICS_PRINTER_ADD("centronics", standard_centronics)
13991374
1400   /* external cassette */
1375   // external cassette
14011376   MCFG_CASSETTE_ADD("extcas", px4_cassette_interface)
14021377
1403   /* rom capsules */
1378   // rom capsules
14041379   MCFG_CARTSLOT_ADD("capsule1")
14051380   MCFG_CARTSLOT_NOT_MANDATORY
14061381   MCFG_CARTSLOT_ADD("capsule2")
14071382   MCFG_CARTSLOT_NOT_MANDATORY
14081383
1409   /* tf20 floppy drive */
1410  MCFG_TF20_ADD("floppy")
1384   // tf20 floppy drive
1385   MCFG_TF20_ADD("floppy")
14111386MACHINE_CONFIG_END
14121387
14131388static MACHINE_CONFIG_DERIVED( px4p, px4 )
1414
14151389   MCFG_CPU_MODIFY("maincpu")
14161390   MCFG_CPU_IO_MAP(px4p_io)
14171391
1418   MCFG_MACHINE_START_OVERRIDE(px4_state,px4_ramdisk)
1392   MCFG_MACHINE_START_OVERRIDE(px4_state, px4_ramdisk)
14191393   MCFG_NVRAM_ADD_0FILL("nvram")
14201394
1421   MCFG_PALETTE_INIT_OVERRIDE(px4_state,px4p)
1395   MCFG_PALETTE_INIT_OVERRIDE(px4_state, px4p)
14221396
14231397   MCFG_CARTSLOT_ADD("ramdisk")
14241398   MCFG_CARTSLOT_NOT_MANDATORY
14251399MACHINE_CONFIG_END
14261400
14271401
1428/***************************************************************************
1429    ROM DEFINITIONS
1430***************************************************************************/
1402//**************************************************************************
1403//  ROM DEFINITIONS
1404//**************************************************************************
14311405
1432/* Note: We are missing "Kana OS V1.0" and "Kana OS V2.0" (Japanese version) */
1406// Note: We are missing "Kana OS V1.0" and "Kana OS V2.0" (Japanese version)
14331407
14341408ROM_START( px4 )
1435    ROM_REGION(0x8000, "os", 0)
1436    ROM_LOAD("m25122aa_po_px4.10c", 0x0000, 0x8000, CRC(62d60dc6) SHA1(3d32ec79a317de7c84c378302e95f48d56505502))
1409   ROM_REGION(0x8000, "os", 0)
1410   ROM_LOAD("m25122aa_po_px4.10c", 0x0000, 0x8000, CRC(62d60dc6) SHA1(3d32ec79a317de7c84c378302e95f48d56505502))
14371411
1438    ROM_REGION(0x1000, "slave", 0)
1439    ROM_LOAD("upd7508.bin", 0x0000, 0x1000, NO_DUMP)
1412   ROM_REGION(0x1000, "slave", 0)
1413   ROM_LOAD("upd7508.bin", 0x0000, 0x1000, NO_DUMP)
14401414
14411415   ROM_REGION(0x8000, "capsule1", 0)
14421416   ROM_CART_LOAD("capsule1", 0x0000, 0x8000, ROM_OPTIONAL)
r18779r18780
14461420ROM_END
14471421
14481422ROM_START( px4p )
1449    ROM_REGION(0x8000, "os", 0)
1450    ROM_LOAD("b0_pxa.10c", 0x0000, 0x8000, CRC(d74b9ef5) SHA1(baceee076c12f5a16f7a26000e9bc395d021c455))
1423   ROM_REGION(0x8000, "os", 0)
1424   ROM_LOAD("b0_pxa.10c", 0x0000, 0x8000, CRC(d74b9ef5) SHA1(baceee076c12f5a16f7a26000e9bc395d021c455))
14511425
1452    ROM_REGION(0x1000, "slave", 0)
1453    ROM_LOAD("upd7508.bin", 0x0000, 0x1000, NO_DUMP)
1426   ROM_REGION(0x1000, "slave", 0)
1427   ROM_LOAD("upd7508.bin", 0x0000, 0x1000, NO_DUMP)
14541428
1455    ROM_REGION(0x8000, "capsule1", 0)
1456    ROM_CART_LOAD("capsule1", 0x0000, 0x8000, ROM_OPTIONAL)
1429   ROM_REGION(0x8000, "capsule1", 0)
1430   ROM_CART_LOAD("capsule1", 0x0000, 0x8000, ROM_OPTIONAL)
14571431
1458    ROM_REGION(0x8000, "capsule2", 0)
1459    ROM_CART_LOAD("capsule2", 0x0000, 0x8000, ROM_OPTIONAL)
1432   ROM_REGION(0x8000, "capsule2", 0)
1433   ROM_CART_LOAD("capsule2", 0x0000, 0x8000, ROM_OPTIONAL)
14601434
1461    ROM_REGION(0x20000, "ramdisk", 0)
1462    ROM_CART_LOAD("ramdisk", 0x0000, 0x20000, ROM_OPTIONAL | ROM_MIRROR)
1435   ROM_REGION(0x20000, "ramdisk", 0)
1436   ROM_CART_LOAD("ramdisk", 0x0000, 0x20000, ROM_OPTIONAL | ROM_MIRROR)
14631437ROM_END
14641438
14651439
1466/***************************************************************************
1467    GAME DRIVERS
1468***************************************************************************/
1440//**************************************************************************
1441//  GAME DRIVERS
1442//**************************************************************************
14691443
1470/*    YEAR  NAME  PARENT  COMPAT  MACHINE  INPUT      INIT  COMPANY  FULLNAME  FLAGS */
1471COMP( 1985, px4,  0,      0,      px4,     px4_h450a, px4_state, px4,  "Epson", "PX-4",   GAME_NO_SOUND )
1472COMP( 1985, px4p, px4,    0,      px4p,    px4_h450a, px4_state, px4p, "Epson", "PX-4+",  GAME_NO_SOUND )
1444//    YEAR  NAME  PARENT  COMPAT  MACHINE  INPUT      CLASS      INIT  COMPANY  FULLNAME  FLAGS
1445COMP( 1985, px4,  0,      0,      px4,     px4_h450a, px4_state, px4,  "Epson", "PX-4",   GAME_NO_SOUND_HW )
1446COMP( 1985, px4p, px4,    0,      px4p,    px4_h450a, px4_state, px4p, "Epson", "PX-4+",  GAME_NO_SOUND_HW )

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