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r18700 Thursday 25th October, 2012 at 13:00:56 UTC by smf
removed some legacy code (nw)
[src/emu/cpu/psx]psx.c psx.h
[src/emu/video]psx.h
[src/mame/drivers]zn.c
[src/mame/includes]psx.h
[src/mame/machine]psx.c

trunk/src/mame/machine/psx.c
r18699r18700
6767{
6868   psxcpu_device::sio_input( *machine.device("maincpu^"), "maincpu", n_port, n_mask, n_data );
6969}
70
71/* GPU */
72
73READ32_HANDLER( psx_gpu_r )
74{
75   psxgpu_device *gpu = downcast<psxgpu_device *>( space.machine().device("gpu") );
76   return gpu->read( space, offset, mem_mask );
77}
78
79WRITE32_HANDLER( psx_gpu_w )
80{
81   psxgpu_device *gpu = downcast<psxgpu_device *>( space.machine().device("gpu") );
82   gpu->write( space, offset, data, mem_mask );
83}
84
85void psx_lightgun_set( running_machine &machine, int n_x, int n_y )
86{
87   psxgpu_device *gpu = downcast<psxgpu_device *>( machine.device("gpu") );
88   gpu->lightgun_set( n_x, n_y );
89}
90
trunk/src/mame/includes/psx.h
r18699r18700
3131extern void psx_sio_install_handler( running_machine &, int, psx_sio_handler );
3232extern void psx_sio_input( running_machine &, int, int, int );
3333
34DECLARE_READ32_HANDLER( psx_gpu_r );
35DECLARE_WRITE32_HANDLER( psx_gpu_w );
36extern void psx_lightgun_set( running_machine &, int, int );
37
3834// emu/video/psx.c
3935PALETTE_INIT( psx );
4036SCREEN_UPDATE_IND16( psx );
trunk/src/mame/drivers/zn.c
r18699r18700
3232class zn_state : public psx_state
3333{
3434public:
35   zn_state(const machine_config &mconfig, device_type type, const char *tag)
36      : psx_state(mconfig, type, tag) { }
35   zn_state(const machine_config &mconfig, device_type type, const char *tag) :
36      psx_state(mconfig, type, tag),
37      m_gpu(*this, "gpu")
38   {
39   }
3740
41   required_device<psxgpu_device> m_gpu;
3842   UINT32 m_n_znsecsel;
3943   UINT32 m_b_znsecport;
4044   int m_n_dip_bit;
r18699r18700
21342138      if( x > 0x393 && x < 0xcb2 &&
21352139         y > 0x02d && y < 0x217 )
21362140      {
2137         psx_lightgun_set( state->machine(), x, y );
2141         state->m_gpu->lightgun_set( x, y );
21382142      }
21392143   }
21402144}
trunk/src/emu/cpu/psx/psx.c
r18699r18700
15391539   AM_RANGE(0x1f801080, 0x1f8010ff) AM_DEVREADWRITE( "dma", psxdma_device, read, write )
15401540   AM_RANGE(0x1f801100, 0x1f80112f) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write )
15411541   /* 1f801800-1f801803 cd */
1542   AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE_LEGACY( psx_gpu_r, psx_gpu_w )
1542   AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
15431543   AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
15441544   AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
15451545   AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
r18699r18700
15651565   AM_RANGE(0x1f801070, 0x1f801077) AM_DEVREADWRITE( "irq", psxirq_device, read, write )
15661566   AM_RANGE(0x1f801080, 0x1f8010ff) AM_DEVREADWRITE( "dma", psxdma_device, read, write )
15671567   AM_RANGE(0x1f801100, 0x1f80112f) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write )
1568   AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE_LEGACY( psx_gpu_r, psx_gpu_w )
1568   AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
15691569   AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
15701570   AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
15711571   AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
r18699r18700
15861586//  psxcpu_device - constructor
15871587//-------------------------------------------------
15881588
1589psxcpu_device::psxcpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map)
1590   : cpu_device(mconfig, type, name, tag, owner, clock),
1591     m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, internal_map)
1589psxcpu_device::psxcpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map) :
1590   cpu_device(mconfig, type, name, tag, owner, clock),
1591   m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, internal_map),
1592   m_gpu_read_handler(*this),
1593   m_gpu_write_handler(*this)
15921594{
15931595}
15941596
r18699r18700
17721774
17731775   // set our instruction counter
17741776   m_icountptr = &m_icount;
1777
1778   m_gpu_read_handler.resolve_safe(0);
1779   m_gpu_write_handler.resolve_safe();
17751780}
17761781
17771782
r18699r18700
31783183   sio->input( n_port, n_mask, n_data );
31793184}
31803185
3186READ32_HANDLER( psxcpu_device::gpu_r )
3187{
3188   return m_gpu_read_handler( space, offset, mem_mask );
3189}
3190
3191WRITE32_HANDLER( psxcpu_device::gpu_w )
3192{
3193   m_gpu_write_handler( space, offset, data, mem_mask );
3194}
3195
31813196static MACHINE_CONFIG_FRAGMENT( psx )
31823197   MCFG_DEVICE_ADD("irq", PSX_IRQ, 0)
31833198   MCFG_DEVICE_ADD("dma", PSX_DMA, 0)
trunk/src/emu/cpu/psx/psx.h
r18699r18700
110110#define MCFG_PSX_DMA_CHANNEL_WRITE( cputag, channel, handler ) \
111111   psxcpu_device::getcpu( *owner, cputag )->subdevice<psxdma_device>("dma")->install_write_handler( channel, handler );
112112
113#define MCFG_PSX_GPU_READ_HANDLER(_devcb) \
114   devcb = &psxcpu_device::set_gpu_read_handler(*device, DEVCB2_##_devcb); \
113115
116#define MCFG_PSX_GPU_WRITE_HANDLER(_devcb) \
117   devcb = &psxcpu_device::set_gpu_write_handler(*device, DEVCB2_##_devcb); \
114118
119
115120//**************************************************************************
116121//  TYPE DEFINITIONS
117122//**************************************************************************
r18699r18700
124129   // construction/destruction
125130   psxcpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
126131
132   // static configuration helpers
133   template<class _Object> static devcb2_base &set_gpu_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_read_handler.set_callback(object); }
134   template<class _Object> static devcb2_base &set_gpu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_write_handler.set_callback(object); }
135
127136   // public interfaces
128137   DECLARE_WRITE32_MEMBER( biu_w );
129138   DECLARE_READ32_MEMBER( biu_r );
130139   DECLARE_WRITE32_MEMBER( berr_w );
131140   DECLARE_READ32_MEMBER( berr_r );
132141
142   DECLARE_WRITE32_MEMBER( gpu_w );
143   DECLARE_READ32_MEMBER( gpu_r );
144
133145   static psxcpu_device *getcpu( device_t &device, const char *cputag );
134146   static void install_sio_handler( device_t &device, const char *cputag, int n_port, psx_sio_handler p_f_sio_handler );
135147   static void sio_input( device_t &device, const char *cputag, int n_port, int n_mask, int n_data );
r18699r18700
267279   void setcp3cr( int reg, UINT32 value );
268280
269281   gte m_gte;
282
283   devcb2_read32 m_gpu_read_handler;
284   devcb2_write32 m_gpu_write_handler;
270285};
271286
272287class cxd8530aq_device : public psxcpu_device
trunk/src/emu/video/psx.h
r18699r18700
1313#include "emu.h"
1414
1515#define MCFG_PSXGPU_ADD( cputag, tag, type, _vramSize, clock ) \
16   MCFG_DEVICE_MODIFY( cputag ) \
17   MCFG_PSX_GPU_READ_HANDLER(DEVREAD32(tag, psxgpu_device, read)) \
18   MCFG_PSX_GPU_WRITE_HANDLER(DEVWRITE32(tag, psxgpu_device, write)) \
1619   MCFG_DEVICE_ADD( tag, type, clock ) \
1720   ((psxgpu_device *) device)->vramSize = _vramSize; \
1821   MCFG_PSX_DMA_CHANNEL_READ( cputag, 2, psx_dma_write_delegate( FUNC( psxgpu_device::dma_read ), (psxgpu_device *) device ) ) \
1922   MCFG_PSX_DMA_CHANNEL_WRITE( cputag, 2, psx_dma_read_delegate( FUNC( psxgpu_device::dma_write ), (psxgpu_device *) device ) )
2023
2124#define MCFG_PSXGPU_REPLACE( cputag, tag, type, _vramSize, clock ) \
25   MCFG_DEVICE_MODIFY( cputag ) \
26   MCFG_PSX_GPU_READ_HANDLER(DEVREAD32(tag, psxgpu_device, read)) \
27   MCFG_PSX_GPU_WRITE_HANDLER(DEVWRITE32(tag, psxgpu_device, write)) \
2228   MCFG_DEVICE_REPLACE( tag, type, clock ) \
2329   ((psxgpu_device *) device)->vramSize = _vramSize; \
2430   MCFG_PSX_DMA_CHANNEL_READ( cputag, 2, psx_dma_write_delegate( FUNC( psxgpu_device::dma_read ), (psxgpu_device *) device ) ) \

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