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r18692 Wednesday 24th October, 2012 at 18:38:00 UTC by hap
some indentation cleanup, like how it's in (most)other mame code

[src/mame/drivers]

namcos23.c

trunk/src/mame/drivers/namcos23.c

r18691	r18692
1521	1521	{
1522	1522	c417_t &c417 = m_c417;
1523	1523
1524		switch(offset) {
	1524	switch (offset)
	1525	{
1525	1526	/* According to timecrs2c, +0 is the status word with bits being:
1526	1527	15: test mode flag (huh?)
1527	1528	10: fifo data ready
r18691	r18692
1536	1537	1:  1st c435 busy (inverted)
1537	1538	0:  xcpreq
1538	1539	*/
1539		case 0: return 0x8e | (machine().primary_screen->vblank() ? 0x0000 : 0x8000);
1540		case 1: return c417.adr;
1541		case 4:
1542		//      logerror("c417_r %04x = %04x (%08x, %08x)\n", c417.adr, c417.ram[c417.adr], space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1543		return c417.ram[c417.adr];
1544		case 5:
1545		if(c417.pointrom_adr >= m_ptrom_limit)
1546		return 0xffff;
1547		return m_ptrom[c417.pointrom_adr] >> 16;
1548		case 6:
1549		if(c417.pointrom_adr >= m_ptrom_limit)
1550		return 0xffff;
1551		return m_ptrom[c417.pointrom_adr];
1552
	1540	case 0:
	1541	return 0x8e | (machine().primary_screen->vblank() ? 0x0000 : 0x8000);
	1542	case 1:
	1543	return c417.adr;
	1544	case 4:
	1545	//logerror("c417_r %04x = %04x (%08x, %08x)\n", c417.adr, c417.ram[c417.adr], space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	1546	return c417.ram[c417.adr];
	1547	case 5:
	1548	if(c417.pointrom_adr >= m_ptrom_limit)
	1549	return 0xffff;
	1550	return m_ptrom[c417.pointrom_adr] >> 16;
	1551	case 6:
	1552	if(c417.pointrom_adr >= m_ptrom_limit)
	1553	return 0xffff;
	1554	return m_ptrom[c417.pointrom_adr];
1553	1555	}
1554	1556
1555	1557	logerror("c417_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
r18691	r18692
1560	1562	{
1561	1563	c417_t &c417 = m_c417;
1562	1564
1563		switch(offset) {
1564		case 0:
1565		logerror("p3d PIO %04x\n", data);
1566		break;
1567		case 1:
1568		COMBINE_DATA(&c417.adr);
1569		break;
1570		case 2:
1571		c417.pointrom_adr = (c417.pointrom_adr << 16) | data;
1572		break;
1573		case 3:
1574		c417.pointrom_adr = 0;
1575		break;
1576		case 4:
1577		//        logerror("c417_w %04x = %04x (%08x, %08x)\n", c417.adr, data, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1578		COMBINE_DATA(c417.ram + c417.adr);
1579		break;
1580		case 7:
1581		logerror("c417_w: ack IRQ 2 (%x)\n", data);
1582		m_maincpu->set_input_line(MIPS3_IRQ2, CLEAR_LINE);
1583		break;
1584		default:
1585		logerror("c417_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1586		break;
	1565	switch(offset)
	1566	{
	1567	case 0:
	1568	logerror("p3d PIO %04x\n", data);
	1569	break;
	1570	case 1:
	1571	COMBINE_DATA(&c417.adr);
	1572	break;
	1573	case 2:
	1574	c417.pointrom_adr = (c417.pointrom_adr << 16) | data;
	1575	break;
	1576	case 3:
	1577	c417.pointrom_adr = 0;
	1578	break;
	1579	case 4:
	1580	//logerror("c417_w %04x = %04x (%08x, %08x)\n", c417.adr, data, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	1581	COMBINE_DATA(c417.ram + c417.adr);
	1582	break;
	1583	case 7:
	1584	logerror("c417_w: ack IRQ 2 (%x)\n", data);
	1585	m_maincpu->set_input_line(MIPS3_IRQ2, CLEAR_LINE);
	1586	break;
	1587	default:
	1588	logerror("c417_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	1589	break;
1587	1590	}
1588	1591	}
1589	1592
r18691	r18692
1623	1626	{
1624	1627	c412_t &c412 = m_c412;
1625	1628
1626		switch(offset) {
1627		case 3:
1628		// 0001 = busy, 0002 = game uploads things
1629		return 0x0002;
1630		case 8: return c412.adr;
1631		case 9: return c412.adr >> 16;
1632		case 10: return s23_c412_ram_r(space, c412.adr, mem_mask);
	1629	switch(offset)
	1630	{
	1631	case 0x3:
	1632	return 0x0002; // 0001 = busy, 0002 = game uploads things
	1633	case 0x8:
	1634	return c412.adr;
	1635	case 0x9:
	1636	return c412.adr >> 16;
	1637	case 0xa:
	1638	return s23_c412_ram_r(space, c412.adr, mem_mask);
1633	1639	}
1634	1640
1635	1641	logerror("c412_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
r18691	r18692
1640	1646	{
1641	1647	c412_t &c412 = m_c412;
1642	1648
1643		switch(offset) {
1644		case 8: c412.adr = (data & mem_mask) | (c412.adr & (0xffffffff ^ mem_mask)); break;
1645		case 9: c412.adr = ((data & mem_mask) << 16) | (c412.adr & (0xffffffff ^ (mem_mask << 16))); break;
1646		case 10: s23_c412_ram_w(space, c412.adr, data, mem_mask); c412.adr += 2; break;
1647		default:
1648		logerror("c412_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1649		break;
	1649	switch (offset)
	1650	{
	1651	case 8:
	1652	c412.adr = (data & mem_mask) | (c412.adr & (0xffffffff ^ mem_mask));
	1653	break;
	1654	case 9:
	1655	c412.adr = ((data & mem_mask) << 16) | (c412.adr & (0xffffffff ^ (mem_mask << 16)));
	1656	break;
	1657	case 10:
	1658	s23_c412_ram_w(space, c412.adr, data, mem_mask);
	1659	c412.adr += 2;
	1660	break;
	1661	default:
	1662	logerror("c412_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	1663	break;
1650	1664	}
1651	1665	}
1652	1666
r18691	r18692
1682	1696	{
1683	1697	c421_t &c421 = m_c421;
1684	1698
1685		switch(offset) {
1686		case 0: return s23_c421_ram_r(space, c421.adr & 0xfffff, mem_mask);
1687		case 2: return c421.adr >> 16;
1688		case 3: return c421.adr;
	1699	switch (offset)
	1700	{
	1701	case 0:
	1702	return s23_c421_ram_r(space, c421.adr & 0xfffff, mem_mask);
	1703
	1704	case 2:
	1705	return c421.adr >> 16;
	1706	case 3:
	1707	return c421.adr;
1689	1708	}
1690	1709
1691	1710	logerror("c421_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
r18691	r18692
1696	1715	{
1697	1716	c421_t &c421 = m_c421;
1698	1717
1699		switch(offset) {
1700		case 0: s23_c421_ram_w(space, c421.adr & 0xfffff, data, mem_mask); c421.adr += 2; break;
1701		case 2: c421.adr = ((data & mem_mask) << 16) | (c421.adr & (0xffffffff ^ (mem_mask << 16))); break;
1702		case 3: c421.adr = (data & mem_mask) | (c421.adr & (0xffffffff ^ mem_mask)); break;
1703		default:
1704		logerror("c421_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1705		break;
	1718	switch (offset)
	1719	{
	1720	case 0:
	1721	s23_c421_ram_w(space, c421.adr & 0xfffff, data, mem_mask);
	1722	c421.adr += 2;
	1723	break;
	1724	case 2:
	1725	c421.adr = ((data & mem_mask) << 16) | (c421.adr & (0xffffffff ^ (mem_mask << 16)));
	1726	break;
	1727	case 3:
	1728	c421.adr = (data & mem_mask) | (c421.adr & (0xffffffff ^ mem_mask));
	1729	break;
	1730	default:
	1731	logerror("c421_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	1732	break;
1706	1733	}
1707	1734	}
1708	1735
1709	1736	WRITE16_MEMBER(namcos23_state::s23_ctl_w)
1710	1737	{
1711		switch(offset) {
1712		case 0: {
1713		if(m_ctl_led != (data & 0xff)) {
1714		m_ctl_led = data;
1715		/*          logerror("LEDS %c%c%c%c%c%c%c%c\n",
1716		m_ctl_led & 0x80 ? '.' : '#',
1717		m_ctl_led & 0x40 ? '.' : '#',
1718		m_ctl_led & 0x20 ? '.' : '#',
1719		m_ctl_led & 0x10 ? '.' : '#',
1720		m_ctl_led & 0x08 ? '.' : '#',
1721		m_ctl_led & 0x04 ? '.' : '#',
1722		m_ctl_led & 0x02 ? '.' : '#',
1723		m_ctl_led & 0x01 ? '.' : '#');*/
1724		}
1725		break;
1726		}
	1738	switch (offset)
	1739	{
	1740	case 0:
	1741	if (m_ctl_led != (data & 0xff))
	1742	{
	1743	m_ctl_led = data & 0xff;
	1744	for (int i = 0; i < 8; i++)
	1745	output_set_lamp_value(i, m_ctl_led>>i & 1);
	1746	}
	1747	break;
1727	1748
1728		case 2: case 3:
1729		// These may be coming from another CPU, in particular the I/O one
1730		m_ctl_inp_buffer[offset-2] = ioport(offset == 2 ? "P1" : "P2")->read();
1731		break;
1732		case 5:
1733		if(m_ctl_vbl_active) {
1734		m_ctl_vbl_active = false;
1735		space.device().execute().set_input_line(MIPS3_IRQ0, CLEAR_LINE);
1736		}
1737		break;
	1749	case 2: case 3:
	1750	// These may be coming from another CPU, in particular the I/O one
	1751	m_ctl_inp_buffer[offset-2] = ioport(offset == 2 ? "P1" : "P2")->read();
	1752	break;
	1753	case 5:
	1754	if(m_ctl_vbl_active)
	1755	{
	1756	m_ctl_vbl_active = false;
	1757	space.device().execute().set_input_line(MIPS3_IRQ0, CLEAR_LINE);
	1758	}
	1759	break;
1738	1760
1739		case 6:   // gmen wars spams this heavily with 0 prior to starting the GMEN board test
1740		if (data != 0)
	1761	case 6:   // gmen wars spams this heavily with 0 prior to starting the GMEN board test
	1762	if (data != 0)
	1763	logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	1764	break;
	1765
	1766	default:
1741	1767	logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1742		break;
1743
1744		default:
1745		logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1746	1768	}
1747	1769	}
1748	1770
1749	1771	READ16_MEMBER(namcos23_state::s23_ctl_r)
1750	1772	{
1751		switch(offset) {
	1773	switch (offset)
	1774	{
1752	1775	// 0100 set freezes gorgon (polygon fifo flag)
1753		case 1: return 0x0000 | ioport("DSW")->read();
1754		case 2: case 3: {
1755		UINT16 res = m_ctl_inp_buffer[offset-2] & 0x800 ? 0xffff : 0x0000;
1756		m_ctl_inp_buffer[offset-2] = (m_ctl_inp_buffer[offset-2] << 1) | 1;
1757		return res;
	1776	case 1:
	1777	return 0x0000 | ioport("DSW")->read();
	1778	case 2: case 3:
	1779	{
	1780	UINT16 res = m_ctl_inp_buffer[offset-2] & 0x800 ? 0xffff : 0x0000;
	1781	m_ctl_inp_buffer[offset-2] = (m_ctl_inp_buffer[offset-2] << 1) | 1;
	1782	return res;
	1783	}
1758	1784	}
1759		}
	1785
1760	1786	logerror("ctl_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1761	1787	return 0xffff;
1762	1788	}
r18691	r18692
1778	1804	{
1779	1805	c361_t &c361 = m_c361;
1780	1806
1781		switch(offset)
	1807	switch (offset)
1782	1808	{
1783		case 0:
1784		m_bgtilemap->set_scrollx(0, data&0xfff);
1785		break;
	1809	case 0:
	1810	m_bgtilemap->set_scrollx(0, data&0xfff);
	1811	break;
1786	1812
1787		case 1:
1788		m_bgtilemap->set_scrolly(0, data&0xfff);
1789		break;
	1813	case 1:
	1814	m_bgtilemap->set_scrolly(0, data&0xfff);
	1815	break;
1790	1816
1791		case 4:   // interrupt control
1792		c361.scanline = data & 0x1ff;
1793		c361.timer->adjust(machine().primary_screen->time_until_pos(c361.scanline));
1794		break;
	1817	case 4:   // interrupt control
	1818	c361.scanline = data & 0x1ff;
	1819	c361.timer->adjust(machine().primary_screen->time_until_pos(c361.scanline));
	1820	break;
1795	1821
1796		default:
1797		logerror("c361_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	1822	default:
	1823	logerror("c361_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	1824	break;
1798	1825	}
1799	1826	}
1800	1827
1801	1828	READ16_MEMBER(namcos23_state::s23_c361_r)
1802	1829	{
1803		switch(offset)
	1830	switch (offset)
1804	1831	{
1805		case 5: m_maincpu->set_input_line(MIPS3_IRQ1, CLEAR_LINE); return machine().primary_screen->vblank() ? 0x1ff : machine().primary_screen->vpos();
1806		case 6: return machine().primary_screen->vblank();
	1832	case 5:
	1833	m_maincpu->set_input_line(MIPS3_IRQ1, CLEAR_LINE);
	1834	return machine().primary_screen->vblank() ? 0x1ff : machine().primary_screen->vpos();
	1835	case 6:
	1836	return machine().primary_screen->vblank();
1807	1837	}
	1838
1808	1839	logerror("c361_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
1809	1840	return 0xffff;
1810	1841	}
r18691	r18692
1836	1867	default:
1837	1868	logerror("c422_w: %04x @ %x\n", data, offset);
1838	1869	break;
1839
1840	1870	}
1841	1871
1842	1872	COMBINE_DATA(&c422.regs[offset]);
r18691	r18692
1944	1974	bitmap_rgb32 *bitmap = (bitmap_rgb32 *)dest;
1945	1975	UINT32 *img = &bitmap->pix32(scanline, extent->startx);
1946	1976
1947		for(int x = extent->startx; x < extent->stopx; x++) {
	1977	for(int x = extent->startx; x < extent->stopx; x++)
	1978	{
1948	1979	float z = w ? 1/w : 0;
1949	1980	UINT32 pcol = rd->texture_lookup(*rd->machine, rd->pens, u*z, v*z);
1950	1981	float ll = l*z;
r18691	r18692
1962	1993	{
1963	1994	if(id == 0x8000)
1964	1995	return state->m_light_vector;
1965		if(id >= 0x100) {
	1996	if(id >= 0x100)
	1997	{
1966	1998	memset(state->m_spv, 0, sizeof(state->m_spv));
1967	1999	return state->m_spv;
1968	2000	}
r18691	r18692
1971	2003
1972	2004	static INT16 *p3d_getm(namcos23_state *state, UINT16 id)
1973	2005	{
1974		if(id >= 0x100) {
	2006	if(id >= 0x100)
	2007	{
1975	2008	memset(state->m_spm, 0, sizeof(state->m_spm));
1976	2009	return state->m_spm;
1977	2010	}
r18691	r18692
1980	2013
1981	2014	static void p3d_matrix_set(namcos23_state *state, const UINT16 *p, int size)
1982	2015	{
1983		if(size != 10) {
	2016	if(size != 10)
	2017	{
1984	2018	logerror("WARNING: p3d_matrix_set with size %d\n", size);
1985	2019	return;
1986	2020	}
r18691	r18692
1991	2025
1992	2026	static void p3d_vector_set(namcos23_state *state, const UINT16 *p, int size)
1993	2027	{
1994		if(size != 7) {
	2028	if(size != 7)
	2029	{
1995	2030	logerror("WARNING: p3d_vector_set with size %d\n", size);
1996	2031	return;
1997	2032	}
1998	2033	INT32 *t = p3d_getv(state, *p++);
1999		for(int i=0; i<3; i++) {
	2034	for(int i=0; i<3; i++)
	2035	{
2000	2036	t[i] = u32_to_s24((p[0] << 16) | p[1]);
2001	2037	p += 2;
2002	2038	}
r18691	r18692
2004	2040
2005	2041	static void p3d_scaling_set(namcos23_state *state, const UINT16 *p, int size)
2006	2042	{
2007		if(size != 1) {
	2043	if(size != 1)
	2044	{
2008	2045	logerror("WARNING: p3d_scaling_set with size %d\n", size);
2009	2046	return;
2010	2047	}
r18691	r18692
2013	2050
2014	2051	static void p3d_vector_matrix_mul(namcos23_state *state, const UINT16 *p, int size)
2015	2052	{
2016		if(size != 4) {
	2053	if(size != 4)
	2054	{
2017	2055	logerror("WARNING: p3d_vector_matrix_mul with size %d\n", size);
2018	2056	return;
2019	2057	}
r18691	r18692
2031	2069
2032	2070	static void p3d_matrix_vector_mul(namcos23_state *state, const UINT16 *p, int size)
2033	2071	{
2034		if(size != 4) {
	2072	if(size != 4)
	2073	{
2035	2074	logerror("WARNING: p3d_matrix_vector_mul with size %d\n", size);
2036	2075	return;
2037	2076	}
r18691	r18692
2050	2089
2051	2090	static void p3d_matrix_matrix_mul(namcos23_state *state, const UINT16 *p, int size)
2052	2091	{
2053		if(size != 4) {
	2092	if(size != 4)
	2093	{
2054	2094	logerror("WARNING: p3d_matrix_matrix_mul with size %d\n", size);
2055	2095	return;
2056	2096	}
r18691	r18692
2076	2116	{
2077	2117	render_t &render = state->m_render;
2078	2118
2079		if(size != 3) {
	2119	if(size != 3)
	2120	{
2080	2121	logerror("WARNING: p3d_render with size %d\n", size);
2081	2122	return;
2082	2123	}
r18691	r18692
2087	2128	if(p[0] == 0xd96)
2088	2129	return;
2089	2130
2090		if(render.count[render.cur] >= RENDER_MAX_ENTRIES) {
	2131	if(render.count[render.cur] >= RENDER_MAX_ENTRIES)
	2132	{
2091	2133	logerror("WARNING: render buffer full\n");
2092	2134	return;
2093	2135	}
r18691	r18692
2118	2160	{
2119	2161	render_t &render = state->m_render;
2120	2162
2121		if(size != 0) {
	2163	if(size != 0)
	2164	{
2122	2165	logerror("WARNING: p3d_flush with size %d\n", size);
2123	2166	return;
2124	2167	}
r18691	r18692
2134	2177	UINT16 buffer[256];
2135	2178	adr &= 0x1fffffff;
2136	2179	int pos = 0;
2137		while(pos < size) {
	2180
	2181	while(pos < size)
	2182	{
2138	2183	UINT16 h = space.read_word(adr+pos);
2139	2184
2140	2185	pos += 2;
2141	2186
2142	2187	UINT16 h1;
2143	2188	int psize;
2144		if(h & 0x4000) {
	2189	if(h & 0x4000)
	2190	{
2145	2191	h1 = h & 0xff00;
2146	2192	psize = h & 0xff;
2147		} else {
	2193	}
	2194	else
	2195	{
2148	2196	h1 = h & 0xfff0;
2149	2197	psize = h & 0xf;
2150	2198	}
2151	2199
2152		if(size-pos < psize*2) {
	2200	if(size-pos < psize*2)
	2201	{
2153	2202	logerror("WARNING: short packet (header %04x, remaining %x)\n", h, (size-pos)/2);
2154	2203	return;
2155	2204	}
2156	2205
2157		for(int i=0; i < psize; i++) {
	2206	for(int i=0; i < psize; i++)
	2207	{
2158	2208	buffer[i] = space.read_word(adr+pos);
2159	2209	pos += 2;
2160	2210	}
2161	2211
2162		switch(h1) {
2163		case 0x0040: p3d_matrix_set(state, buffer, psize); break;
2164		case 0x0050: p3d_vector_set(state, buffer, psize); break;
2165		case 0x0000: p3d_matrix_matrix_mul(state, buffer, psize); break;
2166		case 0x0810: p3d_matrix_vector_mul(state, buffer, psize); break;
2167		case 0x1010: p3d_vector_matrix_mul(state, buffer, psize); break;
2168		case 0x4400: p3d_scaling_set(state, buffer, psize); break;
2169		case 0x8000: p3d_render(state, buffer, psize, false); break;
2170		case 0x8080: p3d_render(state, buffer, psize, true); break;
2171		case 0xc000: p3d_flush(state, buffer, psize); break;
2172		default: {
2173		if(0) {
2174		logerror("p3d - [%04x] %04x", h1, h);
2175		for(int i=0; i<psize; i++)
2176		logerror(" %04x", buffer[i]);
2177		logerror("\n");
2178		}
2179		break;
	2212	switch(h1)
	2213	{
	2214	case 0x0040: p3d_matrix_set(state, buffer, psize); break;
	2215	case 0x0050: p3d_vector_set(state, buffer, psize); break;
	2216	case 0x0000: p3d_matrix_matrix_mul(state, buffer, psize); break;
	2217	case 0x0810: p3d_matrix_vector_mul(state, buffer, psize); break;
	2218	case 0x1010: p3d_vector_matrix_mul(state, buffer, psize); break;
	2219	case 0x4400: p3d_scaling_set(state, buffer, psize); break;
	2220	case 0x8000: p3d_render(state, buffer, psize, false); break;
	2221	case 0x8080: p3d_render(state, buffer, psize, true); break;
	2222	case 0xc000: p3d_flush(state, buffer, psize); break;
	2223	default:
	2224	if(0)
	2225	{
	2226	logerror("p3d - [%04x] %04x", h1, h);
	2227	for(int i=0; i<psize; i++)
	2228	logerror(" %04x", buffer[i]);
	2229	logerror("\n");
	2230	}
	2231	break;
2180	2232	}
2181		}
2182	2233	}
2183	2234	}
2184	2235
2185	2236	READ32_MEMBER(namcos23_state::p3d_r)
2186	2237	{
2187		switch(offset) {
2188		case 0xa: return 1; // Busy flag
	2238	switch (offset)
	2239	{
	2240	case 0xa:
	2241	return 1; // Busy flag
2189	2242	}
2190	2243
2191	2244	logerror("p3d_r %02x @ %08x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
r18691	r18692
2194	2247
2195	2248	WRITE32_MEMBER(namcos23_state::p3d_w)
2196	2249	{
2197		switch(offset) {
2198		case 0x7: COMBINE_DATA(&m_p3d_address); return;
2199		case 0x8: COMBINE_DATA(&m_p3d_size); return;
2200		case 0x9:
2201		if(data & 1)
2202		p3d_dma(space, m_p3d_address, m_p3d_size);
2203		return;
	2250	switch (offset)
	2251	{
	2252	case 0x7:
	2253	COMBINE_DATA(&m_p3d_address);
	2254	break;
	2255	case 0x8:
	2256	COMBINE_DATA(&m_p3d_size);
	2257	break;
	2258	case 0x9:
	2259	if (data & 1)
	2260	p3d_dma(space, m_p3d_address, m_p3d_size);
	2261	break;
	2262	default:
	2263	logerror("p3d_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
	2264	break;
2204	2265	}
2205		logerror("p3d_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31));
2206	2266	}
2207	2267
2208	2268	static void render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv)
r18691	r18692
2242	2302	return;
2243	2303	}
2244	2304
2245		while(adr < state->m_ptrom_limit) {
	2305	while(adr < state->m_ptrom_limit)
	2306	{
2246	2307	poly_vertex pv[15];
2247	2308
2248	2309	UINT32 type = state->m_ptrom[adr++];
r18691	r18692
2261	2322	UINT32 light = 0;
2262	2323	UINT32 extptr = 0;
2263	2324
2264		if(lmode == 3) {
	2325	if(lmode == 3)
	2326	{
2265	2327	extptr = adr;
2266	2328	adr += ne;
2267		} else
	2329	}
	2330	else
2268	2331	light = state->m_ptrom[adr++];
2269	2332
2270	2333	float minz = FLT_MAX;
2271	2334	float maxz = FLT_MIN;
2272	2335
2273		for(int i=0; i<ne; i++) {
	2336	for(int i=0; i<ne; i++)
	2337	{
2274	2338	UINT32 v1 = state->m_ptrom[adr++];
2275	2339	UINT32 v2 = state->m_ptrom[adr++];
2276	2340	UINT32 v3 = state->m_ptrom[adr++];
r18691	r18692
2284	2348	if(pv[i].p[0] < minz)
2285	2349	minz = pv[i].p[0];
2286	2350
2287		switch(lmode) {
	2351	switch(lmode)
	2352	{
2288	2353	case 0: case 1:
2289	2354	pv[i].p[3] = ((light >> (8*(3-i))) & 0xff) / 64.0;
2290	2355	break;
r18691	r18692
2314	2379
2315	2380	p->vertex_count = poly_zclip_if_less(ne, pv, p->pv, 4, 0.001f);
2316	2381
2317		if(p->vertex_count >= 3) {
2318		for(int i=0; i<p->vertex_count; i++) {
	2382	if(p->vertex_count >= 3)
	2383	{
	2384	for(int i=0; i<p->vertex_count; i++)
	2385	{
2319	2386	render_project(p->pv[i]);
2320	2387	float w = p->pv[i].p[0];
2321	2388	p->pv[i].p[1] *= w;
r18691	r18692
2361	2428
2362	2429	const static rectangle scissor(0, 639, 0, 479);
2363	2430
2364		for(int i=0; i<render.poly_count; i++) {
	2431	for(int i=0; i<render.poly_count; i++)
	2432	{
2365	2433	const namcos23_poly_entry *p = render.poly_order[i];
2366	2434	namcos23_render_data *rd = (namcos23_render_data *)poly_get_extra_data(render.polymgr);
2367	2435	*rd = p->rd;
r18691	r18692
2377	2445	const namcos23_render_entry *re = render.entries[!render.cur];
2378	2446
2379	2447	render.poly_count = 0;
2380		for(int i=0; i<render.count[!render.cur]; i++) {
2381		switch(re->type) {
	2448	for(int i=0; i<render.count[!render.cur]; i++)
	2449	{
	2450	switch(re->type)
	2451	{
2382	2452	case MODEL:
2383	2453	render_one_model(machine, re);
2384	2454	break;
r18691	r18692
2420	2490	{
2421	2491	render_t &render = m_render;
2422	2492
2423		if(!m_ctl_vbl_active) {
	2493	if(!m_ctl_vbl_active)
	2494	{
2424	2495	m_ctl_vbl_active = true;
2425	2496	device.execute().set_input_line(MIPS3_IRQ0, ASSERT_LINE);
2426	2497	}

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