trunk/src/mess/machine/c8280.c
| r18609 | r18610 | |
| 7 | 7 | |
| 8 | 8 | **********************************************************************/ |
| 9 | 9 | |
| 10 | /* |
| 11 | |
| 12 | TODO: |
| 13 | |
| 14 | - FDC CPU ROM is line swapped/bad dump? |
| 15 | |
| 16 | */ |
| 17 | |
| 10 | 18 | #include "c8280.h" |
| 11 | 19 | |
| 12 | 20 | |
| r18609 | r18610 | |
| 19 | 27 | #define M6502_FDC_TAG "9e" |
| 20 | 28 | #define M6532_0_TAG "9f" |
| 21 | 29 | #define M6532_1_TAG "9g" |
| 30 | #define WD1797_TAG "5e" |
| 22 | 31 | |
| 23 | 32 | |
| 24 | 33 | enum |
| r18609 | r18610 | |
| 39 | 48 | |
| 40 | 49 | |
| 41 | 50 | //------------------------------------------------- |
| 42 | | // device_config_complete - perform any |
| 43 | | // operations now that the configuration is |
| 44 | | // complete |
| 45 | | //------------------------------------------------- |
| 46 | | |
| 47 | | void c8280_device::device_config_complete() |
| 48 | | { |
| 49 | | m_shortname = "c8280"; |
| 50 | | } |
| 51 | | |
| 52 | | |
| 53 | | //------------------------------------------------- |
| 54 | 51 | // ROM( c8280 ) |
| 55 | 52 | //------------------------------------------------- |
| 56 | 53 | |
| r18609 | r18610 | |
| 79 | 76 | //------------------------------------------------- |
| 80 | 77 | |
| 81 | 78 | static ADDRESS_MAP_START( c8280_main_mem, AS_PROGRAM, 8, c8280_device ) |
| 82 | | AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x0100) AM_RAM // 6532 #1 |
| 83 | | AM_RANGE(0x0080, 0x00ff) AM_MIRROR(0x0100) AM_RAM // 6532 #2 |
| 84 | | AM_RANGE(0x0200, 0x021f) AM_MIRROR(0x0d60) AM_DEVREADWRITE_LEGACY(M6532_0_TAG, riot6532_r, riot6532_w) |
| 85 | | AM_RANGE(0x0280, 0x029f) AM_MIRROR(0x0d60) AM_DEVREADWRITE_LEGACY(M6532_1_TAG, riot6532_r, riot6532_w) |
| 86 | | AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share1") |
| 87 | | AM_RANGE(0x2000, 0x23ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share2") |
| 88 | | AM_RANGE(0x3000, 0x33ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share3") |
| 89 | | AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x0c00) AM_RAM AM_SHARE("share4") |
| 79 | AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x100) AM_RAM // 6532 #1 |
| 80 | AM_RANGE(0x0080, 0x00ff) AM_MIRROR(0x100) AM_RAM // 6532 #2 |
| 81 | AM_RANGE(0x0200, 0x021f) AM_MIRROR(0xd60) AM_DEVREADWRITE_LEGACY(M6532_0_TAG, riot6532_r, riot6532_w) |
| 82 | AM_RANGE(0x0280, 0x029f) AM_MIRROR(0xd60) AM_DEVREADWRITE_LEGACY(M6532_1_TAG, riot6532_r, riot6532_w) |
| 83 | AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0xc00) AM_RAM AM_SHARE("share1") |
| 84 | AM_RANGE(0x2000, 0x23ff) AM_MIRROR(0xc00) AM_RAM AM_SHARE("share2") |
| 85 | AM_RANGE(0x3000, 0x33ff) AM_MIRROR(0xc00) AM_RAM AM_SHARE("share3") |
| 86 | AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xc00) AM_RAM AM_SHARE("share4") |
| 90 | 87 | AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION(M6502_DOS_TAG, 0) |
| 91 | 88 | ADDRESS_MAP_END |
| 92 | 89 | |
| r18609 | r18610 | |
| 98 | 95 | static ADDRESS_MAP_START( c8280_fdc_mem, AS_PROGRAM, 8, c8280_device ) |
| 99 | 96 | ADDRESS_MAP_GLOBAL_MASK(0x1fff) |
| 100 | 97 | AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x380) AM_RAM |
| 98 | AM_RANGE(0x0080, 0x0081) AM_MIRROR(0x7e) AM_DEVREADWRITE_LEGACY(WD1797_TAG, wd17xx_r, wd17xx_w) |
| 101 | 99 | AM_RANGE(0x0400, 0x07ff) AM_RAM AM_SHARE("share1") |
| 102 | 100 | AM_RANGE(0x0800, 0x0bff) AM_RAM AM_SHARE("share2") |
| 103 | 101 | AM_RANGE(0x0c00, 0x0fff) AM_RAM AM_SHARE("share3") |
| 104 | 102 | AM_RANGE(0x1000, 0x13ff) AM_RAM AM_SHARE("share4") |
| 103 | AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x3ff) AM_READWRITE(fk5_r, fk5_w) |
| 105 | 104 | AM_RANGE(0x1800, 0x1fff) AM_ROM AM_REGION(M6502_FDC_TAG, 0) |
| 106 | 105 | ADDRESS_MAP_END |
| 107 | 106 | |
| r18609 | r18610 | |
| 300 | 299 | |
| 301 | 300 | |
| 302 | 301 | //------------------------------------------------- |
| 303 | | // LEGACY_FLOPPY_OPTIONS( c8280 ) |
| 302 | // wd17xx_interface fdc_intf |
| 304 | 303 | //------------------------------------------------- |
| 305 | 304 | |
| 306 | | static LEGACY_FLOPPY_OPTIONS_START( c8280 ) |
| 307 | | LEGACY_FLOPPY_OPTIONS_END |
| 308 | | |
| 309 | | |
| 310 | | //------------------------------------------------- |
| 311 | | // floppy_interface c8280_floppy_interface |
| 312 | | //------------------------------------------------- |
| 313 | | |
| 314 | 305 | static const floppy_interface c8280_floppy_interface = |
| 315 | 306 | { |
| 316 | 307 | DEVCB_NULL, |
| r18609 | r18610 | |
| 319 | 310 | DEVCB_NULL, |
| 320 | 311 | DEVCB_NULL, |
| 321 | 312 | FLOPPY_STANDARD_8_DSDD, |
| 322 | | LEGACY_FLOPPY_OPTIONS_NAME(c8280), |
| 313 | LEGACY_FLOPPY_OPTIONS_NAME(default), |
| 323 | 314 | "floppy_8", |
| 324 | 315 | NULL |
| 325 | 316 | }; |
| 326 | 317 | |
| 318 | static struct wd17xx_interface fdc_intf = |
| 319 | { |
| 320 | DEVCB_NULL, |
| 321 | DEVCB_CPU_INPUT_LINE(M6502_FDC_TAG, M6502_IRQ_LINE), |
| 322 | DEVCB_CPU_INPUT_LINE(M6502_FDC_TAG, M6502_SET_OVERFLOW), |
| 323 | { FLOPPY_0, FLOPPY_1, NULL, NULL } |
| 324 | }; |
| 327 | 325 | |
| 326 | |
| 328 | 327 | //------------------------------------------------- |
| 329 | 328 | // MACHINE_CONFIG_FRAGMENT( c8280 ) |
| 330 | 329 | //------------------------------------------------- |
| 331 | 330 | |
| 332 | 331 | static MACHINE_CONFIG_FRAGMENT( c8280 ) |
| 333 | | MCFG_CPU_ADD(M6502_DOS_TAG, M6502, 1000000) |
| 332 | MCFG_CPU_ADD(M6502_DOS_TAG, M6502, XTAL_12MHz/8) |
| 334 | 333 | MCFG_CPU_PROGRAM_MAP(c8280_main_mem) |
| 335 | 334 | |
| 336 | | MCFG_RIOT6532_ADD(M6532_0_TAG, 1000000, riot0_intf) |
| 337 | | MCFG_RIOT6532_ADD(M6532_1_TAG, 1000000, riot1_intf) |
| 335 | MCFG_RIOT6532_ADD(M6532_0_TAG, XTAL_12MHz/8, riot0_intf) |
| 336 | MCFG_RIOT6532_ADD(M6532_1_TAG, XTAL_12MHz/8, riot1_intf) |
| 338 | 337 | |
| 339 | | MCFG_CPU_ADD(M6502_FDC_TAG, M6502, 1000000) |
| 338 | MCFG_CPU_ADD(M6502_FDC_TAG, M6502, XTAL_12MHz/8) |
| 340 | 339 | MCFG_CPU_PROGRAM_MAP(c8280_fdc_mem) |
| 341 | 340 | |
| 341 | MCFG_FD1797_ADD(WD1797_TAG, fdc_intf) |
| 342 | |
| 342 | 343 | MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(c8280_floppy_interface) |
| 343 | 344 | MACHINE_CONFIG_END |
| 344 | 345 | |
| r18609 | r18610 | |
| 389 | 390 | m_fdccpu(*this, M6502_FDC_TAG), |
| 390 | 391 | m_riot0(*this, M6532_0_TAG), |
| 391 | 392 | m_riot1(*this, M6532_1_TAG), |
| 393 | m_fdc(*this, WD1797_TAG), |
| 392 | 394 | m_image0(*this, FLOPPY_0), |
| 393 | 395 | m_image1(*this, FLOPPY_1), |
| 394 | 396 | m_rfdo(1), |
| r18609 | r18610 | |
| 404 | 406 | |
| 405 | 407 | void c8280_device::device_start() |
| 406 | 408 | { |
| 409 | // state saving |
| 410 | save_item(NAME(m_rfdo)); |
| 411 | save_item(NAME(m_daco)); |
| 412 | save_item(NAME(m_atna)); |
| 413 | save_item(NAME(m_fk5)); |
| 407 | 414 | } |
| 408 | 415 | |
| 409 | 416 | |
| r18609 | r18610 | |
| 413 | 420 | |
| 414 | 421 | void c8280_device::device_reset() |
| 415 | 422 | { |
| 416 | | } |
| 423 | m_maincpu->reset(); |
| 417 | 424 | |
| 425 | // toggle M6502 SO |
| 426 | m_maincpu->set_input_line(M6502_SET_OVERFLOW, ASSERT_LINE); |
| 427 | m_maincpu->set_input_line(M6502_SET_OVERFLOW, CLEAR_LINE); |
| 418 | 428 | |
| 419 | | //------------------------------------------------- |
| 420 | | // device_timer - handler timer events |
| 421 | | //------------------------------------------------- |
| 429 | m_fdccpu->reset(); |
| 422 | 430 | |
| 423 | | void c8280_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
| 424 | | { |
| 431 | m_riot0->reset(); |
| 432 | m_riot1->reset(); |
| 433 | |
| 434 | wd17xx_mr_w(m_fdc, 1); |
| 435 | wd17xx_mr_w(m_fdc, 0); |
| 436 | |
| 437 | m_fk5 = 0; |
| 438 | wd17xx_dden_w(m_fdc, 0); |
| 439 | floppy_mon_w(m_image0, 1); |
| 440 | floppy_mon_w(m_image1, 1); |
| 425 | 441 | } |
| 426 | 442 | |
| 427 | 443 | |
| r18609 | r18610 | |
| 449 | 465 | device_reset(); |
| 450 | 466 | } |
| 451 | 467 | } |
| 468 | |
| 469 | READ8_MEMBER( c8280_device::fk5_r ) |
| 470 | { |
| 471 | /* |
| 472 | |
| 473 | bit description |
| 474 | |
| 475 | 0 DS1 |
| 476 | 1 DS2 |
| 477 | 2 _DDEN |
| 478 | 3 DCHG |
| 479 | 4 TSID |
| 480 | 5 MOTOR ENABLE |
| 481 | 6 0 |
| 482 | 7 0 |
| 483 | |
| 484 | */ |
| 485 | |
| 486 | UINT8 data = m_fk5; |
| 487 | |
| 488 | if (BIT(m_fk5, 0)) |
| 489 | { |
| 490 | data |= floppy_dskchg_r(m_image0) << 3; |
| 491 | data |= floppy_twosid_r(m_image0) << 4; |
| 492 | } |
| 493 | else if (BIT(m_fk5, 1)) |
| 494 | { |
| 495 | data |= floppy_dskchg_r(m_image1) << 3; |
| 496 | data |= floppy_twosid_r(m_image1) << 4; |
| 497 | } |
| 498 | |
| 499 | return data; |
| 500 | } |
| 501 | |
| 502 | WRITE8_MEMBER( c8280_device::fk5_w ) |
| 503 | { |
| 504 | /* |
| 505 | |
| 506 | bit description |
| 507 | |
| 508 | 0 DS1 |
| 509 | 1 DS2 |
| 510 | 2 _DDEN |
| 511 | 3 |
| 512 | 4 |
| 513 | 5 MOTOR ENABLE |
| 514 | 6 |
| 515 | 7 |
| 516 | |
| 517 | */ |
| 518 | |
| 519 | m_fk5 = data & 0x3f; |
| 520 | |
| 521 | // drive select |
| 522 | if (BIT(data, 0)) wd17xx_set_drive(m_fdc, 0); |
| 523 | if (BIT(data, 1)) wd17xx_set_drive(m_fdc, 1); |
| 524 | |
| 525 | // density select |
| 526 | wd17xx_dden_w(m_fdc, BIT(data, 2)); |
| 527 | |
| 528 | // motor enable |
| 529 | floppy_mon_w(m_image0, !BIT(data, 5)); |
| 530 | floppy_mon_w(m_image1, !BIT(data, 5)); |
| 531 | } |
trunk/src/mess/machine/c8280.h
| r18609 | r18610 | |
| 18 | 18 | #include "imagedev/flopdrv.h" |
| 19 | 19 | #include "machine/6532riot.h" |
| 20 | 20 | #include "machine/ieee488.h" |
| 21 | #include "machine/wd17xx.h" |
| 21 | 22 | |
| 22 | 23 | |
| 23 | 24 | |
| r18609 | r18610 | |
| 45 | 46 | DECLARE_WRITE8_MEMBER( riot1_pa_w ); |
| 46 | 47 | DECLARE_READ8_MEMBER( riot1_pb_r ); |
| 47 | 48 | DECLARE_WRITE8_MEMBER( riot1_pb_w ); |
| 49 | DECLARE_READ8_MEMBER( fk5_r ); |
| 50 | DECLARE_WRITE8_MEMBER( fk5_w ); |
| 48 | 51 | |
| 49 | 52 | protected: |
| 50 | 53 | // device-level overrides |
| 54 | virtual void device_config_complete() { m_shortname = "c8280"; } |
| 51 | 55 | virtual void device_start(); |
| 52 | 56 | virtual void device_reset(); |
| 53 | | virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); |
| 54 | | virtual void device_config_complete(); |
| 55 | 57 | |
| 56 | 58 | // device_ieee488_interface overrides |
| 57 | 59 | void ieee488_atn(int state); |
| r18609 | r18610 | |
| 64 | 66 | required_device<cpu_device> m_fdccpu; |
| 65 | 67 | required_device<riot6532_device> m_riot0; |
| 66 | 68 | required_device<riot6532_device> m_riot1; |
| 67 | | required_device<device_t> m_image0; |
| 68 | | required_device<device_t> m_image1; |
| 69 | required_device<fd1797_device> m_fdc; |
| 70 | required_device<legacy_floppy_image_device> m_image0; |
| 71 | required_device<legacy_floppy_image_device> m_image1; |
| 69 | 72 | |
| 70 | 73 | // IEEE-488 bus |
| 71 | 74 | int m_rfdo; // not ready for data output |
| 72 | 75 | int m_daco; // not data accepted output |
| 73 | 76 | int m_atna; // attention acknowledge |
| 77 | |
| 78 | UINT8 m_fk5; |
| 74 | 79 | }; |
| 75 | 80 | |
| 76 | 81 | |