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r18600 Friday 19th October, 2012 at 12:29:27 UTC by Miodrag Milanović
modernized some static calls in various drivers (no whatsnew)

[src/mame/drivers]	1945kiii.c 20pacgal.c 2mindril.c 39in1.c ace.c acefruit.c aces1.c acommand.c albazc.c
[src/mame/includes]	20pacgal.h

trunk/src/mame/drivers/ace.c

r18599	r18600
71	71	virtual void video_start();
72	72	virtual void palette_init();
73	73	UINT32 screen_update_ace(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	74	void ace_postload();
74	75	};
75	76
76	77
r18599	r18600
319	320	GFXDECODE_ENTRY( NULL          , 0x8000, scorelayout, 0, 2 )    /* the game dynamically modifies this */
320	321	GFXDECODE_END
321	322
322		static void ace_postload(running_machine &machine)
	323	void aceal_state::ace_postload()
323	324	{
324		machine.gfx[1]->mark_dirty(0);
325		machine.gfx[2]->mark_dirty(0);
326		machine.gfx[3]->mark_dirty(0);
327		machine.gfx[4]->mark_dirty(0);
	325	machine().gfx[1]->mark_dirty(0);
	326	machine().gfx[2]->mark_dirty(0);
	327	machine().gfx[3]->mark_dirty(0);
	328	machine().gfx[4]->mark_dirty(0);
328	329	}
329	330
330	331	void aceal_state::machine_start()
331	332	{
332	333	save_item(NAME(m_objpos));
333		machine().save().register_postload(save_prepost_delegate(FUNC(ace_postload), &machine()));
	334	machine().save().register_postload(save_prepost_delegate(FUNC(aceal_state::ace_postload), this));
334	335	}
335	336
336	337	void aceal_state::machine_reset()

trunk/src/mame/drivers/aces1.c

r18599	r18600
168	168	aces1_reset_nmi_timer();
169	169	}
170	170
171		static void aces1_create_timers(running_machine &machine)
172		{
173		aces1_state *state = machine.driver_data<aces1_state>();
174
175		state->m_aces1_irq_timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(aces1_state::m_aces1_irq_timer_callback),state), 0);
176		state->m_aces1_nmi_timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(aces1_state::m_aces1_nmi_timer_callback),state), 0);
177		}
178
179	171	void aces1_state::machine_start()
180	172	{
181		aces1_create_timers(machine());
	173	m_aces1_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(aces1_state::m_aces1_irq_timer_callback),this), 0);
	174	m_aces1_nmi_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(aces1_state::m_aces1_nmi_timer_callback),this), 0);
182	175	}
183	176
184	177	void aces1_state::machine_reset()

trunk/src/mame/drivers/2mindril.c

r18599	r18600
67	67	//INTERRUPT_GEN_MEMBER(drill_device_irq);
68	68	TIMER_CALLBACK_MEMBER(shutter_req);
69	69	TIMER_CALLBACK_MEMBER(defender_req);
	70	void tile_decode();
70	71	};
71	72
72	73
r18599	r18600
494	495	ROM_RELOAD(              0x600000, 0x200000 )
495	496	ROM_END
496	497
497		static void tile_decode(running_machine &machine)
	498	void _2mindril_state::tile_decode()
498	499	{
499	500	UINT8 lsb,msb;
500	501	UINT32 offset,i;
501		UINT8 *gfx = machine.root_device().memregion("gfx2")->base();
502		int size=machine.root_device().memregion("gfx2")->bytes();
	502	UINT8 *gfx = machine().root_device().memregion("gfx2")->base();
	503	int size=machine().root_device().memregion("gfx2")->bytes();
503	504	int data;
504	505
505	506	/* Setup ROM formats:
r18599	r18600
531	532	offset+=4;
532	533	}
533	534
534		gfx = machine.root_device().memregion("gfx1")->base();
535		size=machine.root_device().memregion("gfx1")->bytes();
	535	gfx = machine().root_device().memregion("gfx1")->base();
	536	size=machine().root_device().memregion("gfx1")->bytes();
536	537
537	538	offset = size/2;
538	539	for (i = size/2+size/4; i<size; i++)
r18599	r18600
557	558	DRIVER_INIT_MEMBER(_2mindril_state,drill)
558	559	{
559	560	m_f3_game=TMDRILL;
560		tile_decode(machine());
	561	tile_decode();
561	562	}
562	563
563	564	GAME( 1993, 2mindril,    0,        drill,    drill, _2mindril_state,    drill, ROT0,  "Taito", "Two Minute Drill", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE | GAME_MECHANICAL)

trunk/src/mame/drivers/albazc.c

r18599	r18600
35	35	virtual void video_start();
36	36	virtual void palette_init();
37	37	UINT32 screen_update_hanaroku(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	38	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
38	39	};
39	40
40	41
r18599	r18600
62	63	{
63	64	}
64	65
65		static void draw_sprites( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect )
	66	void albazc_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
66	67	{
67		albazc_state *state = machine.driver_data<albazc_state>();
68	68	int i;
69	69
70	70	for (i = 511; i >= 0; i--)
71	71	{
72		int code = state->m_spriteram1[i] | (state->m_spriteram2[i] << 8);
73		int color = (state->m_spriteram2[i + 0x200] & 0xf8) >> 3;
	72	int code = m_spriteram1[i] | (m_spriteram2[i] << 8);
	73	int color = (m_spriteram2[i + 0x200] & 0xf8) >> 3;
74	74	int flipx = 0;
75	75	int flipy = 0;
76		int sx = state->m_spriteram1[i + 0x200] | ((state->m_spriteram2[i + 0x200] & 0x07) << 8);
77		int sy = 242 - state->m_spriteram3[i];
	76	int sx = m_spriteram1[i + 0x200] | ((m_spriteram2[i + 0x200] & 0x07) << 8);
	77	int sy = 242 - m_spriteram3[i];
78	78
79		if (state->m_flip_bit)
	79	if (m_flip_bit)
80	80	{
81	81	sy = 242 - sy;
82	82	flipx = !flipx;
83	83	flipy = !flipy;
84	84	}
85	85
86		drawgfx_transpen(bitmap, cliprect, machine.gfx[0], code, color, flipx, flipy,
	86	drawgfx_transpen(bitmap, cliprect, machine().gfx[0], code, color, flipx, flipy,
87	87	sx, sy, 0);
88	88	}
89	89	}
r18599	r18600
91	91	UINT32 albazc_state::screen_update_hanaroku(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
92	92	{
93	93	bitmap.fill(0x1f0, cliprect);   // ???
94		draw_sprites(machine(), bitmap, cliprect);
	94	draw_sprites(bitmap, cliprect);
95	95	return 0;
96	96	}
97	97

trunk/src/mame/drivers/1945kiii.c

r18599	r18600
77	77	TILE_GET_INFO_MEMBER(get_k3_bg_tile_info);
78	78	virtual void machine_start();
79	79	virtual void video_start();
	80	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
80	81	UINT32 screen_update_k3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
81	82	};
82	83
r18599	r18600
98	99	m_bg_tilemap = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(k3_state::get_k3_bg_tile_info),this), TILEMAP_SCAN_ROWS, 16, 16, 32, 64);
99	100	}
100	101
101		static void draw_sprites( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect )
	102	void k3_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
102	103	{
103		k3_state *state = machine.driver_data<k3_state>();
104		gfx_element *gfx = machine.gfx[0];
105		UINT16 *source = state->m_spriteram_1;
106		UINT16 *source2 = state->m_spriteram_2;
	104	gfx_element *gfx = machine().gfx[0];
	105	UINT16 *source = m_spriteram_1;
	106	UINT16 *source2 = m_spriteram_2;
107	107	UINT16 *finish = source + 0x1000 / 2;
108	108
109	109	while (source < finish)
r18599	r18600
127	127	UINT32 k3_state::screen_update_k3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
128	128	{
129	129	m_bg_tilemap->draw(bitmap, cliprect, 0, 0);
130		draw_sprites(machine(), bitmap, cliprect);
	130	draw_sprites(bitmap, cliprect);
131	131	return 0;
132	132	}
133	133

trunk/src/mame/drivers/acommand.c

r18599	r18600
94	94	virtual void video_start();
95	95	UINT32 screen_update_acommand(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
96	96	TIMER_DEVICE_CALLBACK_MEMBER(acommand_scanline);
	97	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int priority, int pri_mask);
	98	void draw_led(bitmap_ind16 &bitmap, int x, int y,UINT8 value);
97	99	};
98	100
99	101
r18599	r18600
124	126	0);
125	127	}
126	128
127		static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int priority, int pri_mask)
	129	void acommand_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int priority, int pri_mask)
128	130	{
129		acommand_state *state = machine.driver_data<acommand_state>();
130		UINT16 *spriteram16 = state->m_spriteram;
	131	UINT16 *spriteram16 = m_spriteram;
131	132	int offs;
132	133
133		for (offs = 0;offs < state->m_spriteram.bytes()/2;offs += 8)
	134	for (offs = 0;offs < m_spriteram.bytes()/2;offs += 8)
134	135	{
135	136	if (!(spriteram16[offs+0] & 0x1000))
136	137	{
r18599	r18600
147	148	int xx,yy,x;
148	149	int delta = 16;
149	150
150		flipx ^= state->flip_screen();
151		flipy ^= state->flip_screen();
	151	flipx ^= flip_screen();
	152	flipy ^= flip_screen();
152	153
153	154	if ((pri&pri_mask)!=priority) continue;
154	155
155		if (state->flip_screen())
	156	if (flip_screen())
156	157	{
157	158	sx = 368 - sx;
158	159	sy = 240 - sy;
r18599	r18600
166	167	xx = w;
167	168	do
168	169	{
169		drawgfx_transpen(bitmap,cliprect,machine.gfx[2],
	170	drawgfx_transpen(bitmap,cliprect,machine().gfx[2],
170	171	code,
171	172	color,
172	173	flipx, flipy,
r18599	r18600
216	217	/*                                    0    1    2    3    4    5    6    7    8    9    a    b    c    d    e    f*/
217	218	static const UINT8 led_fill[0x10] = { 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0x00,0x00,0x00,0x00,0x00,0x00};
218	219
219		static void draw_led(bitmap_ind16 &bitmap, int x, int y,UINT8 value)
	220	void acommand_state::draw_led(bitmap_ind16 &bitmap, int x, int y,UINT8 value)
220	221	{
221	222	bitmap.plot_box(x, y, 6, 10, 0x00000000);
222	223
r18599	r18600
254	255	UINT32 acommand_state::screen_update_acommand(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
255	256	{
256	257	m_bg_tilemap->draw(bitmap, cliprect, 0,0);
257		draw_sprites(machine(),bitmap,cliprect,0,0);
	258	draw_sprites(bitmap,cliprect,0,0);
258	259	m_tx_tilemap->draw(bitmap, cliprect, 0,0);
259	260
260	261	/*Order might be wrong,but these for sure are the led numbers tested*/

trunk/src/mame/drivers/39in1.c

r18599	r18600
79	79	TIMER_CALLBACK_MEMBER(pxa255_dma_dma_end);
80	80	TIMER_CALLBACK_MEMBER(pxa255_ostimer_match);
81	81	TIMER_CALLBACK_MEMBER(pxa255_lcd_dma_eof);
	82	void pxa255_dma_irq_check();
	83	void pxa255_dma_load_descriptor_and_start(int channel);
	84	void pxa255_ostimer_irq_check();
	85	void pxa255_update_interrupts();
	86	void pxa255_set_irq_line(UINT32 line, int state);
	87	void pxa255_lcd_load_dma_descriptor(address_space & space, UINT32 address, int channel);
	88	void pxa255_lcd_irq_check();
	89	void pxa255_lcd_dma_kickoff(int channel);
	90	void pxa255_lcd_check_load_next_branch(int channel);
	91	void pxa255_start();
82	92	};
83	93
84	94
85		static void pxa255_dma_irq_check(running_machine& machine);
86
87
88
89
90
91
92		static void pxa255_ostimer_irq_check(running_machine& machine);
93
94
95
96
97		static void pxa255_update_interrupts(running_machine& machine);
98		static void pxa255_set_irq_line(running_machine& machine, UINT32 line, int state);
99
100
101
102
103
104
105		static void pxa255_lcd_load_dma_descriptor(address_space & space, UINT32 address, int channel);
106		static void pxa255_lcd_irq_check(running_machine& machine);
107		static void pxa255_lcd_dma_kickoff(running_machine& machine, int channel);
108		static void pxa255_lcd_check_load_next_branch(running_machine& machine, int channel);
109
110
111
112	95	#define VERBOSE_LEVEL ( 3 )
113	96
114	97	INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level, const char* s_fmt, ... )
r18599	r18600
245	228
246	229	*/
247	230
248		static void pxa255_dma_irq_check(running_machine& machine)
	231	void _39in1_state::pxa255_dma_irq_check()
249	232	{
250		_39in1_state *state = machine.driver_data<_39in1_state>();
251		PXA255_DMA_Regs *dma_regs = &state->m_dma_regs;
	233	PXA255_DMA_Regs *dma_regs = &m_dma_regs;
252	234	int channel = 0;
253	235	int set_intr = 0;
254	236
r18599	r18600
265	247	}
266	248	}
267	249
268		pxa255_set_irq_line(machine, PXA255_INT_DMA, set_intr);
	250	pxa255_set_irq_line(PXA255_INT_DMA, set_intr);
269	251	}
270	252
271		static void pxa255_dma_load_descriptor_and_start(running_machine& machine, int channel)
	253	void _39in1_state::pxa255_dma_load_descriptor_and_start(int channel)
272	254	{
273		_39in1_state *state = machine.driver_data<_39in1_state>();
274		PXA255_DMA_Regs *dma_regs = &state->m_dma_regs;
	255	PXA255_DMA_Regs *dma_regs = &m_dma_regs;
275	256	attotime period;
276	257
277	258	// Shut down any transfers that are currently going on, software should be smart enough to check if a
r18599	r18600
283	264
284	265	// Load the next descriptor
285	266
286		address_space &space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
	267	address_space &space = machine().device<pxa255_device>("maincpu")->space(AS_PROGRAM);
287	268	dma_regs->dsadr[channel] = space.read_dword(dma_regs->ddadr[channel] + 0x4);
288	269	dma_regs->dtadr[channel] = space.read_dword(dma_regs->ddadr[channel] + 0x8);
289	270	dma_regs->dcmd[channel]  = space.read_dword(dma_regs->ddadr[channel] + 0xc);
r18599	r18600
293	274	switch(channel)
294	275	{
295	276	case 3:
296		period = attotime::from_hz((147600000 / state->m_i2s_regs.sadiv) / (4 * 64)) * (dma_regs->dcmd[channel] & 0x00001fff);
	277	period = attotime::from_hz((147600000 / m_i2s_regs.sadiv) / (4 * 64)) * (dma_regs->dcmd[channel] & 0x00001fff);
297	278	break;
298	279	default:
299	280	period = attotime::from_hz(100000000) * (dma_regs->dcmd[channel] & 0x00001fff);
r18599	r18600
405	386	{
406	387	if(dma_regs->dcsr[param] & PXA255_DCSR_RUN)
407	388	{
408		pxa255_dma_load_descriptor_and_start(machine(), param);
	389	pxa255_dma_load_descriptor_and_start(param);
409	390	}
410	391	else
411	392	{
r18599	r18600
418	399	dma_regs->dcsr[param] &= ~PXA255_DCSR_RUN;
419	400	dma_regs->dcsr[param] |= PXA255_DCSR_STOPSTATE;
420	401	}
421		pxa255_dma_irq_check(machine());
	402	pxa255_dma_irq_check();
422	403	}
423	404
424	405	READ32_MEMBER(_39in1_state::pxa255_dma_r)
r18599	r18600
502	483	break;
503	484	}
504	485
505		pxa255_dma_load_descriptor_and_start(machine(), offset);
	486	pxa255_dma_load_descriptor_and_start(offset);
506	487	}
507	488	else if(!(data & PXA255_DCSR_RUN))
508	489	{
509	490	dma_regs->dcsr[offset] &= ~PXA255_DCSR_RUN;
510	491	}
511	492
512		pxa255_dma_irq_check(machine());
	493	pxa255_dma_irq_check();
513	494	break;
514	495	case PXA255_DINT:
515	496	verboselog( machine(), 3, "pxa255_dma_w: DMA Interrupt Register: %08x & %08x\n", data, mem_mask );
r18599	r18600
570	551
571	552	*/
572	553
573		static void pxa255_ostimer_irq_check(running_machine& machine)
	554	void _39in1_state::pxa255_ostimer_irq_check()
574	555	{
575		_39in1_state *state = machine.driver_data<_39in1_state>();
576		PXA255_OSTMR_Regs *ostimer_regs = &state->m_ostimer_regs;
	556	PXA255_OSTMR_Regs *ostimer_regs = &m_ostimer_regs;
577	557
578		pxa255_set_irq_line(machine, PXA255_INT_OSTIMER0, (ostimer_regs->oier & PXA255_OIER_E0) ? ((ostimer_regs->ossr & PXA255_OSSR_M0) ? 1 : 0) : 0);
579		//pxa255_set_irq_line(machine, PXA255_INT_OSTIMER1, (ostimer_regs->oier & PXA255_OIER_E1) ? ((ostimer_regs->ossr & PXA255_OSSR_M1) ? 1 : 0) : 0);
580		//pxa255_set_irq_line(machine, PXA255_INT_OSTIMER2, (ostimer_regs->oier & PXA255_OIER_E2) ? ((ostimer_regs->ossr & PXA255_OSSR_M2) ? 1 : 0) : 0);
581		//pxa255_set_irq_line(machine, PXA255_INT_OSTIMER3, (ostimer_regs->oier & PXA255_OIER_E3) ? ((ostimer_regs->ossr & PXA255_OSSR_M3) ? 1 : 0) : 0);
	558	pxa255_set_irq_line(PXA255_INT_OSTIMER0, (ostimer_regs->oier & PXA255_OIER_E0) ? ((ostimer_regs->ossr & PXA255_OSSR_M0) ? 1 : 0) : 0);
	559	//pxa255_set_irq_line(PXA255_INT_OSTIMER1, (ostimer_regs->oier & PXA255_OIER_E1) ? ((ostimer_regs->ossr & PXA255_OSSR_M1) ? 1 : 0) : 0);
	560	//pxa255_set_irq_line(PXA255_INT_OSTIMER2, (ostimer_regs->oier & PXA255_OIER_E2) ? ((ostimer_regs->ossr & PXA255_OSSR_M2) ? 1 : 0) : 0);
	561	//pxa255_set_irq_line(PXA255_INT_OSTIMER3, (ostimer_regs->oier & PXA255_OIER_E3) ? ((ostimer_regs->ossr & PXA255_OSSR_M3) ? 1 : 0) : 0);
582	562	}
583	563
584	564	TIMER_CALLBACK_MEMBER(_39in1_state::pxa255_ostimer_match)
r18599	r18600
588	568	if (0) verboselog(machine(), 3, "pxa255_ostimer_match channel %d\n", param);
589	569	ostimer_regs->ossr |= (1 << param);
590	570	ostimer_regs->oscr = ostimer_regs->osmr[param];
591		pxa255_ostimer_irq_check(machine());
	571	pxa255_ostimer_irq_check();
592	572	}
593	573
594	574	READ32_MEMBER(_39in1_state::pxa255_ostimer_r)
r18599	r18600
684	664	case PXA255_OSSR:
685	665	if (0) verboselog( machine(), 3, "pxa255_ostimer_w: OS Timer Status Register: %08x & %08x\n", data, mem_mask );
686	666	ostimer_regs->ossr &= ~data;
687		pxa255_ostimer_irq_check(machine());
	667	pxa255_ostimer_irq_check();
688	668	break;
689	669	case PXA255_OWER:
690	670	if (0) verboselog( machine(), 3, "pxa255_ostimer_w: OS Timer Watchdog Enable Register: %08x & %08x\n", data, mem_mask );
r18599	r18600
721	701
722	702	*/
723	703
724		static void pxa255_update_interrupts(running_machine& machine)
	704	void _39in1_state::pxa255_update_interrupts()
725	705	{
726		_39in1_state *state = machine.driver_data<_39in1_state>();
727		PXA255_INTC_Regs *intc_regs = &state->m_intc_regs;
	706	PXA255_INTC_Regs *intc_regs = &m_intc_regs;
728	707
729	708	intc_regs->icfp = (intc_regs->icpr & intc_regs->icmr) & intc_regs->iclr;
730	709	intc_regs->icip = (intc_regs->icpr & intc_regs->icmr) & (~intc_regs->iclr);
731		machine.device("maincpu")->execute().set_input_line(ARM7_FIRQ_LINE, intc_regs->icfp ? ASSERT_LINE : CLEAR_LINE);
732		machine.device("maincpu")->execute().set_input_line(ARM7_IRQ_LINE,  intc_regs->icip ? ASSERT_LINE : CLEAR_LINE);
	710	machine().device("maincpu")->execute().set_input_line(ARM7_FIRQ_LINE, intc_regs->icfp ? ASSERT_LINE : CLEAR_LINE);
	711	machine().device("maincpu")->execute().set_input_line(ARM7_IRQ_LINE,  intc_regs->icip ? ASSERT_LINE : CLEAR_LINE);
733	712	}
734	713
735		static void pxa255_set_irq_line(running_machine& machine, UINT32 line, int irq_state)
	714	void _39in1_state::pxa255_set_irq_line(UINT32 line, int irq_state)
736	715	{
737		_39in1_state *state = machine.driver_data<_39in1_state>();
738		PXA255_INTC_Regs *intc_regs = &state->m_intc_regs;
	716	PXA255_INTC_Regs *intc_regs = &m_intc_regs;
739	717
740	718	intc_regs->icpr &= ~line;
741	719	intc_regs->icpr |= irq_state ? line : 0;
742	720	//printf( "Setting IRQ line %08x to %d\n", line, irq_state );
743		pxa255_update_interrupts(machine);
	721	pxa255_update_interrupts();
744	722	}
745	723
746	724	READ32_MEMBER(_39in1_state::pxa255_intc_r)
r18599	r18600
1061	1039
1062	1040	*/
1063	1041
1064		static void pxa255_lcd_load_dma_descriptor(address_space & space, UINT32 address, int channel)
	1042	void _39in1_state::pxa255_lcd_load_dma_descriptor(address_space & space, UINT32 address, int channel)
1065	1043	{
1066		_39in1_state *state = space.machine().driver_data<_39in1_state>();
1067		PXA255_LCD_Regs *lcd_regs = &state->m_lcd_regs;
	1044	PXA255_LCD_Regs *lcd_regs = &m_lcd_regs;
1068	1045
1069	1046	lcd_regs->dma[channel].fdadr = space.read_dword(address);
1070	1047	lcd_regs->dma[channel].fsadr = space.read_dword(address + 0x04);
r18599	r18600
1077	1054	verboselog( space.machine(), 4, "    DMA Command: %08x\n", lcd_regs->dma[channel].ldcmd );
1078	1055	}
1079	1056
1080		static void pxa255_lcd_irq_check(running_machine& machine)
	1057	void _39in1_state::pxa255_lcd_irq_check()
1081	1058	{
1082		_39in1_state *state = machine.driver_data<_39in1_state>();
1083		PXA255_LCD_Regs *lcd_regs = &state->m_lcd_regs;
	1059	PXA255_LCD_Regs *lcd_regs = &m_lcd_regs;
1084	1060
1085	1061	if(((lcd_regs->lcsr & PXA255_LCSR_BS)  != 0 && (lcd_regs->lccr0 & PXA255_LCCR0_BM)  == 0) ||
1086	1062	((lcd_regs->lcsr & PXA255_LCSR_EOF) != 0 && (lcd_regs->lccr0 & PXA255_LCCR0_EFM) == 0) ||
1087	1063	((lcd_regs->lcsr & PXA255_LCSR_SOF) != 0 && (lcd_regs->lccr0 & PXA255_LCCR0_SFM) == 0))
1088	1064	{
1089		pxa255_set_irq_line(machine, PXA255_INT_LCD, 1);
	1065	pxa255_set_irq_line(PXA255_INT_LCD, 1);
1090	1066	}
1091	1067	else
1092	1068	{
1093		pxa255_set_irq_line(machine, PXA255_INT_LCD, 0);
	1069	pxa255_set_irq_line(PXA255_INT_LCD, 0);
1094	1070	}
1095	1071	}
1096	1072
1097		static void pxa255_lcd_dma_kickoff(running_machine& machine, int channel)
	1073	void _39in1_state::pxa255_lcd_dma_kickoff(int channel)
1098	1074	{
1099		_39in1_state *state = machine.driver_data<_39in1_state>();
1100		PXA255_LCD_Regs *lcd_regs = &state->m_lcd_regs;
	1075	PXA255_LCD_Regs *lcd_regs = &m_lcd_regs;
1101	1076
1102	1077	if(lcd_regs->dma[channel].fdadr != 0)
1103	1078	{
r18599	r18600
1109	1084	{
1110	1085	lcd_regs->liidr = lcd_regs->dma[channel].fidr;
1111	1086	lcd_regs->lcsr |= PXA255_LCSR_SOF;
1112		pxa255_lcd_irq_check(machine);
	1087	pxa255_lcd_irq_check();
1113	1088	}
1114	1089
1115	1090	if(lcd_regs->dma[channel].ldcmd & PXA255_LDCMD_PAL)
1116	1091	{
1117		address_space &space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
	1092	address_space &space = machine().device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1118	1093	int length = lcd_regs->dma[channel].ldcmd & 0x000fffff;
1119	1094	int index = 0;
1120	1095	for(index = 0; index < length; index += 2)
1121	1096	{
1122	1097	UINT16 color = space.read_word((lcd_regs->dma[channel].fsadr &~ 1) + index);
1123		state->m_pxa255_lcd_palette[index >> 1] = (((((color >> 11) & 0x1f) << 3) | (color >> 13)) << 16) | (((((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3)) << 8) | (((color & 0x1f) << 3) | ((color >> 2) & 0x7));
1124		palette_set_color_rgb(machine, index >> 1, (((color >> 11) & 0x1f) << 3) | (color >> 13), (((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3), ((color & 0x1f) << 3) | ((color >> 2) & 0x7));
	1098	m_pxa255_lcd_palette[index >> 1] = (((((color >> 11) & 0x1f) << 3) | (color >> 13)) << 16) | (((((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3)) << 8) | (((color & 0x1f) << 3) | ((color >> 2) & 0x7));
	1099	palette_set_color_rgb(machine(), index >> 1, (((color >> 11) & 0x1f) << 3) | (color >> 13), (((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3), ((color & 0x1f) << 3) | ((color >> 2) & 0x7));
1125	1100	}
1126	1101	}
1127	1102	else
1128	1103	{
1129		address_space &space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
	1104	address_space &space = machine().device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1130	1105	int length = lcd_regs->dma[channel].ldcmd & 0x000fffff;
1131	1106	int index = 0;
1132	1107	for(index = 0; index < length; index++)
1133	1108	{
1134		state->m_pxa255_lcd_framebuffer[index] = space.read_byte(lcd_regs->dma[channel].fsadr + index);
	1109	m_pxa255_lcd_framebuffer[index] = space.read_byte(lcd_regs->dma[channel].fsadr + index);
1135	1110	}
1136	1111	}
1137	1112	}
1138	1113	}
1139	1114
1140		static void pxa255_lcd_check_load_next_branch(running_machine& machine, int channel)
	1115	void _39in1_state::pxa255_lcd_check_load_next_branch(int channel)
1141	1116	{
1142		_39in1_state *state = machine.driver_data<_39in1_state>();
1143		PXA255_LCD_Regs *lcd_regs = &state->m_lcd_regs;
	1117	PXA255_LCD_Regs *lcd_regs = &m_lcd_regs;
1144	1118
1145	1119	if(lcd_regs->fbr[channel] & 1)
1146	1120	{
1147		verboselog( machine, 4, "pxa255_lcd_check_load_next_branch: Taking branch\n" );
	1121	verboselog( machine(), 4, "pxa255_lcd_check_load_next_branch: Taking branch\n" );
1148	1122	lcd_regs->fbr[channel] &= ~1;
1149		address_space &space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
	1123	address_space &space = machine().device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1150	1124	//lcd_regs->fbr[channel] = (space.read_dword(lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
1151	1125	//printf( "%08x\n", lcd_regs->fbr[channel] );
1152	1126	pxa255_lcd_load_dma_descriptor(space, lcd_regs->fbr[channel] & 0xfffffff0, 0);
1153	1127	lcd_regs->fbr[channel] = (space.read_dword(lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
1154		pxa255_lcd_dma_kickoff(machine, 0);
	1128	pxa255_lcd_dma_kickoff(0);
1155	1129	if(lcd_regs->fbr[channel] & 2)
1156	1130	{
1157	1131	lcd_regs->fbr[channel] &= ~2;
r18599	r18600
1163	1137	}
1164	1138	else
1165	1139	{
1166		if (0) verboselog( machine, 3, "pxa255_lcd_check_load_next_branch: Not taking branch\n" );
	1140	if (0) verboselog( machine(), 3, "pxa255_lcd_check_load_next_branch: Not taking branch\n" );
1167	1141	}
1168	1142	}
1169	1143
r18599	r18600
1177	1151	lcd_regs->liidr = lcd_regs->dma[param].fidr;
1178	1152	lcd_regs->lcsr |= PXA255_LCSR_EOF;
1179	1153	}
1180		pxa255_lcd_check_load_next_branch(machine(), param);
1181		pxa255_lcd_irq_check(machine());
	1154	pxa255_lcd_check_load_next_branch(param);
	1155	pxa255_lcd_irq_check();
1182	1156	}
1183	1157
1184	1158	READ32_MEMBER(_39in1_state::pxa255_lcd_r)
r18599	r18600
1276	1250	if(!lcd_regs->dma[0].eof->enabled())
1277	1251	{
1278	1252	if (0) verboselog( machine(), 3, "ch0 EOF timer is not enabled, taking branch now\n" );
1279		pxa255_lcd_check_load_next_branch(machine(), 0);
1280		pxa255_lcd_irq_check(machine());
	1253	pxa255_lcd_check_load_next_branch(0);
	1254	pxa255_lcd_irq_check();
1281	1255	}
1282	1256	break;
1283	1257	case PXA255_FBR1:      // 0x44000024
r18599	r18600
1286	1260	if(!lcd_regs->dma[1].eof->enabled())
1287	1261	{
1288	1262	verboselog( machine(), 3, "ch1 EOF timer is not enabled, taking branch now\n" );
1289		pxa255_lcd_check_load_next_branch(machine(), 1);
1290		pxa255_lcd_irq_check(machine());
	1263	pxa255_lcd_check_load_next_branch(1);
	1264	pxa255_lcd_irq_check();
1291	1265	}
1292	1266	break;
1293	1267	case PXA255_LCSR:      // 0x44000038
1294	1268	verboselog( machine(), 4, "pxa255_lcd_w: LCD Controller Status Register: %08x & %08x\n", data, mem_mask );
1295	1269	lcd_regs->lcsr &= ~data;
1296		pxa255_lcd_irq_check(machine());
	1270	pxa255_lcd_irq_check();
1297	1271	break;
1298	1272	case PXA255_LIIDR:      // 0x4400003c
1299	1273	verboselog( machine(), 3, "pxa255_lcd_w: LCD Controller Interrupt ID Register: %08x & %08x\n", data, mem_mask );
r18599	r18600
1536	1510	}
1537	1511
1538	1512	/* To be moved to DEVICE_START( pxa255 ) upon completion */
1539		static void pxa255_start(running_machine& machine)
	1513	void _39in1_state::pxa255_start()
1540	1514	{
1541		_39in1_state *state = machine.driver_data<_39in1_state>();
1542	1515	int index = 0;
1543	1516
1544	1517	//pxa255_t* pxa255 = pxa255_get_safe_token( device );
r18599	r18600
1547	1520
1548	1521	for(index = 0; index < 16; index++)
1549	1522	{
1550		state->m_dma_regs.dcsr[index] = 0x00000008;
1551		state->m_dma_regs.timer[index] = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(_39in1_state::pxa255_dma_dma_end),state));
	1523	m_dma_regs.dcsr[index] = 0x00000008;
	1524	m_dma_regs.timer[index] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(_39in1_state::pxa255_dma_dma_end),this));
1552	1525	}
1553	1526
1554		memset(&state->m_ostimer_regs, 0, sizeof(state->m_ostimer_regs));
	1527	memset(&m_ostimer_regs, 0, sizeof(m_ostimer_regs));
1555	1528	for(index = 0; index < 4; index++)
1556	1529	{
1557		state->m_ostimer_regs.osmr[index] = 0;
1558		state->m_ostimer_regs.timer[index] = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(_39in1_state::pxa255_ostimer_match),state));
	1530	m_ostimer_regs.osmr[index] = 0;
	1531	m_ostimer_regs.timer[index] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(_39in1_state::pxa255_ostimer_match),this));
1559	1532	}
1560	1533
1561		memset(&state->m_intc_regs, 0, sizeof(state->m_intc_regs));
	1534	memset(&m_intc_regs, 0, sizeof(m_intc_regs));
1562	1535
1563		memset(&state->m_lcd_regs, 0, sizeof(state->m_lcd_regs));
1564		state->m_lcd_regs.dma[0].eof = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(_39in1_state::pxa255_lcd_dma_eof),state));
1565		state->m_lcd_regs.dma[1].eof = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(_39in1_state::pxa255_lcd_dma_eof),state));
1566		state->m_lcd_regs.trgbr = 0x00aa5500;
1567		state->m_lcd_regs.tcr = 0x0000754f;
	1536	memset(&m_lcd_regs, 0, sizeof(m_lcd_regs));
	1537	m_lcd_regs.dma[0].eof = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(_39in1_state::pxa255_lcd_dma_eof),this));
	1538	m_lcd_regs.dma[1].eof = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(_39in1_state::pxa255_lcd_dma_eof),this));
	1539	m_lcd_regs.trgbr = 0x00aa5500;
	1540	m_lcd_regs.tcr = 0x0000754f;
1568	1541
1569	1542	//pxa255_register_state_save(device);
1570	1543	}
r18599	r18600
1585	1558	//          }
1586	1559	}
1587	1560
1588		pxa255_start(machine());
	1561	pxa255_start();
1589	1562	}
1590	1563
1591	1564	static MACHINE_CONFIG_START( 39in1, _39in1_state )

trunk/src/mame/drivers/acefruit.c

r18599	r18600
42	42	UINT32 screen_update_acefruit(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
43	43	INTERRUPT_GEN_MEMBER(acefruit_vblank);
44	44	TIMER_CALLBACK_MEMBER(acefruit_refresh);
	45	void acefruit_update_irq(int vpos);
45	46	};
46	47
47	48
48	49
49		static void acefruit_update_irq(running_machine &machine, int vpos )
	50	void acefruit_state::acefruit_update_irq(int vpos)
50	51	{
51		acefruit_state *state = machine.driver_data<acefruit_state>();
52	52	int col;
53	53	int row = vpos / 8;
54	54
55	55	for( col = 0; col < 32; col++ )
56	56	{
57	57	int tile_index = ( col * 32 ) + row;
58		int color = state->m_colorram[ tile_index ];
	58	int color = m_colorram[ tile_index ];
59	59
60	60	switch( color )
61	61	{
62	62	case 0x0c:
63		machine.device("maincpu")->execute().set_input_line(0, HOLD_LINE );
	63	machine().device("maincpu")->execute().set_input_line(0, HOLD_LINE );
64	64	break;
65	65	}
66	66	}
r18599	r18600
72	72	int vpos = machine().primary_screen->vpos();
73	73
74	74	machine().primary_screen->update_partial(vpos );
75		acefruit_update_irq(machine(), vpos );
	75	acefruit_update_irq(vpos);
76	76
77	77	vpos = ( ( vpos / 8 ) + 1 ) * 8;
78	78

trunk/src/mame/drivers/20pacgal.c

r18599	r18600
172	172	*
173	173	*************************************/
174	174
175		static void set_bankptr(running_machine &machine)
	175	void _20pacgal_state::set_bankptr()
176	176	{
177		_20pacgal_state *state =  machine.driver_data<_20pacgal_state>();
178		if (state->m_game_selected == 0)
	177	if (m_game_selected == 0)
179	178	{
180		UINT8 *rom = state->memregion("maincpu")->base();
181		state->membank("bank1")->set_base(rom + 0x08000);
	179	UINT8 *rom = memregion("maincpu")->base();
	180	membank("bank1")->set_base(rom + 0x08000);
182	181	}
183	182	else
184		state->membank("bank1")->set_base(state->m_ram_48000);
	183	membank("bank1")->set_base(m_ram_48000);
185	184	}
186	185
187	186	WRITE8_MEMBER(_20pacgal_state::ram_bank_select_w)
188	187	{
189
190	188	m_game_selected = data & 1;
191		set_bankptr(machine());
	189	set_bankptr();
192	190	}
193	191
194	192	WRITE8_MEMBER(_20pacgal_state::ram_48000_w)
r18599	r18600
351	349	save_item(NAME(m_ram_48000));
352	350	save_item(NAME(m_irq_mask));
353	351
354		machine().save().register_postload(save_prepost_delegate(FUNC(set_bankptr), &machine()));
	352	machine().save().register_postload(save_prepost_delegate(FUNC(_20pacgal_state::set_bankptr), this));
355	353	}
356	354
357	355	void _20pacgal_state::machine_reset()

trunk/src/mame/includes/20pacgal.h

r18599	r18600
56	56	virtual void machine_reset();
57	57	UINT32 screen_update_20pacgal(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
58	58	INTERRUPT_GEN_MEMBER(vblank_irq);
	59	void set_bankptr();
59	60	};
60	61
61	62

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