Previous

199869 Revisions

Next

r18590 Thursday 18th October, 2012 at 14:17:00 UTC by Curt Coder
(MESS) c128: Fixed keyboard and C64 mode. (nw) (MESS) c64: Cleanup. (nw) (MESS) mos6566: Implemented FAST register and removed hacks from interface. (nw)

[src/mess]	mess.lst
[src/mess/drivers]	c128.c c64.c cbm2.c vic10.c
[src/mess/includes]	c128.h c64.h
[src/mess/video]	mos6566.c mos6566.h

trunk/src/mess/includes/c64.h

r18589	r18590
3	3	#ifndef __C64__
4	4	#define __C64__
5	5
6
7	6	#include "emu.h"
8	7	#include "formats/cbm_snqk.h"
9	8	#include "includes/cbm.h"
r18589	r18590
23	22	#define M6510_TAG      "u7"
24	23	#define MOS6567_TAG      "u19"
25	24	#define MOS6569_TAG      "u19"
26		#define MOS6851_TAG      "u18"
	25	#define MOS6581_TAG      "u18"
27	26	#define MOS6526_1_TAG   "u1"
28	27	#define MOS6526_2_TAG   "u2"
29	28	#define PLA_TAG         "u17"
r18589	r18590
39	38	m_maincpu(*this, M6510_TAG),
40	39	m_pla(*this, PLA_TAG),
41	40	m_vic(*this, MOS6569_TAG),
42		m_sid(*this, MOS6851_TAG),
	41	m_sid(*this, MOS6581_TAG),
43	42	m_cia1(*this, MOS6526_1_TAG),
44	43	m_cia2(*this, MOS6526_2_TAG),
45	44	m_iec(*this, CBM_IEC_TAG),
r18589	r18590
82	81	virtual void machine_reset();
83	82
84	83	void check_interrupts();
85		void bankswitch(offs_t offset, offs_t va, int rw, int aec, int ba, int cas, int *casram, int *basic, int *kernal, int *charom, int *grw, int *io, int *roml, int *romh);
86		UINT8 read_memory(address_space &space, offs_t offset, int ba, int casram, int basic, int kernal, int charom, int io, int roml, int romh);
	84	void read_pla(offs_t offset, offs_t va, int rw, int aec, int ba, int cas, int *casram, int *basic, int *kernal, int *charom, int *grw, int *io, int *roml, int *romh);
	85	UINT8 read_memory(address_space &space, offs_t offset, offs_t va, int rw, int aec, int ba, int cas);
	86	void write_memory(address_space &space, offs_t offset, UINT8 data, int rw, int aec, int ba, int cas);
87	87
88	88	DECLARE_READ8_MEMBER( read );
89	89	DECLARE_WRITE8_MEMBER( write );
r18589	r18590
115	115	DECLARE_WRITE8_MEMBER( exp_dma_w );
116	116	DECLARE_WRITE_LINE_MEMBER( exp_irq_w );
117	117	DECLARE_WRITE_LINE_MEMBER( exp_nmi_w );
	118	DECLARE_WRITE_LINE_MEMBER( exp_dma_w );
118	119	DECLARE_WRITE_LINE_MEMBER( exp_reset_w );
119	120
120	121	// memory state
r18589	r18590
136	137	int m_vic_irq;
137	138	int m_exp_irq;
138	139	int m_exp_nmi;
	140	int m_exp_dma;
139	141	int m_cass_rd;
140	142	int m_iec_srq;
141	143	};

trunk/src/mess/includes/c128.h

r18589	r18590
82	82	m_exp_irq(CLEAR_LINE),
83	83	m_exp_nmi(CLEAR_LINE),
84	84	m_cass_rd(1),
85		m_iec_srq(1)
	85	m_iec_srq(1),
	86	m_vic_k(0x07)
86	87	{ }
87	88
88	89	required_device<legacy_cpu_device> m_maincpu;
r18589	r18590
129	130	DECLARE_READ_LINE_MEMBER( mmu_sense40_r );
130	131
131	132	INTERRUPT_GEN_MEMBER( frame_interrupt );
132		DECLARE_READ8_MEMBER( vic_dma_read );
133		DECLARE_READ8_MEMBER( vic_dma_read_color );
134	133	DECLARE_WRITE_LINE_MEMBER( vic_irq_w );
	134	DECLARE_WRITE8_MEMBER( vic_k_w );
135	135
136	136	DECLARE_READ8_MEMBER( sid_potx_r );
137	137	DECLARE_READ8_MEMBER( sid_poty_r );
r18589	r18590
194	194	int m_vic_irq;
195	195	int m_exp_irq;
196	196	int m_exp_nmi;
	197	int m_exp_dma;
197	198	int m_cass_rd;
198	199	int m_iec_srq;
199	200
200	201	// keyboard state
201		UINT8 m_keyline[3];
	202	UINT8 m_vic_k;
202	203	};
203	204
204	205

trunk/src/mess/video/mos6566.c

r18589	r18590
22	22
23	23	- cleanup
24	24	- light pen
25		- remove RDY hack
26	25	- http://hitmen.c02.at/temp/palstuff/
27	26
28	27	*/
r18589	r18590
86	85	REGISTER_M4C,
87	86	REGISTER_M5C,
88	87	REGISTER_M6C,
89		REGISTER_M7C
	88	REGISTER_M7C,
	89	REGISTER_KCR,
	90	REGISTER_FAST
90	91	};
91	92
92	93
r18589	r18590
155	156	#define VIC2_X_VALUE         ((LIGHTPEN_X_VALUE / 1.3) + 12)
156	157	#define VIC2_Y_VALUE         ((LIGHTPEN_Y_VALUE      ) + 10)
157	158
158		#define VIC2E_K0_LEVEL         (m_reg[0x2f] & 0x01)
159		#define VIC2E_K1_LEVEL         (m_reg[0x2f] & 0x02)
160		#define VIC2E_K2_LEVEL         (m_reg[0x2f] & 0x04)
161
162
163	159	/* sprites 0 .. 7 */
164	160	#define SPRITEON(nr)         (m_reg[0x15] & (1 << nr))
165	161	#define SPRITE_Y_EXPAND(nr)      (m_reg[0x17] & (1 << nr))
r18589	r18590
328	324	if (m_device_suspended == 0)
329	325	{
330	326	m_first_ba_cycle = m_cycles_counter;
331		if (m_in_rdy_workaround_func(0) != 7 )
	327	//if (m_in_rdy_workaround_func(0) != 7 )
332	328	{
333	329	//          machine.firstcpu->suspend(SUSPEND_REASON_SPIN, 0);
334	330	}
r18589	r18590
618	614	// resolve callbacks
619	615	m_out_irq_func.resolve(m_out_irq_cb, *this);
620	616	m_out_rdy_func.resolve(m_out_rdy_cb, *this);
621		m_in_lightpen_x_func.resolve(m_in_x_cb, *this);
622		m_in_lightpen_y_func.resolve(m_in_y_cb, *this);
623		m_in_lightpen_button_func.resolve(m_in_button_cb, *this);
624		m_in_rdy_workaround_func.resolve(m_in_rdy_cb, *this);
	617	m_out_k_func.resolve(m_out_k_cb, *this);
625	618
626	619	m_cpu = machine().device<cpu_device>(m_cpu_tag);
627	620
r18589	r18590
838	831
839	832	//          if (LIGHTPEN_BUTTON)
840	833	{
841		m_reg[0x13] = VIC2_X_VALUE;
842		m_reg[0x14] = VIC2_Y_VALUE;
	834	//               m_reg[0x13] = VIC2_X_VALUE;
	835	//               m_reg[0x14] = VIC2_Y_VALUE;
843	836	}
844	837	vic2_set_interrupt(8);
845	838	}
r18589	r18590
1459	1452
1460	1453	//          if (LIGHTPEN_BUTTON)
1461	1454	{
1462		m_reg[0x13] = VIC2_X_VALUE;
1463		m_reg[0x14] = VIC2_Y_VALUE;
	1455	//               m_reg[0x13] = VIC2_X_VALUE;
	1456	//               m_reg[0x14] = VIC2_Y_VALUE;
1464	1457	}
1465	1458	vic2_set_interrupt(8);
1466	1459	}
r18589	r18590
1650	1643
1651	1644	m_raster_x = 0xfffc;
1652	1645
1653		if ((m_in_rdy_workaround_func(0) == 0 ) && (m_is_bad_line))
1654		m_rdy_cycles += (43+adjust(0));
	1646	//         if ((m_in_rdy_workaround_func(0) == 0 ) && (m_is_bad_line))
	1647	//            m_rdy_cycles += (43+adjust(0));
1655	1648
1656	1649	m_cycle++;
1657	1650	break;
r18589	r18590
1665	1658
1666	1659	m_vc = m_vc_base;
1667	1660
1668		if ((m_in_rdy_workaround_func(0) == 1 ) && (m_is_bad_line))
1669		m_rdy_cycles += (42+adjust(0));
	1661	//         if ((m_in_rdy_workaround_func(0) == 1 ) && (m_is_bad_line))
	1662	//            m_rdy_cycles += (42+adjust(0));
1670	1663
1671	1664	m_cycle++;
1672	1665	break;
r18589	r18590
1685	1678	m_ml_index = 0;
1686	1679	vic2_matrix_access();
1687	1680
1688		if ((m_in_rdy_workaround_func(0) == 2 ) && (m_is_bad_line))
1689		m_rdy_cycles += (41+adjust(0));
	1681	//         if ((m_in_rdy_workaround_func(0) == 2 ) && (m_is_bad_line))
	1682	//            m_rdy_cycles += (41+adjust(0));
1690	1683
1691	1684	m_cycle++;
1692	1685	break;
r18589	r18590
1709	1702
1710	1703	vic2_matrix_access();
1711	1704
1712		if ((m_in_rdy_workaround_func(0) == 3 ) && (m_is_bad_line))
1713		m_rdy_cycles += (40+adjust(0));
	1705	//         if ((m_in_rdy_workaround_func(0) == 3 ) && (m_is_bad_line))
	1706	//            m_rdy_cycles += (40+adjust(0));
1714	1707
1715	1708	m_cycle++;
1716	1709	break;
r18589	r18590
1746	1739	vic2_fetch_if_bad_line();
1747	1740	vic2_matrix_access();
1748	1741
1749		if ((m_in_rdy_workaround_func(0) == 4 ) && (m_is_bad_line))
1750		m_rdy_cycles += (40+adjust(0));
	1742	//         if ((m_in_rdy_workaround_func(0) == 4 ) && (m_is_bad_line))
	1743	//            m_rdy_cycles += (40+adjust(0));
1751	1744
1752	1745	m_cycle++;
1753	1746	break;
r18589	r18590
2554	2547	val = m_reg[offset];
2555	2548	break;
2556	2549
2557		case 0x2f:
2558		case 0x30:
	2550	case REGISTER_KCR:
	2551	case REGISTER_FAST:
2559	2552	if (IS_VICIIE)
2560	2553	{
2561	2554	val = m_reg[offset];
r18589	r18590
2782	2775	}
2783	2776	break;
2784	2777
2785		case 0x2f:
	2778	case REGISTER_KCR:
2786	2779	if (IS_VICIIE)
2787	2780	{
2788		DBG_LOG(2, "vic write", ("%.2x:%.2x\n", offset, data));
2789		m_reg[offset] = data;
	2781	m_reg[offset] = data | 0xf8;
	2782
	2783	m_out_k_func(0, data & 0x07);
2790	2784	}
2791	2785	break;
2792	2786
2793		case 0x30:
	2787	case REGISTER_FAST:
2794	2788	if (IS_VICIIE)
2795	2789	{
2796		m_reg[offset] = data;
	2790	if (BIT(m_reg[offset], 0) != BIT(data, 0))
	2791	{
	2792	m_cpu->set_unscaled_clock(clock() << BIT(data, 0));
	2793	printf("clock %u\n",clock() << BIT(data, 0));
	2794	}
	2795
	2796	m_reg[offset] = data | 0xfc;
	2797
2797	2798	m_on = !BIT(data, 0);
2798	2799	}
2799	2800	break;
r18589	r18590
2841	2842	{
2842	2843	return m_last_data;
2843	2844	}
2844
2845
2846		READ_LINE_MEMBER( mos8564_device::k0_r ) { return VIC2E_K0_LEVEL; }
2847		READ_LINE_MEMBER( mos8564_device::k1_r ) { return VIC2E_K1_LEVEL; }
2848		READ_LINE_MEMBER( mos8564_device::k2_r ) { return VIC2E_K2_LEVEL; }
2849
2850		READ_LINE_MEMBER( mos8566_device::k0_r ) { return VIC2E_K0_LEVEL; }
2851		READ_LINE_MEMBER( mos8566_device::k1_r ) { return VIC2E_K1_LEVEL; }
2852		READ_LINE_MEMBER( mos8566_device::k2_r ) { return VIC2E_K2_LEVEL; }

trunk/src/mess/video/mos6566.h

r18589	r18590
291	291	devcb_write_line   m_out_irq_cb;
292	292	devcb_write_line   m_out_rdy_cb;
293	293
294		devcb_read8         m_in_x_cb;
295		devcb_read8         m_in_y_cb;
296		devcb_read8         m_in_button_cb;
297
298		devcb_read8         m_in_rdy_cb;
	294	devcb_write8      m_out_k_cb;
299	295	};
300	296
301	297
r18589	r18590
443	439	UINT64 m_first_ba_cycle;
444	440	UINT8 m_device_suspended;
445	441
446		/* IRQ */
447	442	devcb_resolved_write_line      m_out_irq_func;
448
449		/* RDY */
450	443	devcb_resolved_write_line      m_out_rdy_func;
451		devcb_resolved_read8      m_in_rdy_workaround_func;
452
453		/* lightpen */
454		devcb_resolved_read8 m_in_lightpen_button_func;
455		devcb_resolved_read8 m_in_lightpen_x_func;
456		devcb_resolved_read8 m_in_lightpen_y_func;
	444	devcb_resolved_write8         m_out_k_func;
457	445	};
458	446
459	447
r18589	r18590
477	465	mos8562_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
478	466	};
479	467
480		class vic2e_device_interface
481		{
482		public:
483		vic2e_device_interface() {}
484		virtual ~vic2e_device_interface() {}
485	468
486		virtual DECLARE_READ_LINE_MEMBER( k0_r ) { return 1; }
487		virtual DECLARE_READ_LINE_MEMBER( k1_r ) { return 1; }
488		virtual DECLARE_READ_LINE_MEMBER( k2_r ) { return 1; }
489		};
490
491
492	469	// ======================> mos8564_device
493	470
494		class mos8564_device :  public mos6567_device, public vic2e_device_interface
	471	class mos8564_device :  public mos6567_device
495	472	{
496	473	public:
497	474	// construction/destruction
498	475	mos8564_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
499
500		DECLARE_READ_LINE_MEMBER( k0_r );
501		DECLARE_READ_LINE_MEMBER( k1_r );
502		DECLARE_READ_LINE_MEMBER( k2_r );
503	476	};
504	477
505	478
r18589	r18590
529	502
530	503	// ======================> mos8566_device
531	504
532		class mos8566_device :  public mos6569_device, public vic2e_device_interface
	505	class mos8566_device :  public mos6569_device
533	506	{
534	507	public:
535	508	// construction/destruction
536	509	mos8566_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
537
538		DECLARE_READ_LINE_MEMBER( k0_r );
539		DECLARE_READ_LINE_MEMBER( k1_r );
540		DECLARE_READ_LINE_MEMBER( k2_r );
541	510	};
542	511
543	512

trunk/src/mess/mess.lst

r18589	r18590
635	635
636	636	c128     // Commodore 128 - NTSC
637	637	c128cr   // Commodore 128CR - NTSC (proto?)
638		c128sfi   // Commodore 128 - PAL (Swedish / Finnish)
639		//c128fra   // Commodore 128 - PAL (French)
640		c128ger   // Commodore 128 - PAL (German)
641		//c128nor   // Commodore 128 - PAL (Norwegian)
	638	c128_se   // Commodore 128 - PAL (Swedish / Finnish)
	639	//c128_rr   // Commodore 128 - PAL (French)
	640	c128_de   // Commodore 128 - PAL (German)
	641	//c128_no   // Commodore 128 - PAL (Norwegian)
642	642	c128d    // Commodore 128D - PAL
643	643	c128dpr   // Commodore 128D - NTSC (proto)
644	644	c128dcr   // Commodore 128DCR - NTSC
645		c128drde  // Commodore 128DCR - PAL (German)
646		//c128drit  // Commodore 128DCR - PAL (Italian)
647		c128drsw  // Commodore 128DCR - PAL (Swedish)
	645	c128dr_de  // Commodore 128DCR - PAL (German)
	646	//c128dr_it  // Commodore 128DCR - PAL (Italian)
	647	c128dr_se  // Commodore 128DCR - PAL (Swedish)
648	648	c128d81   // Commodore 128D/81
649	649
650	650

trunk/src/mess/drivers/cbm2.c

r18589	r18590
1041	1041	M6509_TAG,
1042	1042	DEVCB_DRIVER_LINE_MEMBER(p500_state, vic_irq_w),
1043	1043	DEVCB_NULL, // RDY
1044		DEVCB_NULL,
1045		DEVCB_NULL,
1046		DEVCB_NULL,
1047	1044	DEVCB_NULL
1048	1045	};
1049	1046

trunk/src/mess/drivers/c128.c

r18589	r18590
2	2
3	3	TODO:
4	4
5		- C64 mode charrom read
6	5	- fix fast serial
7		- K0-K2 key line read
8	6	- clean up inputs
9	7	- expansion DMA
10		- inherit from c64_state and use common members from there
11	8
12	9	*/
13	10
r18589	r18590
46	43
47	44	int irq = m_cia1_irq || m_vic_irq || m_exp_irq;
48	45	int nmi = m_cia2_irq || restore || m_exp_nmi;
	46	//int aec = m_exp_dma && m_z80_busack;
	47	//int rdy = m_vic_aec && m_z80en && m_vic_ba;
	48	//int busreq = !m_z80en || !(m_z80_busack && !aec)
49	49
50	50	m_maincpu->set_input_line(INPUT_LINE_IRQ0, irq);
51	51
r18589	r18590
79	79	m_game = m_exp->game_r(ca, ba, rw, m_hiram);
80	80	m_exrom = m_exp->exrom_r(ca, ba, rw, m_hiram);
81	81
82		UINT32 input = clk << 26 | !m_va14 << 25 | m_charen << 24 |
	82	UINT32 input = clk << 26 | m_va14 << 25 | m_charen << 24 |
83	83	m_hiram << 23 | m_loram << 22 | ba << 21 | VMA5 << 20 | VMA4 << 19 | ms0 << 18 | ms1 << 17 | ms2 << 16 |
84	84	m_exrom << 15 | m_game << 14 | rw << 13 | aec << 12 | A10 << 11 | A11 << 10 | A12 << 9 | A13 << 8 |
85	85	A14 << 7 | A15 << 6 | z80io << 5 | m_z80en << 4 | ms3 << 3 | vicfix << 2 | dmaack << 1 | _128_256;
86	86
87		/*
88		000000000001111111112222222
89		012345678901234567890123456
90		--11--------0------10---0-- 000000000000000001
91		---0--------0-1----10----1- 000000000000000001
92		---0--------0--0---10----1- 000000000000000001
93		---0--1101--111-------1-0-- 000000000000000001
94		---0--1101--111--------10-- 000000000000000001
95		---0--1101--11-0-------10-- 000000000000000001
96		---11-1101--11--100-------- 000000000000000001
97		*/
98
99	87	UINT32 data = m_pla->read(input);
100	88
101	89	*sden = BIT(data, 0);
r18589	r18590
169	157	{
170	158	data = m_ram->pointer()[ma];
171	159	}
172		else if (!cas1)
	160	if (!cas1)
173	161	{
174	162	data = m_ram->pointer()[0x10000 | ma];
175	163	}
176	164	}
177		else if (!rom1)
	165	if (!rom1)
178	166	{
179	167	// CR: data = m_rom1[(ms3 << 14) | ((BIT(ta, 14) && BIT(offset, 13)) << 13) | (ta & 0x1000) | (offset & 0xfff)];
180	168	data = m_rom1[((BIT(ta, 14) && BIT(offset, 13)) << 13) | (ta & 0x1000) | (offset & 0xfff)];
181	169	}
182		else if (!rom2)
	170	if (!rom2)
183	171	{
184	172	data = m_rom2[offset & 0x3fff];
185	173	}
186		else if (!rom3)
	174	if (!rom3)
187	175	{
188	176	// CR: data = m_rom3[(BIT(offset, 15) << 14) | (offset & 0x3fff)];
189	177	data = m_rom3[offset & 0x3fff];
190	178	}
191		else if (!rom4)
	179	if (!rom4)
192	180	{
193	181	data = m_rom4[(ta & 0x1000) | (offset & 0x2fff)];
194	182	}
195		else if (!charom)
	183	if (!charom)
196	184	{
197	185	data = m_charom[(ms3 << 12) | (ta & 0xf00) | sa];
198	186	}
199		else if (!colorram)
	187	if (!colorram && aec)
200	188	{
201	189	data = m_color_ram[(clrbank << 10) | (ta & 0x300) | sa] & 0x0f;
202	190	}
203		else if (!vic)
	191	if (!vic)
204	192	{
205	193	data = m_vic->read(space, offset & 0x3f);
206	194	}
207		else if (!from1)
	195	if (!from1)
208	196	{
209	197	data = m_from[offset & 0x7fff];
210	198	}
211		else if (!iocs && BIT(offset, 10))
	199	if (!iocs && BIT(offset, 10))
212	200	{
213	201	switch ((BIT(offset, 11) << 2) | ((offset >> 8) & 0x03))
214	202	{
r18589	r18590
277	265	{
278	266	m_ram->pointer()[ma] = data;
279	267	}
280		else if (!cas1)
	268	if (!cas1)
281	269	{
282	270	m_ram->pointer()[0x10000 | ma] = data;
283	271	}
284	272	}
285		else if (!colorram && !gwe)
	273	if (!colorram && !gwe)
286	274	{
287		m_color_ram[(clrbank << 10) | (ta & 0x300) | sa] = data | 0xf0;
	275	m_color_ram[(clrbank << 10) | (ta & 0x300) | sa] = data & 0x0f;
288	276	}
289		else if (!vic)
	277	if (!vic)
290	278	{
291	279	m_vic->write(space, offset & 0x3f, data);
292	280	}
293		else if (!iocs && BIT(offset, 10))
	281	if (!iocs && BIT(offset, 10))
294	282	{
295	283	switch ((BIT(offset, 11) << 2) | ((offset >> 8) & 0x03))
296	284	{
r18589	r18590
504	492	static INPUT_PORTS_START( c128 )
505	493	PORT_INCLUDE( common_cbm_keyboard )      /* ROW0 -> ROW7 */
506	494
507		PORT_START( "KP0" )
	495	PORT_START( "K0" )
508	496	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD)            PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
509	497	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD)          PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
510	498	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD)          PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
r18589	r18590
514	502	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8_PAD)          PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
515	503	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Help") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(PGUP))
516	504
517		PORT_START( "KP1" )
	505	PORT_START( "K1" )
518	506	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3_PAD)          PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
519	507	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9_PAD)          PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
520	508	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6_PAD)          PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
r18589	r18590
524	512	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS_PAD)       PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD))
525	513	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ESC)            PORT_CHAR(UCHAR_MAMEKEY(ESC))
526	514
527		PORT_START( "KP2" )
	515	PORT_START( "K2" )
528	516	PORT_CONFNAME( 0x80, 0x00, "No Scroll (switch)") PORT_CODE(KEYCODE_F9)
529	517	PORT_CONFSETTING(   0x00, DEF_STR( Off ) )
530	518	PORT_CONFSETTING(   0x80, DEF_STR( On ) )
r18589	r18590
751	739	if (m_reset)
752	740	{
753	741	m_subcpu->reset();
754		//m_subcpu->set_state_int(M8502_PC, 0xff3d);
	742
755	743	m_reset = 0;
756	744	}
757	745	}
r18589	r18590
800	788
801	789	INTERRUPT_GEN_MEMBER( c128_state::frame_interrupt )
802	790	{
803		static const char *const c128ports[] = { "KP0", "KP1", "KP2" };
804
805	791	check_interrupts();
806	792
807		/* common keys input ports */
808	793	cbm_common_interrupt(&device);
809	794
810		/* Fix Me! Currently, neither left Shift nor Shift Lock work in c128, but reading the correspondent input produces a bug!
811		Hence, we overwrite the actual reading as it never happens */
812		if ((ioport("SPECIAL")->read() & 0x40))   //
	795	// hack in ShiftLock
	796	if ((ioport("SPECIAL")->read() & 0x40))
813	797	c64_keyline[1] |= 0x80;
814
815		/* c128 specific: keypad input ports */
816		for (int i = 0; i < 3; i++)
817		{
818		UINT8 value = 0xff;
819		value &= ~ioport(c128ports[i])->read();
820		m_keyline[i] = value;
821		}
822	798	}
823	799
824	800	WRITE_LINE_MEMBER( c128_state::vic_irq_w )
r18589	r18590
828	804	check_interrupts();
829	805	}
830	806
	807	WRITE8_MEMBER( c128_state::vic_k_w )
	808	{
	809	m_vic_k = data;
	810	}
	811
831	812	static MOS8564_INTERFACE( vic_intf )
832	813	{
833	814	SCREEN_VIC_TAG,
834		Z80A_TAG,
	815	M8502_TAG,
835	816	DEVCB_DRIVER_LINE_MEMBER(c128_state, vic_irq_w),
836	817	DEVCB_NULL,
837		DEVCB_NULL,
838		DEVCB_NULL,
839		DEVCB_NULL,
840		DEVCB_NULL
	818	DEVCB_DRIVER_MEMBER(c128_state, vic_k_w)
841	819	};
842	820
843	821
r18589	r18590
953	931
954	932	UINT8 data = 0xff;
955	933	UINT8 cia0porta = m_cia1->pa_r();
956		//vic2e_device_interface *intf = dynamic_cast<vic2e_device_interface*>(&m_vic);
957	934
958	935	data &= cbm_common_cia0_port_b_r(m_cia1, cia0porta);
959		/*
960		if (!intf->k0_r()) data &= m_keyline[0];
961		if (!intf->k1_r()) data &= m_keyline[1];
962		if (!intf->k2_r()) data &= m_keyline[2];
963		*/
	936
	937	if (!BIT(m_vic_k, 0)) data &= ~ioport("K0")->read();
	938	if (!BIT(m_vic_k, 1)) data &= ~ioport("K1")->read();
	939	if (!BIT(m_vic_k, 2)) data &= ~ioport("K2")->read();
	940
964	941	return data;
965	942	}
966	943
r18589	r18590
1242	1219
1243	1220	READ8_MEMBER( c128_state::exp_dma_r )
1244	1221	{
1245		return m_subcpu->space(AS_PROGRAM).read_byte(offset);
	1222	int ba = 0, aec = 1, z80io = 1;
	1223	offs_t vma = 0;
	1224
	1225	return read_memory(space, offset, vma, ba, aec, z80io);
1246	1226	}
1247	1227
1248	1228	WRITE8_MEMBER( c128_state::exp_dma_w )
1249	1229	{
1250		m_subcpu->space(AS_PROGRAM).write_byte(offset, data);
	1230	int ba = 0, aec = 1, z80io = 1;
	1231	offs_t vma = 0;
	1232
	1233	return write_memory(space, offset, data, vma, ba, aec, z80io);
1251	1234	}
1252	1235
1253	1236	WRITE_LINE_MEMBER( c128_state::exp_irq_w )
r18589	r18590
1266	1249
1267	1250	WRITE_LINE_MEMBER( c128_state::exp_dma_w )
1268	1251	{
1269		// TODO
	1252	m_exp_dma = state;
	1253
	1254	check_interrupts();
1270	1255	}
1271	1256
1272	1257	WRITE_LINE_MEMBER( c128_state::exp_reset_w )
r18589	r18590
1314	1299	void c128_state::machine_start()
1315	1300	{
1316	1301	cbm_common_init();
1317		m_keyline[0] = m_keyline[1] = m_keyline[2] = 0xff;
1318	1302
1319	1303	// find memory regions
1320	1304	m_rom1 = memregion(M8502_TAG)->base();
r18589	r18590
1326	1310
1327	1311	// allocate memory
1328	1312	m_color_ram.allocate(0x800);
	1313
	1314	// state saving
	1315	save_item(NAME(m_z80en));
	1316	save_item(NAME(m_loram));
	1317	save_item(NAME(m_hiram));
	1318	save_item(NAME(m_charen));
	1319	save_item(NAME(m_game));
	1320	save_item(NAME(m_exrom));
	1321	save_item(NAME(m_reset));
	1322	save_item(NAME(m_va14));
	1323	save_item(NAME(m_va15));
	1324	save_item(NAME(m_clrbank));
	1325	save_item(NAME(m_cnt1));
	1326	save_item(NAME(m_sp1));
	1327	save_item(NAME(m_iec_data_out));
	1328	save_item(NAME(m_cia1_irq));
	1329	save_item(NAME(m_cia2_irq));
	1330	save_item(NAME(m_vic_irq));
	1331	save_item(NAME(m_exp_irq));
	1332	save_item(NAME(m_exp_nmi));
	1333	save_item(NAME(m_exp_dma));
	1334	save_item(NAME(m_cass_rd));
	1335	save_item(NAME(m_iec_srq));
1329	1336	}
1330	1337
1331	1338
1332	1339	//-------------------------------------------------
1333		//  MACHINE_RESET( c64 )
	1340	//  MACHINE_RESET( c128 )
1334	1341	//-------------------------------------------------
1335	1342
1336	1343	void c128_state::machine_reset()
r18589	r18590
1361	1368
1362	1369	static MACHINE_CONFIG_START( ntsc, c128_state )
1363	1370	// basic hardware
1364		MCFG_CPU_ADD(Z80A_TAG, Z80, VIC6567_CLOCK)
1365		MCFG_CPU_PROGRAM_MAP( z80_mem)
1366		MCFG_CPU_IO_MAP( z80_io)
	1371	MCFG_CPU_ADD(Z80A_TAG, Z80, VIC6567_CLOCK*2)
	1372	MCFG_CPU_PROGRAM_MAP(z80_mem)
	1373	MCFG_CPU_IO_MAP(z80_io)
1367	1374	MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_VIC_TAG, c128_state, frame_interrupt)
1368	1375	MCFG_QUANTUM_PERFECT_CPU(Z80A_TAG)
1369	1376
1370	1377	MCFG_CPU_ADD(M8502_TAG, M8502, VIC6567_CLOCK)
1371		MCFG_CPU_PROGRAM_MAP( m8502_mem)
1372		MCFG_CPU_CONFIG( cpu_intf )
	1378	MCFG_CPU_PROGRAM_MAP(m8502_mem)
	1379	MCFG_CPU_CONFIG(cpu_intf)
1373	1380	MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_VIC_TAG, c128_state, frame_interrupt)
1374	1381	MCFG_QUANTUM_PERFECT_CPU(M8502_TAG)
1375	1382
r18589	r18590
1474	1481
1475	1482	static MACHINE_CONFIG_START( pal, c128_state )
1476	1483	// basic hardware
1477		MCFG_CPU_ADD(Z80A_TAG, Z80, VIC6569_CLOCK)
1478		MCFG_CPU_PROGRAM_MAP( z80_mem)
	1484	MCFG_CPU_ADD(Z80A_TAG, Z80, VIC6569_CLOCK*2)
	1485	MCFG_CPU_PROGRAM_MAP(z80_mem)
1479	1486	MCFG_CPU_IO_MAP(z80_io)
1480	1487	MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_VIC_TAG, c128_state, frame_interrupt)
1481	1488	MCFG_QUANTUM_PERFECT_CPU(Z80A_TAG)
1482	1489
1483	1490	MCFG_CPU_ADD(M8502_TAG, M8502, VIC6569_CLOCK)
1484		MCFG_CPU_PROGRAM_MAP( m8502_mem)
1485		MCFG_CPU_CONFIG( cpu_intf )
	1491	MCFG_CPU_PROGRAM_MAP(m8502_mem)
	1492	MCFG_CPU_CONFIG(cpu_intf)
1486	1493	MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_VIC_TAG, c128_state, frame_interrupt)
1487	1494	MCFG_QUANTUM_PERFECT_CPU(M8502_TAG)
1488	1495
r18589	r18590
1606	1613
1607	1614
1608	1615	//-------------------------------------------------
1609		//  ROM( c128ger )
	1616	//  ROM( c128_de )
1610	1617	//-------------------------------------------------
1611	1618
1612		ROM_START( c128ger )
	1619	ROM_START( c128_de )
1613	1620	ROM_REGION( 0x10000, M8502_TAG, 0 )
1614	1621	ROM_DEFAULT_BIOS("r4")
1615	1622	ROM_LOAD( "251913-01.u32", 0x0000, 0x4000, CRC(0010ec31) SHA1(765372a0e16cbb0adf23a07b80f6b682b39fbf88) )
r18589	r18590
1635	1642
1636	1643
1637	1644	//-------------------------------------------------
1638		//  ROM( c128sfi )
	1645	//  ROM( c128_se )
1639	1646	//-------------------------------------------------
1640	1647
1641		ROM_START( c128sfi )
	1648	ROM_START( c128_se )
1642	1649	ROM_REGION( 0x10000, M8502_TAG, 0 )
1643	1650	ROM_LOAD( "325182-01.u32", 0x0000, 0x4000, CRC(2aff27d3) SHA1(267654823c4fdf2167050f41faa118218d2569ce) ) // "C128 64 Sw/Fi"
1644	1651	ROM_LOAD( "318018-02.u33", 0x4000, 0x4000, CRC(2ee6e2fa) SHA1(60e1491e1d5782e3cf109f518eb73427609badc6) )
r18589	r18590
1723	1730
1724	1731
1725	1732	//-------------------------------------------------
1726		//  ROM( c128drde )
	1733	//  ROM( c128dr_de )
1727	1734	//-------------------------------------------------
1728	1735
1729		ROM_START( c128drde )
	1736	ROM_START( c128dr_de )
1730	1737	ROM_REGION( 0x10000, M8502_TAG, 0 )
1731	1738	ROM_LOAD( "318022-02.u34", 0x4000, 0x8000, CRC(af1ae1e8) SHA1(953dcdf5784a6b39ef84dd6fd968c7a03d8d6816) )
1732	1739	ROM_LOAD( "318077-01.u32", 0x0000, 0x4000, CRC(eb6e2c8f) SHA1(6b3d891fedabb5335f388a5d2a71378472ea60f4) )
r18589	r18590
1745	1752
1746	1753
1747	1754	//-------------------------------------------------
1748		//  ROM( c128drsw )
	1755	//  ROM( c128dr_se )
1749	1756	//-------------------------------------------------
1750	1757
1751		ROM_START( c128drsw )
	1758	ROM_START( c128dr_se )
1752	1759	ROM_REGION( 0x10000, M8502_TAG, 0 )
1753	1760	ROM_LOAD( "318022-02.u34", 0x4000, 0x8000, CRC(af1ae1e8) SHA1(953dcdf5784a6b39ef84dd6fd968c7a03d8d6816) )
1754	1761	ROM_LOAD( "318034-01.u32", 0x0000, 0x4000, CRC(cb4e1719) SHA1(9b0a0cef56d00035c611e07170f051ee5e63aa3a) )
r18589	r18590
1778	1785	//  SYSTEM DRIVERS
1779	1786	//**************************************************************************
1780	1787
1781		//    YEAR  NAME    PARENT  COMPAT  MACHINE     INPUT   INIT                        COMPANY                        FULLNAME                                     FLAGS
1782		COMP( 1985, c128,      0,     0,   c128,     c128, driver_device,    0,     "Commodore Business Machines", "Commodore 128 (NTSC)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1783		COMP( 1985, c128sfi,   c128,  0,   c128pal,  c128swe, driver_device, 0,  "Commodore Business Machines", "Commodore 128 (Sweden/Finland)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1784		//COMP( 1985, c128fra,   c128,  0,   c128pal,  c128fra, driver_device, 0,  "Commodore Business Machines", "Commodore 128 (France)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1785		COMP( 1985, c128ger,   c128,  0,   c128pal,  c128ger, driver_device, 0,  "Commodore Business Machines", "Commodore 128 (Germany)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1786		//COMP( 1985, c128nor,   c128,  0,   c128pal,  c128ita, driver_device, 0,  "Commodore Business Machines", "Commodore 128 (Norway)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1787		COMP( 1985, c128dpr,   c128,  0,   c128d,    c128, driver_device,    0,   "Commodore Business Machines", "Commodore 128D (NTSC, prototype)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1788		COMP( 1985, c128d,     c128,  0,   c128dpal, c128, driver_device,    0,"Commodore Business Machines", "Commodore 128D (PAL)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	1788	//    YEAR  NAME        PARENT  COMPAT  MACHINE     INPUT       INIT                COMPANY                        FULLNAME                                 FLAGS
	1789	COMP( 1985, c128,      0,      0,      c128,      c128,      driver_device,   0,   "Commodore Business Machines", "Commodore 128 (NTSC)",               GAME_SUPPORTS_SAVE )
	1790	COMP( 1985, c128_se,   c128,   0,      c128pal,   c128swe,   driver_device,   0,   "Commodore Business Machines", "Commodore 128 (Sweden/Finland)",      GAME_SUPPORTS_SAVE )
	1791	//COMP( 1985, c128fra,   c128,  0,   c128pal,  c128fra, driver_device, 0,  "Commodore Business Machines", "Commodore 128 (France)", GAME_SUPPORTS_SAVE )
	1792	COMP( 1985, c128_de,   c128,   0,      c128pal,   c128ger,   driver_device,   0,   "Commodore Business Machines", "Commodore 128 (Germany)",            GAME_SUPPORTS_SAVE )
	1793	//COMP( 1985, c128nor,   c128,  0,   c128pal,  c128ita, driver_device, 0,  "Commodore Business Machines", "Commodore 128 (Norway)", GAME_SUPPORTS_SAVE )
	1794	COMP( 1985, c128dpr,   c128,   0,      c128d,      c128,      driver_device,   0,   "Commodore Business Machines", "Commodore 128D (NTSC, prototype)",      GAME_SUPPORTS_SAVE )
	1795	COMP( 1985, c128d,      c128,   0,      c128dpal,   c128,      driver_device,   0,   "Commodore Business Machines", "Commodore 128D (PAL)",               GAME_SUPPORTS_SAVE )
1789	1796
1790		COMP( 1985, c128cr,    c128,  0,   c128,     c128, driver_device,    0,     "Commodore Business Machines", "Commodore 128CR (NTSC, prototype?)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1791		COMP( 1986, c128dcr,   c128,  0,   c128dcr,  c128, driver_device,    0, "Commodore Business Machines", "Commodore 128DCR (NTSC)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1792		COMP( 1986, c128drde,  c128,  0,   c128dcrp, c128ger, driver_device, 0,"Commodore Business Machines", "Commodore 128DCR (Germany)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	1797	COMP( 1985, c128cr,      c128,   0,      c128,      c128,      driver_device,   0,   "Commodore Business Machines", "Commodore 128CR (NTSC, prototype)",      GAME_SUPPORTS_SAVE )
	1798	COMP( 1986, c128dcr,   c128,   0,      c128dcr,   c128,      driver_device,   0,   "Commodore Business Machines", "Commodore 128DCR (NTSC)",            GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	1799	COMP( 1986, c128dr_de,   c128,   0,      c128dcrp,   c128ger,   driver_device,   0,   "Commodore Business Machines", "Commodore 128DCR (Germany)",         GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1793	1800	//COMP( 1986, c128drit,  c128,  0,   c128dcrp, c128ita, driver_device, 0,"Commodore Business Machines", "Commodore 128DCR (Italy)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1794		COMP( 1986, c128drsw,  c128,  0,   c128dcrp, c128swe, driver_device, 0,"Commodore Business Machines", "Commodore 128DCR (Sweden/Finland)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1795		COMP( 1986, c128d81,   c128,  0,   c128d81,  c128, driver_device,    0, "Commodore Business Machines", "Commodore 128D/81 (NTSC, prototype)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	1801	COMP( 1986, c128dr_se,   c128,   0,      c128dcrp,   c128swe,   driver_device,   0,   "Commodore Business Machines", "Commodore 128DCR (Sweden/Finland)",      GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	1802	COMP( 1986, c128d81,   c128,   0,      c128d81,   c128,      driver_device,   0,   "Commodore Business Machines", "Commodore 128D/81 (NTSC, prototype)",   GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )

trunk/src/mess/drivers/c64.c

r18589	r18590
7	7	- tsuit215 test failures
8	8	- IRQ (WRONG $DC0D)
9	9	- NMI (WRONG $DD0D)
10		- all CIA tests
	10	- some CIA tests
11	11
12	12	- 64C PLA dump
13	13	- clean up inputs
r18589	r18590
49	49	{
50	50	int restore = BIT(ioport("SPECIAL")->read(), 7);
51	51
52		m_maincpu->set_input_line(M6510_IRQ_LINE, m_cia1_irq || m_vic_irq || m_exp_irq);
53		m_maincpu->set_input_line(INPUT_LINE_NMI, m_cia2_irq || restore || m_exp_nmi);
	52	int irq = m_cia1_irq || m_vic_irq || m_exp_irq;
	53	int nmi = m_cia2_irq || restore || m_exp_nmi;
	54	//int rdy = m_exp_dma && m_vic_ba;
54	55
55		m_cia1->flag_w(m_cass_rd && m_iec_srq);
	56	m_maincpu->set_input_line(M6510_IRQ_LINE, irq);
	57	m_maincpu->set_input_line(INPUT_LINE_NMI, nmi);
	58
	59	int flag = m_cass_rd && m_iec_srq;
	60
	61	m_cia1->flag_w(flag);
56	62	}
57	63
58	64
r18589	r18590
62	68	//**************************************************************************
63	69
64	70	//-------------------------------------------------
65		//  bankswitch -
	71	//  read_pla -
66	72	//-------------------------------------------------
67	73
68		void c64_state::bankswitch(offs_t offset, offs_t va, int rw, int aec, int ba, int cas, int *casram, int *basic, int *kernal, int *charom, int *grw, int *io, int *roml, int *romh)
	74	void c64_state::read_pla(offs_t offset, offs_t va, int rw, int aec, int ba, int cas, int *casram, int *basic, int *kernal, int *charom, int *grw, int *io, int *roml, int *romh)
69	75	{
70	76	int game = m_exp->game_r(offset, ba, rw, m_hiram);
71	77	int exrom = m_exp->exrom_r(offset, ba, rw, m_hiram);
72	78
73		UINT32 input = VA12 << 15 | VA13 << 14 | game << 13 | exrom << 12 | rw << 11 | aec << 10 | ba << 9 | A12 << 8 | A13 << 7 | A14 << 6 | A15 << 5 | m_va14 << 4 | m_charen << 3 | m_hiram << 2 | m_loram << 1 | cas;
	79	UINT32 input = VA12 << 15 | VA13 << 14 | game << 13 | exrom << 12 | rw << 11 | aec << 10 | ba << 9 | A12 << 8 |
	80	A13 << 7 | A14 << 6 | A15 << 5 | m_va14 << 4 | m_charen << 3 | m_hiram << 2 | m_loram << 1 | cas;
	81
74	82	UINT32 data = m_pla->read(input);
75	83
76	84	*casram = BIT(data, 0);
r18589	r18590
88	96	//  read_memory -
89	97	//-------------------------------------------------
90	98
91		UINT8 c64_state::read_memory(address_space &space, offs_t offset, int ba, int casram, int basic, int kernal, int charom, int io, int roml, int romh)
	99	UINT8 c64_state::read_memory(address_space &space, offs_t offset, offs_t va, int rw, int aec, int ba, int cas)
92	100	{
	101	int casram, basic, kernal, charom, grw, io, roml, romh;
93	102	int io1 = 1, io2 = 1;
94	103
	104	read_pla(offset, va, rw, !aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
	105
95	106	UINT8 data = 0xff;
96	107
97		if (ba)
	108	if (!aec)
98	109	{
99	110	data = m_vic->bus_r();
100	111	}
r18589	r18590
103	114	{
104	115	data = m_ram->pointer()[offset];
105	116	}
106		else if (!basic)
	117	if (!basic)
107	118	{
108	119	data = m_basic[offset & 0x1fff];
109	120	}
110		else if (!kernal)
	121	if (!kernal)
111	122	{
112	123	data = m_kernal[offset & 0x1fff];
113	124	}
114		else if (!charom)
	125	if (!charom)
115	126	{
116	127	data = m_charom[offset & 0xfff];
117	128	}
118		else if (!io)
	129	if (!io)
119	130	{
120	131	switch ((offset >> 10) & 0x03)
121	132	{
r18589	r18590
128	139	break;
129	140
130	141	case 2: // COLOR
131		data = m_color_ram[offset & 0x3ff] | 0xf0;
	142	data = m_color_ram[offset & 0x3ff] & 0x0f;
132	143	break;
133	144
134	145	case 3: // CIAS
r18589	r18590
159	170
160	171
161	172	//-------------------------------------------------
162		//  read -
	173	//  write_memory -
163	174	//-------------------------------------------------
164	175
165		READ8_MEMBER( c64_state::read )
	176	void c64_state::write_memory(address_space &space, offs_t offset, UINT8 data, int rw, int aec, int ba, int cas)
166	177	{
167		offs_t va = 0;
168		int rw = 1, aec = 0, ba = 1, cas = 0;
169	178	int casram, basic, kernal, charom, grw, io, roml, romh;
170
171		bankswitch(offset, va, rw, aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
172
173		return read_memory(space, offset, ba, casram, basic, kernal, charom, io, roml, romh);
174		}
175
176
177		//-------------------------------------------------
178		//  write -
179		//-------------------------------------------------
180
181		WRITE8_MEMBER( c64_state::write )
182		{
183	179	offs_t va = 0;
184		int rw = 0, aec = 0, ba = 1, cas = 0;
185	180	int io1 = 1, io2 = 1;
186		int casram, basic, kernal, charom, grw, io, roml, romh;
187	181
188		bankswitch(offset, va, rw, aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
189
	182	read_pla(offset, va, rw, !aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
	183
190	184	if (offset < 0x0002)
191	185	{
192	186	// write to internal CPU register
r18589	r18590
197	191	{
198	192	m_ram->pointer()[offset] = data;
199	193	}
200		else if (!io)
	194	if (!io)
201	195	{
202	196	switch ((offset >> 10) & 0x03)
203	197	{
r18589	r18590
241	235
242	236
243	237	//-------------------------------------------------
	238	//  read -
	239	//-------------------------------------------------
	240
	241	READ8_MEMBER( c64_state::read )
	242	{
	243	offs_t va = 0;
	244	int rw = 1, aec = 1, ba = 1, cas = 0;
	245
	246	return read_memory(space, offset, va, rw, aec, ba, cas);
	247	}
	248
	249
	250	//-------------------------------------------------
	251	//  write -
	252	//-------------------------------------------------
	253
	254	WRITE8_MEMBER( c64_state::write )
	255	{
	256	int rw = 0, aec = 1, ba = 1, cas = 0;
	257
	258	write_memory(space, offset, data, rw, aec, ba, cas);
	259	}
	260
	261
	262	//-------------------------------------------------
244	263	//  vic_videoram_r -
245	264	//-------------------------------------------------
246	265
247	266	READ8_MEMBER( c64_state::vic_videoram_r )
248	267	{
249		offset = (!m_va15 << 15) | (!m_va14 << 14) | offset;
	268	offs_t va = (!m_va15 << 15) | (!m_va14 << 14) | offset;
	269	int rw = 1, aec = 0, ba = 0, cas = 0;
250	270
251		int rw = 1, aec = 1, ba = 0, cas = 0;
252		int casram, basic, kernal, charom, grw, io, roml, romh;
253		bankswitch(0xffff, offset, rw, aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
254
255		return read_memory(space, offset, ba, casram, basic, kernal, charom, io, roml, romh);
	271	return read_memory(space, offset, va, rw, aec, ba, cas);
256	272	}
257	273
258	274
r18589	r18590
386	402	SCREEN_TAG,
387	403	M6510_TAG,
388	404	DEVCB_DRIVER_LINE_MEMBER(c64_state, vic_irq_w),
389		DEVCB_NULL, // RDY
390	405	DEVCB_NULL,
391		DEVCB_NULL,
392		DEVCB_NULL,
393	406	DEVCB_NULL
394	407	};
395	408
r18589	r18590
844	857	check_interrupts();
845	858	}
846	859
	860	WRITE_LINE_MEMBER( c64_state::exp_dma_w )
	861	{
	862	if (m_exp_dma != state)
	863	{
	864	m_exp_dma = state;
	865
	866	m_maincpu->set_input_line(INPUT_LINE_HALT, m_exp_dma);
	867	}
	868	}
	869
847	870	WRITE_LINE_MEMBER( c64_state::exp_reset_w )
848	871	{
849	872	if (state == ASSERT_LINE)
r18589	r18590
858	881	DEVCB_DRIVER_MEMBER(c64_state, exp_dma_w),
859	882	DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_irq_w),
860	883	DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_nmi_w),
861		DEVCB_CPU_INPUT_LINE(M6510_TAG, INPUT_LINE_HALT),
	884	DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_dma_w),
862	885	DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_reset_w)
863	886	};
864	887
r18589	r18590
907	930	save_item(NAME(m_vic_irq));
908	931	save_item(NAME(m_exp_irq));
909	932	save_item(NAME(m_exp_nmi));
	933	save_item(NAME(m_exp_dma));
910	934	save_item(NAME(m_cass_rd));
911	935	save_item(NAME(m_iec_srq));
912	936	}
r18589	r18590
974	998
975	999	// sound hardware
976	1000	MCFG_SPEAKER_STANDARD_MONO("mono")
977		MCFG_SOUND_ADD(MOS6851_TAG, SID6581, VIC6567_CLOCK)
	1001	MCFG_SOUND_ADD(MOS6581_TAG, SID6581, VIC6567_CLOCK)
978	1002	MCFG_SOUND_CONFIG(sid_intf)
979	1003	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
980	1004	MCFG_SOUND_ADD("dac", DAC, 0)
r18589	r18590
1050	1074	//-------------------------------------------------
1051	1075
1052	1076	static MACHINE_CONFIG_DERIVED_CLASS( ntsc_c, ntsc, c64c_state )
1053		MCFG_SOUND_REPLACE(MOS6851_TAG, SID8580, VIC6567_CLOCK)
	1077	MCFG_SOUND_REPLACE(MOS6581_TAG, SID8580, VIC6567_CLOCK)
1054	1078	MCFG_SOUND_CONFIG(sid_intf)
1055	1079	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
1056	1080	MACHINE_CONFIG_END
r18589	r18590
1073	1097
1074	1098	// sound hardware
1075	1099	MCFG_SPEAKER_STANDARD_MONO("mono")
1076		MCFG_SOUND_ADD(MOS6851_TAG, SID6581, VIC6569_CLOCK)
	1100	MCFG_SOUND_ADD(MOS6581_TAG, SID6581, VIC6569_CLOCK)
1077	1101	MCFG_SOUND_CONFIG(sid_intf)
1078	1102	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
1079	1103	MCFG_SOUND_ADD("dac", DAC, 0)
r18589	r18590
1127	1151	//-------------------------------------------------
1128	1152
1129	1153	static MACHINE_CONFIG_DERIVED_CLASS( pal_c, pal, c64c_state )
1130		MCFG_SOUND_REPLACE(MOS6851_TAG, SID8580, VIC6569_CLOCK)
	1154	MCFG_SOUND_REPLACE(MOS6581_TAG, SID8580, VIC6569_CLOCK)
1131	1155	MCFG_SOUND_CONFIG(sid_intf)
1132	1156	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
1133	1157	MACHINE_CONFIG_END
r18589	r18590
1150	1174
1151	1175	// sound hardware
1152	1176	MCFG_SPEAKER_STANDARD_MONO("mono")
1153		MCFG_SOUND_ADD(MOS6851_TAG, SID8580, VIC6569_CLOCK)
	1177	MCFG_SOUND_ADD(MOS6581_TAG, SID8580, VIC6569_CLOCK)
1154	1178	MCFG_SOUND_CONFIG(sid_intf)
1155	1179	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
1156	1180	MCFG_SOUND_ADD("dac", DAC, 0)

trunk/src/mess/drivers/vic10.c

r18589	r18590
207	207	cbm_common_interrupt(&device);
208	208	}
209	209
210		READ8_MEMBER( vic10_state::vic_lightpen_x_cb )
211		{
212		return ioport("LIGHTX")->read() & ~0x01;
213		}
214
215		READ8_MEMBER( vic10_state::vic_lightpen_y_cb )
216		{
217		return ioport("LIGHTY")->read() & ~0x01;
218		}
219
220		READ8_MEMBER( vic10_state::vic_lightpen_button_cb )
221		{
222		return ioport("OTHER")->read() & 0x04;
223		}
224
225	210	WRITE_LINE_MEMBER( vic10_state::vic_irq_w )
226	211	{
227	212	m_vic_irq = state;
r18589	r18590
229	214	check_interrupts();
230	215	}
231	216
232		READ8_MEMBER( vic10_state::vic_rdy_cb )
233		{
234		return ioport("CYCLES")->read() & 0x07;
235		}
236
237	217	static MOS6566_INTERFACE( vic_intf )
238	218	{
239	219	SCREEN_TAG,
240	220	M6510_TAG,
241	221	DEVCB_DRIVER_LINE_MEMBER(vic10_state, vic_irq_w),
242	222	DEVCB_NULL,
243		DEVCB_DRIVER_MEMBER(vic10_state, vic_lightpen_x_cb),
244		DEVCB_DRIVER_MEMBER(vic10_state, vic_lightpen_y_cb),
245		DEVCB_DRIVER_MEMBER(vic10_state, vic_lightpen_button_cb),
246		DEVCB_DRIVER_MEMBER(vic10_state, vic_rdy_cb)
	223	DEVCB_NULL
247	224	};
248	225
249	226

Previous

199869 Revisions

Next

---

© 1997-2024 The MAME Team