trunk/src/emu/cpu/i8085/i8085.c
| r18532 | r18533 | |
|---|
| 569 | 569 | case 0x25: M_DCR(cpustate->HL.b.h); break; /* DCR H */ |
| 570 | 570 | case 0x26: M_MVI(cpustate->HL.b.h); break; /* MVI H,nn */ |
| 571 | 571 | case 0x27: cpustate->WZ.b.h = cpustate->AF.b.h; /* DAA */ |
| 572 | | if (cpustate->AF.b.l&VF) { |
| 572 | if (IS_8085(cpustate) && cpustate->AF.b.l&VF) { |
| 573 | 573 | if ((cpustate->AF.b.l&HF) | ((cpustate->AF.b.h&0xf)>9)) cpustate->WZ.b.h-=6; |
| 574 | 574 | if ((cpustate->AF.b.l&CF) | (cpustate->AF.b.h>0x99)) cpustate->WZ.b.h-=0x60; |
| 575 | 575 | } |
| r18532 | r18533 | |
|---|
| 580 | 580 | |
| 581 | 581 | cpustate->AF.b.l=(cpustate->AF.b.l&3) | (cpustate->AF.b.h&0x28) | (cpustate->AF.b.h>0x99) | ((cpustate->AF.b.h^cpustate->WZ.b.h)&0x10) | ZSP[cpustate->WZ.b.h]; |
| 582 | 582 | cpustate->AF.b.h=cpustate->WZ.b.h; |
| 583 | | |
| 584 | | if (IS_8080(cpustate)) cpustate->AF.b.l &= 0xd5; // Ignore not used flags |
| 585 | 583 | break; |
| 586 | 584 | |
| 587 | 585 | case 0x28: if (IS_8085(cpustate)) { /* LDEH nn */ |
| r18532 | r18533 | |
|---|
| 888 | 886 | case 0xf2: M_JMP( !(cpustate->AF.b.l & SF) ); break; /* JP nnnn */ |
| 889 | 887 | case 0xf3: set_inte(cpustate, 0); break; /* DI */ |
| 890 | 888 | case 0xf4: M_CALL( !(cpustate->AF.b.l & SF) ); break; /* CP nnnn */ |
| 891 | | case 0xf5: M_PUSH(AF); break; /* PUSH A */ |
| 889 | case 0xf5: if (IS_8080(cpustate)) cpustate->AF.b.l = (cpustate->AF.b.l&~(X3F|X5F))|VF; // on 8080, VF=1 and X3F=0 and X5F=0 always! (we don't have to check for it elsewhere) |
| 890 | M_PUSH(AF); break; /* PUSH A */ |
| 892 | 891 | case 0xf6: cpustate->WZ.b.l = ARG(cpustate); M_ORA(cpustate->WZ.b.l); break; /* ORI nn */ |
| 893 | 892 | case 0xf7: M_RST(6); break; /* RST 6 */ |
| 894 | 893 | |