trunk/src/emu/cpu/superfx/superfx.c
| r18478 | r18479 | |
| 863 | 863 | case 0x04: // ROL |
| 864 | 864 | { |
| 865 | 865 | UINT16 carry = *(cpustate->sreg) & 0x8000; |
| 866 | | superfx_gpr_write(cpustate, cpustate->dreg_idx, (*(cpustate->sreg) << 1) | (SUPERFX_SFR_CY_SET ? 1 : 0)); |
| 866 | superfx_gpr_write(cpustate, cpustate->dreg_idx, (*(cpustate->sreg) << 1) | SUPERFX_SFR_CY_SET); |
| 867 | 867 | cpustate->sfr &= ~SUPERFX_SFR_CY; |
| 868 | 868 | cpustate->sfr |= carry ? SUPERFX_SFR_CY : 0; |
| 869 | 869 | superfx_dreg_sfr_sz_update(cpustate); |
| r18478 | r18479 | |
| 1103 | 1103 | cpustate->sfr |= (~(*(cpustate->sreg) ^ cpustate->r[op & 0xf]) & (cpustate->r[op & 0xf] ^ r) & 0x8000) ? SUPERFX_SFR_OV : 0; |
| 1104 | 1104 | break; |
| 1105 | 1105 | case SUPERFX_SFR_ALT1: // ADC |
| 1106 | | r += cpustate->r[op & 0xf] + ((cpustate->sfr & SUPERFX_SFR_CY) ? 1 : 0); |
| 1106 | r += cpustate->r[op & 0xf] + SUPERFX_SFR_CY_SET; |
| 1107 | 1107 | cpustate->sfr |= (~(*(cpustate->sreg) ^ cpustate->r[op & 0xf]) & (cpustate->r[op & 0xf] ^ r) & 0x8000) ? SUPERFX_SFR_OV : 0; |
| 1108 | 1108 | break; |
| 1109 | 1109 | case SUPERFX_SFR_ALT2: // ADDI |
| r18478 | r18479 | |
| 1111 | 1111 | cpustate->sfr |= (~(*(cpustate->sreg) ^ (op & 0xf)) & ((op & 0xf) ^ r) & 0x8000) ? SUPERFX_SFR_OV : 0; |
| 1112 | 1112 | break; |
| 1113 | 1113 | case SUPERFX_SFR_ALT3: // ADCI |
| 1114 | | r += (op & 0xf) + ((cpustate->sfr & SUPERFX_SFR_CY) ? 1 : 0); |
| 1114 | r += (op & 0xf) + SUPERFX_SFR_CY_SET; |
| 1115 | 1115 | cpustate->sfr |= (~(*(cpustate->sreg) ^ (op & 0xf)) & ((op & 0xf) ^ r) & 0x8000) ? SUPERFX_SFR_OV : 0; |
| 1116 | 1116 | break; |
| 1117 | 1117 | } |
| r18478 | r18479 | |
| 1137 | 1137 | superfx_gpr_write(cpustate, cpustate->dreg_idx, r); |
| 1138 | 1138 | break; |
| 1139 | 1139 | case SUPERFX_SFR_ALT1: // SBC |
| 1140 | | r = *(cpustate->sreg) - cpustate->r[op & 0xf] - ((cpustate->sfr & SUPERFX_SFR_CY) ? 0 : 1); |
| 1140 | r = *(cpustate->sreg) - cpustate->r[op & 0xf] - SUPERFX_SFR_CY_CLEAR; |
| 1141 | 1141 | cpustate->sfr |= ((*(cpustate->sreg) ^ cpustate->r[op & 0xf]) & (*(cpustate->sreg) ^ r) & 0x8000) ? SUPERFX_SFR_OV : 0; |
| 1142 | 1142 | superfx_gpr_write(cpustate, cpustate->dreg_idx, r); |
| 1143 | 1143 | break; |
trunk/src/mess/drivers/pc9801.c
| r18478 | r18479 | |
| 2525 | 2525 | m_rtc->oe_w(1); |
| 2526 | 2526 | |
| 2527 | 2527 | upd765a_device *fdc; |
| 2528 | | fdc = machine().device<upd765a_device>("upd765_2hd"); |
| 2528 | fdc = machine().device<upd765a_device>(":upd765_2hd"); |
| 2529 | 2529 | fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(pc9801_state::fdc_2hd_irq), this)); |
| 2530 | 2530 | fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(pc9801_state::fdc_2hd_drq), this)); |
| 2531 | 2531 | |
| 2532 | | fdc = machine().device<upd765a_device>("upd765_2dd"); |
| 2532 | fdc = machine().device<upd765a_device>(":upd765_2dd"); |
| 2533 | 2533 | fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(pc9801_state::fdc_2dd_irq), this)); |
| 2534 | 2534 | fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(pc9801_state::fdc_2dd_drq), this)); |
| 2535 | 2535 | |
| r18478 | r18479 | |
| 2562 | 2562 | MACHINE_RESET_CALL_MEMBER(pc9801); |
| 2563 | 2563 | |
| 2564 | 2564 | /* 2dd interface ready line is ON by default */ |
| 2565 | | floppy_mon_w(floppy_get_device(machine(), 0), CLEAR_LINE); |
| 2566 | | floppy_mon_w(floppy_get_device(machine(), 1), CLEAR_LINE); |
| 2567 | | floppy_drive_set_ready_state(floppy_get_device(machine(), 0), (1), 0); |
| 2568 | | floppy_drive_set_ready_state(floppy_get_device(machine(), 1), (1), 0); |
| 2565 | floppy_image_device *floppy; |
| 2566 | floppy = machine().device<floppy_connector>(":upd765_2hd:0")->get_device(); |
| 2567 | if (floppy) |
| 2568 | floppy->mon_w(CLEAR_LINE); |
| 2569 | floppy = machine().device<floppy_connector>(":upd765_2hd:1")->get_device(); |
| 2570 | if (floppy) |
| 2571 | floppy->mon_w(CLEAR_LINE); |
| 2569 | 2572 | |
| 2570 | 2573 | { |
| 2571 | 2574 | UINT8 op_mode; |